Grid line electrode, photovoltaic cell and preparation method thereof, photovoltaic module and photovoltaic system

Abstract

The invention relates to the technical field of solar cells, in particular to a grid line electrode, a photovoltaic cell, a preparation method of the photovoltaic cell, a photovoltaic module and a photovoltaic system. The preparation method of the grid line electrode comprises the following steps: providing a transparent conductive oxide layer; electrode slurry is printed on the transparent conductive oxide layer, the electrode slurry can corrode the transparent conductive oxide layer and permeate into the transparent conductive oxide layer to form a doped region, and then solidification is carried out to form a grid line electrode. The contact resistance of the grid line electrode can be reduced.

Description

Grid electrodes, photovoltaic cells and their fabrication methods, photovoltaic modules, photovoltaic systems Technical Field

[0001] This application relates to the field of solar cell technology, and in particular to a grid electrode, a photovoltaic cell and its preparation method, a photovoltaic module, and a photovoltaic system. Background Technology

[0002] Perovskite-crystalline silicon tandem solar cells have become an important development direction in the photovoltaic field due to their high conversion efficiency. However, the curing temperature of perovskite-crystalline silicon tandem solar cells is relatively low (curing temperature <130℃), so the grid electrodes need to be prepared using electrode paste. The resulting grid electrodes have a high contact resistance, which directly affects the performance of the cell.

[0003] It should be noted that the above content is not necessarily prior art, nor is it intended to limit the scope of patent protection of this application. Summary of the Invention

[0004] This application provides a grid electrode, a photovoltaic cell and its preparation method, a photovoltaic module, and a photovoltaic system to solve or alleviate one or more of the technical problems mentioned above.

[0005] The first aspect of this application provides a method for preparing a gate electrode, comprising the following steps: providing a transparent conductive oxide layer; printing an electrode paste on the transparent conductive oxide layer, wherein the electrode paste is capable of etching the transparent conductive oxide layer and penetrating therein to form a doped region, and then curing it to form a gate electrode.

[0006] The electrode paste preparation method of this application embodiment involves infiltrating the electrode paste into a transparent conductive oxide layer to form a mixture with the transparent conductive oxide, doping the transparent conductive oxide layer, and forming a doped layer at the interface between the two, thereby increasing the contact area and optimizing the lateral conductivity. In addition, this application forms a doped layer by etching, which can effectively reduce the Schottky barrier between the transparent conductive oxide (TCO) and the electrode, which is beneficial to reducing the contact resistance.

[0007] Optionally, in the fabrication method of the gate electrode, the doped region includes an Ag-In alloy. This further reduces the interfacial barrier between the TCO and the electrode.

[0008] Optionally, in the method for fabricating the gate electrode, the transparent conductive oxide layer comprises an indium zinc oxide-based transparent conductive oxide; the electrode paste comprises an acidic etchant. This allows for acid etching of the target TCO to penetrate into it.

[0009] Furthermore, the indium zinc oxide-based transparent conductive oxide includes at least one of indium zinc oxide and indium zinc tin oxide.

[0010] Optionally, the acidic etchant includes organic acids; organic acids can act as dispersants and stabilizers in electrode slurries, adjusting pH and reactivity to promote curing.

[0011] Furthermore, based on the mass of the electrode slurry, the content of the acidic etchant is 0.1% to 5%. This ensures adequate corrosion.

[0012] Optionally, in the method for preparing the gate electrode, the electrode paste, based on 100% of its total mass, comprises the following components: 70%–90% silver powder, 0.1%–5% acidic etchant, 0.1%–5% thermoplastic resin, 3%–30% solvent, 0.1%–1% coupling agent, and 0.05%–1% additives. Thus, the presence of the acidic etchant allows for the formation of doped regions.

[0013] Optionally, the silver powder includes spherical particles and flake-shaped particles. Thus, the combination of the two can form a conductive channel.

[0014] Optionally, the thermoplastic resin includes acrylic resin and / or polyvinyl alcohol. This reduces the curing temperature of the slurry.

[0015] Optionally, in the method for preparing the grid electrode, the curing temperature is below 130°C. This avoids damage to the battery body.

[0016] Furthermore, the curing temperature is 70℃~130℃.

[0017] Optionally, in the method for fabricating the gate electrode, the depth of the doped region is less than the height of the corresponding transparent conductive oxide layer.

[0018] Optionally, in the fabrication method of the perovskite tandem solar cell, the depth of the doped region is equal to the height of the first transparent conductive oxide layer, and a third transparent conductive oxide layer is provided on the side of the first transparent conductive oxide layer near the perovskite top cell.

[0019] Optionally, in the fabrication method of the perovskite tandem solar cell, the depth of the doped region is equal to the height of the second transparent conductive oxide layer, and a fourth transparent conductive oxide layer is provided on the side of the second transparent conductive oxide layer near the perovskite top solar cell.

[0020] A second aspect of this application provides a method for fabricating a perovskite tandem solar cell, including the method for fabricating the grid electrodes of the first aspect of this application. This reduces the contact resistance of the grid electrodes in the perovskite tandem solar cell and improves the conversion efficiency.

[0021] Optionally, the method for fabricating the perovskite tandem solar cell includes the following steps: providing a tandem solar cell body, the tandem solar cell body comprising a crystalline silicon bottom cell and a perovskite top cell stacked together, the crystalline silicon bottom cell having a first transparent conductive oxide layer on the side away from the perovskite top cell, and the perovskite top cell having a second transparent conductive oxide layer on the side away from the crystalline silicon bottom cell; printing electrode paste on the first transparent conductive oxide layer and / or the second transparent conductive oxide layer, the electrode paste being capable of etching the corresponding transparent conductive oxide layer and penetrating into it to form a doped region, and then curing to form a grid electrode.

[0022] This reduces the contact resistance of the grid electrodes on the front and / or back sides of the perovskite tandem solar cell.

[0023] Optionally, in the fabrication method of this perovskite tandem solar cell, the depth of the doped region is equal to the height of the first transparent conductive oxide layer, and a third transparent conductive oxide layer is provided on the side of the first transparent conductive oxide layer near the perovskite top cell. Therefore, the third transparent conductive oxide layer can be set as a corrosion-resistant TCO, thereby avoiding damage to the cell body.

[0024] Optionally, in the fabrication method of this perovskite tandem solar cell, the depth of the doped region is equal to the height of the second transparent conductive oxide layer, and a fourth transparent conductive oxide layer is provided on the side of the second transparent conductive oxide layer near the top of the perovskite solar cell. Therefore, the third transparent conductive oxide layer can be set as a corrosion-resistant TCO, thereby avoiding damage to the cell body. Optionally, in the fabrication method of this perovskite tandem solar cell, the first transparent conductive oxide layer is a strip-shaped transparent conductive oxide contact region spaced apart, and the width of the strip-shaped transparent conductive oxide contact region is greater than or equal to the width of the grid electrode located thereon. Therefore, while satisfying the grid electrode contact requirements, the area of ​​the TCO can be effectively reduced, reducing the impact on light absorption.

[0025] Optionally, in the fabrication method of this perovskite tandem solar cell, the second transparent conductive oxide is a strip-shaped transparent conductive oxide contact region with layered separation, and the width of the strip-shaped transparent conductive oxide contact region is greater than or equal to the width of the grid electrode located thereon. Therefore, while satisfying the grid electrode contact requirements, the area of ​​the total organic carbon (TCO) can be effectively reduced, thus minimizing its impact on light absorption.

[0026] A third aspect of this application provides a perovskite tandem solar cell, including a crystalline silicon bottom cell and a perovskite top cell. The crystalline silicon bottom cell has a first transparent conductive oxide layer on the side away from the perovskite top cell, and the perovskite top cell has a second transparent conductive oxide layer on the side away from the crystalline silicon bottom cell. The first transparent conductive oxide layer on the side away from the perovskite top cell and the second transparent conductive oxide layer on the side away from the crystalline silicon bottom cell are each independently provided with a gate electrode. The gate electrode satisfies at least one of the following characteristics: a portion of the gate electrode on the first transparent conductive oxide layer is embedded within the first transparent conductive oxide layer and forms a doped region with the first transparent conductive oxide; a portion of the gate electrode on the second transparent conductive oxide layer is embedded within the second transparent conductive oxide layer and forms a doped region with the second transparent conductive oxide.

[0027] Therefore, the presence of doped regions can increase the contact area between the gate electrode and the TCO, thereby optimizing the contact resistance.

[0028] Furthermore, the doped region includes the presence of Ag-In alloy. This reduces the interfacial barrier.

[0029] A fourth aspect of this application provides a photovoltaic module, which includes a perovskite tandem cell as described in the second or third aspect. Thus, integrating a perovskite tandem cell with "lower grid electrode contact resistance" into the photovoltaic module can result in a photovoltaic module with a higher fill factor and higher output power.

[0030] A fifth aspect of this application discloses a photovoltaic system comprising the photovoltaic modules described in the fourth aspect. This results in advantages such as higher power generation capacity, more stable operation, and lower lifecycle costs. Attached Figure Description

[0031] In the accompanying drawings, unless otherwise specified, the same reference numerals throughout the various drawings denote the same or similar parts or elements. These drawings are not necessarily drawn to scale. It should be understood that these drawings depict only some embodiments disclosed in this application and should not be construed as limiting the scope of this application.

[0032] Figure 1 is a flowchart of the method for preparing a titanium dioxide tandem solar cell according to an embodiment of this application; Figure 2 is a schematic diagram of the structure of the titanium dioxide tandem solar cell provided in an embodiment of this application.

[0033] Explanation of reference numerals in the attached figures: 1-n-type silicon wafer, 2-first intrinsic amorphous silicon layer, 3-first doped microcrystalline silicon layer, 4-second intrinsic amorphous silicon layer, 5-second doped microcrystalline silicon layer, 6-first transparent conductive oxide layer, 7-third doped microcrystalline silicon layer, 8-intermediate interconnect layer, 9-hole transport layer, 10-perovskite light absorption layer, 11-electron transport layer, 12-buffer layer, 13-fourth transparent conductive oxide layer, 14-back gate electrode, 15-second transparent conductive oxide layer, 16-front gate electrode. Detailed Implementation

[0034] The embodiments of this application are described in detail below, examples of which are illustrated in the accompanying drawings. In the drawings, for clarity, the dimensions of layers, regions, and elements, as well as their relative dimensions, may be exaggerated. Throughout, the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain this application, and should not be construed as limiting this application. It should be noted that, unless otherwise specified, the embodiments and features in the embodiments of this application can be combined with each other.

[0035] It should be understood that when an element or layer is referred to as "on," "adjacent to," "connected to," or "coupled to" other elements or layers, it may be directly on, adjacent to, connected to, or coupled to other elements or layers, or there may be intervening elements or layers. Conversely, when an element is referred to as "directly on," "directly adjacent to," "directly connected to," or "directly coupled to" other elements or layers, there are no intervening elements or layers. It should be understood that although the terms first, second, third, etc., may be used to describe various elements, components, areas, layers, and / or portions, these elements, components, areas, layers, and / or portions should not be limited by these terms. These terms are only used to distinguish one element, component, area, layer, or portion from another element, component, area, layer, or portion. Therefore, without departing from the teachings of this application, the first element, component, area, layer, or portion discussed below may be referred to as a second element, component, area, layer, or portion. And the discussion of a second element, component, area, layer, or portion does not imply that the first element, component, area, layer, or portion necessarily exists in this application.

[0036] In this application, unless otherwise expressly specified and limited, the terms "installation," "connection," "joining," and "fixing," etc., should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral part; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components, unless otherwise expressly limited. Those skilled in the art can understand the specific meaning of the above terms in this application according to the specific circumstances.

[0037] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this application are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such terms can be used interchangeably where appropriate so that the embodiments of this application described herein can be implemented, for example, in orders other than those illustrated or described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover a non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0038] In this application, when numerical intervals (i.e., numerical ranges) are involved, unless otherwise specified, the distribution of selectable numerical values ​​within the numerical interval is considered continuous, and includes the two endpoints of the numerical interval (i.e., the minimum and maximum values), as well as every numerical value between these two endpoints. Unless otherwise specified, when a numerical interval refers only to integers within that numerical interval, it includes the two endpoint integers of the numerical range, as well as every integer between the two endpoints, which is equivalent to directly listing every integer. When multiple numerical ranges are provided to describe features or characteristics, these numerical ranges can be merged. In other words, unless otherwise specified, the numerical ranges disclosed in this application should be understood to include any and all subranges included therein. The "numerical value" in the numerical interval can be any quantitative value, such as a number, percentage, ratio, etc. The term "numerical interval" can be broadly included to include percentage intervals, ratio intervals, proportion intervals, etc.

[0039] The excessive contact resistance of the grid electrodes in perovskite-crystalline silicon tandem solar cells is mainly caused by the following mechanisms: 1. Insufficient curing of the metal grid electrodes: Low-temperature curing fails to melt the silver powder, relying solely on resin shrinkage to form mechanical contact. This results in gaps between silver particles and the presence of an insulating resin layer, hindering electron transport. Additionally, it can cause breakage of the conductive network. In high-temperature processes, silver particles melt to form a continuous conductive network, while at low temperatures, the surface oxide layer remains intact, increasing contact resistance. 2. Organic residues hinder conductivity: At low temperatures, organic solvents in the silver paste (such as terpineol and ethyl cellulose) cannot be completely decomposed, forming a 5 nm~10 nm insulating carbonized layer at the grid electrode / TCO interface, significantly increasing interface resistance. 3. Interface energy level mismatch and barrier effect: Work function mismatch: The TCO work function (>4.5 eV) is higher than that of the metal grid electrode (<4.5 eV), preventing the formation of a doped layer through thermal diffusion during low-temperature processes; Schottky barrier elevation: A barrier forms at the interface. Calculations show that for every 0.1 eV increase in the barrier, the contact resistivity increases by approximately 2.5 × 10⁻⁶. -4 Ω·cm². IV. Deterioration of lateral conductivity and sharp reduction in contact area: The effective contact area of ​​the gate electrode / TCO decreases from 85% in the high-temperature process to about 50%; tunneling current decay: According to the Simmons tunneling model (J∝exp(-d√φ)), when the contact spacing d increases from 0.5 nm to 2 nm, the tunneling current decreases by two orders of magnitude; grain boundary scattering intensifies: The grain size of the silver gate electrode decreases from 200 nm to 50 nm, and the grain boundary density increases by 4 times; the mean free path of carriers is shortened from 38 nm to 12 nm (Hall effect test), and the mobility decreases by 60%.

[0040] The following provides a definition of the terminology used in this application.

[0041] In this embodiment of the application, the electrode paste refers to silver paste with a curing temperature below 130°C.

[0042] This application provides a technical solution for a grid electrode, a photovoltaic cell, a method for fabricating the same, a photovoltaic module, and a photovoltaic system. Based on this, the problem of large contact area in the grid electrode is solved. See below for details.

[0043] Exemplary embodiments according to this application will now be described in more detail with reference to the accompanying drawings. It should be understood that these exemplary embodiments may be implemented in many different forms and should not be construed as being limited to the embodiments set forth herein.

[0044] This application provides a method for fabricating a gate electrode, comprising the following steps: Step 1, providing a transparent conductive oxide layer; Step 2, printing an electrode paste onto the transparent conductive oxide layer, wherein the electrode paste can etch the transparent conductive oxide layer and penetrate into it to form a doped region, followed by curing to form a gate electrode. Thus, the electrode paste penetrating into the transparent conductive oxide layer can form a mixture with the transparent conductive oxide, thereby increasing the contact area between the two and optimizing the lateral conductivity. Furthermore, the method of forming a doped layer through etching effectively reduces the Schottky interface barrier between the TCO and the electrode, which is beneficial for reducing contact resistance.

[0045] It is understood that the amount of electrode paste penetrating into the transparent conductive oxide layer decreases with increasing depth, and the doped layer in the embodiments of this application is a gradient doped layer.

[0046] In an optional embodiment, the doped region comprises an Ag-In alloy. This further enhances the interfacial barrier between the TCO and the electrode.

[0047] In an optional embodiment, the electrode paste includes an acidic etchant. This allows the target TCO to be acid-etched in order to penetrate it.

[0048] Furthermore, acidic etchants include organic acids. Organic acids can act as dispersants and stabilizers in electrode slurries, adjusting pH and reactivity, promoting curing / curing precursor reactions, and controlling volatilization. Selecting organic acids as acidic etchants that match the corrosive behavior of the target TCO can optimize the formation of the conductive network.

[0049] Furthermore, based on the mass of the electrode paste, the content of the acidic etchant is 0.1% to 5%. This allows for the etching of TCO while controlling the residual amount. For example, the content of the acidic etchant can be 0.1%, 1%, 2%, 3%, 4%, 5%, etc.

[0050] In an optional embodiment, the transparent conductive oxide layer can be an indium zinc oxide-based transparent conductive oxide; thus, when exposed to an acidic etchant, acid corrosion can occur, allowing the electrode paste to penetrate into the transparent conductive oxide layer.

[0051] For example, the indium zinc oxide-based transparent conductive oxide may include at least one of indium zinc oxide (IZO, In2O3-ZnO) and indium zinc tin oxide (IZTO, In2O3-ZnO-SnO2). Thus, the presence of zinc ions can promote acid etching. For example, the acid etchant may be acetic acid and / or citric acid.

[0052] In some optional embodiments, the electrode paste, based on 100% of its total mass, comprises the following components: 70%–90% silver powder, 0.1%–5% acidic etchant, 0.1%–5% thermoplastic resin, 3%–30% solvent, 0.1%–1% coupling agent, and 0.05%–1% additives. Thus, the presence of the acidic etchant allows for the formation of doped regions, the coupling agent enhances the bonding force between the electrode paste and the TCO, and the additives optimize interface and mechanical properties.

[0053] Optionally, the coupling agent can be KH-560 (GPTMS, γ-(2,3-epoxypropoxy)propyltrimethoxysilane), KH-550 (APTES, γ-aminopropyltriethoxysilane), KH-590 (MPTES, γ-mercaptopropyltriethoxysilane), isopropyltris(dioctylpyrophosphate)titanate, etc.

[0054] Optionally, the solvent can be diethylene glycol butyl ether acetate, propylene glycol methyl ether acetate, ethyl acetate, ethanol, isopropanol, n-butanol, propylene glycol methyl ether (PM), n-propyl acetate, etc.

[0055] Optional additives may include surfactants and defoamers. Surfactants can be anionic or nonionic surfactants (such as fatty acid derivatives and polyvinylpyrrolidone, PVP), which disperse through electrostatic repulsion and steric hindrance. Defoamers may be made of materials such as silicone defoamers or non-silicone defoamers (acrylic polymers, etc.). They are used to suppress and eliminate bubbles during production stirring and printing processes, preventing pinhole defects in the conductive film. Ethyl cellulose may also be an additive.

[0056] Optionally, the silver powder includes spherical particles and flake particles. The combination of these two types can form a conductive channel. Preferably, the mass ratio of spherical particles to flake particles is (1.5–19):1, which facilitates the formation of conductive channels with extremely low porosity during the curing process. For example, the mass ratio of spherical particles to flake particles can be 1.5:1, 5:1, 8:1, 12:1, 17:1, 19:1, etc.

[0057] Optionally, the particle size of the spherical particles is 0.1 μm to 3 μm. This increases the specific surface area to enhance the curing driving force and also facilitates the formation of a dense conductive network.

[0058] Optionally, the particle size of the flaky particles is 2μm to 10μm. This increases the specific surface area to enhance the curing driving force and also facilitates the formation of a dense conductive network.

[0059] The particle size (geometric diameter) in this embodiment was obtained by observing the particle size distribution using a scanning electron microscope.

[0060] Optionally, the thermoplastic resin includes acrylic resin and / or polyvinyl alcohol. This allows for a lower curing temperature, keeping the curing temperature below 130°C.

[0061] A second aspect of this application provides a method for fabricating a perovskite tandem solar cell, including the method for fabricating the grid electrodes of the first aspect. This reduces the contact resistance of the grid electrodes in the perovskite tandem solar cell and improves the conversion efficiency.

[0062] In some embodiments, the method for fabricating the perovskite tandem solar cell includes the following steps: S1, providing a tandem solar cell body, the tandem solar cell body including a crystalline silicon bottom cell and a perovskite top cell stacked together, the crystalline silicon bottom cell having a first transparent conductive oxide layer on the side away from the perovskite top cell, and the perovskite top cell having a second transparent conductive oxide layer on the side away from the crystalline silicon bottom cell; thereby, electrodes can be fabricated thereon to form a tandem solar cell.

[0063] Optionally, the stacked battery body can be a two-junction battery or a multi-junction battery.

[0064] It is worth noting that an intermediate connecting layer is provided between different sub-cells. For example, in a tandem cell where the main body is a two-junction cell consisting of a crystalline silicon bottom cell and a perovskite top cell, the intermediate connecting layer can be a transparent conductive oxide layer (TCO). This serves to provide electrical interconnection, optical coupling, and interface passivation.

[0065] Electrode paste is printed on a first transparent conductive oxide layer and / or a second transparent conductive oxide layer. The electrode paste can etch the corresponding transparent conductive oxide layer and penetrate into it to form a doped region, which is then cured to form a gate electrode. Thus, the electrode paste penetrating into the transparent conductive oxide layer can form a mixture with the transparent conductive oxide, thereby increasing the contact area between the two and optimizing the lateral conductivity. Furthermore, the doped layer formed by etching in this application can effectively reduce the Schottky interface barrier between the TCO and the electrode, which is beneficial for reducing contact resistance.

[0066] In some optional embodiments, the curing temperature for this perovskite tandem solar cell is below 130°C. This avoids damage to the tandem solar cell. Preferably, the curing temperature is between 70°C and 130°C. This allows for better curing of the electrode slurry. At the curing temperature, the organic solvents in the electrode slurry evaporate, and the acidic etchant performs a micro-corrosion reaction on the TCO surface, destroying the surface oxide layer. Silver in the electrode slurry, having high surface energy, undergoes atomic rearrangement, forming a liquid-like layer (not completely melted). Under the action of the organic additive (ethyl cellulose), silver ions form molecular bridges with In₂O₃ on the IZO surface, and the reducing agent in the organic additive can further reduce the In₂O₃ content. 3+When reduced to In, Ag has a strong chemical affinity for In and tends to form stable intermetallic compounds, namely Ag-In alloys.

[0067] It is worth noting that in S2, the electrode slurry can etch the corresponding transparent conductive oxide layer and penetrate into it to form a doped region. The formed doped region does not contact the tandem cell body, and this effect can be achieved in various ways. For example, the penetration depth of the electrode slurry is less than the height of the corresponding transparent conductive oxide layer; or, the penetration depth of the electrode slurry is less than or equal to the height of the corresponding transparent conductive oxide layer, and another transparent conductive oxide layer (acid-resistant) is provided on the side of the transparent conductive oxide layer near the tandem cell body. For example, the depth of the doped region is equal to the height of the first transparent conductive oxide layer, and a third transparent conductive oxide layer is provided on the side of the first transparent conductive oxide layer near the perovskite top cell; the depth of the doped region is equal to the height of the second transparent conductive oxide layer, and a fourth transparent conductive oxide layer is provided on the side of the second transparent conductive oxide layer near the perovskite top cell.

[0068] This application does not limit the transparent conductive oxide layers (first transparent conductive oxide layer and second transparent conductive oxide layer). As long as the gate electrode and its doped region are completely located on it, it can be a single, continuous thin film layer or a strip-shaped transparent conductive oxide layer with spacing. Preferably, the first transparent conductive oxide layer is a strip-shaped transparent conductive oxide contact region with spacing, and the width of the strip-shaped transparent conductive oxide contact region is greater than or equal to the width of the gate electrode located on it. Therefore, while ensuring gate electrode contact, the area of ​​the TCO can be effectively reduced, thus reducing the impact on light absorption.

[0069] Preferably, the second transparent conductive oxide is a strip-shaped transparent conductive oxide contact area disposed in layers, and the width of the strip-shaped transparent conductive oxide contact area is greater than or equal to the width of the gate electrode located thereon. Therefore, while satisfying the gate electrode contact requirement, the area of ​​the TCO can be effectively reduced, thus minimizing its impact on light absorption.

[0070] A third aspect of this application discloses a perovskite tandem solar cell comprising a crystalline silicon bottom cell and a perovskite top cell. The crystalline silicon bottom cell has a first transparent conductive oxide layer on the side away from the perovskite top cell, and the perovskite top cell has a second transparent conductive oxide layer on the side away from the crystalline silicon bottom cell. The first transparent conductive oxide layer on the side away from the perovskite top cell and the second transparent conductive oxide layer on the side away from the crystalline silicon bottom cell are each independently provided with a gate electrode. The gate electrode satisfies at least one of the following characteristics: the gate electrode portion on the first transparent conductive oxide layer is embedded within the first transparent conductive oxide layer and forms a doped region with the first transparent conductive oxide; the gate electrode portion on the second transparent conductive oxide layer is embedded within the second transparent conductive oxide layer and forms a doped region with the second transparent conductive oxide. Therefore, the presence of the doped region can increase the contact area between the gate electrode and the TCO (Total Coefficient of Conductive Oxidation), thereby optimizing the contact resistance and improving the device performance.

[0071] Optionally, the doped region includes an Ag-In alloy. This reduces the interfacial barrier.

[0072] A fourth aspect of this application provides a photovoltaic module, which includes a perovskite tandem cell as described in the second or third aspect. Therefore, integrating a perovskite tandem cell with "lower grid electrode contact resistance" into the photovoltaic module can result in a photovoltaic module with a higher fill factor and higher output power.

[0073] A photovoltaic system according to a fifth aspect of this application includes photovoltaic modules as described in the fourth aspect. This results in advantages such as higher power generation capacity, more stable operation, and lower lifecycle costs.

[0074] The following section will conduct performance tests on the structure or fabrication method of the perovskite tandem solar cell provided in the embodiments of this application, as well as related comparative examples.

[0075] [Example 1] The specific structure of the perovskite tandem solar cell is shown in Figure 2. The specific fabrication process is as follows: Step 1: Provide an n-type silicon wafer 1 with a resistivity of ~2 Ω·cm and a thickness of 300 μm; Step 2: Fabricate a 5 nm ia-Si, i.e., the first intrinsic amorphous silicon layer 2, on the front side of the n-type silicon wafer 1 using PECVE; Step 3: Fabricate a 5 nm ia-Si, i.e., the second intrinsic amorphous silicon layer 4, on the back side of the n-type silicon wafer 1 using PECVE; Step 4: Fabricate a 10 nm p-uc-Si, i.e., the first doped microcrystalline silicon layer 3, on the first intrinsic amorphous silicon layer 2 using PECVE; Step 5: Fabricate a 10 nm n-uc-Si, i.e., the second doped microcrystalline silicon layer 5, on the second intrinsic amorphous silicon layer 4 using PECVE; Step 6: Fabricate a 10 nm p-uc-Si, i.e., the third doped microcrystalline silicon layer 7, on the second doped microcrystalline silicon layer 5 using PECVE; Step 7: Fabricate an 80 nm layer on the first doped microcrystalline silicon layer 3 using magnetron sputtering. Step 8: Prepare a 20nm thick ITO layer, i.e., the first transparent conductive oxide layer 6, on the third doped microcrystalline silicon layer 7 using magnetron sputtering; Step 9: Prepare a 20nm thick NiO layer on the intermediate connecting layer 8 using magnetron sputtering. x Step 10: Prepare a perovskite light absorption layer 10 with a thickness of 1000 nm on the hole transport layer 9 using slit coating; Step 11: Apply C to the perovskite light absorption layer 10 using thermal evaporation. 60 Step 11: A 20 nm thick SnO2 layer, i.e., a buffer layer 12, is prepared on the electron transport layer 11 using ALD. Step 12: A 100 nm thick FTO layer, i.e., the fourth transparent conductive oxide layer 13, is prepared on the buffer layer 12 using magnetron sputtering. Step 13: A 50 nm thick patterned IZO layer, i.e., a strip-shaped IZO layer, i.e., the second transparent conductive oxide layer 15, is prepared using magnetron sputtering. Step 14: The back grid line electrode 14 is printed using screen printing and cured at 80 °C for 15 min. The electrode paste used is: 85 wt% silver powder, 3 wt% acrylic resin, 10 wt% n-propyl acetate, 1 wt% isopropyltris(dioctyl pyrophosphoryloxy)titanate, and 1 wt% ethyl cellulose. The silver powder is in the form of flake particles with a particle size of 2 μm to 10 μm.

[0076] Step 16: Print the front grid line electrode 16 using screen printing technology and cure it at 80℃ for 10 min. During the curing process, the electrode paste penetrates into the second transparent conductive oxide layer 15 to form a doped region. The electrode paste used is: 85wt% silver powder, 3wt% acetic acid, 3wt% acrylic resin, 7wt% n-propyl acetate, 1wt% isopropyltris(dioctylpyrophosphoryloxy)titanate, and 1wt% ethyl cellulose. The silver powder is in the form of flake particles with a particle size of 2μm to 10μm.

[0077] [Example 2] The rest is the same as in Example 1, except that the electrode paste used in step 15 is the same as the electrode paste in step 16 of Example 1.

[0078]

Example 3

[0079]

Example 4

[0080]

Example 5

[0081]

Comparative Example 1

[0082]

Comparative Example 2

[0083] I. The IV curves of test examples 1 to 5 and comparative examples 1 to 2 are shown in Table 1.

[0084] The fill factor (FF) used in this article refers to the actual maximum available power (P). m or V mp ×J mp The ratio of the theoretical (not practically available) power (Jsc × Voc) to the theoretical (not practically available) power (Jsc × Voc). Therefore, FF can be determined by the following formula: FF = (V mp ×J mp ) / (J sc ×V oc Jmp and Vmp represent the current density and voltage at the maximum power point (Pm), respectively, which is obtained by changing the resistance in the circuit until J×V reaches its maximum value; Jsc and Voc represent the short-circuit current and open-circuit voltage, respectively. The fill factor is a key parameter for evaluating solar cells. Commercial solar cells typically have a fill factor of approximately 60% or higher.

[0085] The open-circuit voltage (Voc) used in this paper is the potential difference between the anode and cathode of the device under conditions of no external load connection.

[0086] The short-circuit current density (Jsc) used in this article is the maximum current density flowing through the output terminal of a photovoltaic cell or module when it is short-circuited (voltage V=0) under STC conditions.

[0087] The power conversion efficiency (PCE) of solar cells used in this article refers to the percentage of power converted from absorbed light into electrical energy. The PCE of a solar cell can be measured under standard test conditions (STC) based on incident light irradiance (E: W / m²). 2 ) and the surface area of ​​solar cells (Ac:m 2 The STC is calculated by dividing by the point of maximum power (Pm). STC typically refers to the value at a temperature of 25°C and an irradiance of 1000 W / m². 2 The spectrum of air quality 1.5 (AM1.5).

[0088] 2. The contact resistance of the front grid line electrodes of Examples 1-5 and Comparative Examples 1-2 was tested, and the data are shown in Table 1.

[0089] Test data are shown in Table 1:

[0090] As shown in Table 1 above, the fill factor and conversion efficiency of Examples 1-5 are superior to those of Comparative Examples 1 and 2. This is because the electrode slurry in these examples can penetrate into the transparent conductive oxide layer to form a mixture with the transparent conductive oxide, thereby increasing the contact area between the two and optimizing the electrode adhesion. In addition, the doped layer formed by etching in this application can effectively reduce the Schottky interface barrier between the TCO and the electrode, reduce the contact resistance, and thus increase the fill factor and conversion efficiency. Furthermore, doped layers were formed at both the top and bottom of Example 2, resulting in the best conversion efficiency of the battery. In Comparative Example 1, the slurry does not contain acid, and the contact resistance between the slurry and the TCO is relatively large, belonging to pure physical contact. Due to the low curing temperature, the contact interface is not smooth, and the gaps lead to high contact resistance and low fill factor (FF). In Comparative Example 2, FTO is acid-resistant and cannot form a doped layer. Moreover, the mobility of FTO is lower than that of IZO film, and its transmittance is lower than that of ITO, resulting in the lowest FF and conversion efficiency.

[0091] This application embodiment can also provide a photovoltaic module (not shown), which includes the perovskite tandem solar cell as described above. The perovskite tandem solar cell can be connected in series and / or in parallel with one or more other solar cells in a predetermined manner. Multiple cells can form a cell string, and adjacent cells can be connected together by string welding.

[0092] This application provides a photovoltaic system including the photovoltaic modules described in any of the above embodiments. The advantages of the aforementioned photovoltaic modules are also present in this photovoltaic system, and will not be repeated here. The application fields of the aforementioned photovoltaic system are wide, not limited to photovoltaic power plants, such as ground-mounted power plants, rooftop power plants, and floating power plants, but also including various devices and apparatuses that utilize solar energy for power generation, such as user solar power supplies, solar streetlights, solar cars, and solar buildings. Of course, it is understood that the application scenarios of the photovoltaic system are not limited to these; that is, the photovoltaic system can be applied in all fields that require solar energy for power generation. Taking a photovoltaic power generation system network as an example, the photovoltaic system may include a photovoltaic array, a combiner box, and an inverter. The photovoltaic array may be an array combination of multiple photovoltaic modules; for example, multiple photovoltaic modules can form multiple photovoltaic arrays. The photovoltaic array is connected to the combiner box, which can collect the current generated by the photovoltaic array. The collected current flows through the inverter and is converted into AC power required by the mains power grid before being connected to the mains power grid to achieve solar power supply.

[0093] It should be noted that the terms "center," "longitudinal," "lateral," "length," "width," "thickness," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," "clockwise," "counterclockwise," "axial," "radial," and "circumferential," etc., are used only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation on this application. The directional terms "inner" and "outer" refer to the inside or outside relative to the outline of the component itself. For example, if a device in the drawings is inverted, a device described as "above" or "on top of" other devices or structures will subsequently be positioned as "below" or "under" other devices or structures. Thus, the exemplary term "above" can include both "above" and "below." The device may also be positioned in other different ways (rotated 90 degrees or in other orientations), and the spatial relative descriptions used herein are interpreted accordingly.

[0094] It should also be noted that the terms "one embodiment," "another embodiment," and "embodiment" used in this application refer to specific features, structures, or characteristics described in connection with that embodiment, which are included in at least one embodiment described in the general description of this application. The appearance of the same expression in multiple places in the specification does not necessarily refer to the same embodiment. Furthermore, when a specific feature, structure, or characteristic is described in connection with any embodiment, the intention is to suggest that implementing such a feature, structure, or characteristic in conjunction with other embodiments also falls within the scope of this application.

[0095] In the above embodiments, the descriptions of each embodiment have different focuses. For parts not described in detail in a certain embodiment, please refer to the relevant descriptions in other embodiments.

[0096] It should also be noted that the above are merely preferred embodiments of this application and do not limit the scope of patent protection of this application. Any equivalent structural or procedural changes made using the content of this application’s specification and drawings, or direct or indirect applications in other related technical fields, are similarly included within the scope of patent protection of this application.

Claims

1. A method for fabricating a grid line electrode, characterized in that, Includes the following steps: Provides a transparent conductive oxide layer; Electrode paste is printed on the transparent conductive oxide layer. The electrode paste can corrode the transparent conductive oxide layer and penetrate into it to form a doped region. Then, it is cured to form a gate electrode.

2. The method for preparing the gate electrode according to claim 1, characterized in that, The doped region includes an Ag-In alloy.

3. The method for preparing the grid electrode according to claim 1, characterized in that, The transparent conductive oxide layer comprises an indium zinc oxide-based transparent conductive oxide; the electrode paste comprises an acidic etchant.

4. The method for preparing the gate electrode according to claim 3, characterized in that, The indium zinc oxide-based transparent conductive oxide includes at least one of indium zinc oxide and indium zinc tin oxide.

5. The method for preparing the grid electrode according to claim 3, characterized in that, The acidic etchant includes organic acids; and / or the content of the acidic etchant is 0.1% to 5% based on the mass of the electrode paste.

6. The method for preparing the gate electrode according to claim 1, characterized in that, The electrode paste, based on a total mass of 100%, consists of the following components: 70%–90% silver powder, 0.1%–5% acidic etchant, 0.1%–5% thermoplastic resin, 3%–30% solvent, 0.1%–1% coupling agent, and 0.05%–1% additives.

7. The method for preparing the gate electrode according to claim 6, characterized in that, The silver powder includes spherical particles and flake particles; and / or the acidic etchant includes organic acids; and / or the thermoplastic resin includes acrylic resin and / or polyvinyl alcohol.

8. The method for preparing the gate electrode according to claim 1, characterized in that, The curing temperature is below 130°C.

9. The method for preparing the gate electrode according to claim 8, characterized in that, The curing temperature is 70℃~130℃.

10. The method for fabricating the gate electrode according to claim 1, characterized in that, The depth of the doped region is less than the height of the transparent conductive oxide layer.

11. A method for preparing a perovskite tandem solar cell, characterized in that, The method for preparing the gate electrode according to any one of claims 1 to 10.

12. The method for preparing a perovskite tandem solar cell according to claim 11, characterized in that, The method includes the following steps: providing a stacked battery body, the stacked battery body comprising a crystalline silicon bottom battery and a perovskite top battery stacked together, the crystalline silicon bottom battery having a first transparent conductive oxide layer on the side away from the perovskite top battery, and the perovskite top battery having a second transparent conductive oxide layer on the side away from the crystalline silicon bottom battery; printing electrode paste on the first transparent conductive oxide layer and / or the second transparent conductive oxide layer, the electrode paste being capable of etching the corresponding transparent conductive oxide layer and penetrating into it to form a doped region, and then curing it to form a gate electrode.

13. The method for preparing a perovskite tandem solar cell according to claim 12, characterized in that, The depth of the doped region is equal to the height of the first transparent conductive oxide layer, and a third transparent conductive oxide layer is provided on the side of the first transparent conductive oxide layer near the perovskite top cell; and / or the depth of the doped region is equal to the height of the second transparent conductive oxide layer, and a fourth transparent conductive oxide layer is provided on the side of the second transparent conductive oxide layer near the perovskite top cell.

14. The method for preparing a perovskite tandem solar cell according to claim 12, characterized in that, The first transparent conductive oxide layer consists of spaced-apart strip-shaped transparent conductive oxide contact areas, the width of which is greater than or equal to the width of the gate electrode located thereon; and / or the second transparent conductive oxide layer consists of spaced-apart strip-shaped transparent conductive oxide contact areas, the width of which is greater than or equal to the width of the gate electrode located thereon.

15. A perovskite tandem solar cell, characterized in that, The system includes a crystalline silicon bottom cell and a perovskite top cell. The crystalline silicon bottom cell has a first transparent conductive oxide layer on the side away from the perovskite top cell, and the perovskite top cell has a second transparent conductive oxide layer on the side away from the crystalline silicon bottom cell. The first transparent conductive oxide layer and the second transparent conductive oxide layer, on the side away from the perovskite top cell and on the side away from the crystalline silicon bottom cell, are each independently provided with a gate electrode. The gate electrode satisfies at least one of the following characteristics: the gate electrode portion on the first transparent conductive oxide layer is embedded within the first transparent conductive oxide layer and forms a doped region with the first transparent conductive oxide; the gate electrode portion on the second transparent conductive oxide layer is embedded within the second transparent conductive oxide layer and forms a doped region with the second transparent conductive oxide.

16. The perovskite tandem solar cell according to claim 15, characterized in that, The doped region includes an Ag-In alloy.

17. A photovoltaic module, characterized in that, The photovoltaic module includes the perovskite tandem cell as described in claim 15 or 16.

18. A photovoltaic system, characterized in that, The photovoltaic system includes the photovoltaic module as described in claim 17.

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