Back contact battery and preparation method thereof

Abstract

The invention relates to the technical field of photovoltaics, and discloses a back contact battery and a preparation method thereof. The preparation method comprises the following steps: respectively preparing P-type polycrystalline silicon and N-type polycrystalline silicon in a P region and an N region on the back surface of a silicon wafer to prepare a PN junction; performing laser patterning on the back surface of the silicon wafer so as to selectively thin P-type polycrystalline silicon and N-type polycrystalline silicon in the non-metal electrode regions of the P region and the N region; respectively printing P-region metal slurry containing a P-type doping source and N-region metal slurry containing an N-type doping source in a P-region metal electrode region and an N-region metal electrode region on the back surface of the back passivation film after coating the front surface and the back surface of the silicon wafer; and sintering, so that the P-type doping source and the N-type doping source respectively carry out local heavy doping on the P-type polycrystalline silicon and the N-type polycrystalline silicon, the P-region metal slurry is in contact with the heavily doped P-type polycrystalline silicon to form a P-type metal electrode, and the N-region metal slurry is in contact with the heavily doped N-type polycrystalline silicon to form an N-type metal electrode. The passivation of PN junctions is guaranteed, the transverse transmission resistance and the contact resistance are synchronously reduced, and the electrical performance and the conversion efficiency of the battery are improved.

Description

Technical Field

[0001] This invention relates to the field of photovoltaic technology, specifically to a back contact battery and its preparation method. Background Technology

[0002] Back-contact (BC) solar cells have distinguished themselves among next-generation crystalline silicon solar cells due to their advantages such as 100% front-side light-receiving area, superior optical performance, higher fill factor and open-circuit voltage, as well as aesthetic appeal and high integration. Among them, TBC cells, which combine tunneling oxide passivated contact (TOPCon) technology with a back-contact structure, have become the most promising high-efficiency cell technology in the industry due to their excellent surface passivation performance and selective carrier collection capabilities, representing one of the cutting-edge directions in crystalline silicon solar cell research and development.

[0003] However, TBC batteries still face severe technical challenges in their pursuit of industrialization and efficiency limits. The core challenge lies in how to reduce the series resistance (Rs) of TBC batteries while maintaining or even improving excellent passivation performance, thereby increasing the fill factor (FF) and final photoelectric conversion efficiency. Specifically, TBC batteries typically employ a thicker polycrystalline silicon (Poly-Si) layer to achieve passivation, but this inevitably increases the transport resistance of electrons during lateral transport, leading to excessively high optical parasitic absorption. Furthermore, in the metallization stage (i.e., the metal electrode fabrication stage), the contact resistance between the metal paste and the polycrystalline silicon layer, and the risk that the metal paste may penetrate the polycrystalline silicon layer during sintering, damaging the passivation structure on the back of the silicon substrate and causing recombination losses, further constrain the performance improvement of TBC batteries.

[0004] To address this, existing technologies, such as CN119364907A, provide a TBC solar cell and its fabrication method. The poly layer thinning method is as follows: After laser ① is used to excavate the N+GAP region on a portion of the back of the silicon wafer, laser ② is used to scan and remove the BSG layer of the non-metallic electrode region in the P region. Then, alkaline solution is used to etch the back of the silicon wafer. The difference in etching rates between the laser-treated and non-laser-treated areas is utilized to thin the poly layer of the non-metallic electrode region in the P region. After phosphorus diffusion, laser ③ is first used to scan the area on the back of the silicon wafer outside of laser ① (i.e., the P+GAP region). Then, laser ④ is used to scan and remove the PSG layer of the non-metallic electrode region in the N region. Finally, acid washing and texturing are used to thin the poly layer of the thinned N region non-metallic region. In this way, by using lasers to perform a secondary process on the non-metallic electrode region on the back of the cell, the poly (i.e., poly-Si) layer of the non-metallic electrode region in the TBC solar cell is effectively thinned, solving the problem of optical parasitic absorption and current loss caused by excessively thick poly layers, and improving the cell's conversion efficiency and overall performance.

[0005] However, the existing technology such as CN119364907A still has the following defects: (1) After the BSG / PSG of the non-metallic electrode region is removed by the secondary laser process of laser ② and laser ④, the Poly layer of the non-metallic electrode region is not protected by BSG / PSG, which makes it easy to remove too much or even completely remove the Poly layer of the non-metallic electrode region in subsequent processes such as alkaline cleaning and etching, thereby destroying the passivation effect of the non-metallic electrode region and increasing recombination loss. (2) Furthermore, if the Poly layer of the non-metallic electrode region is removed too much or completely, the remaining tunneling oxide layer is extremely thin (e.g., 1 nm). The main function of the tunneling oxide layer is tunneling transport rather than blocking, and it is difficult to effectively prevent phosphorus in N-type Poly-Si from diffusing to P-region or boron in P-type Poly-Si from diffusing to N-region, thus easily damaging the electrical performance of the PN junction. (3) In addition, the local Poly layer in contact with the electrode is not heavily doped, which will result in a large metal-semiconductor contact resistance (i.e., the contact resistance between the electrode and the local Poly layer). While conventional secondary doping of local poly layers can achieve heavy doping of local poly layers, the process is cumbersome and can easily damage the original PN junction, thus affecting battery performance. Summary of the Invention

[0006] The purpose of this invention is to overcome the shortcomings of the prior art and provide a back contact battery and its preparation method.

[0007] Based on this, the present invention discloses a method for preparing a back contact battery, comprising the following preparation steps: S1. P-type polycrystalline silicon and N-type polycrystalline silicon are prepared on the P-region and N-region on the back side of the silicon wafer, respectively, so as to form a PN junction on the back side of the silicon wafer. S2. Perform laser patterning on the back of the silicon wafer to selectively thin the P-type polysilicon in the P-region non-metallic electrode region and the N-type polysilicon in the N-region non-metallic electrode region. S3. The front and back sides of the silicon wafer processed in step S2 are coated to form a front passivation film and a back passivation film. S4. Print P-region metal paste containing P-type doped source and N-region metal paste containing N-type doped source on the P-region metal electrode region and N-region metal electrode region on the back of the passivation film, respectively. S5. Sintering is performed so that the P-type dopant source in the P-region metal paste and the N-type dopant source in the N-region metal paste locally and heavily dopants the P-type polycrystalline silicon and the N-type polycrystalline silicon, respectively, and the P-region metal paste and the heavily doped P-type polycrystalline silicon make ohmic contact to form a P-type metal electrode, while the N-region metal paste and the heavily doped N-type polycrystalline silicon make ohmic contact to form an N-type metal electrode.

[0008] Preferably, in step S1, the thickness of the P-type polycrystalline silicon is 200~500 nm, and the average doping concentration of the P-type polycrystalline silicon is 3×10⁻⁶. 19 ~7×10 19 atoms cm - ³; The thickness of the N-type polycrystalline silicon is 150~400nm, and the average doping concentration of the N-type polycrystalline silicon is 9×10⁻⁶. 19 ~4×10 20 atoms cm - ³.

[0009] More preferably, in the laser patterning process of step S2, the laser patterning opening width of the N region is 90~120µm, the laser patterning opening width of the P region is 180~220µm, the laser wavelength is 200~1100nm, the laser frequency is 200kHz~1MHz, the laser output power is 5~80W, and the scanning speed is 20000~90000mm / min. -1 The thickness of P-type polycrystalline silicon and N-type polycrystalline silicon is reduced by 100~400nm and 100~350nm respectively, and the thickness of the thinned P-type polycrystalline silicon and N-type polycrystalline silicon is 100~200nm and 50~120nm respectively.

[0010] Preferably, in step S4, the P-type dopant source added to the P-region metal paste is a boron dopant source, and the volume fraction of the boron dopant source in the P-region metal paste is 0.1~10%; the N-type dopant source added to the N-region metal paste is a phosphorus dopant source, and the volume fraction of the phosphorus dopant source in the N-region metal paste is 0.1~10%.

[0011] More preferably, in step S5, the sintering temperature is 720~750℃ and the time is 3~15min; After sintering, the average doping concentration of the heavily doped p-type polycrystalline silicon is 4.5 × 10⁻⁶. 19 ~1×10 20 atoms cm - ³, The average doping concentration of heavily doped N-type polysilicon is 1×10⁻⁶. 20 ~5×10 20 atoms cm - ³.

[0012] Preferably, step S1 specifically includes: S11. P-type polycrystalline silicon and borosilicate glass are sequentially formed on the back side of the silicon wafer; S12. Perform laser patterning on the back side of the silicon wafer to selectively remove the borosilicate glass in the N region to expose the P-type polycrystalline silicon in the N region, while retaining the borosilicate glass in the P region. S13. Wet etching is performed on the back side of the silicon wafer to remove the P-type polysilicon in the N region, while the P-type polysilicon in the P region is retained due to the protection of the borosilicate glass in the P region. S14. N-type polycrystalline silicon and phosphosilicate glass are sequentially formed on the back side of the silicon wafer; S15. Perform laser patterning on the back side of the silicon wafer to selectively remove the phosphosilicate glass in the P region to expose the N-type polysilicon in the P region, while retaining the phosphosilicate glass in the N region. S16. Perform wet etching on the back side of the silicon wafer to remove the N-type polysilicon in the P region and retain the N-type polysilicon in the N region; then perform wet etching to remove the borosilicate glass in the P region and the phosphosilicate glass in the N region to form a PN junction on the back side of the silicon wafer.

[0013] More preferably, step S1 further includes: preparing a first tunneling oxide layer in the P region between the silicon wafer and the P-type polysilicon, and preparing a second tunneling oxide layer in the N region between the silicon wafer and the N-type polysilicon.

[0014] More preferably, in steps S12 and S15, the width of the laser patterning film is 300~600µm, the laser wavelength is 200~1100nm, the laser frequency is 200kHz~1MHz, the laser output power is 10~120W, and the scanning speed is 20000~90000mm / min. -1 .

[0015] Preferably, before step S1, the process further includes polishing and cleaning the surface of the silicon wafer.

[0016] The present invention also discloses a back contact battery, which is prepared by the back contact battery preparation method described above in the present invention.

[0017] Compared with the prior art, the present invention has at least the following beneficial effects: Compared with the prior art such as CN119364907A, the present invention does not prematurely remove or thin the non-metallic electrode regions Poly-Si, BSG, and PSG during the PN junction preparation process. Instead, it selectively thins the polysilicon of the non-metallic electrode regions using laser after the PN junction is prepared. Therefore, the present invention also effectively solves the following technical problems existing in the prior art such as CN119364907A: In the prior art, after prematurely removing the BSG / PSG of the non-metallic electrode regions during the secondary laser process, the Poly-Si of the non-metallic electrode regions lacks the protection of BSG / PSG. As a result, in subsequent processes such as alkaline cleaning and etching, the Poly-Si of the non-metallic electrode regions is easily removed excessively or even completely. This leads to the destruction of the passivation effect of the non-metallic electrode regions, increases recombination loss, and makes it difficult to effectively prevent the diffusion of dopants from N-type Poly-Si to the P-region (or the diffusion of dopants from P-type Poly-Si to the N-region), thus damaging the electrical performance of the PN junction.

[0018] Furthermore, after the PN junction is formed on the back of the silicon wafer, a laser is used to selectively thin the Poly-Si (polycrystalline silicon) in the non-metallic electrode region, while the metal electrode region retains a thicker Poly-Si. In this way, the difference in the thickness of Poly-Si in different regions achieves the following dual purpose: the thinning of Poly-Si in the non-metallic electrode region helps to shorten the electron transport path, accelerate the electron transport rate, and reduce the series resistance; while the retention of a thicker Poly-Si in the metal electrode region can effectively block the penetration of metal paste during the sintering process, prevent metal from invading the silicon substrate and causing recombination loss, thereby ensuring the passivation quality of the bulk region.

[0019] Furthermore, during the metallization process, a metal paste containing doped sources is used to print and sinter the metal electrode region, so that the doped sources in the metal paste form locally heavily doped polysilicon in the metal electrode region (metal-semiconductor contact region) (that is, during the metallization process, the poly-Si in the metal electrode region is also heavily doped), so as to reduce the contact resistance of the metal electrode without damaging the original PN junction performance.

[0020] Therefore, the back contact battery fabrication method of the present invention, through the synergistic cooperation of laser selective thinning of polycrystalline silicon in the non-metallic electrode region, printing of metal paste with doped sources in the metal electrode region during the metallization process, and subsequent sintering, ensures the passivation quality of the bulk region (ensuring that Poly-Si can prevent metal burn-through without causing recombination loss) and does not damage the original PN junction, while simultaneously optimizing carrier transport and contact performance, reducing lateral transport resistance and contact resistance, and reducing series resistance. Thus, it can comprehensively improve the electrical performance and photoelectric conversion efficiency of the back contact battery. Attached Figure Description

[0021] Figure 1 This is a schematic diagram of the process flow for a method of preparing a back contact battery according to the present invention.

[0022] Figure 2 This is a schematic diagram of the cross-sectional structure of a back-contact battery according to this embodiment.

[0023] Explanation of reference numerals: 1. Front silicon nitride layer; 2. Front aluminum oxide layer; 3. Silicon substrate; 41. First tunneling oxide layer; 51. Boron-doped polycrystalline silicon; 42. Second tunneling oxide layer; 52. Phosphorus-doped polycrystalline silicon; 6. Back aluminum oxide layer; 7. Back silicon nitride layer; 81. P-type metal electrode; 82. N-type metal electrode. Detailed Implementation

[0024] To make the above-mentioned objects, features and advantages of the present invention more apparent and understandable, the present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments.

[0025] A method for preparing a back contact battery according to the present invention, see [link to relevant documentation]. Figure 1-2 It includes the following preparation steps: Step 1: Select a raw silicon wafer (such as N-Si) as the silicon substrate 3, and perform polishing and cleaning on the surface of the silicon wafer to remove the mechanical damage layer and organic contaminants on the surface of the silicon wafer.

[0026] Step 2: Deposit a 250-600 nm thick intrinsic amorphous silicon (ia-Si:H) on the back side of the polished and cleaned silicon wafer to passivate it, reduce surface recombination, and allow for efficient carrier transport.

[0027] In step 2, before depositing intrinsic amorphous silicon, a first tunneling oxide layer 41 (such as first SiOx, first tunneling silicon oxide) with a thickness of 1~5nm can be formed on the back side of the silicon wafer. This helps to prevent the subsequent boron expansion PN junction from being too deep, which would cause B (boron) to diffuse into the silicon substrate 3 and cause recombination.

[0028] Step 3: The silicon wafer undergoes boron diffusion doping to form P-type Poly-Si (i.e., boron-doped polysilicon 51, or P Poly-Si for short), and a 70-80 nm thick borosilicate glass (BSG) is formed on the back side of the boron-doped polysilicon 51. In Step 3, the average doping concentration of the P-type Poly-Si is 3 × 10⁻⁶. 19 ~7×10 19 atoms cm - ³.

[0029] Step 4: Perform the first laser patterning process on the back side of the boron-expanded silicon wafer to selectively remove the BSG in the N-region to expose the P-type Poly-Si in the N-region, while retaining the BSG in the P-region to protect the P-type Poly-Si in the P-region (for back contact cells, such as TBC cells, the back side of the silicon wafer includes both N-region and P-region).

[0030] In step 4, the process conditions for the first laser patterning process include: the width of the first laser patterning film opening is 300~600µm, the laser wavelength is 200~1100nm, the laser frequency is 200kHz~1MHz, the laser output power is 10~120W, and the scanning speed is 20000~90000mm / min. -1 .

[0031] Step 5: Perform wet etching on the back side of the silicon wafer after step 4 to remove the P-type Poly-Si and the first tunneling oxide layer 41 in the N-region on the back side. The P-type Poly-Si and the first tunneling oxide layer 41 in the P-region on the back side will not be damaged by wet etching because they are protected by the BSG retained in the P-region.

[0032] Step 6: Sequentially deposit a 1-2 nm thick second tunneling oxide layer 42 (such as second SiOx, second tunneling silicon oxide) and a 200-450 nm thick amorphous silicon (i-Poly Si) on the back side of the silicon wafer after step 5.

[0033] Step 7: Anneal the silicon wafer processed in Step 6. Annealing in a high-temperature oxygen atmosphere incorporates phosphorus doping into the amorphous silicon, causing it to crystallize and form phosphorus-doped polysilicon 52 (N-type Poly-Si, abbreviated as N Poly-Si). A 30-75 nm thick phosphosilicate glass (PSG) is then formed on the back side of the N-type Poly-Si. In Step 7, the average doping concentration of the N-type Poly-Si is 9 × 10⁻⁶. 19 ~4×10 20 atoms cm - ³.

[0034] Step 8: Perform a second laser patterning process on the silicon wafer processed in Step 7 to selectively remove the PSG in the P-region on the back side to expose the N-type Poly-Si in the P-region, while retaining the PSG in the N-region on the back side to protect the N-type Poly-Si in the N-region.

[0035] In step 8, the process conditions for the second laser patterning process are the same as those for the first laser patterning process in step 4, so they will not be repeated here.

[0036] Step 9: Perform wet etching on the back side of the silicon wafer after step 8 to remove the N-type Poly-Si and the second tunneling oxide layer 42 in the P-region on the back side. The N-type Poly-Si and the second tunneling oxide layer 42 in the N-region on the back side will not be destroyed by wet etching because they are protected by the PSG retained in the N-region. Then, perform wet etching to remove the BSG in the P-region and the PSG in the N-region, so that the first tunneling oxide layer 41 and the P-type Poly-Si are retained in the P-region on the back side of the silicon wafer, and the second tunneling oxide layer 42 and the N-type Poly-Si are retained in the N-region on the back side of the silicon wafer, thus completing the preparation of the back side PN junction.

[0037] Step 10: Perform a third laser patterning process on the back side of the silicon wafer after Step 9 to selectively thin the P-type Poly-Si in the non-metallic electrode region of the P-region and the N-type Poly-Si in the non-metallic electrode region of the N-region, while keeping the thickness of the P-type Poly-Si in the metal electrode region of the P-region and the N-type Poly-Si in the metal electrode region of the N-region unchanged (thus, both the P-type Poly-Si and N-type Poly-Si in the metal electrode region retain a relatively thick Poly-Si). Then, perform wet etching on the silicon wafer after the third laser patterning process to remove adsorbed impurities.

[0038] In step 10, the process conditions for the third laser patterning process include: the laser patterning width of the N-region is 90~120µm, the laser patterning width of the P-region is 180~220µm, the laser wavelength is 200~1100nm, the laser frequency is 200kHz~1MHz, the laser output power is 5~80W, and the scanning speed is 20000~90000mm / min. -1 The thickness of P-type polycrystalline silicon and N-type polycrystalline silicon is reduced by 100~400nm and 100~350nm respectively, and the thickness of the thinned P-type polycrystalline silicon and N-type polycrystalline silicon is 100~200nm and 50~120nm respectively.

[0039] Step 11: Prepare a front alumina layer 2 and a back alumina layer 6 on the front and back sides of the silicon wafer processed in Step 10, respectively (specifically, the back alumina layer 6 is located on the back side of P-type Poly-Si and N-type Poly-Si). The thickness of the front alumina layer 2 and the back alumina layer 6 is 13~15nm.

[0040] Step 12: Prepare a front silicon nitride layer 1 on the front side of the front alumina layer 2, and prepare a back silicon nitride layer 7 on the back side of the back alumina layer 6. The thickness of the front silicon nitride layer 1 and the back silicon nitride layer 7 is 75~85nm.

[0041] In practice, the front alumina layer 2 and the front silicon nitride layer 1 serve as the front passivation film, while the back alumina layer 6 and the back silicon nitride layer 7 serve as the back passivation film. Step 13: Screen print a metal paste containing boron dopant (referred to as P-region metal paste) on the metal electrode region corresponding to the P-region on the back side of the silicon nitride layer, and screen print a metal paste containing phosphorus dopant (referred to as N-region metal paste) on the metal electrode region corresponding to the N-region on the back side of the silicon nitride layer. Then, sintering is performed so that the back silicon nitride layer 7 and the back alumina layer 6 are locally burned through in the P-region metal paste and the N-region metal paste, so that the boron dopant in the P-region metal paste and the phosphorus dopant in the N-region metal paste locally heavily dopant the P-type Poly-Si and N-type Poly-Si, respectively. The P-region metal paste and the heavily doped P-type Poly-Si are then in ohmic contact to form a P-type metal electrode 81, and the N-region metal paste and the heavily doped N-type Poly-Si are in ohmic contact to form an N-type metal electrode 82.

[0042] In step 13, during the metallization process, the sintering temperature is 720~750℃, and the time is 3~15min; the volume fraction of boron dopant source (boron compound, including but not limited to boron powder, sodium tetraphenylborate, etc.) in the P-region metal paste is 0.1~10%, and the average doping concentration of the heavily doped P-type Poly-Si is 4.5×10⁻⁶. 19 ~1×10 20 atoms cm - ³, the volume fraction of phosphorus dopant sources (phosphorus compounds, including but not limited to phosphorus pentoxide, diammonium hydrogen phosphate, etc.) in the N-region metal paste is 0.1~10%, and the average doping concentration of the heavily doped N-type Poly-Si is 1×10⁻⁶. 20 ~5×10 20 atoms cm - ³.

[0043] After step 13, a back contact battery of the present invention is obtained (its structure is as follows). Figure 2 (As shown).

[0044] The back-contact battery fabrication method of the present invention involves selectively thinning the Poly-Si (polycrystalline silicon) in the non-metallic electrode region using a laser after forming a PN junction on the back side of a silicon wafer, while retaining a thicker Poly-Si in the metallic electrode region. This difference in Poly-Si thickness in different regions achieves the following dual objectives: thinning the Poly-Si in the non-metallic electrode region shortens the electron transport path, accelerates the electron transport rate, and reduces the series resistance; while retaining a thicker Poly-Si in the metallic electrode region effectively blocks the penetration of metal paste during sintering, preventing metal intrusion into the silicon substrate 3 and causing recombination losses, thereby ensuring the passivation quality of the bulk region.

[0045] Furthermore, during the metallization process after the passivation film is deposited, a metal paste containing doped sources is used (a P-region metal paste containing P-type doped sources, such as a P-region metal paste containing boron doped sources, is printed in the P-region metal electrode area; an N-region metal paste containing N-type doped sources, such as an N-region metal paste containing phosphorus doped sources, is printed in the N-region metal electrode area. The preparation process of this metal paste containing doped sources can be referred to CN114944326B and CN118762863A, which involves mixing the doped source into the metal paste, dispersing it evenly, and then grinding it; the metal paste is an existing paste, so it will not be described in detail). Furthermore, by precisely controlling the sintering process (such as adjusting the sintering temperature and time to achieve the lowest contact resistivity while minimizing the probability of cloudiness in EL detection (electroluminescence detection), for example, a sintering temperature of 720~750℃ and a sintering time of 3~15min), the dopant sources in the metal paste form locally heavily doped polysilicon (such as P+ polysilicon, N+ polysilicon) in the metal electrode region (metal-semiconductor contact region) (that is, during the metallization process, the poly-Si in the metal electrode region is also heavily doped), thereby reducing the contact resistance of the metal electrode without damaging the original PN junction performance.

[0046] Therefore, the fabrication method of the back contact battery of the present invention utilizes the synergistic effect of selectively thinning the polycrystalline silicon in the non-metallic electrode region by laser, printing metal paste with doped sources in the metal electrode region during the metallization process, and subsequent sintering. This ensures the passivation quality of the bulk region (ensuring that Poly-Si can prevent metal burn-through without causing recombination loss) and does not damage the original PN junction, while simultaneously optimizing carrier transport and contact performance: shortening the electron transport path, accelerating the electron transport rate, reducing the series resistance, and optimizing the contact performance between polycrystalline silicon and the metal electrode, thereby reducing the contact resistance of the metal electrode. This comprehensively improves the electrical performance and photoelectric conversion efficiency of the back contact battery.

[0047] Furthermore, compared with the prior art such as CN119364907A, the present invention, in the process of preparing the PN junction, does not prematurely remove or thin the Poly layer (i.e., Poly-Si, polycrystalline silicon), BSG (borosilicate glass), and PSG (phosphosilicate glass) of the non-metallic electrode region during the laser patterning processing in steps S12 and S15; instead, it performs laser selective thinning of the polycrystalline silicon in the non-metallic electrode region only after the PN junction is prepared. Therefore, the present invention also effectively solves the following technical problems existing in the prior art such as CN119364907A: the prior art in laser ② and laser... After the secondary laser process of light ④ removes the BSG / PSG in the non-metallic electrode region, the Poly-Si in the non-metallic electrode region lacks the protection of BSG / PSG. As a result, in subsequent processes such as alkaline cleaning and etching, the Poly-Si in the non-metallic electrode region is easily removed in excess or even completely. This leads to the destruction of the passivation effect of the non-metallic electrode region, increases recombination loss, and makes it difficult to effectively prevent the diffusion of dopants (such as phosphorus dopants) in N-type Poly-Si into the P-region (or the diffusion of dopants in P-type Poly-Si into the N-region), thus damaging the electrical performance of the PN junction.

[0048] The following is a specific embodiment of a method for preparing a back contact battery according to the present invention: Example 1 This embodiment describes a method for preparing a back contact battery, see [link to relevant documentation]. Figure 1-2 It includes the following preparation steps: Step 1: Select an N-type monocrystalline silicon wafer (N-Si) as the silicon substrate 3, and use a tank-type alkaline polishing machine to perform double-sided polishing and cleaning on the front and back sides of the silicon wafer (the cleaning solution used is KOH solution) to remove the mechanical damage layer and organic contaminants on the surface of the silicon wafer.

[0049] Step 2: First, a 1.5nm thick first tunneling oxide layer 41 (first SiOx, i.e. first tunneling silicon oxide) is formed on the back side of the polished and cleaned silicon wafer through a pre-oxygen process; then, a 400nm thick intrinsic amorphous silicon (ia-Si:H) is deposited on the back side of the oxide layer using PECVD (plasma-enhanced chemical vapor deposition).

[0050] Step 3: Perform boron diffusion treatment on the silicon wafer, using BCl3 as the boron doping source. Boron doping of the intrinsic amorphous silicon is achieved through thermal diffusion, transforming the intrinsic amorphous silicon into P-type Poly-Si (i.e., boron-doped polycrystalline silicon 51, abbreviated as P Poly-Si). The average doping concentration of P-type Poly-Si is 7 × 10⁻⁶. 19 atoms cm - ³, after boron expansion, an 80nm thick BSG is also formed on the back side of the P-type Poly-Si.

[0051] Step 4: Perform a first laser patterning process on the back side of the silicon wafer after Step 3 to selectively remove the BSG in the N-region to expose the P-type Poly-Si in the N-region, while retaining the BSG in the P-region to protect the P-type Poly-Si in the P-region. In Step 4, the width of the first laser patterning is 500µm, using a green picosecond laser with a square laser spot size of 200µm × 200µm, a laser frequency of 500kHz, a laser output power of 56W, and a scanning speed of 60,000 mm / min. -1 .

[0052] Step 5: Polish the back side of the silicon wafer treated in Step 4 with an alkaline solution containing polishing additives in NaOH solution for 180 seconds. The P-type Poly-Si and the first tunneling oxide layer 41 in the N-region of the back side are removed by reacting with the alkali, and the N-region is polished. The Poly-Si and the first tunneling oxide layer 41 in the P-region of the back side are retained due to the protection of BSG.

[0053] Step 6: Using a POPAID device (plasma oxidation and plasma-assisted in-situ doping device), a second tunneling oxide layer 42 (second SiOx, i.e., second tunneling silicon oxide) and amorphous silicon (i-Poly Si) are sequentially deposited on the back side of the silicon wafer processed in Step 5. The PO cavity (plasma oxidation cavity) has a power of 110kW, a conveyor belt speed of 200cm / min, and an O2 flow rate of 450sccm. The PAID cavity (plasma-assisted in-situ doping cavity) has a power of 33kW, a conveyor belt speed of 120cm / min, and a PH3 (phosphorus doping source) / Ar flow rate of 350 / 1000sccm. The deposition temperature is 200℃. The thickness of the resulting second tunneling oxide layer is 1.2nm, and the thickness of the second polycrystalline silicon layer is 200nm.

[0054] Step 7: Anneal the silicon wafer processed in Step 6. Annealing in a high-temperature oxygen atmosphere diffuses and dops the phosphorus source into the amorphous silicon, causing it to crystallize and form phosphorus-doped polycrystalline silicon 52 (N-type Poly-Si, abbreviated as N Poly-Si). The average doping concentration of N-type Poly-Si is 3 × 10⁻⁶. 20 atoms cm - ³, and a 50nm thick PSG is also formed on the back side of the N-type Poly-Si.

[0055] Step 8: Perform a second laser patterning process on the silicon wafer processed in Step 7 to selectively remove the PSG in the P-region on the back side to expose the N-type Poly-Si in the P-region, while retaining the PSG in the N-region on the back side to protect the N-type Poly-Si in the N-region. In Step 8, the second laser patterning has a film opening width of 500µm, uses a green picosecond laser, a square laser spot size of 200µm×200µm, a laser frequency of 500kHz, a laser output power of 30W, and a scanning speed of 68000mm / min. -1 .

[0056] Step 9: Use a tank etching machine to perform texturing on the silicon wafer processed in Step 8 (a type of wet etching): The alkaline solution used for texturing is KOH solution, and the texturing temperature is 65℃. The specific process is to first place the silicon wafer in an alkaline bath for 300 seconds; then, place the silicon wafer in an acid bath for treatment. During the annealing process, an oxide layer (i.e., PSG) is formed on the N-region on the back of the silicon wafer. This oxide layer can withstand low-temperature KOH solution corrosion, while the N-type Poly-Si is exposed after the second laser patterning and PSG film removal on the P-region on the back. At this point, wet etching of the P-region using an alkaline bath removes the N-type Poly-Si and the second tunneling oxide layer 42 from the P-region. The N-type Poly-Si and the second tunneling oxide layer 42 in the N-region on the back side are preserved due to the protection of the PSG retained in the N-region. Then, the BSG in the P-region and the PSG in the N-region are removed using an acid bath. Finally, the first tunneling oxide layer 41 and the P-type Poly-Si are retained in the P-region on the back side of the silicon wafer, and the second tunneling oxide layer 42 and the N-type Poly-Si are retained in the N-region on the back side of the silicon wafer. Thus, the fabrication of the back side PN junction is completed.

[0057] Step 10: Perform a third laser patterning process on the back side of the silicon wafer after Step 9 to selectively thin the P-type Poly-Si in the non-metallic electrode region of the P-region and selectively thin the N-type Poly-Si in the non-metallic electrode region of the N-region, while keeping the thickness of the P-type Poly-Si in the metal electrode region of the P-region and the N-type Poly-Si in the metal electrode region of the N-region unchanged (thus, both the P-type Poly-Si and N-type Poly-Si in the metal electrode region retain a relatively thick Poly-Si). In Step 10, the laser patterning width in the N-region is 110µm, and the laser patterning width in the P-region is 210µm. A green picosecond laser is used, with a circular laser spot diameter of 30µm, a laser frequency of 1MHz, a laser output power of 10W, and a scanning speed of 45000mm / min. -1 The thickness of P-type polycrystalline silicon and N-type polycrystalline silicon was reduced to 100 nm and 60 nm, respectively. After a third laser patterning process, the silicon was pickled in a tank-type machine to remove adsorbed impurities.

[0058] Step 11: Deposit a front alumina layer 2 and a back alumina layer 6 on the front and back sides of the silicon wafer processed in Step 10, respectively, using ALD (atomic layer deposition). The thickness of both the front alumina layer 2 and the back alumina layer 6 is 13 nm.

[0059] Step 12: Using PECVD, a front silicon nitride layer 1 and a back silicon nitride layer 7 are fabricated on the front side of the front alumina layer 2 and the back side of the back alumina layer 6, respectively. The thickness of both the front silicon nitride layer 1 and the back silicon nitride layer 7 is 80 nm.

[0060] Step 13: Screen print a metal paste containing boron dopant (referred to as P-region metal paste) on the metal electrode region corresponding to the P-region on the back side of the silicon nitride layer, and screen print a metal paste containing phosphorus dopant (referred to as N-region metal paste) on the metal electrode region corresponding to the N-region on the back side of the silicon nitride layer. Then, sintering is performed so that the back silicon nitride layer 7 and the back alumina layer 6 are locally burned through in the P-region metal paste and the N-region metal paste, so that the boron dopant in the P-region metal paste and the phosphorus dopant in the N-region metal paste locally heavily dopant the P-type Poly-Si and N-type Poly-Si, respectively. The P-region metal paste and the heavily doped P-type Poly-Si are then in ohmic contact to form a P-type metal electrode 81, and the N-region metal paste and the heavily doped N-type Poly-Si are in ohmic contact to form an N-type metal electrode 82. In step 13, the metallization process involves sintering at 750℃ for 5 minutes; the volume fraction of boron dopant (boron powder) in the P-region metal paste is 5%, and the average doping concentration of the heavily doped P-type Poly-Si is 8 × 10⁻⁶. 19 atoms cm - ³, the volume fraction of phosphorus dopant source (phosphorus pentoxide) in the N-region metal paste is 5%, and the average doping concentration of the heavily doped N-type Poly-Si is 3.5 × 10³. 20 atoms cm - ³.

[0061] Comparative Example 1 The preparation method of the back contact battery in this comparative example is the same as that in Example 1, except that: In this comparative example, step 10 of Example 1 is omitted, while the remaining steps are the same as in Example 1.

[0062] Comparative Example 2 The preparation method of the back contact battery in this comparative example is the same as that in Example 1, except that: In this comparative example, the metal paste containing boron doping source and the metal paste containing phosphorus doping source in step 13 of Example 1 are both replaced with metal paste without doping source, and the remaining steps are the same as in Example 1.

[0063] Performance testing The back-contact batteries (TBC batteries) prepared in Example 1 and Comparative Examples 1-2 were subjected to performance tests, and the test results are shown in Table 1 below. In Table 1, Eta is the photoelectric conversion efficiency of the battery, Voc is the open-circuit voltage, FF is the fill factor, Jsc is the short-circuit current, and Rser is the series resistance.

[0064] Table 1

[0065] As shown in Table 1, the fabrication method of the back contact battery in Embodiment 1 of the present invention utilizes the synergistic effect of selectively thinning polycrystalline silicon in the non-metallic electrode region by laser, printing metal paste with doped sources in the metal electrode region during the metallization process, and subsequent sintering. This ensures the passivation quality of the bulk region (ensuring that Poly-Si can prevent metal burn-through without causing recombination loss) and does not damage the original PN junction. At the same time, it simultaneously optimizes carrier transport and contact performance, reduces lateral transport resistance and contact resistance, and reduces series resistance. Therefore, it can comprehensively improve the electrical performance and photoelectric conversion efficiency of the back contact battery.

[0066] Although preferred embodiments of the present invention have been described, those skilled in the art, upon learning the basic inventive concept, can make other changes and modifications to these embodiments. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments as well as all changes and modifications falling within the scope of the embodiments of the present invention.

[0067] The technical solution provided by the present invention has been described in detail above. Specific examples have been used to illustrate the principle and implementation of the present invention. The description of the above embodiments is only for the purpose of helping to understand the method and core idea of ​​the present invention. At the same time, for those skilled in the art, there will be changes in the specific implementation and application scope based on the idea of ​​the present invention. Therefore, the content of this specification should not be construed as a limitation of the present invention.

Claims

1. A method for preparing a back contact battery, characterized in that, The preparation steps include the following: S1. P-type polycrystalline silicon and N-type polycrystalline silicon are prepared on the P-region and N-region on the back side of the silicon wafer, respectively, so as to form a PN junction on the back side of the silicon wafer. S2. Perform laser patterning on the back of the silicon wafer to selectively thin the P-type polysilicon in the P-region non-metallic electrode region and the N-type polysilicon in the N-region non-metallic electrode region. S3. The front and back sides of the silicon wafer processed in step S2 are coated to form a front passivation film and a back passivation film. S4. Print P-region metal paste containing P-type doped source and N-region metal paste containing N-type doped source on the P-region metal electrode region and N-region metal electrode region on the back of the passivation film, respectively. S5. Sintering is performed so that the P-type dopant source in the P-region metal paste and the N-type dopant source in the N-region metal paste locally and heavily dopants the P-type polycrystalline silicon and the N-type polycrystalline silicon, respectively, and the P-region metal paste and the heavily doped P-type polycrystalline silicon make ohmic contact to form a P-type metal electrode, while the N-region metal paste and the heavily doped N-type polycrystalline silicon make ohmic contact to form an N-type metal electrode.

2. The method for preparing a back contact battery according to claim 1, characterized in that, In step S1, the thickness of the P-type polycrystalline silicon is 200~500 nm, and the average doping concentration of the P-type polycrystalline silicon is 3×10⁻⁶. 19 ~7×10 19 atoms cm - ³; The thickness of the N-type polycrystalline silicon is 150~400nm, and the average doping concentration of the N-type polycrystalline silicon is 9×10⁻⁶. 19 ~4×10 20 atomscm - ³.

3. A method for preparing a back contact battery according to claim 1 or 2, characterized in that, In step S2, the laser patterning width of the N-region is 90~120µm, the laser patterning width of the P-region is 180~220µm, the laser wavelength is 200~1100nm, the laser frequency is 200kHz~1MHz, the laser output power is 5~80W, and the scanning speed is 20000~90000mm / min. -1 The thickness of P-type polycrystalline silicon and N-type polycrystalline silicon is reduced by 100~400nm and 100~350nm respectively, and the thickness of the thinned P-type polycrystalline silicon and N-type polycrystalline silicon is 100~200nm and 50~120nm respectively.

4. The method for preparing a back contact battery according to claim 1, characterized in that, In step S4, the P-type dopant source added to the P-region metal paste is a boron dopant source, and the volume fraction of the boron dopant source in the P-region metal paste is 0.1~10%; the N-type dopant source added to the N-region metal paste is a phosphorus dopant source, and the volume fraction of the phosphorus dopant source in the N-region metal paste is 0.1~10%.

5. A method for preparing a back contact battery according to claim 1 or 2, characterized in that, In step S5, the sintering temperature is 720~750℃ and the time is 3~15min; After sintering, the average doping concentration of the heavily doped p-type polycrystalline silicon is 4.5 × 10⁻⁶. 19 ~1×10 20 atoms cm - ³, The average doping concentration of heavily doped N-type polysilicon is 1×10⁻⁶. 20 ~5×10 20 atoms cm - ³.

6. The method for preparing a back contact battery according to claim 1, characterized in that, Step S1 specifically includes: S11. P-type polycrystalline silicon and borosilicate glass are sequentially formed on the back side of the silicon wafer; S12. Perform laser patterning on the back side of the silicon wafer to selectively remove the borosilicate glass in the N region to expose the P-type polycrystalline silicon in the N region, while retaining the borosilicate glass in the P region. S13. Wet etching is performed on the back side of the silicon wafer to remove the P-type polysilicon in the N region, while the P-type polysilicon in the P region is retained due to the protection of the borosilicate glass in the P region. S14. N-type polycrystalline silicon and phosphosilicate glass are sequentially formed on the back side of the silicon wafer; S15. Perform laser patterning on the back side of the silicon wafer to selectively remove the phosphosilicate glass in the P region to expose the N-type polysilicon in the P region, while retaining the phosphosilicate glass in the N region. S16. Perform wet etching on the back side of the silicon wafer to remove the N-type polysilicon in the P region and retain the N-type polysilicon in the N region; then perform wet etching to remove the borosilicate glass in the P region and the phosphosilicate glass in the N region to form a PN junction on the back side of the silicon wafer.

7. The method for preparing a back contact battery according to claim 6, characterized in that, Step S1 further includes: preparing a first tunneling oxide layer in the P region between the silicon wafer and the P-type polysilicon, and preparing a second tunneling oxide layer in the N region between the silicon wafer and the N-type polysilicon.

8. A method for preparing a back contact battery according to claim 6, characterized in that, In steps S12 and S15, the width of the laser patterning film is 300~600µm, the laser wavelength is 200~1100nm, the laser frequency is 200kHz~1MHz, the laser output power is 10~120W, and the scanning speed is 20000~90000mm / min. -1 .

9. The method for preparing a back contact battery according to claim 1, characterized in that, Before step S1, the process also includes polishing and cleaning the surface of the silicon wafer.

10. A back-contact battery, characterized in that, It is prepared by the method of any one of claims 1-9 for preparing a back contact battery.

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