Display panel and display device
By setting a first metal line and a second metal line in the OLED display panel and using an insulating layer for protection, the problem of easy damage to the metal lines around the hole area is solved, thereby improving display performance and reliability.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- BLACK COW FOOD
- Filing Date
- 2024-10-30
- Publication Date
- 2026-05-01
AI Technical Summary
The metal lines around the aperture area in existing OLED display products are easily damaged, affecting display performance.
By setting a first metal line and a second metal line in the display panel, and using a first insulating layer to protect the first trace segment, damage can be avoided during subsequent etching processes. The protection effect is improved by using a multi-layer insulating layer and encapsulation structure.
It effectively prevents damage to metal lines during the etching process, thereby improving the display performance and reliability of the display panel.
Smart Images

Figure CN121968920A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of display technology, and more particularly to a display panel and display device. Background Technology
[0002] Organic light-emitting diodes (OLEDs) and flat panel displays based on light-emitting diodes (LEDs) are widely used in various consumer electronics products such as mobile phones, televisions, laptops, and desktop computers due to their advantages such as high image quality, energy saving, thin body, and wide range of applications, becoming the mainstream of display devices.
[0003] However, the performance of current OLED display products needs to be improved. Summary of the Invention
[0004] In view of this, the purpose of this application is to provide a display panel that can prevent the metal lines around the hole area from being corroded, thereby improving the display performance.
[0005] To achieve the above objectives, this application provides a display panel including a panel area and an aperture area, wherein the aperture area at least partially surrounds the panel area, and the display panel further includes:
[0006] Substrate;
[0007] A first conductor layer is located on one side of the substrate and in the panel area;
[0008] A first insulating layer is located on the side of the first conductor layer away from the substrate, and a via is provided on the first insulating layer;
[0009] The second conductor layer is located on the side of the first insulating layer away from the substrate;
[0010] The first metal wire includes a first trace segment and a second trace segment, wherein the first trace segment is located in the first conductor layer and the second trace segment is located in the second conductor layer;
[0011] The first trace segment is at least partially disposed around the via area, and the first trace segment and the second trace segment are electrically connected through the via.
[0012] In one embodiment, the second trace segment includes a first part and a second part, the first part and the second part extending in the same direction, the first part and the second part being located on both sides of the hole area, and the two ends of the first trace segment being electrically connected to the first part and the second part through different vias.
[0013] In one embodiment, the first conductor layer includes a plurality of stacked sub-conductor layers, a sub-insulating layer is disposed between adjacent sub-conductor layers, and the first trace segment is located in at least one of the plurality of sub-conductor layers;
[0014] Preferably, the plurality of sub-conductor layers include a first sub-conductor layer, a second sub-conductor layer, and a third sub-conductor layer stacked sequentially along a direction away from the substrate, the sub-insulating layer includes a first sub-insulating layer located between the first sub-conductor layer and the second sub-conductor layer, and a second sub-insulating layer located between the second sub-conductor layer and the third sub-conductor layer, and the first trace segment is located in at least one of the first sub-conductor layer, the second sub-conductor layer, and the third sub-conductor layer.
[0015] In one embodiment, the display panel further includes:
[0016] A planarization layer is located on the side of the second conductor layer away from the substrate;
[0017] A pixel defining layer is located on the side of the planarization layer away from the substrate;
[0018] Preferably, the pixel defining layer is provided with vent holes, and the vent holes expose a portion of the planarization layer;
[0019] In one embodiment, the orthographic projection of the vent hole on the substrate at least partially overlaps with the orthographic projection of the first trace segment on the substrate.
[0020] In one embodiment, the pixel defining layer is provided with a plurality of vent holes, and the plurality of vent holes are arranged around the hole area;
[0021] Preferably, the material of the pixel defining layer includes inorganic materials.
[0022] In one embodiment, the panel area includes a display area and a transition area, the transition area being located between the display area and the hole area, and the vent being located in the transition area.
[0023] In one embodiment, the display panel further includes:
[0024] An isolation structure is located on the side of the second conductor layer away from the substrate, and the isolation structure encloses a plurality of isolation openings for accommodating at least a portion of the light-emitting units.
[0025] In one embodiment, the light-emitting unit includes a first electrode, a light-emitting layer, and a second electrode stacked sequentially along a direction away from the substrate, wherein the light-emitting layer and the second electrode are at least partially located in the isolation opening.
[0026] In one embodiment, the isolation structure includes a first support portion and a second support portion, the second support portion being located on the side of the first support portion away from the substrate, and the second electrode being electrically connected to the first support portion;
[0027] Preferably, the orthographic projection of one end of the first support portion near the second support portion on the substrate is located within the orthographic projection of the second support portion on the substrate.
[0028] In one embodiment, the first support portion includes a first sub-support portion and a second sub-support portion. The first sub-support portion is located between the second sub-support portion and the substrate. The orthographic projection area of the first sub-support portion on the substrate is larger than the orthographic projection area of the second sub-support portion on the substrate, and the orthographic projection of the second sub-support portion on the substrate is located within the orthographic projection of the first sub-support portion on the substrate. The second electrode overlaps with the first sub-support portion.
[0029] Preferably, the second electrode overlaps with the second sub-support portion.
[0030] In one embodiment, the display panel further includes a first encapsulation layer, the first encapsulation layer including a plurality of encapsulation units corresponding to the isolation opening, the encapsulation units being located on the side of the light-emitting unit facing away from the substrate;
[0031] Preferably, a portion of the packaging unit extends to the side of the isolation structure opposite to the substrate, and the portion of the packaging unit located on the side of the isolation structure opposite to the substrate is spaced apart from the isolation structure.
[0032] Preferably, the display panel further includes a second encapsulation layer and a third encapsulation layer covering the first encapsulation layer and the isolation structure, wherein the second encapsulation layer is located between the first encapsulation layer and the third encapsulation layer;
[0033] Preferably, the first encapsulation layer and the third encapsulation layer are inorganic layers, and the second encapsulation layer is an organic layer.
[0034] In one embodiment, the panel area includes a display area and a transition area, the transition area being located between the display area and the hole area, and the first trace segment being at least partially located in the transition area; the second trace segment being at least partially located in the display area.
[0035] Based on the same inventive concept, this application also discloses a display device, which includes the above-described display panel.
[0036] Compared with the prior art, the display panel provided in this application includes a first metal line comprising a first trace segment and a second trace segment. The first trace segment is located in a first conductor layer, and the second trace segment is located in a second conductor layer. The first trace segment at least partially surrounds a via area, and the first and second trace segments are electrically connected through vias. The first insulating layer protects the first trace segment, preventing damage to the first trace segment caused by etching through the film layer above the second conductor layer during subsequent etching processes, thereby improving the display performance of the display panel. Attached Figure Description
[0037] To more clearly illustrate the technical solutions in this application or related technologies, the drawings used in the description of the embodiments or related technologies will be briefly introduced below. Obviously, the drawings described below are only embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0038] Figure 1 This is a schematic diagram of a related display panel;
[0039] Figure 2 This is a schematic diagram of a partial structure of a related display panel;
[0040] Figure 3 This is a schematic diagram of the layer structure of a related display panel;
[0041] Figure 4 A schematic diagram of a display panel provided in one embodiment of this application;
[0042] Figure 5 for Figure 4 Enlarged schematic diagram of region M in the middle;
[0043] Figure 6 for Figure 5 Cross-sectional view along the middle AA;
[0044] Figure 7 This is a schematic diagram of the structure of the first metal line of a display panel provided in an embodiment of this application;
[0045] Figure 8 A schematic diagram of the layer structure of a display panel provided in another embodiment of this application;
[0046] Figure 9 A schematic diagram of the layer structure of a display panel provided in another embodiment of this application;
[0047] Figure 10 A schematic diagram of the layer structure of a display panel provided in another embodiment of this application;
[0048] Figure 11This is a schematic diagram of an isolation structure provided for another embodiment of this application.
[0049] Marker explanation:
[0050] 100. Display panel; 110. Panel area; 111. Display area; 112. Transition area; 120. Hole area;
[0051] 11. Substrate; 12. First insulating layer; 121. Via; 13. First sub-insulating layer; 14. Second sub-insulating layer;
[0052] 2. Isolation structure; 21. Isolation opening; 23. First support part; 231. First sub-support part; 232. Second sub-support part; 24. Second support part;
[0053] 3. Light-emitting unit; 31. First electrode; 32. Light-emitting layer; 33. Second electrode;
[0054] 4. First metal wire; 41. First wiring segment; 42. Second wiring segment; 421. First part; 422. Second part;
[0055] 5. Planarization layer;
[0056] 6. Pixel demarcation layer; 61. Pixel opening; 62. Vent hole;
[0057] 7. Packaging unit;
[0058] 8. Second encapsulation layer;
[0059] 9. Third encapsulation layer. Detailed Implementation
[0060] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with specific embodiments and the accompanying drawings.
[0061] It should be noted that, unless otherwise defined, the technical or scientific terms used in the embodiments of this application should have the ordinary meaning understood by one of ordinary skill in the art to which this application pertains. The terms "first," "second," and similar terms used in the embodiments of this application do not indicate any order, quantity, or importance, but are merely used to distinguish different components. Terms such as "comprising" or "including" mean that the element or object preceding the word encompasses the elements or objects listed after the word and their equivalents, without excluding other elements or objects. Terms such as "connected" or "linked" are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. Terms such as "upper," "lower," "left," and "right" are only used to indicate relative positional relationships; when the absolute position of the described object changes, the relative positional relationship may also change accordingly.
[0062] Reference Figure 1-3 The diagram shows a related display panel structure. The display panel 100 includes a substrate 11 and an isolation structure 2 disposed on one side of the substrate 11. The isolation structure 2 forms an isolation opening 21 for accommodating light-emitting units 3. Adjacent light-emitting units 3 are separated by the isolation structure 2.
[0063] By setting an isolation structure 2 between the light-emitting units 3, the functional film layers of adjacent light-emitting units 3 are separated. Thus, in the evaporation process of multiple functional film layers, only the entire display panel needs to be evaporated, without needing to use a fine mask to evaporate the area where the light-emitting units are located to form the functional film layers. Therefore, the evaporation process using the isolation structure 2 does not need to consider the alignment accuracy during evaporation, allowing the light-emitting units 3 to be designed with smaller dimensions to increase pixel density.
[0064] The display panel 100 includes a panel area 110 and a hole area 120. The panel area 110 is arranged around the hole area 120, which is used to place cameras, etc. Due to the existence of the hole area 120, some metal wires need to be detoured when passing through the hole area 120.
[0065] However, during the manufacturing process of the display panel 100, the metal lines around the hole area 120 are easily damaged.
[0066] Based on this, this application provides a display panel solution, as detailed in the following embodiments.
[0067] Reference Figure 4-7 As shown, one embodiment of this application discloses a display panel 100, which includes a panel area 110 and an aperture area 120. The aperture area 120 at least partially surrounds the panel area 110. The display panel 100 also includes a substrate 11, a first conductor layer M1, a first insulating layer 12, a second conductor layer M2, and first metal lines 4. The first conductor layer M1 is located on one side of the substrate 11 and in the panel area 110. The first insulating layer 12 is located on the side of the first conductor layer M1 away from the substrate 11, and a via 121 is provided on the first insulating layer 12. The second conductor layer M2 is located on the side of the first insulating layer 12 away from the substrate 11. In a specific embodiment, the number of first metal lines 4 is multiple.
[0068] Reference Figure 7 As shown, the first metal line 4 includes a first trace segment 41 and a second trace segment 42. The first trace segment 41 is located in the first conductor layer M1, and the second trace segment 42 is located in the second conductor layer M2. The first trace segment 41 is at least partially disposed around the via region 120, and the first trace segment 41 and the second trace segment 42 are electrically connected through the via 121.
[0069] Preferably, the material of the first insulating layer 12 includes inorganic materials.
[0070] The display panel 100 provided in this embodiment has a first metal line 4 including a first trace segment 41 and a second trace segment 42. The first trace segment 41 is located in the first conductor layer M1, and the second trace segment 42 is located in the second conductor layer M2. The first trace segment 41 is at least partially disposed around the via region 120, and the first trace segment 41 and the second trace segment 42 are electrically connected through a via 121. The first insulating layer 12 protects the first trace segment 41, preventing damage to the first trace segment 41 caused by etching through the film layer above the second conductor layer M2 during subsequent etching processes, thus improving the display performance of the display panel 100. Furthermore, the orthographic projection of the first trace segment 41 on the substrate 11 lies within the orthographic projection of the first insulating layer 12 on the substrate 11, enhancing the protective effect of the first insulating layer 12 on the first trace segment 41.
[0071] Specifically, an organic film layer is typically disposed on the side of the first metal line 4 away from the substrate 11. The display panel 100 has vent holes 62 around the hole area 120 to expel gas from the organic film layer. Through long-term research, the inventors have discovered that during the wet process, the wet process solution can enter the organic film layer through the vent holes 62. If the organic film layer is etched through, it will etch the first metal line 4 below, causing damage to the first metal line 4. In this embodiment, the first insulating layer 12 is used to protect the first trace segment 41, avoiding damage to the first trace segment 41 caused by the organic film layer above the second conductor layer M2 being etched through in subsequent etching processes.
[0072] Please continue to refer to Figure 5 As shown, in one embodiment, panel area 110 includes display area 111 and transition area 112. Transition area 112 is located between display area 111 and via area 120. First trace segment 41 is at least partially located in transition area 112; second trace segment 42 is at least partially located in display area 111. The transition area 112 serves as a transition region between display area 111 and via area 120. The fact that the first trace segment 41 is at least partially located in transition area 112 reduces interference with traces in display area 111. In a specific embodiment, the first trace segment 41 is entirely located in transition area 112, and the second trace segment 42 extends from display area 111 to transition area 112, and is electrically connected through via 121 in transition area 112.
[0073] Please continue to refer to Figure 7As shown, in one embodiment, the second trace segment 42 includes a first portion 421 and a second portion 422, which extend in the same direction. The first portion 421 and the second portion 422 are located on opposite sides of the via region 120. The two ends of the first trace segment 41 are electrically connected to the first portion 421 and the second portion 422 through different vias 121. Signals on the first portion 421 reach the second portion 422 via the first trace segment 41. Specifically, both the first portion 421 and the second portion 422 extend in the Y direction and are located on the same straight line. Preferably, the first trace segment 41 is arc-shaped, with the same curvature as the via region 120.
[0074] Furthermore, the first metal line 4 is a signal line, therefore, it needs to detour around the aperture region 120. Optionally, the first metal line 4 is used to transmit data signals or a first power signal; or, the first metal line 4 is used to transmit both data signals and a first power signal. Further, the display panel 100 also includes a second metal line extending along the X direction for transmitting gate signals, etc. Since the signal of the second metal line is input from both ends, it does not need to detour around the aperture region 120. The X direction intersects the Y direction, for example, at 70 degrees, 80 degrees, 90 degrees, etc., and the specific angle is not limited.
[0075] In one embodiment, the first conductor layer M1 includes a plurality of stacked sub-conductor layers, and a sub-insulating layer is disposed between adjacent sub-conductor layers. The first trace segment 41 is located in at least one of the plurality of sub-conductor layers, that is, the first trace segment 41 may run entirely through one sub-conductor layer or may be distributed in multiple sub-conductor layers. The first trace segments 41 in different sub-conductor layers are connected through vias 121 on the sub-insulating layer.
[0076] Please refer to Figure 8 and 10 As shown, preferably, the plurality of sub-conductor layers include a first sub-conductor layer M11, a second sub-conductor layer M12, and a third sub-conductor layer M13 stacked sequentially along a direction away from the substrate 11. The sub-insulating layer includes a first sub-insulating layer 13 located between the first sub-conductor layer M11 and the second sub-conductor layer M12, and a second sub-insulating layer 14 located between the second sub-conductor layer M12 and the third sub-conductor layer M13. The first trace segment 41 is located at least one of the first sub-conductor layer M11, the second sub-conductor layer M12, and the third sub-conductor layer M13.
[0077] In one specific embodiment, the first trace segment 41 is located on the second sub-conductor layer M12. Two insulating layers, a second sub-insulating layer 14 and a first insulating layer 12, protect the first trace segment 41 above the second sub-conductor layer M12, providing better protection. In another embodiment, the first trace segment 41 is located on the first sub-conductor layer M11. Three insulating layers, a first sub-insulating layer 13, a second sub-insulating layer 14, and a first insulating layer 12, protect the first trace segment 41 above the first conductor layer M11, further enhancing the protection effect. In yet another embodiment, the first trace segment 41 may be partially located on the first sub-conductor layer M11 and partially on the second sub-conductor layer M12, and connected via a via 121 on the first sub-insulating layer 13.
[0078] Please continue to refer to Figure 6 and 9 As shown, in one embodiment, the display panel 100 further includes a planarization layer 5 and a pixel defining layer 6. The planarization layer 5 is located on the side of the second conductor layer M2 away from the substrate 11, and the pixel defining layer 6 is located on the side of the planarization layer 5 away from the substrate 11. The planarization layer 5 covers the first trace segment 41 and serves to planarize it, while the pixel defining layer 6 protects the electrodes.
[0079] Preferably, the pixel defining layer 6 is provided with an exhaust hole 62, the exhaust hole 62 exposing a portion of the planarization layer 5; wherein, the planarization layer 5 is an organic film layer, and the exhaust hole 62 is used to discharge the gas inside the planarization layer 5.
[0080] Preferably, the orthographic projection of the vent hole 62 on the substrate 11 at least partially overlaps with the orthographic projection of the first trace segment 41 on the substrate 11. Since both the vent hole 62 and the first trace segment 41 are located around the hole region 120, this at least partial overlap ensures a more compact structure, enhancing the performance of the display panel. In this case, the first insulating layer 12 between the first trace segment 41 and the vent hole 62 effectively protects the first trace segment 41, preventing damage even if the planarization layer 5 is etched through. In another embodiment, the orthographic projection of the vent hole 62 on the substrate 11 does not overlap with the orthographic projection of the first trace segment 41 on the substrate 11.
[0081] Preferably, the pixel defining layer 6 is provided with a plurality of vent holes 62, which are arranged around the hole area 120 to improve the venting effect.
[0082] Preferably, the pixel defining layer 6 is made of inorganic materials to improve wet etching resistance.
[0083] Please refer to Figure 5As shown, in one embodiment, panel area 110 includes display area 111 and transition area 112. Transition area 112 is located between display area 111 and hole area 120. Exhaust hole 62 is located in transition area 112 to avoid affecting display area 111 and hole area 120.
[0084] Please refer to Figure 9 As shown, in one embodiment, the display panel 100 further includes an isolation structure 2 located on the side of the second conductor layer away from the substrate 11, and the isolation structure 2 encloses a plurality of isolation openings 21 for accommodating at least a portion of the light-emitting units 3.
[0085] In this design, the isolation structure 2 separates the functional film layers of adjacent light-emitting units 3. Thus, in the evaporation process of multiple functional film layers, only the entire display panel needs to be evaporated, without requiring a fine mask to evaporate the area containing the light-emitting units 3 to form the functional film layers. Therefore, the evaporation process using the isolation structure 2 does not need to consider alignment accuracy during evaporation, allowing for a smaller gap between the light-emitting units 3 to increase pixel density.
[0086] Please continue to refer to Figure 9 As shown, in one embodiment, the light-emitting unit 3 includes a first electrode 31, a light-emitting layer 32, and a second electrode 33 sequentially stacked along a direction away from the substrate 11. The light-emitting layer 32 and the second electrode 33 are at least partially located in the isolation opening 21. The light-emitting layer 32 is separated by the isolation structure 2. The first electrode 31, the light-emitting layer 32, and the second electrode 33 constitute the light-emitting unit 3. By applying different voltages to the first electrode 31 and the second electrode 33, a voltage difference is formed between the first electrode 31 and the second electrode 33, driving the light-emitting layer 32 to emit light. Optionally, the first electrode 31 is the anode, and the second electrode 33 is the cathode.
[0087] Furthermore, the display panel 100 also includes a pixel defining layer 6, which is located between the isolation structure 2 and the substrate 11. The pixel defining layer 6 defines a plurality of pixel openings 61 corresponding to the isolation openings 21. The pixel openings 61 are located within the corresponding isolation openings 21, and the pixel defining layer 6 covers the gap between adjacent first electrodes 31 and the edge of the first electrodes 31, so that the pixel openings 61 expose the first electrodes 31, thereby allowing the first electrodes 31 to have a larger design area without contacting the isolation structure 2, so that the light-emitting unit 3 has a larger effective light-emitting area.
[0088] Please refer to Figure 10As shown, in one embodiment, the isolation structure 2 includes a first support portion 23 and a second support portion 24. The second support portion 24 is located on the side of the first support portion 23 away from the substrate 11. The second electrode 33 is electrically connected to the first support portion 23, so that the first support portion 23 of the isolation structure 2 connects the second electrode 33 in series, thereby making the first support portion 23 and the second electrode 33 form a common electrode for driving.
[0089] Preferably, the orthographic projection of the end of the first support portion 23 near the second support portion 24 onto the substrate 11 lies within the orthographic projection of the second support portion 24 onto the substrate 11. Thus, the portion of the isolation structure 2 at least away from the substrate 11 is configured with a shape that is wider at the top and narrower at the bottom, allowing the isolation structure 2 to block the light-emitting layer 32 of adjacent light-emitting units 3, thereby reducing current crosstalk between adjacent light-emitting units 3. Further, the material of the second support portion 24 includes titanium or molybdenum, etc.
[0090] Please refer to Figure 10 and 11 As shown, in one embodiment, the first support portion 23 includes a first sub-support portion 231 and a second sub-support portion 232. The first sub-support portion 231 is located between the second sub-support portion 232 and the substrate 11. The orthographic projection area of the first sub-support portion 231 on the substrate 11 is larger than the orthographic projection area of the second sub-support portion 232 on the substrate 11, and the orthographic projection of the second sub-support portion 232 on the substrate 11 lies within the orthographic projection of the first sub-support portion 231 on the substrate 11. The second electrode 33 overlaps with the first sub-support portion 231, which helps to ensure the stability of the electrical connection between the second electrode 33 and the first support portion 23. Further, the material of the first sub-support portion 231 includes titanium or molybdenum, etc.; the material of the second sub-support portion 232 includes aluminum, copper, or silver, etc.
[0091] Preferably, the second electrode 33 also overlaps with the second sub-support 232, which helps to increase the overlap area and further improve the overlap effect.
[0092] Please continue to refer to Figure 10 As shown, in one embodiment, the display panel 100 further includes a first encapsulation layer 7, which includes a plurality of encapsulation units 7 corresponding to the isolation opening 21. The encapsulation units 7 are located on the side of the light-emitting unit 3 away from the substrate 11. The encapsulation units 7 are used to protect the light-emitting unit 3.
[0093] Preferably, a portion of the packaging unit 7 extends to the side of the corresponding isolation structure 2 away from the substrate 11, and the portion of the packaging unit 7 located on the side of the isolation structure 2 away from the substrate 11 is spaced apart from the isolation structure 2 to improve the packaging effect.
[0094] Preferably, the display panel 100 further includes a second encapsulation layer 8 and a third encapsulation layer 9 covering the first encapsulation layer and the isolation structure 2, wherein the second encapsulation layer 8 is located between the first encapsulation layer and the third encapsulation layer 9, further improving the encapsulation effect.
[0095] Preferably, the first encapsulation layer and the third encapsulation layer 9 are inorganic layers. The inorganic layers have high density to isolate water and oxygen, while the second encapsulation layer 8 is an organic layer, which has a large thickness to flatten the surface of the display panel, thus realizing an inorganic-organic-inorganic three-layer encapsulation.
[0096] Another embodiment of this application discloses a display device, which includes the display panel 100 in the above embodiment. The display device can be used on smart devices (such as mobile phones, VR devices, computers, televisions, vehicle displays, etc.).
[0097] In this embodiment, the first metal line 4 in the display panel 100 of the display device includes a first trace segment 41 and a second trace segment 42. The first trace segment 41 is located in the first conductor layer M1, and the second trace segment 42 is located in the second conductor layer M2. The first trace segment 41 is at least partially disposed around the via region 120, and the first trace segment 41 and the second trace segment 42 are electrically connected through a via 121. The first insulating layer 12 protects the first trace segment 41, preventing damage to the first trace segment 41 caused by etching through the film layer above the second conductor layer M2 during subsequent etching processes. This improves the display performance of the display panel 100 and the display performance of the display device.
[0098] Patent applications CN118251982A, 202410864269.8, PCT / CN2024 / 098407, PCT / CN2024 / 102783, PCT / CN2024 / 098217, PCT / CN2024 / 099419, PCT / CN2024 / 099072, CN117979755A, CN11799 CN1900A, CN117062489A, CN117580403A, CN116583135A, CN116669477A, CN117396039A, CN116669480A, CN116600606A, and CN117500332A describe relevant technical solutions for the isolation structure 2, the contents of which are incorporated herein by reference.
[0099] Although this application has been described in conjunction with specific embodiments thereof, many substitutions, modifications and variations of these embodiments will be apparent to those skilled in the art from the foregoing description.
[0100] It should be noted that the above description describes some embodiments of this application. Other embodiments are within the scope of the appended claims. In some cases, the actions or steps recorded in the claims can be performed in a different order than that shown in the above embodiments and still achieve the desired result. Furthermore, the processes depicted in the drawings do not necessarily require a specific or sequential order to achieve the desired result. In some embodiments, multitasking and parallel processing are also possible or may be advantageous.
[0101] The embodiments of this application are intended to cover all such substitutions, modifications, and variations that fall within the broad scope of the appended claims. Therefore, any omissions, modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the embodiments of this application should be included within the protection scope of this application.
Claims
1. A display panel, characterized in that, The display panel includes a panel area and a hole area, the hole area at least partially surrounding the panel area, and further includes: Substrate; The first conductor layer is located on one side of the substrate; A first insulating layer is located on the side of the first conductor layer away from the substrate, and a via is provided on the first insulating layer; The second conductor layer is located on the side of the first insulating layer away from the substrate; The first metal wire includes a first trace segment and a second trace segment, wherein the first trace segment is located in the first conductor layer and the second trace segment is located in the second conductor layer; The first trace segment is at least partially disposed around the via area, and the first trace segment and the second trace segment are electrically connected through the via.
2. The display panel as described in claim 1, characterized in that, The second trace segment includes a first part and a second part, which extend in the same direction. The first part and the second part are located on both sides of the hole area, and the two ends of the first trace segment are electrically connected to the first part and the second part through different vias.
3. The display panel as described in claim 1, characterized in that, The first conductor layer includes a plurality of stacked sub-conductor layers, and a sub-insulating layer is disposed between adjacent sub-conductor layers. The first trace segment is located in at least one of the plurality of sub-conductor layers.
4. The display panel as described in claim 3, characterized in that, The plurality of said sub-conductor layers include a first sub-conductor layer, a second sub-conductor layer and a third sub-conductor layer stacked sequentially in a direction away from the substrate, the sub-insulating layer includes a first sub-insulating layer located between the first sub-conductor layer and the second sub-conductor layer, and a second sub-insulating layer located between the second sub-conductor layer and the third sub-conductor layer, and the first trace segment is located in at least one of the first sub-conductor layer, the second sub-conductor layer and the third sub-conductor layer.
5. The display panel as described in claim 1, characterized in that, The display panel also includes: A planarization layer is located on the side of the second conductor layer away from the substrate; A pixel defining layer is located on the side of the planarization layer away from the substrate; Preferably, the pixel defining layer is provided with vent holes, and the vent holes expose a portion of the planarization layer.
6. The display panel as described in claim 5, characterized in that, The orthographic projection of the vent hole on the substrate at least partially overlaps with the orthographic projection of the first trace segment on the substrate.
7. The display panel as described in claim 5, characterized in that, The pixel defining layer is provided with a plurality of vent holes, which are arranged around the hole area; Preferably, the material of the pixel defining layer includes inorganic materials.
8. The display panel as described in claim 5, characterized in that, The panel area includes a display area and a transition area, the transition area being located between the display area and the hole area, and the vent being located in the transition area.
9. The display panel as claimed in claim 1, characterized in that, The display panel also includes: An isolation structure is located on the side of the second conductor layer away from the substrate, and the isolation structure encloses a plurality of isolation openings for accommodating at least a portion of the light-emitting units.
10. The display panel as claimed in claim 9, characterized in that, The light-emitting unit includes a first electrode, a light-emitting layer, and a second electrode stacked sequentially along a direction away from the substrate, wherein the light-emitting layer and the second electrode are at least partially located in the isolation opening.
11. The display panel as claimed in claim 10, characterized in that, The isolation structure includes a first support portion and a second support portion, the second support portion being located on the side of the first support portion away from the substrate, and the second electrode being electrically connected to the first support portion; Preferably, the orthographic projection of one end of the first support portion near the second support portion on the substrate is located within the orthographic projection of the second support portion on the substrate.
12. The display panel as claimed in claim 11, characterized in that, The first support portion includes a first sub-support portion and a second sub-support portion. The first sub-support portion is located between the second sub-support portion and the substrate. The orthographic projection area of the first sub-support portion on the substrate is larger than the orthographic projection area of the second sub-support portion on the substrate, and the orthographic projection of the second sub-support portion on the substrate is located within the orthographic projection of the first sub-support portion on the substrate. The second electrode overlaps with the first sub-support portion. Preferably, the second electrode overlaps with the second sub-support portion.
13. The display panel as claimed in claim 9, characterized in that, The display panel further includes a first encapsulation layer, which includes a plurality of encapsulation units corresponding to the isolation opening, and the encapsulation units are located on the side of the light-emitting unit away from the substrate; Preferably, a portion of the packaging unit extends to the side of the isolation structure opposite to the substrate, and the portion of the packaging unit located on the side of the isolation structure opposite to the substrate is spaced apart from the isolation structure. Preferably, the display panel further includes a second encapsulation layer and a third encapsulation layer covering the first encapsulation layer and the isolation structure, wherein the second encapsulation layer is located between the first encapsulation layer and the third encapsulation layer; Preferably, the first encapsulation layer and the third encapsulation layer are inorganic layers, and the second encapsulation layer is an organic layer.
14. The display panel as claimed in claim 1, characterized in that, The panel area includes a display area and a transition area, the transition area being located between the display area and the hole area, and the first trace segment being at least partially located in the transition area; the second trace segment being at least partially located in the display area.
15. A display device, characterized in that, The display device includes a display panel as described in any one of claims 1-14.
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