Semiconductor equipment inspection method, device, equipment, system and medium

Abstract

The invention provides an inspection method, device, equipment and system for semiconductor equipment and a medium, and the method comprises the steps: controlling a test wafer to execute at least one circulation transmission operation in a preset transmission path of the semiconductor equipment after the maintenance of the semiconductor equipment is completed; after the cyclic transmission operation is completed, obtaining a current detection image of the target area of the test wafer; acquiring an image similarity parameter between the current detection image and the reference image; and when the image similarity parameter does not meet a preset similarity threshold value, determining that the contact point of the semiconductor equipment is abnormal, and generating an abnormal instruction.

Description

Technical Field

[0001] This disclosure relates to the field of semiconductor manufacturing technology, and in particular to a method, apparatus, equipment, system and medium for inspecting semiconductor equipment. Background Technology

[0002] During wafer manufacturing, semiconductor equipment, such as grinding equipment, polishing equipment, and epitaxial growth equipment, inevitably experience minor physical drift, wear, or thermal deformation in their internal mechanical transmission components (such as atmospheric manipulators, vacuum manipulators, and wafer carriers) under high-load operation. Therefore, semiconductor equipment is usually maintained.

[0003] During equipment maintenance, especially when adjusting internal mechanical transport components such as vacuum robots, atmospheric robots, or transfer modules, engineers often need to perform robot teaching to calibrate the wafer transport coordinates.

[0004] After maintenance of semiconductor equipment, minute deviations in these internal mechanical transport components can cause abnormal contact of the wafer during transport, resulting in defects such as wafer scratches and contamination. By the time defects caused by abnormal contact leading to wafer quality degradation are discovered, the semiconductor equipment has often already produced a large number of potentially low-quality wafers. Furthermore, the inability to immediately pinpoint the specific abnormal contact point leads to poor troubleshooting timeliness and high maintenance costs.

[0005] Therefore, there is an urgent need for a solution that can locate abnormal contact points in real time, quickly and accurately, in order to improve detection efficiency and product yield, and reduce maintenance costs. Summary of the Invention

[0006] This disclosure provides a method, apparatus, device, system, and medium for inspecting semiconductor equipment; it can accurately locate abnormal contact points with the wafer after maintenance of the semiconductor equipment, realize the inspection of the maintained semiconductor equipment, improve testing efficiency and product yield, and reduce maintenance costs.

[0007] The technical solution disclosed herein is implemented as follows: In a first aspect, this disclosure provides a method for inspecting semiconductor devices, including: After maintenance of the semiconductor equipment is completed, the test wafer is controlled to perform at least one cycle of transfer operation in the preset transfer path of the semiconductor equipment. The preset transfer path is used to simulate the processing path to make physical contact between the test wafer and the contact point of the semiconductor equipment. After the loop transfer operation is completed, the current detection image of the target area of ​​the test wafer is obtained; Obtain image similarity parameters between the current detection image and a reference image, which includes an initial state image of the target region acquired before the test wafer performs a cyclic transfer operation; When the image similarity parameter does not meet the preset similarity threshold, it is determined that there is an abnormal contact point in the semiconductor device, and an abnormal instruction is generated.

[0008] Secondly, this disclosure provides a testing apparatus for semiconductor devices, comprising: The control unit is configured to control the test wafer to perform at least one cycle of transfer operation in a preset transfer path of the semiconductor equipment after maintenance of the semiconductor equipment is completed. The transfer path is used to simulate the processing path so that the test wafer and the contact point of the semiconductor equipment make physical contact. The first acquisition unit is configured to acquire the current detection image of the target area of ​​the test wafer after the cyclic transmission operation is completed; The second acquisition unit is configured to acquire image similarity parameters between the currently detected image and the reference image; The determination unit is configured to determine that there is an abnormal contact point in the semiconductor device and generate an abnormal instruction when the image similarity parameter does not meet the preset similarity threshold.

[0009] Thirdly, this disclosure provides a computing device including a processor and a memory; the processor is configured to execute instructions stored in the memory to implement a method for testing a semiconductor device as described in the first aspect.

[0010] Fourthly, this disclosure provides a computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the method for testing a semiconductor device as described in the first aspect.

[0011] Fifthly, this disclosure provides a semiconductor device inspection system, comprising: Semiconductor equipment Image acquisition equipment is used to acquire image data of a test wafer before and after it undergoes a cyclic transfer operation in a preset transfer path of a semiconductor device. And a semiconductor equipment inspection apparatus, communicatively connected to the semiconductor equipment and the image acquisition device, configured to perform the semiconductor equipment inspection method steps as described in the first aspect.

[0012] This disclosure provides a method, apparatus, device, system, and medium for inspecting semiconductor equipment. After maintenance of the semiconductor equipment, multiple cyclic transfer operations are performed in a non-process state to effectively amplify potential mechanical contact effects. Through image similarity analysis, mechanical defects caused by contact anomalies can be captured, and abnormal contact points with the wafer can be accurately located. This enables the inspection of the maintained semiconductor equipment, improves inspection efficiency and product yield, and reduces maintenance costs. Attached Figure Description

[0013] Figure 1 This is a schematic diagram of the architecture of the semiconductor equipment inspection system provided in this disclosure.

[0014] Figure 2 This is a schematic diagram of the inspection method for semiconductor devices provided in this disclosure.

[0015] Figure 3 This is a schematic diagram of the edge region of the wafer provided in this disclosure.

[0016] Figure 4 This is a schematic diagram of the process for obtaining image similarity parameters provided in this disclosure.

[0017] Figure 5 This is a schematic diagram of the computational architecture for obtaining image similarity parameters provided in this disclosure.

[0018] Figure 6 A schematic diagram illustrating the different defect categories provided in this disclosure.

[0019] Figure 7 A schematic diagram of the composition of the semiconductor equipment testing apparatus provided in this disclosure.

[0020] Figure 8 This is a schematic diagram of the structure of the computing device provided in this disclosure. Detailed Implementation

[0021] The technical solutions in this disclosure will now be clearly and completely described with reference to the accompanying drawings.

[0022] Figure 1 This is a schematic diagram of the architecture of the semiconductor device inspection system 100 provided in this disclosure. Figure 1 As shown, the semiconductor equipment inspection system 100 includes: semiconductor equipment 110, image acquisition equipment 120, and semiconductor equipment inspection device 130, which may also be referred to as inspection device 130 in the following description.

[0023] In this disclosure, semiconductor device 110 may be a cluster tool, such as a chemical vapor deposition (CVD) device. To meet the high yield requirements of 300mm (12-inch) wafer manufacturing, the device typically employs a multi-chamber parallel processing architecture.

[0024] like Figure 1 As shown, the semiconductor device 110 includes an Equipment Front End Module (EFEM) 111, which serves as the gateway for wafers to enter and exit the semiconductor device. The EFEM 111 maintains a mini-environment with a cleanliness level typically meeting ISO Class 1 standards, meaning fewer than two particles larger than 0.3 micrometers per cubic meter of air. The EFEM 111 is equipped with multiple loadports for placing front-opening wafer assemblies (FOUPs), each FOUP typically accommodating 25 300mm wafers. Inside the EFEM 111, one or more atmospheric robotic arms (not shown) are configured. These arms typically have 4 to 5 degrees of freedom (R, Theta, Z, T, Track) for high-speed wafer transfer between the FOUP and the loadlock. To prevent metal contamination, the end effector of the atmospheric robotic arm is typically made of high-purity ceramic.

[0025] like Figure 1 As shown, the semiconductor device 110 also includes a loadlock 112, such as... Figure 1 As shown, there are two load locks 112, which serve as transition chambers between atmospheric and vacuum environments. It is equipped with a high-performance vacuum pump assembly capable of rapidly switching between atmospheric pressure (approximately 10¹³ mbar) and rough vacuum (approximately 0.1 mbar to 0.01 mbar). Rapid pump / vent cycle is crucial for wafer transfer efficiency but is also prone to particle generation due to airflow disturbances, thus requiring extremely high stability from the mechanical support structure within the load lock 112.

[0026] like Figure 1As shown, the semiconductor device 110 also includes a transfer chamber 113, located in the core area of ​​the device, maintaining a high vacuum or ultra-high vacuum environment. A vacuum robot is installed at the center of the transfer chamber 113. Unlike atmospheric robots, the vacuum robot employs a magnetofluidic seal or bellows seal technology to prevent particles generated by the motor from entering the vacuum chamber. The vacuum robot is responsible for removing wafers from the loadlock 112 and delivering them to the various process chambers 114. Due to the lack of air damping in a vacuum environment, and the fact that robots often have long lever arms (e.g., extension lengths of 300 mm to 500 mm), minute vibrations at high speeds (maximum speeds of 1000 mm / s to 1800 mm / s) are easily amplified, causing unintended physical contact between the wafer edge and the lift pins or pedestals within the chamber.

[0027] like Figure 1 As shown, the semiconductor device 110 also includes a plurality of process chambers 114 distributed around the transfer chamber 113. Figure 1 The example uses two process chambers. These process chambers 114 are where wafer processing (such as etching and deposition) is actually performed. Under normal production conditions, corrosive gases are introduced into the process chambers 114 and radio frequency (RF) power is applied. The process chambers 114 are typically equipped with electrostatic or mechanical chucks for securing the wafers.

[0028] In the wafer fabrication process, the wafer processing path, as shown by the dashed arrow, begins with the wafer being fed into the semiconductor equipment 110 from EFEM 111, sequentially passing through Loadlock 112, transfer chamber 113, and process chamber 114, where the wafer processing steps are completed. After the processing steps are completed, the wafer then passes through process chamber 114, transfer chamber 113, Loadlock 112, and EFEM 111 again, and is then ejected from EFEM 111. In the aforementioned wafer transfer path, components such as the atmospheric manipulator, the mechanical support structure within Loadlock 112, the vacuum manipulator, and the chuck in process chamber 114 all come into contact with the wafer. The wafer relies on these components for transfer within each chamber; therefore, these components that come into contact with the wafer form the mechanical transfer system of the semiconductor equipment 110, which can also be referred to as the contact points of the semiconductor equipment 110.

[0029] See Figure 1The image acquisition device 120 is used to acquire high-resolution image data of the wafer. In this disclosure, the image acquisition device 120 can be integrated as an in-circuit inspection module on the EFEM 111 side of the semiconductor device 110, or it can be physically connected to the semiconductor device 110 as a stand-alone inspection station via an over-the-air (OHT) system. Specifically, the image acquisition device 120 internally includes a high-precision optical imaging unit. This imaging unit preferably employs a large-area, high-sensitivity industrial-grade CMOS or CCD sensor, so that the resolution of the imaging unit can reach 25 million pixels or even higher, such as 65 million pixels, and the pixel size can be as small as 2.74 μm or smaller to ensure the ability to resolve micron-level scratches and submicron-level particles.

[0030] The semiconductor device inspection apparatus 130 is communicatively connected to the semiconductor device 110 and the image acquisition device 120, respectively, to implement the semiconductor device inspection method provided in this disclosure.

[0031] Figure 2 This is a schematic diagram of a semiconductor device inspection method provided in this disclosure. The inspection method can be performed by the semiconductor device inspection apparatus 130.

[0032] See Figure 2 In step S210, after the semiconductor equipment maintenance is completed, the test wafer is controlled to perform at least one cyclic transfer operation in the preset transfer path of the semiconductor equipment.

[0033] In this disclosure, semiconductor equipment maintenance refers to events that may alter the mechanical state of a semiconductor device. These events may include: robot teaching, such as engineers recalibrating the extension position, rotation angle, or lifting height of atmospheric or vacuum robots; parts replacement, such as replacing worn robot blades, worn O-rings, or repairing magnetohydrodynamic seals in the transfer chamber; error recovery, such as the semiconductor equipment shutting down due to alarms caused by transfer timeouts, wafer slippage, or abnormal vacuum levels, and the alarm being cleared by manual intervention; and preventative maintenance (PM), such as completing a regular chamber cleaning schedule.

[0034] After these events are completed, the semiconductor device is typically in an unverified state. In this disclosure, the semiconductor device verification device 130 is triggered based on the completion of semiconductor device maintenance. Figure 2 The inspection method flow is shown. For example, during the execution of the inspection method, the state of semiconductor device 110 can be set to a shutdown state.

[0035] In this disclosure, after the inspection method process is triggered, the inspection apparatus 130 of the semiconductor device can schedule a test wafer with a known initial state and no edge contamination and send it into the semiconductor device to perform at least one cycle of transmission operation according to a preset transmission path.

[0036] Specifically, the test wafer can be a bare silicon wafer that has undergone ultra-clean cleaning or a monitor wafer with an oxide film of a specific thickness on its surface.

[0037] This preset transfer path is used to simulate the processing path to ensure physical contact between the test wafer and the contact points of the semiconductor device. This transfer path represents the wafer's processing path during the wafer fabrication process. Figure 1 Taking the semiconductor device 110 shown as an example, the wafer processing path is as follows: Figure 1 As shown by the dashed line, this accurately simulates the complete transport trajectory of the wafer in actual production, ensuring comprehensive inspection of all components in the mechanical transport system that come into contact with the wafer.

[0038] During multiple cyclic transfer operations via a preset transfer path, the internal chambers of the semiconductor equipment 110, such as the process chamber 114, are not powered on with process gas sources or RF power supplies, constituting a cold operation. This eliminates interference from chemical reactions and thermal stress during the cyclic transfer operations, allowing for more precise testing of the contact between the mechanical transfer system and the wafer within the semiconductor equipment 110. Furthermore, to ensure consistency with the actual production environment, the transfer speed of the test wafer during the cyclic operations should be close to or equal to the typical speed during production line operation. In this disclosure, the number of cyclic transfer operations is at least once, and can be set between 3 and 20 times. This is because minute mechanical deviations may only produce insignificant defects in a single transfer operation, making them difficult to accurately detect. However, through 3 to 20 reciprocating transfers, the stress from the minute deviations of the mechanical transfer system at each contact with the wafer will continuously accumulate and act on the test wafer, thereby amplifying potential defect features to a macroscopically recognizable scale, thus greatly improving the sensitivity and reliability of the inspection.

[0039] See Figure 2 In step S220, after the cyclic transfer operation is completed, the current detection image of the target area of ​​the test wafer is obtained.

[0040] In this disclosure, after the cyclic transfer operation is completed, the test wafer is sent back to the EFEM, and the image acquisition device 120 integrated on the side of the EFEM 111 acquires the current detection image of the target area of ​​the test wafer.

[0041] Specifically, since the components inside the semiconductor device 110 that come into contact with the wafer are mostly transport-related parts, such as robotic arms, the areas on the wafer surface where contact points are abnormal are mostly located at the wafer's edge regions, for example... Figure 3 As shown, the edge region 300 of the test wafer W includes a chamfered portion 301 on the outer periphery of the wafer and an edge exclusion (EE) region 302 with a preset width (3-5mm). The chamfered portion 301 is composed of a chamfered surface 4 on the upper surface side, a chamfered surface 5 on the lower surface side, and an edge surface 6.

[0042] See Figure 2 In step S230, the image similarity parameter between the current detected image and the reference image is obtained.

[0043] Specifically, the reference image is an initial state image of the edge region of the test wafer acquired by the image acquisition device 120 before the test wafer performs a cyclic transfer operation. This reference image serves as a benchmark for detecting whether there are contact point abnormalities within the semiconductor device.

[0044] In this disclosure, after determining the detection benchmark, the semiconductor device inspection apparatus 130 obtains an image similarity parameter between the two by comparing the current detection image with a reference image.

[0045] Understandably, during the cyclic transfer operation of the test wafer, if there are mechanical components with abnormal contact points inside the semiconductor device 110, contact-type mechanical defects will be generated in the edge area of ​​the test wafer. These mechanical defects include scratches caused by hard contact between the test wafer and the mechanical components, which are usually linear and arc-shaped; chatter marks left by high-frequency vibrations during sliding, which appear as a series of discontinuous short lines; and indentations caused by excessive clamping force or abnormal positioning pins / support points, which appear as point features or microcracks with a set geometric arrangement.

[0046] When the aforementioned mechanical defects appear on the test wafer, the similarity between the current detection image of the test wafer and the reference image decreases, thereby causing the image similarity parameter to decrease accordingly.

[0047] See Figure 2 In step S240, when the image similarity parameter does not meet the preset similarity threshold, it is determined that there is an abnormal contact point in the semiconductor device, and an abnormal command is generated.

[0048] Specifically, a similarity threshold is pre-set for the image similarity parameter to determine whether there are contact point anomalies. This similarity threshold can be obtained based on a large amount of historical data and yield correlation analysis. In some examples, the similarity threshold can be set to 0.9.

[0049] In this disclosure, if the image similarity parameter does not meet a preset similarity threshold, i.e., the image similarity parameter is less than the similarity threshold, it indicates that the current inspection image of the test wafer contains a contact-type mechanical defect. In this case, the inspection device 130 of the semiconductor equipment determines that there is a contact point abnormality in the semiconductor equipment 110 and generates an abnormality command. In some examples, the abnormality command can trigger at least one of the following actions: locking the equipment, keeping the semiconductor equipment 110 in a down state, and prohibiting the receipt of production batches; alarm notification, illuminating the alarm tower light on the top of the semiconductor equipment 110, usually a red light, and notifying the engineers of the abnormality through the factory MES system, so that the engineers can readjust the contact points of these components that contact the wafer.

[0050] In this disclosure, an image similarity parameter satisfying a similarity threshold, i.e., an image similarity parameter greater than or equal to the similarity threshold, indicates that the current inspection image of the test wafer does not contain contact-type mechanical defects. In this case, the semiconductor equipment inspection apparatus 130 determines that the semiconductor equipment 110 is in good mechanical condition and that there are no contact point abnormalities, and generates a pass instruction. In some examples, this pass instruction indicates that the semiconductor equipment meets production requirements, and based on this pass instruction, the semiconductor equipment inspection apparatus 130 can release the semiconductor equipment 110, switch the status of the semiconductor equipment 110 to "Ready," and allow it to begin operating a production batch.

[0051] pass Figure 2 The technical solution shown effectively amplifies the potential mechanical contact effect by performing multiple cyclic transfer operations in a non-process state after the semiconductor equipment has been maintained. Through image similarity analysis, mechanical defects caused by contact anomalies can be captured, and abnormal contact points with the wafer can be accurately located. This enables the inspection of the maintained semiconductor equipment, improves inspection efficiency and product yield, and reduces maintenance costs.

[0052] Figure 4 and Figure 5 A schematic diagram of the process and computational architecture for obtaining image similarity parameters provided in this disclosure is shown. This process can be an exemplary implementation of step S230, executed by the semiconductor device inspection apparatus 130.

[0053] See Figure 4 In step S232, the current detection image is compared with the initial state image to identify new defect features caused by the cyclic transmission operation.

[0054] In this disclosure, because the test wafer undergoes slight rotation or translation during its cyclic transport within the semiconductor device 110, the current detection image is directly transmitted. Compared to the initial state image, i.e., the reference image Differential alignment is inaccurate. Therefore, the semiconductor device inspection apparatus 130 can use notches or laser marks on the wafer under test as reference feature points before performing differential alignment, and perform a matching algorithm based on the image features of the notches or laser marks to calculate an affine transformation matrix. Subsequently, the inspection apparatus 130 uses this matrix to inspect the current image. Perform geometric corrections to make it consistent with the reference image. Achieve alignment.

[0055] In the current detected image Compared with reference image After alignment, the semiconductor equipment inspection device 130 can proceed according to... Generate difference image In this difference image In this process, the inherent background texture of the test wafer surface, such as the roughness of the epitaxial layer or the pattern of the underlying layer, is subtracted and canceled out, while the newly added defect features generated during the cyclic transfer process are preserved.

[0056] In this disclosure, after obtaining the difference image Subsequently, the semiconductor equipment inspection device 130 can use the differential image as a basis for... The Automatic Defect Classification (ADC) algorithm is used to identify new defect features in the current detection image relative to the initial state image. These new defect features are used to indicate non-contact particulate defects and contact mechanical defects.

[0057] Specifically, the semiconductor equipment inspection device 130 uses an ADC algorithm to segment and extract features from bright spot regions in a differential image. The ADC algorithm can be a rule-based classical machine vision algorithm or a deep learning-based convolutional neural network (CNN). In detail, the features extracted from the differential image include geometric features such as area, length, width, aspect ratio, roundness, and convexity; grayscale features such as average grayscale, maximum grayscale, and contrast; and spatial distribution features such as defect density, whether they are clustered, and whether the distribution shape is linear, arc-shaped, or random.

[0058] Based on these features, regions exhibiting bright spots in the difference image can be classified as defects, such as... Figure 6 As shown. In Figure 6The first type is non-contact particulate defects, which are formed by the natural settling of micro-dust suspended within the cavity of the semiconductor device 110 onto the surface of the test wafer. These defects are typically circular or near-circular, with a roundness >0.8, an aspect ratio close to 1:1, and blurred edges. Furthermore, these defects are spatially randomized, without a clear directionality or clustering pattern. Figure 6 The first type of particle defect shown in the diagram has two additional particle defects after the cyclic transmission process compared to before the cyclic transmission process.

[0059] The second category is contact-type mechanical defects. These defects occur when the test wafer comes into hard contact with components used for transfer within the semiconductor equipment 110, such as robotic arms, chucks, and pins, resulting in material removal or deformation. These defects include scratches, which have a large aspect ratio, typically greater than 5, and appear as lines or arcs, with the curvature of the arc matching the rotation radius of the robotic arm. Additionally, mechanical defects include chatter marks, which appear as a series of discontinuous short lines left by high-frequency vibrations during the robotic arm's sliding motion. Furthermore, mechanical defects include indentations, which appear as a lattice of dots with a specific geometric arrangement. For example, if the defect presents as an approximately equilateral triangle with three fixed points, this typically corresponds to the positions of three lifting pins or the support bumps of an electrostatic chuck within the process chamber. Figure 6 The example of the second type of mechanical defect shown is a scratch at an angle of 123.08°, which is a new defect after the cyclic transmission process compared to before the cyclic transmission process.

[0060] In step S234, image similarity parameters are calculated based on the distribution pattern of the newly added defect features.

[0061] In this disclosure, image similarity parameters can be calculated based on the distribution of non-contact particulate defects and contact mechanical defects indicated by newly added defect features. Specifically, the semiconductor device inspection apparatus 130 can calculate image similarity parameters based on the distribution density and weight of mechanical defects.

[0062] In detail, since the occurrence of mechanical defects indicates that there is an abnormality in the contact points within the semiconductor device 110 and should be eliminated in a timely manner, in some examples, when a mechanical defect occurs, the image similarity parameter can be set to a value below the similarity threshold to trigger an abnormal instruction.

[0063] In some examples, a weighted summation can be performed on the defects indicated by the newly added defect features to calculate the image similarity parameter. Specifically, among the defects indicated by the newly added defect features, since the tolerance for non-contact particulate defects is higher than that for contact mechanical defects, the semiconductor device inspection apparatus 130 can set a smaller weight for non-contact particulate defects and a larger weight for contact mechanical defects. In this way, the semiconductor device inspection apparatus 130 can calculate the image similarity parameter based on the distribution density and weight of the mechanical defects. For example, the image similarity parameter can be calculated using the following formula. .

[0064]

[0065] in: This indicates the total area of ​​the target region, i.e., the edge region; This represents the area of ​​the i-th defect, which in this disclosure is either a particulate defect or a mechanical defect; This represents the weight based on the ADC classification result. In this disclosure, when the i-th defect is classified as a particulate defect, the weight corresponding to that defect is... Set to a small value, such as 1.0, when the i-th defect is classified as a mechanical defect, the corresponding value for that defect is... Set a very high penalty value, such as 10 or higher.

[0066] As shown in the above formula, when there is only a tiny mechanical scratch on the test wafer surface, its extremely high weight will cause the final score to drop sharply to below 0.9, generating an abnormal instruction. However, when several scattered particles are added to the test wafer surface, due to their low weight and small area, the score may still remain above 0.9, generating a qualified instruction to allow the semiconductor device to continue operating.

[0067] In this way, the calculation method of image similarity parameters matches the actual production needs. In detail, a small number of particle defects can be removed by subsequent cleaning processes without affecting the wafer yield. However, mechanical scratches mean that the components of the semiconductor equipment have been damaged or misaligned. If they are not repaired, every wafer produced afterward will be at risk of being scrapped due to such mechanical scratches.

[0068] In this disclosure, after determining that there is a contact point abnormality in a semiconductor device, in addition to generating an abnormality command, the semiconductor device inspection apparatus 130 can also use image data to reverse deduce the component that caused the contact point abnormality in order to quickly locate the source of the fault.

[0069] Based on this, in some examples, the inspection methods for semiconductor devices provided in this disclosure also include: After determining that there is an abnormality in the contact point of the semiconductor device, the spatial coordinates of the difference region in the current detection image that causes the similarity index to decrease are extracted; Map spatial coordinates to the physical sectors of the test wafer; Based on the location of the physical sector, identify the component in the semiconductor device that is causing the contact point abnormality.

[0070] Specifically, in the differential image, the semiconductor equipment inspection device 130 determines the region where the mechanical defect is located using the ACD algorithm and extracts the polar coordinate position of the region where the mechanical defect is located in the wafer coordinate system. ,in, This indicates the distance of the mechanical defect from the center of the wafer. This indicates the angular position of the mechanical defect relative to the wafer notch. The notch direction is usually defined as 0 degrees or 270 degrees.

[0071] Taking a robotic arm in semiconductor equipment as an example, when the robotic arm is transferring wafers, the position of its end effector relative to the wafer is fixed. For example, in an exemplary U-shaped interdigital robotic arm, its two contact pads are located on the wafer. and The sectors. Then, in a semiconductor device, the projected positions of all components that may come into contact with the wafer in the wafer coordinate system can be pre-stored to form a mapping database.

[0072] After obtaining the polar coordinates of a mechanical defect, the semiconductor equipment inspection apparatus 130 queries a mapping database for the location of the corresponding physical sector and the component that may be in contact with the wafer at that physical sector location. In this way, the component causing the contact abnormality can be identified.

[0073] For example, mechanical defects are scratch defects, and scratch defects are concentrated in... and The area is located near the edge and exhibits a radial distribution. The semiconductor equipment inspection device 130, by querying the mapping database, finds that this matches the position of the support blades of the U-shaped interdigitated robot. The inspection device 130 determines that the contact point anomaly is highly likely due to inaccurate leveling of the robot blades or excessively low Z-axis pickup height, causing the support blades to rub against the edge of the test wafer.

[0074] By identifying the component causing the contact point abnormality, the semiconductor equipment inspection device 130 can not only generate an abnormality command, but also provide equipment engineers with information about the component causing the contact point abnormality, thereby shortening the troubleshooting time and reducing the mean time to repair.

[0075] Figure 7A schematic diagram of the composition of the semiconductor device inspection apparatus 130 provided in this disclosure. The inspection apparatus 130 includes: The control unit 131 is configured to control the test wafer to perform at least one cycle transfer operation in a preset transfer path of the semiconductor equipment after maintenance of the semiconductor equipment is completed. The transfer path is used to simulate the processing path so that the test wafer and the contact point of the semiconductor equipment make physical contact. The first acquisition unit 132 is configured to acquire the current detection image of the target area of ​​the test wafer after the cyclic transmission operation is completed; The second acquisition unit 133 is configured to acquire image similarity parameters between the current detected image and the reference image; The determining unit 134 is configured to determine that there is an abnormal contact point in the semiconductor device and generate an abnormal instruction when the image similarity parameter does not meet the preset similarity threshold.

[0076] In some examples, the reference image includes an initial state image of the target region acquired before the test wafer performs a cyclic transfer operation; the second acquisition unit 133 is configured to: The current detected image is compared with the initial state image by difference to identify new defect features caused by the cyclic transmission operation; Image similarity parameters are calculated based on the distribution pattern of newly added defect features.

[0077] In some examples, the second acquisition unit 133 is configured to use an automatic defect classification (ADC) algorithm to identify new defect features in the current detection image relative to the initial state image, which are used to indicate non-contact particulate defects and contact mechanical defects.

[0078] In some examples, the second acquisition unit 133 is configured to calculate the image similarity parameter based on the distribution density and weight of the mechanical defect; wherein, when the newly added defect feature is a non-contact particulate defect, the image similarity parameter is higher than the similarity threshold.

[0079] In some examples, contact-related mechanical defects include scratches, chatter marks, or pinholes.

[0080] In some examples, both the current detection image and the reference image include the edge region of the test wafer, which includes the outer periphery chamfer of the test wafer and an edge rejection region of a preset width.

[0081] In some examples, unit 134 is also configured as follows: After determining that there is an abnormality in the contact point of the semiconductor device, the spatial coordinates of the difference region in the current detection image that causes the similarity index to decrease are extracted; Map spatial coordinates to the physical sectors of the test wafer; Based on the location of the physical sector, identify the component in the semiconductor device that is causing the contact point abnormality.

[0082] In some examples, unit 134 is also configured as follows: When the image similarity parameter meets the similarity threshold, a qualified instruction indicating that the semiconductor device meets the production requirements is generated.

[0083] In some examples, the cyclic transfer operation is a cold run process performed without turning on the process gas source and RF power supply of the internal chamber of the semiconductor device.

[0084] Please refer to Figure 8 This diagram illustrates a structural block diagram of a computing device provided in an exemplary embodiment of this disclosure. The computing device is capable of performing the functions described in the aforementioned semiconductor device testing apparatus 130. In some examples, the computing device 80 may be at least one of devices such as a smartphone, smartwatch, desktop computer, laptop, virtual reality terminal, augmented reality terminal, wireless terminal, and laptop computer. The computing device 80 has communication capabilities and can access wired or wireless networks. The computing device 80 may refer to one of multiple terminals; those skilled in the art will understand that the number of terminals may be more or less. In some examples, the computing device 80 can receive data based on the accessed wired or wireless network. It is understood that the computing device 80 undertakes the computation and processing work of the technical solution of this disclosure, and this disclosure does not limit its scope.

[0085] like Figure 8 As shown, the computing device in this disclosure may include one or more of the following components: processor 810 and memory 820.

[0086] Optionally, the processor 810 connects various parts within the computing device using various interfaces and lines, and performs various functions and processes data by running or executing instructions, programs, code sets, or instruction sets stored in the memory 820, and by calling data stored in the memory 820. Optionally, the processor 810 can be implemented using at least one hardware form of Digital Signal Processing (DSP), Field-Programmable Gate Array (FPGA), or Programmable Logic Array (PLA). The processor 810 can integrate one or a combination of several of the following: Central Processing Unit (CPU), Graphics Processing Unit (GPU), Neural-network Processing Unit (NPU), and baseband chip. Specifically, the CPU primarily handles the operating system, user interface, and applications; the GPU is responsible for rendering and drawing the content required for display on the touch screen; the NPU is used to implement Artificial Intelligence (AI) functions; and the baseband chip is used for wireless communication. It is understandable that the aforementioned baseband chip may not be integrated into the processor 810, but may be implemented using a separate chip.

[0087] The memory 820 may include random access memory (RAM) or read-only memory (ROM). Optionally, the memory 820 may include a non-transitory computer-readable storage medium. The memory 820 may be used to store instructions, programs, code, code sets, or instruction sets. The memory 820 may include a program storage area and a data storage area, wherein the program storage area may store instructions for implementing an operating system, instructions for at least one function (such as touch function, sound playback function, image playback function, etc.), instructions for implementing the various method embodiments described above, etc.; the data storage area may store data created according to the use of the computing device, etc.

[0088] In addition, those skilled in the art will understand that the structure of the computing device shown in the above figures does not constitute a limitation on the computing device. The computing device may include more or fewer components than shown, or combine certain components, or have different component arrangements. For example, the computing device may also include a display screen, camera assembly, microphone, speaker, radio frequency circuit, input unit, sensors (such as accelerometer, angular velocity sensor, light sensor, etc.), audio circuit, WiFi module, power supply, Bluetooth module, etc., which will not be described in detail here.

[0089] This disclosure also provides a computer-readable storage medium storing at least one instruction that is executed by a processor to implement the semiconductor device inspection method as described in the above embodiments.

[0090] This disclosure also provides a computer program product including computer instructions stored in a computer-readable storage medium; a processor of a computing device reads the computer instructions from the computer-readable storage medium and executes the computer instructions, causing the computing device to perform the semiconductor device testing method described in the above embodiments.

[0091] Those skilled in the art will recognize that the functions described in this disclosure in one or more of the examples above can be implemented using hardware, software, firmware, or any combination thereof. When implemented in software, these functions can be stored in a computer-readable medium or transmitted as one or more instructions or code on a computer-readable medium. Computer-readable media include computer storage media and communication media, wherein communication media include any medium that facilitates the transfer of a computer program from one place to another. Storage media can be any available medium accessible to a general-purpose or special-purpose computer.

[0092] It should be noted that the technical solutions described in this disclosure can be combined arbitrarily as long as they do not conflict.

[0093] The above description is merely a specific embodiment of this disclosure, but the scope of protection of this disclosure is not limited thereto. Any changes or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this disclosure should be included within the scope of protection of this disclosure.

Claims

1. A method for inspecting semiconductor devices, characterized in that, The testing methods include: After maintenance of the semiconductor equipment is completed, the test wafer is controlled to perform at least one cycle of transfer operation in the preset transfer path of the semiconductor equipment. The preset transfer path is used to simulate the processing path so that the test wafer and the contact point of the semiconductor equipment make physical contact. After the cyclic transmission operation is completed, the current detection image of the target area of ​​the test wafer is obtained; Obtain image similarity parameters between the current detected image and a reference image; the reference image includes an initial state image of the target region obtained before the test wafer performs the cyclic transfer operation; When the image similarity parameter does not meet the preset similarity threshold, it is determined that there is an abnormal contact point in the semiconductor device, and an abnormal command is generated.

2. The testing method according to claim 1, characterized in that, The step of obtaining the image similarity parameter between the current detected image and the reference image includes: The current detection image is compared with the initial state image by differential comparison to identify new defect features caused by the cyclic transmission operation; the new defect features are used to indicate non-contact particle defects and contact mechanical defects; The image similarity parameter is calculated based on the distribution pattern of the newly added defect features.

3. The method according to claim 2, characterized in that, The step of performing a differential comparison between the current detected image and the initial state image to identify new defect features caused by the cyclic transmission operation includes: The Automatic Defect Classification (ADC) algorithm is used to identify new defect features in the current detected image relative to the initial state image.

4. The method according to claim 2, characterized in that, The calculation of the image similarity parameter based on the distribution pattern of the newly added defect features includes: The image similarity parameter is calculated based on the distribution density and weight of the mechanical defects; wherein, when the newly added defect feature is a non-contact particulate defect, the image similarity parameter is higher than the similarity threshold.

5. The method according to claim 2, characterized in that, The contact-type mechanical defects include scratches, chatter marks, or pinholes.

6. The method according to claim 1, characterized in that, Both the current detection image and the reference image include the edge region of the test wafer, which includes the outer periphery chamfer of the test wafer and an edge rejection area of ​​a preset width.

7. The testing method according to claim 1, characterized in that, The method further includes: After determining that there is an abnormal contact point in the semiconductor device, the spatial coordinates of the difference region in the current detection image that causes the similarity index to decrease are extracted; Map the spatial coordinates to the physical sectors of the test wafer; Based on the location of the physical sector, identify the component in the semiconductor device that causes the contact point abnormality.

8. The testing method according to claim 1, characterized in that, The method further includes: When the image similarity parameter meets the similarity threshold, a qualified instruction indicating that the semiconductor device meets the production requirements is generated.

9. The testing method according to claim 1, characterized in that, The cyclic transfer operation is a cold operation process performed without turning on the process gas source and radio frequency power supply of the internal chamber of the semiconductor device.

10. A testing apparatus for semiconductor equipment, characterized in that, The testing device includes: The control unit is configured to, after maintenance of the semiconductor equipment is completed, control the test wafer to perform at least one cyclic transfer operation in a preset transfer path of the semiconductor equipment, the transfer path being used to simulate a processing path to enable physical contact between the test wafer and the contact points of the semiconductor equipment; The first acquisition unit is configured to acquire the current detection image of the target area of ​​the test wafer after the cyclic transmission operation is completed; The second acquisition unit is configured to acquire image similarity parameters between the currently detected image and the reference image; The determining unit is configured to determine that there is a contact point abnormality in the semiconductor device and generate an abnormality command when the image similarity parameter does not meet a preset similarity threshold.

11. A computing device, characterized in that, It includes a processor and a memory; the processor is used to execute instructions stored in the memory to implement the inspection method for the semiconductor device as described in any one of claims 1 to 9.

12. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by the processor, it implements the inspection method for the semiconductor device as described in any one of claims 1 to 9.

13. A testing system for semiconductor equipment, characterized in that, The system includes: Semiconductor equipment An image acquisition device is used to acquire image data of a test wafer before and after performing a cyclic transmission operation in a preset transmission path of the semiconductor device; And a semiconductor device inspection apparatus, communicatively connected to the semiconductor device and the image acquisition device, configured to perform the steps of the semiconductor device inspection method as described in any one of claims 1 to 9.

Images