Chip abnormal data flow detection and early warning system and method based on integrated circuit

Abstract

The invention discloses a chip abnormal data flow detection early warning system and method based on an integrated circuit, and relates to the technical field of chip detection.According to the chip abnormal data flow detection early warning system and method, based on data of historical chip detection events, a multiple linear regression model is trained and detected, and abnormal chip detection events are analyzed and detected; extracting chip detection flow and detection link data for detecting abnormal events; analyzing key detection links influencing abnormal detection based on detection link data; judging an association relationship between the function detection data in the detection abnormal event of the same kind of chips and the application performance detection data after the first application; based on the incidence relation, sampling frequency adjustment of testing is carried out on various types of chips; and acquiring a normal detection event, verifying the abnormal detection stability of the corresponding chip type in the adjusted chip detection event, adjusting sampling data of the normal detection event, and feeding back the sampling data to the detection process management system. The overall analysis efficiency is improved; and the optimization of the detection cost is realized.

Description

Technical Field

[0001] This invention relates to the field of chip testing technology, specifically to a chip abnormal data stream detection and early warning system and method based on integrated circuits. Background Technology

[0002] In the field of integrated circuit manufacturing, after chips are packaged, they must undergo rigorous production testing and performance verification to ensure that their functionality and reliability meet design standards. However, with the increasing complexity of chips and the diversification of application scenarios, traditional methods are gradually revealing their inherent limitations.

[0003] Existing testing strategies lack intelligent resource allocation capabilities, leading to inefficiency. Traditional sampling schemes and testing process parameters are often statically set based on historical experience, unable to be dynamically adjusted according to real-time data streams and the actual risks of different product lines. This results in testing resources not being accurately allocated to the weakest links and the highest-risk product types, causing resource misallocation. On the one hand, chips with stable performance and strong predictability may be over-tested, increasing unnecessary costs; on the other hand, there may be blind spots in the testing of truly high-risk chips that require attention.

[0004] Therefore, this invention discloses a chip abnormal data stream detection and early warning system and method based on integrated circuits to solve the above problems. Summary of the Invention

[0005] The purpose of this invention is to provide a chip abnormal data stream detection and early warning system and method based on integrated circuits, so as to solve the problems raised in the prior art.

[0006] To achieve the above objectives, the present invention provides the following technical solution: a method for detecting and warning of abnormal data streams in integrated circuit chips, the method comprising the following steps: S1: Acquire chip testing events of integrated circuits, extract sampled data of functional testing data after the integrated circuit is manufactured and corresponding application performance testing data after the first application; based on the data of historical chip testing events, train a multivariate linear regression model for testing, and analyze chip testing events that detect anomalies. S2: Extract chip testing process and testing stage data for detecting abnormal events; analyze key testing stages that affect detection anomalies based on testing stage data; S3: Determine the correlation between functional test data and application performance test data after initial application in abnormal events of similar chips; and adjust the sampling frequency of testing for each type of chip based on the correlation. S4: Obtain normal detection events, verify the abnormal detection stability of the corresponding chip type in the adjusted chip detection events, adjust the sampling data of normal detection events, and feed back to the detection process management system.

[0007] Based on the above, S1 includes the following: S101: Extract chip testing events from the integrated circuit chip testing event database. Each chip testing event includes sampled functional testing data after production completion and corresponding application performance testing data after initial application. The functional testing data includes electrical parameters and functional test results. The electrical parameters include voltage, current, and frequency. The functional test results include pass / fail indicators. The application performance testing data includes field application performance and reliability indicators. The field application performance includes power consumption, temperature, and response time. The reliability indicators include lifespan. Perform data cleaning and normalization on the functional testing data and application performance testing data respectively. S102: Based on historical chip detection event data, train a detection multiple linear regression model: DF k =W×DS k +b; where DF k This represents a data vector consisting of the functional detection data of the k-th chip detection event; DS k The data vector represents the application performance test data of the k-th chip detection event; W represents the weight matrix; b represents the bias vector; the weight matrix and bias vector are solved by the least squares method; for each chip detection event, the error between the predicted value of the multiple linear regression model and the data vector composed of the actual measured application performance test data is analyzed by Euclidean distance; if the error is greater than the error threshold, the corresponding chip detection event is marked as a detection anomaly, and a list of detection anomaly events is generated.

[0008] This invention uses data normalization and prediction models to "map" multi-dimensional functional test data to multi-dimensional application performance data, and uses Euclidean distance to calculate prediction error, thus avoiding the subjectivity and one-sidedness of relying on single data threshold comparisons or human experience for judgment.

[0009] Based on the above, S2 includes the following: S201: Extract the chip detection process and detection stage data for each detection anomaly from the list of detection anomalies, and construct a detection stage data matrix; the chip detection process includes, but is not limited to, testing, calibration, and verification stages; each stage involves several detection parameters, including voltage, current, or delay time; perform principal component analysis on the detection stage data matrix, calculate the covariance matrix of the detection stage data matrix, and perform eigenvalue decomposition on the covariance matrix to obtain an eigenvalue set and a corresponding eigenvector set; wherein the eigenvalues ​​are arranged in descending order, and the eigenvectors represent the direction of the principal components; sum the first r eigenvalues ​​in the eigenvalue set and divide by the total eigenvalues ​​to obtain the cumulative contribution rate; select the smallest r such that the cumulative contribution rate exceeds a preset threshold; retain the first r eigenvalues ​​and the corresponding eigenvectors to generate an optimal eigenvalue set and a corresponding optimal eigenvector set; S202: Analyze the contribution of each detection step based on the preferred feature value set and the corresponding preferred feature vector set; the contribution of the detection step is equal to the sum of the products of the absolute values ​​of the components of each preferred feature vector in the corresponding detection step and the corresponding feature values; the median of all contributions is used as the contribution threshold, and the detection steps with contributions greater than the contribution threshold are marked as key detection steps, and a list of key detection steps is generated.

[0010] This invention uses principal component analysis to automatically extract the main directions leading to anomalies from the data of the detection process and calculates the contribution of each step; this improves the overall analysis efficiency; by accumulating the contribution rate, it retains most of the data information while reducing the data dimensionality, making the analysis process more efficient and focused; the generated list of key detection steps provides clear data support and action guidelines for subsequent optimization of the detection process and strengthening the monitoring of key steps.

[0011] Based on the above, S3 includes the following: S301: According to the chip testing process, the chips are classified, and chips of the same testing process belong to the same category; for each category of chips, the functional test data and application performance test data after the first application of the chips using the testing process are extracted from the list of abnormal test events; a functional test data matrix and an application performance test data matrix are constructed; in the functional test data matrix, rows represent abnormal test events, and columns represent the corresponding electrical parameters and functional test results; in the application performance test data matrix, rows represent abnormal test events, and columns represent the corresponding field application performance and reliability indicators; S302: Based on the functional test data matrix and application performance test data matrix of each type of chip, construct a process multiple linear regression model. The training method of the process multiple linear regression model is the same as that of the test multiple linear regression model. Analyze the correlation based on the process multiple linear regression model. ; Among them, Ri F represents the correlation of the i-th type of detection process. （i，j） FA represents a data vector consisting of the data of the j-th detected anomalous event in the functional detection data matrix of the i-th type of detection process. （i，j） This represents the data vector predicted by the process multiple linear regression model for the j-th detected anomalous event in the functional detection data matrix of the i-th detection process; FB （i，j） Let J represent the mean vector of the functional detection data matrix in the i-th type of detection process; J represents the number of abnormal events detected in the i-th type of detection process. Indicates Euclidean distance; If the correlation is greater than the correlation threshold, it is determined to be a strong correlation. For chip types with strong correlation, the sampling frequency of the test after the first application is reduced; for chip types without strong correlation, the sampling frequency of the test after the first application is increased.

[0012] This invention assesses whether factory testing can effectively predict field performance by establishing a model for each type of chip process and calculating the coefficient of determination as the correlation. The classification method based on predictive ability is more scientific and forward-looking than classification based solely on historical failure rates. By adjusting the sampling frequency bidirectionally based on the correlation, field application testing resources are used for the most unpredictable and highest-risk chip types, while unnecessary repeated testing is reduced for strongly correlated chips. This optimizes testing costs while controlling risks.

[0013] Based on the above, S4 includes the following: S401: Remove events from the list of abnormal detection events from the historical chip detection events, mark the remaining events as normal detection events, and form a set of normal detection events; analyze the data adjustment factor based on the statistical characteristics of the list of abnormal detection events and the set of normal detection events; the data adjustment factor is equal to the number of normal detection events divided by the sum of the number of abnormal detection events and the number of normal detection events; S402: Continuous data points in the normal detection event set are scaled according to a data adjustment factor. When the adjusted value exceeds the preset maximum operating range of the data, boundary truncation is performed. For discrete detection data, the data adjustment factor is used as the retention probability of discrete data points, and a Bernoulli trial is performed on each discrete data point. When the value generated by the random number generator is less than the data adjustment factor, the discrete data point is retained; otherwise, it is removed. The removed discrete data points are filled by a weighted summation of the original data points of the same type. An adjusted sampling data set is generated. The continuous data includes, but is not limited to, voltage and current values; the discrete detection data includes, but is not limited to, pass or fail indicators. S403: Based on historical normal detection data, set a normal operating range for each detection parameter; for continuous data, the normal operating range is the mean of the parameter's historical data ± several standard deviations; for discrete detection data, the normal operating range is the pass state; for each chip type, calculate an anomaly detection stability index; the anomaly detection stability index is equal to the ratio of the number of data points of the chip type within the normal operating range in the sampled data set to the number of samples of the chip type in the sampled data set; Based on the anomaly detection stability index, the chip types in the normal detection event set are divided into different stability levels; the sampling frequency is adjusted according to the stability level.

[0014] This invention introduces a data adjustment factor and scales and resamples normal data. This method simulates the "real" situation of data distribution after anomalies are removed. The anomaly detection stability index calculated on this basis can better reflect the inherent robustness of the process and avoid evaluation bias caused by anomalies in historical data.

[0015] Another aspect of this application provides an integrated circuit-based chip abnormal data stream detection and early warning system, which is applied to the above-mentioned integrated circuit-based chip abnormal data stream detection and early warning method. The system includes an anomaly detection analysis module, a key detection analysis module, a correlation analysis module, and a normal adjustment module. The detection anomaly analysis module is used to acquire chip detection events of integrated circuits, extract sampled data of functional testing data after the integrated circuit is manufactured and corresponding application performance testing data after the first application; based on the data of historical chip detection events, a detection multiple linear regression model is trained to analyze chip detection events with detection anomalies. The key detection and analysis module is used to extract chip detection process and detection stage data for detecting abnormal events; and to analyze the key detection stages that affect detection abnormalities based on the detection stage data. The correlation analysis module is used to determine the correlation between functional test data and application performance test data after the first application in abnormal events of similar chips; and to adjust the sampling frequency of testing for each type of chip based on the correlation. The normal adjustment module is used to acquire normal detection events, verify the abnormal detection stability of the corresponding chip type in the adjusted chip detection events, adjust the sampling data of normal detection events, and feed them back to the detection process management system.

[0016] Based on the above, the detection anomaly analysis module includes a detection data acquisition unit and a difference analysis unit; The detection data acquisition unit is used to extract chip detection events from the chip detection event database of integrated circuits, and to perform data cleaning and normalization processing on functional test data and application performance test data respectively. The difference analysis unit is used to train a detection multiple linear regression model based on historical chip detection event data; for each chip detection event, Euclidean distance is used to analyze the error between the predicted value of the multiple linear regression model and the data vector composed of the actual measured application performance detection data; if the error is greater than the error threshold, the corresponding chip detection event is marked as a detection anomaly, and a list of detection anomaly events is generated.

[0017] Based on the above, the key detection and analysis module includes a feature screening unit and a contribution analysis unit; The feature filtering unit is used to extract chip detection process and detection stage data for each detection anomaly from the list of detection anomalies, and construct a detection stage data matrix; perform principal component analysis on the detection stage data matrix, calculate the covariance matrix of the detection stage data matrix, and perform eigenvalue decomposition on the covariance matrix to obtain an eigenvalue set and a corresponding eigenvector set; wherein the eigenvalues ​​are arranged in descending order, and the eigenvectors represent the direction of the principal components; the sum of the first r eigenvalues ​​in the eigenvalue set is divided by the total eigenvalues ​​to be recorded as the cumulative contribution rate; the smallest r is selected such that the cumulative contribution rate exceeds a preset threshold; the first r eigenvalues ​​and the corresponding eigenvectors are retained to generate an optimal eigenvalue set and a corresponding optimal eigenvector set; The contribution analysis unit is used to analyze the contribution of each detection step based on the preferred feature value set and the corresponding preferred feature vector set; the median of all contributions is used as the contribution threshold, and the detection steps with contributions greater than the contribution threshold are marked as key detection steps, and a list of key detection steps is generated.

[0018] Based on the above, the association analysis module includes a data matrix construction unit and an association judgment unit; The data matrix construction unit is used to classify chips according to the chip testing process, with chips of the same testing process belonging to the same category; for each category of chips, it extracts the functional testing data and application performance testing data after the first application of the chip using the testing process from the list of abnormal testing events; and constructs the functional testing data matrix and the application performance testing data matrix. The correlation judgment unit is used to construct a process multiple linear regression model based on the functional test data matrix and application performance test data matrix of each type of chip, and analyze the correlation degree based on the process multiple linear regression model; if the correlation degree is greater than the correlation degree threshold, it is determined to be a strong correlation; for chip types with strong correlation, the sampling frequency of the test after the first application is reduced; for chip types without strong correlation, the sampling frequency of the test after the first application is increased.

[0019] Based on the above, the normal adjustment module includes a data adjustment factor analysis unit, a data adjustment unit, and a detection adjustment unit; The data adjustment factor analysis unit is used to remove events from the list of abnormal detection events from historical chip detection events, mark the remaining events as normal detection events, and form a set of normal detection events; based on the statistical characteristics of the list of abnormal detection events and the set of normal detection events, the data adjustment factor is analyzed; The data adjustment unit is used to scale continuous data points in the normal detection event set according to a data adjustment factor. When the adjusted value exceeds the preset maximum operating range of the data, boundary truncation is used. For discrete detection data, the data adjustment factor is used as the retention probability of discrete data points, and a Bernoulli trial is performed on each discrete data point. When the value generated by the random number generator is less than the data adjustment factor, the discrete data point is retained; otherwise, it is removed. The removed discrete data points are filled by a weighted summation of the original data points of the same type. An adjusted sampling data set is generated. The detection adjustment unit is used to set a normal operating range for each detection parameter based on historical normal detection data; calculate an anomaly detection stability index for each chip type; classify chip types in the normal detection event set into different stability levels based on the anomaly detection stability index; and adjust the sampling frequency according to the stability level.

[0020] Compared with existing technologies, the beneficial effects of this invention are as follows: This invention maps multi-dimensional functional detection data to multi-dimensional application performance data through data normalization and prediction models, and uses Euclidean distance to calculate prediction errors, avoiding the subjectivity and bias of relying on single data threshold comparisons or human experience for judgment; this invention automatically extracts the main directions leading to anomalies from the detection process data through principal component analysis, and calculates the contribution of each process; improving overall analysis efficiency; while retaining most of the data information through cumulative contribution rate, it reduces data dimensionality, making the analysis process more efficient and focused; the generated... The list of key testing steps provides clear data support and action guidelines for subsequent optimization of the testing process and strengthening the monitoring of critical links. This invention assesses whether factory testing can effectively predict field performance by establishing a model for each type of chip process and calculating the coefficient of determination as the correlation. The classification method based on predictive ability is more scientific and forward-looking than classification based solely on historical failure rates. By adjusting the sampling frequency bidirectionally based on the correlation, field application testing resources are used for the most unpredictable and highest-risk chip types, while unnecessary repeated testing is reduced for strongly correlated chips, thereby optimizing testing costs while controlling risks. This invention introduces a data adjustment factor and scales and resamples normal data, simulating the "real" data distribution after anomalies are removed. The anomaly detection stability index calculated based on this better reflects the inherent robustness of the process and avoids evaluation bias caused by anomalies in historical data. Attached Figure Description

[0021] The accompanying drawings are provided to further illustrate the invention and form part of the specification. They are used in conjunction with embodiments of the invention to explain the invention and do not constitute a limitation thereof. In the drawings: Figure 1 This is a flowchart illustrating the chip abnormal data stream detection and early warning method based on integrated circuits according to the present invention. Figure 2 This is a schematic diagram of the chip abnormal data stream detection and early warning system based on integrated circuits according to the present invention. Detailed Implementation

[0022] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0023] Please see Figure 1The present invention provides a technical solution: a method for detecting and warning of abnormal data streams in integrated circuit chips, the method comprising the following steps: S1: Acquire chip testing events of integrated circuits, extract sampled data of functional testing data after the integrated circuit is manufactured and corresponding application performance testing data after the first application; based on the data of historical chip testing events, train a multivariate linear regression model for testing, and analyze chip testing events that detect anomalies. S1 includes the following: S101: Extract chip testing events from the integrated circuit chip testing event database. Each chip testing event includes sampled functional testing data after production completion and corresponding application performance testing data after initial application. The functional testing data includes electrical parameters and functional test results. Electrical parameters include voltage, current, and frequency. Functional test results include pass / fail indicators. The application performance testing data includes field application performance and reliability indicators. Field application performance includes power consumption, temperature, and response time. Reliability indicators include lifespan. Perform data cleaning and normalization on the functional testing data and application performance testing data respectively. S102: Based on historical chip detection event data, train a detection multiple linear regression model: DF k =W×DS k +b; where DF k This represents a data vector consisting of the functional detection data of the k-th chip detection event; DS k The data vector representing the application performance test data of the k-th chip detection event; W represents the weight matrix; b represents the bias vector; the weight matrix and bias vector are solved by the least squares method; for each chip detection event, the error between the predicted value of the multiple linear regression model and the data vector composed of the actual measured application performance test data is analyzed by Euclidean distance; if the error is greater than the error threshold, the corresponding chip detection event is marked as a detection anomaly, and a list of detection anomaly events is generated.

[0024] S2: Extract chip testing process and testing stage data for detecting abnormal events; analyze key testing stages that affect detection anomalies based on testing stage data; S2 includes the following: S201: Extract the chip detection process and detection stage data for each detection anomaly from the list of detection anomalies, and construct a detection stage data matrix; the chip detection process includes, but is not limited to, testing, calibration, and verification stages; each stage involves several detection parameters, including voltage, current, or delay time; perform principal component analysis on the detection stage data matrix, calculate the covariance matrix of the detection stage data matrix, and perform eigenvalue decomposition on the covariance matrix to obtain an eigenvalue set and a corresponding eigenvector set; the eigenvalues ​​are arranged in descending order, and the eigenvectors represent the direction of the principal components; sum the first r eigenvalues ​​in the eigenvalue set and divide by the total eigenvalues ​​to obtain the cumulative contribution rate; select the smallest r such that the cumulative contribution rate exceeds a preset threshold; retain the first r eigenvalues ​​and the corresponding eigenvectors to generate an optimal eigenvalue set and a corresponding optimal eigenvector set; S202: Analyze the contribution of each detection step based on the preferred feature value set and the corresponding preferred feature vector set; the contribution of the detection step is equal to the sum of the products of the absolute values ​​of the components of each preferred feature vector in the corresponding detection step and the corresponding feature values; the median of all contributions is used as the contribution threshold, and the detection steps with contributions greater than the contribution threshold are marked as key detection steps, and a list of key detection steps is generated.

[0025] S3: Determine the correlation between functional test data and application performance test data after initial application in abnormal events of similar chips; and adjust the sampling frequency of testing for each type of chip based on the correlation. S3 includes the following: S301: Based on the chip testing process, classify the chips, with chips from the same testing process belonging to the same category; for each category of chips, extract the functional test data and application performance test data after the first application of the chips using the testing process from the list of abnormal testing events; construct a functional test data matrix and an application performance test data matrix; in the functional test data matrix, rows represent abnormal testing events, and columns represent the corresponding electrical parameters and functional test results; in the application performance test data matrix, rows represent abnormal testing events, and columns represent the corresponding field application performance and reliability indicators; S302: Based on the functional test data matrix and application performance test data matrix of each type of chip, construct a process multiple linear regression model. The training method of the process multiple linear regression model is the same as that of the test multiple linear regression model. Analyze the correlation based on the process multiple linear regression model. ; Among them, R i F represents the correlation of the i-th type of detection process. （i，j） FA represents a data vector consisting of the data of the j-th detected anomalous event in the functional detection data matrix of the i-th type of detection process. （i，j）This represents the data vector predicted by the process multiple linear regression model for the j-th detected anomalous event in the functional detection data matrix of the i-th detection process; FB （i，j） Let J represent the mean vector of the functional detection data matrix in the i-th type of detection process; J represents the number of abnormal events detected in the i-th type of detection process. Indicates Euclidean distance; If the correlation is greater than the correlation threshold, it is determined to be a strong correlation. For chip types with strong correlation, the sampling frequency of the test after the first application is reduced; for chip types without strong correlation, the sampling frequency of the test after the first application is increased.

[0026] S4: Obtain normal detection events, verify the abnormal detection stability of the corresponding chip type in the adjusted chip detection events, adjust the sampling data of normal detection events, and feed back to the detection process management system.

[0027] S4 includes the following: S401: Remove events from the list of abnormal detection events from the historical chip detection events, mark the remaining events as normal detection events, and form a set of normal detection events; analyze the data adjustment factor based on the statistical characteristics of the list of abnormal detection events and the set of normal detection events; the data adjustment factor is equal to the number of normal detection events divided by the sum of the number of abnormal detection events and the number of normal detection events; S402: Scale continuous data points in the normal detection event set according to a data adjustment factor. When the adjusted value exceeds the preset maximum operating range of the data, boundary truncation is applied. For discrete detection data, use the data adjustment factor as the retention probability of discrete data points and perform a Bernoulli trial for each discrete data point. If the value generated by the random number generator is less than the data adjustment factor, the discrete data point is retained; otherwise, it is removed. For the removed discrete data points, a weighted summation of the original data points of the same type is used to fill in the gaps. An adjusted sampling data set is generated. Continuous data includes, but is not limited to, voltage and current values; discrete detection data includes, but is not limited to, pass or fail indicators. S403: Based on historical normal testing data, set a normal operating range for each testing parameter; for continuous data, the normal operating range is the mean of the parameter's historical data ± several standard deviations; for discrete testing data, the normal operating range is the pass state; for each chip type, calculate the anomaly detection stability index; the anomaly detection stability index is equal to the ratio of the number of data points of the chip type within the normal operating range in the sampled dataset to the number of samples of the chip type in the sampled dataset; Based on the anomaly detection stability index, the chip types in the normal detection event set are divided into different stability levels; the sampling frequency is adjusted according to the stability level. Example 1: In this example, the stability levels include high stability, medium stability, and low stability chip types; for high stability chip types, the sampling frequency is reduced; for medium stability chip types, the sampling frequency is maintained; for low stability chip types, the sampling frequency is increased or the detection threshold parameter is adjusted.

[0028] Please see Figure 2 The present invention provides a technical solution: a chip abnormal data stream detection and early warning system based on integrated circuits, which includes an abnormal detection analysis module, a key detection analysis module, a correlation analysis module and a normal adjustment module; The anomaly detection analysis module is used to acquire chip detection events of integrated circuits, extract sampled data of functional testing data after the integrated circuit is manufactured and corresponding application performance testing data after the first application; based on historical chip detection event data, a detection multiple linear regression model is trained to analyze chip detection events with anomalies. The key detection and analysis module is used to extract chip detection process and detection stage data for detecting abnormal events; based on the detection stage data, it analyzes the key detection stages that affect the detection abnormalities. The correlation analysis module is used to determine the correlation between functional test data and application performance test data after the first application in abnormal events of similar chips; and to adjust the sampling frequency of testing for each type of chip based on the correlation. The normal adjustment module is used to acquire normal detection events, verify the abnormal detection stability of the corresponding chip type in the adjusted chip detection events, adjust the sampling data of normal detection events, and feed back to the detection process management system.

[0029] The anomaly analysis module includes a data acquisition unit and a difference analysis unit. The test data acquisition unit is used to extract chip test events from the chip test event database of integrated circuits, and to perform data cleaning and normalization on functional test data and application performance test data respectively. The difference analysis unit is used to train a detection multiple linear regression model based on historical chip detection event data; for each chip detection event, Euclidean distance is used to analyze the error between the predicted value of the multiple linear regression model and the data vector composed of the actual measured application performance detection data; if the error is greater than the error threshold, the corresponding chip detection event is marked as a detection anomaly, and a list of detection anomaly events is generated.

[0030] The key detection and analysis module includes a feature screening unit and a contribution analysis unit; The feature selection unit is used to extract chip detection process and detection stage data for each detection anomaly from the list of detection anomalies, and construct a detection stage data matrix; perform principal component analysis on the detection stage data matrix, calculate the covariance matrix of the detection stage data matrix, and perform eigenvalue decomposition on the covariance matrix to obtain an eigenvalue set and a corresponding eigenvector set; where the eigenvalues ​​are arranged in descending order, and the eigenvectors represent the direction of the principal components; sum the first r eigenvalues ​​in the eigenvalue set and divide by the total eigenvalues ​​to obtain the cumulative contribution rate; select the smallest r such that the cumulative contribution rate exceeds a preset threshold; retain the first r eigenvalues ​​and the corresponding eigenvectors to generate an optimal eigenvalue set and a corresponding optimal eigenvector set; The contribution analysis unit is used to analyze the contribution of each detection step based on the preferred feature value set and the corresponding preferred feature vector set; the median of all contributions is used as the contribution threshold, and detection steps with contributions greater than the contribution threshold are marked as key detection steps, and a list of key detection steps is generated.

[0031] The correlation analysis module includes a data matrix construction unit and a correlation judgment unit; The data matrix construction unit is used to classify chips according to the chip testing process, with chips of the same testing process belonging to the same category; for each category of chips, it extracts the functional test data and application performance test data after the first application of the chip using the testing process from the list of abnormal test events; and constructs the functional test data matrix and the application performance test data matrix. The correlation judgment unit is used to construct a process multiple linear regression model based on the functional test data matrix and application performance test data matrix of each type of chip, and analyze the correlation degree based on the process multiple linear regression model. If the correlation degree is greater than the correlation degree threshold, it is judged as a strong correlation. For chip types with strong correlation, the sampling frequency of the test after the first application is reduced; for chip types without strong correlation, the sampling frequency of the test after the first application is increased.

[0032] The routine adjustment module includes a data adjustment factor analysis unit, a data adjustment unit, and a detection adjustment unit; The data adjustment factor analysis unit is used to remove events from the list of abnormal detection events from historical chip detection events, mark the remaining events as normal detection events, and form a set of normal detection events; based on the statistical characteristics of the list of abnormal detection events and the set of normal detection events, the data adjustment factor is analyzed; The data adjustment unit scales continuous data points in the normal detection event set according to a data adjustment factor. When the adjusted value exceeds the preset maximum operating range of the data, boundary truncation is applied. For discrete detection data, the data adjustment factor is used as the retention probability of discrete data points, and a Bernoulli trial is performed on each discrete data point. When the value generated by the random number generator is less than the data adjustment factor, the discrete data point is retained; otherwise, it is removed. The removed discrete data points are filled by a weighted summation of the original data points of the same type. An adjusted sampling data set is then generated. The detection adjustment unit is used to set the normal operating range for each detection parameter based on historical normal detection data; calculate the anomaly detection stability index for each chip type; classify the chip types in the normal detection event set into different stability levels based on the anomaly detection stability index; and adjust the sampling frequency according to the stability level.

[0033] It should be noted that, in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such process, method, article, or apparatus.

[0034] It will be apparent to those skilled in the art that the present invention is not limited to the details of the exemplary embodiments described above, and that the invention can be implemented in other specific forms without departing from its spirit or essential characteristics. Therefore, the embodiments should be considered in all respects as exemplary and non-limiting, and the scope of the invention is defined by the appended claims rather than the foregoing description. Thus, all variations falling within the meaning and scope of equivalents of the claims are intended to be included within the present invention. No reference numerals in the claims should be construed as limiting the scope of the claims.

Claims

1. A method for detecting and warning of abnormal data streams in integrated circuit chips, characterized in that, The method includes the following steps: S1: Acquire chip testing events of integrated circuits, extract sampled data of functional testing data after the integrated circuit is manufactured and corresponding application performance testing data after the first application; based on the data of historical chip testing events, train a multivariate linear regression model for testing, and analyze chip testing events that detect anomalies. S2: Extract chip detection process and detection stage data for detecting abnormal events; Based on data analysis of the detection process, key detection stages that affect detection anomalies; S3: Determine the correlation between functional test data and application performance test data after initial application in abnormal events of similar chips; and adjust the sampling frequency of testing for each type of chip based on the correlation. S4: Obtain normal detection events, verify the abnormal detection stability of the corresponding chip type in the adjusted chip detection events, adjust the sampling data of normal detection events, and feed back to the detection process management system.

2. The method for detecting and warning of abnormal data streams in integrated circuit chips according to claim 1, characterized in that: S1 includes the following: S101: Extract chip testing events from the integrated circuit chip testing event database. Each chip testing event includes sampled functional testing data after production completion and corresponding application performance testing data after initial application. The functional testing data includes electrical parameters and functional test results. The electrical parameters include voltage, current, and frequency. The functional test results include pass / fail indicators. The application performance testing data includes field application performance and reliability indicators. The field application performance includes power consumption, temperature, and response time. The reliability indicators include lifespan. Perform data cleaning and normalization on the functional testing data and application performance testing data respectively. S102: Based on historical chip detection event data, train a detection multiple linear regression model: DF k =W×DS k +b; where DF k This represents a data vector consisting of the functional detection data of the k-th chip detection event; DS k The data vector represents the application performance detection data of the k-th chip detection event; W represents the weight matrix; b represents the bias vector; the weight matrix and bias vector are solved by the least squares method. For each chip detection event, the error between the predicted value of the multiple linear regression model and the data vector composed of the actual measured application performance test data is analyzed using Euclidean distance. If the error is greater than the error threshold, the corresponding chip detection event is marked as a detection anomaly, and a list of detection anomaly events is generated.

3. The method for detecting and warning of abnormal data streams in integrated circuit chips according to claim 2, characterized in that: S2 includes the following: S201: Extract the chip detection process and detection stage data for each detection anomaly from the list of detection anomalies, and construct a detection stage data matrix; the chip detection process includes, but is not limited to, testing, calibration and verification stages; each stage involves several detection parameters, including voltage, current or delay time; Principal component analysis is performed on the data matrix of the detection process to calculate the covariance matrix of the data matrix of the detection process, and eigenvalue decomposition is performed on the covariance matrix to obtain the eigenvalue set and the corresponding eigenvector set; The eigenvalues ​​are arranged in descending order, and the eigenvectors represent the directions of the principal components. The cumulative contribution rate is calculated by summing the first r eigenvalues ​​in the eigenvalue set and dividing by the total eigenvalues. The smallest r is selected such that the cumulative contribution rate exceeds a preset threshold. The first r eigenvalues ​​and their corresponding eigenvectors are retained to generate the preferred eigenvalue set and the corresponding preferred eigenvector set. S202: Analyze the contribution of each detection step based on the preferred feature value set and the corresponding preferred feature vector set; the contribution of the detection step is equal to the sum of the products of the absolute values ​​of the components of each preferred feature vector in the corresponding detection step and the corresponding feature values; the median of all contributions is used as the contribution threshold, and the detection steps with contributions greater than the contribution threshold are marked as key detection steps, and a list of key detection steps is generated.

4. The method for detecting and warning of abnormal data streams in integrated circuit chips according to claim 3, characterized in that: S3 includes the following: S301: According to the chip testing process, the chips are classified, and chips with the same testing process belong to the same category; for each category of chips, the functional test data of the chips using the testing process and the application performance test data after the first application are extracted from the list of abnormal testing events. Construct a functional test data matrix and an application performance test data matrix; in the functional test data matrix, rows represent detected abnormal events, and columns represent corresponding electrical parameters and functional test results; in the application performance test data matrix, rows represent detected abnormal events, and columns represent corresponding field application performance and reliability indicators. S302: Based on the functional test data matrix and application performance test data matrix of each type of chip, construct a process multiple linear regression model. The training method of the process multiple linear regression model is the same as that of the test multiple linear regression model. Analyze the correlation based on the process multiple linear regression model. If the correlation is greater than the correlation threshold, it is determined to be a strong correlation. For chip types with strong correlation, the sampling frequency of the test after the first application is reduced; for chip types without strong correlation, the sampling frequency of the test after the first application is increased.

5. The method for detecting and warning of abnormal data streams in integrated circuit chips according to claim 4, characterized in that: S4 includes the following: S401: Remove events from the list of abnormal detection events from the historical chip detection events, mark the remaining events as normal detection events, and form a set of normal detection events; analyze the data adjustment factor based on the statistical characteristics of the list of abnormal detection events and the set of normal detection events; the data adjustment factor is equal to the number of normal detection events divided by the sum of the number of abnormal detection events and the number of normal detection events; S402: Continuous data points in the normal detection event set are scaled according to a data adjustment factor. When the adjusted value exceeds the preset maximum operating range of the data, boundary truncation is performed. For discrete detection data, the data adjustment factor is used as the retention probability of discrete data points, and a Bernoulli trial is performed on each discrete data point. When the value generated by the random number generator is less than the data adjustment factor, the discrete data point is retained; otherwise, it is removed. The removed discrete data points are filled by a weighted summation of the original data points of the same type. An adjusted sampling data set is generated. The continuous data includes, but is not limited to, voltage and current values; the discrete detection data includes, but is not limited to, pass or fail indicators. S403: Based on historical normal detection data, set a normal operating range for each detection parameter; for continuous data, the normal operating range is the mean of the parameter's historical data ± several standard deviations; for discrete detection data, the normal operating range is the pass state; for each chip type, calculate an anomaly detection stability index; the anomaly detection stability index is equal to the ratio of the number of data points of the chip type within the normal operating range in the sampled data set to the number of samples of the chip type in the sampled data set; Based on the anomaly detection stability index, the chip types in the normal detection event set are divided into different stability levels; the sampling frequency is adjusted according to the stability level.

6. A chip abnormal data stream detection and early warning system based on integrated circuits, wherein the system is applied to the chip abnormal data stream detection and early warning method based on integrated circuits according to any one of claims 1-5, characterized in that, The system includes an anomaly detection analysis module, a key detection analysis module, a correlation analysis module, and a routine adjustment module; The detection anomaly analysis module is used to acquire chip detection events of integrated circuits, extract sampled data of functional testing data after the integrated circuit is manufactured and corresponding application performance testing data after the first application; based on the data of historical chip detection events, a detection multiple linear regression model is trained to analyze chip detection events with detection anomalies. The key detection and analysis module is used to extract chip detection process and detection stage data for detecting abnormal events; Based on data analysis of the detection process, key detection stages that affect detection anomalies; The correlation analysis module is used to determine the correlation between functional test data and application performance test data after the first application in abnormal events of similar chips; and to adjust the sampling frequency of testing for each type of chip based on the correlation. The normal adjustment module is used to acquire normal detection events, verify the abnormal detection stability of the corresponding chip type in the adjusted chip detection events, adjust the sampling data of normal detection events, and feed them back to the detection process management system.

7. The chip abnormal data stream detection and early warning system based on integrated circuits according to claim 6, characterized in that: The detection anomaly analysis module includes a detection data acquisition unit and a difference analysis unit; The detection data acquisition unit is used to extract chip detection events from the chip detection event database of integrated circuits, and to perform data cleaning and normalization processing on functional test data and application performance test data respectively. The difference analysis unit is used to train a detection multiple linear regression model based on historical chip detection event data; for each chip detection event, Euclidean distance is used to analyze the error between the predicted value of the multiple linear regression model and the data vector composed of the actual measured application performance detection data; if the error is greater than the error threshold, the corresponding chip detection event is marked as a detection anomaly, and a list of detection anomaly events is generated.

8. The chip abnormal data stream detection and early warning system based on integrated circuits according to claim 6, characterized in that: The key detection and analysis module includes a feature screening unit and a contribution analysis unit; The feature filtering unit is used to extract the chip detection process and detection stage data for each detection anomaly from the list of detection anomalies, and to construct a detection stage data matrix. Principal component analysis is performed on the data matrix of the detection process to calculate the covariance matrix of the data matrix of the detection process, and eigenvalue decomposition is performed on the covariance matrix to obtain the eigenvalue set and the corresponding eigenvector set; The eigenvalues ​​are arranged in descending order, and the eigenvectors represent the directions of the principal components. The cumulative contribution rate is calculated by summing the first r eigenvalues ​​in the eigenvalue set and dividing by the total eigenvalues. The smallest r is selected such that the cumulative contribution rate exceeds a preset threshold. The first r eigenvalues ​​and their corresponding eigenvectors are retained to generate the preferred eigenvalue set and the corresponding preferred eigenvector set. The contribution analysis unit is used to analyze the contribution of each detection step based on the preferred feature value set and the corresponding preferred feature vector set; the median of all contributions is used as the contribution threshold, and the detection steps with contributions greater than the contribution threshold are marked as key detection steps, and a list of key detection steps is generated.

9. The chip abnormal data stream detection and early warning system based on integrated circuits according to claim 6, characterized in that: The correlation analysis module includes a data matrix construction unit and a correlation judgment unit; The data matrix construction unit is used to classify chips according to the chip testing process, with chips of the same testing process belonging to the same category; for each category of chips, it extracts the functional testing data and application performance testing data after the first application of the chip using the testing process from the list of abnormal testing events. Construct a functional testing data matrix and an application performance testing data matrix; The correlation judgment unit is used to construct a process multiple linear regression model based on the functional test data matrix and application performance test data matrix of each type of chip, and to analyze the correlation degree based on the process multiple linear regression model. If the correlation is greater than the correlation threshold, it is determined to be a strong correlation. For chip types with strong correlation, the sampling frequency of the test after the first application is reduced; for chip types without strong correlation, the sampling frequency of the test after the first application is increased.

10. The chip abnormal data stream detection and early warning system based on integrated circuits according to claim 6, characterized in that: The normal adjustment module includes a data adjustment factor analysis unit, a data adjustment unit, and a detection adjustment unit; The data adjustment factor analysis unit is used to remove events from the list of abnormal detection events from the historical chip detection events, mark the remaining events as normal detection events, and form a set of normal detection events. Based on the statistical characteristics of the list of detected abnormal events and the set of normal detected events, the data adjustment factors are analyzed; The data adjustment unit is used to scale continuous data points in the normal detection event set according to the data adjustment factor. When the adjusted value exceeds the preset maximum data operating range, boundary truncation is adopted. For discrete detection data, the data adjustment factor is used as the retention probability of discrete data points, and a Bernoulli trial is performed for each discrete data point. When the value generated by the random number generator is less than the data adjustment factor, the discrete data points are retained; Otherwise, remove them; for the removed discrete data points, fill them with a weighted sum of the original data points of the same type. Generate an adjusted set of sampled data; The detection adjustment unit is used to set a normal operating range for each detection parameter based on historical normal detection data; calculate an anomaly detection stability index for each chip type; classify chip types in the normal detection event set into different stability levels based on the anomaly detection stability index; and adjust the sampling frequency according to the stability level.

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