Power synthesis circuit and design method, device, equipment, medium and product thereof
By using a circuit design that combines transformers and resistors, the balance between high bandwidth, high port isolation, and miniaturization in power combiners is solved, achieving efficient distribution and merging of signal energy, making it suitable for miniaturized electronic devices.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- YUANCE INFORMATION TECHNOLOGY (CHENGDU) CO LTD
- Filing Date
- 2025-12-11
- Publication Date
- 2026-05-05
AI Technical Summary
Existing power combiners struggle to achieve a balance between high bandwidth, high port isolation, and miniaturization, failing to simultaneously deliver both broadband performance and miniaturization.
The circuit design employs one transformer and three resistors. By adjusting the resistance values, it achieves efficient distribution and merging of signal energy, ensuring high isolation between ports. This includes combinations of coupling resistors, series resistors, and parallel resistors, utilizing the resistance value relationships to achieve efficient signal transmission.
It achieves miniaturization and wide bandwidth characteristics of power combining circuits while maintaining high isolation, making it suitable for miniaturized electronic devices.
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Figure CN121984469A_ABST
Abstract
Description
Technical Field
[0001] This disclosure relates to the field of communication technology, and in particular to a power combining circuit and its design method, apparatus, device, medium and product. Background Technology
[0002] Power combiners are key components in the field of radio frequency (RF) and microwave, suitable for electronic devices requiring broadband power combining in RF circuits, such as instruments and communication base stations, playing a vital role in signal transmission and power management. Commonly used power combiners include Wilkinson power dividers, resistive power dividers, and hybrid couplers.
[0003] However, with the continuous advancement of technology, the requirements for miniaturization and high bandwidth in instrumentation and electronic equipment are becoming increasingly urgent. These common power combiners have problems such as being unable to take into account bandwidth characteristics, miniaturization, and high isolation between ports, and cannot achieve a good balance between high bandwidth, high isolation between ports, and miniaturization. Summary of the Invention
[0004] In view of the above problems, this disclosure is made to provide a power combining circuit and its design method, apparatus, device, medium and product.
[0005] According to one aspect of this disclosure, a power combining circuit is provided, comprising: a transformer, a first resistor, a second resistor, and a third resistor; The primary side of the transformer includes a first terminal and a second terminal, the first terminal being connected to the first branch port of the power divider, and the second terminal being grounded; The secondary side of the transformer includes a third terminal and a fourth terminal. The third terminal is connected to the combiner port, and the fourth terminal is connected to the second branch port of the power divider through the second resistor. The two ends of the first resistor are respectively connected to the combiner port and the second branch port. The fourth terminal is grounded through the third resistor.
[0006] The beneficial effects of this scheme are as follows: the first resistor is a coupling resistor, the second resistor is a series resistor, and the third resistor is a parallel resistor. The resistance value of the second resistor is generally fixed. By adjusting the values of the first and third resistors, the insertion loss between each branch port and the combining port can be changed, enabling efficient distribution or merging of signal energy in the circuit. Simultaneously, each branch port and the combining port do not interfere with each other, exhibiting high isolation. This power combining circuit achieves the functions of traditionally complex circuits using only one transformer and three resistors, utilizing a small number of components. This facilitates the miniaturization of power combining circuits, reducing their size when applied to electronic devices. Furthermore, it is not dependent on a specific line length and possesses wideband characteristics.
[0007] Furthermore, according to one aspect of the power combining circuit of this disclosure, the load impedances of the first branch port, the second branch port, and the combining port are matched with the resistance value of the second resistor.
[0008] Furthermore, according to one aspect of the power combining circuit of this disclosure, the impedance ratio of the transformer is 1:1.
[0009] According to one aspect of this disclosure, a design method for a power combining circuit is provided, comprising: Determine the resistance value of the second resistor; Based on the resistance value of the second resistor and the preset resistance value relationship, the resistance values of the first resistor and the third resistor are determined; The insertion loss of the first branch port, the second branch port, and the combining port is adjusted by adjusting the resistance values of the first resistor and the third resistor.
[0010] The beneficial effects of this scheme are as follows: the impedance ratio of the transformer is 1:1, and different resistance values of the three resistors can achieve different power distribution schemes. When the preset resistance value relationship is met, ideal isolation and insertion loss between each branch port and the combiner port can be obtained. Overall, it takes into account the requirements of miniaturization, high bandwidth and high isolation.
[0011] Furthermore, according to a design method for a power combining circuit according to one aspect of this disclosure, the resistance relationship includes: the product of the resistance values of the first resistor and the third resistor is equal to the square of the resistance value of the second resistor.
[0012] In one or more embodiments, the beneficial effects of this solution are as follows: the second resistor determines the basic energy level of the path at the second branch port, while the first and third resistors act as "bypass pressure relief valves." By presetting the resistance relationship between the three resistors, the signal energy input from the first branch port will only flow to the combining port and will not flow back into the second branch port; similarly, the signal energy input from the second branch port will only flow to the combining port and will not flow back to the first branch port, thus achieving high isolation between the ports.
[0013] Furthermore, according to a design method for a power combining circuit according to one aspect of this disclosure, determining the resistance value of the second resistor includes: obtaining the load impedance of the first branch port, the second branch port, and the combining port; and determining the resistance value of the second resistor based on the load impedance.
[0014] In one or more embodiments, the beneficial effect of this solution is that by determining the resistance value of the second resistor through the load impedance of each port, impedance matching can be achieved, avoiding problems such as energy waste and signal distortion caused by signal reflection.
[0015] According to another aspect of this disclosure, a design apparatus for a power combining circuit is provided, comprising: The first calculation module is used to determine the resistance value of the second resistor; The second calculation module is used to determine the resistance values of the first resistor and the third resistor based on the resistance value of the second resistor and a preset resistance value relationship. The adjustment module is used to adjust the insertion loss of the first branch port, the second branch port, and the combining port by adjusting the resistance values of the first resistor and the third resistor.
[0016] According to another aspect of this disclosure, a computer device is provided, including a memory, a processor, and a computer program stored in the memory, the processor executing the computer program to implement the method of one aspect above.
[0017] According to another aspect of this disclosure, a computer-readable storage medium is provided having a computer program stored thereon that, when executed by a processor, implements the method of one aspect above.
[0018] According to another aspect of this disclosure, a computer program product is provided, including a computer program that, when executed by a processor, implements the method of the above-described aspect.
[0019] It should be understood that both the foregoing general description and the following detailed description are exemplary and intended to provide further illustration of the claimed technology. Attached Figure Description
[0020] The above and other objects, features, and advantages of this disclosure will become more apparent from the more detailed description of the embodiments thereof in conjunction with the accompanying drawings. The drawings are provided to further illustrate the embodiments of this disclosure and form part of the specification. They are used together with the embodiments of this disclosure to explain the disclosure and do not constitute a limitation thereof. In the drawings, the same reference numerals generally represent the same components or steps.
[0021] Figure 1 This is a circuit diagram illustrating a power combining circuit according to an embodiment of the present disclosure.
[0022] Figure 2 This is a flowchart illustrating a design method for a power combining circuit according to an embodiment of the present disclosure.
[0023] Figure 3 This is a schematic diagram of the design apparatus for a power combining circuit according to an embodiment of the present disclosure.
[0024] Figure 4This is a schematic diagram illustrating the structure of a computer device according to an embodiment of the present disclosure.
[0025] Figure 5 This is a schematic diagram illustrating a computer program product according to an embodiment of the present disclosure. Detailed Implementation
[0026] To make the objectives, technical solutions, and advantages of this disclosure more apparent, exemplary embodiments according to this disclosure will now be described in detail with reference to the accompanying drawings. Obviously, the described embodiments are merely some embodiments of this disclosure, and not all embodiments of this disclosure. It should be understood that this disclosure is not limited to the exemplary embodiments described herein.
[0027] Power combiners are key components in the field of radio frequency (RF) and microwave, suitable for electronic devices requiring broadband power combining in RF circuits, such as instruments, communication base stations, communication terminal equipment, splitters, wireless sensing devices, and wireless remote control devices. They play a vital role in signal transmission and power management. Commonly used power combiners include Wilkinson power dividers, resistive power dividers, and hybrid couplers.
[0028] Wilkinson power dividers cannot achieve both broadband performance and miniaturization, resistive power dividers cannot achieve high port isolation, and hybrid couplers are limited to narrowband devices due to the use of transmission lines of specific lengths. Therefore, these power combiners cannot achieve a good balance between high bandwidth, high port isolation, and miniaturization.
[0029] The above description, with reference to the accompanying drawings, illustrates a power combining circuit and its design method, apparatus, device, medium, and product according to embodiments of the present disclosure. By adjusting the values of the first and third resistors, the insertion loss between each branch port and the combining port can be changed, enabling efficient distribution or merging of signal energy in the circuit. Simultaneously, each branch port and the combining port do not interfere with each other, exhibiting high isolation. This power combining circuit achieves the functionality of traditionally complex circuits using only one transformer and three resistors, utilizing a small number of components. This facilitates the miniaturization of power combining circuits, reducing their size when applied to electronic devices. Furthermore, it is not dependent on a specific line length and possesses wideband characteristics.
[0030] To facilitate understanding of this embodiment, a power combining circuit disclosed in this disclosure will first be described in detail, such as... Figure 1 The diagram shown is a circuit diagram of a power combining circuit provided in an embodiment of this disclosure, including a transformer and three resistors, specifically a first resistor R1, a second resistor R2, and a third resistor R3, including: (1) The primary side of the transformer includes a first terminal and a second terminal. The first terminal is connected to the first branch port P1 of the power divider, and the second terminal is grounded. (2) The secondary side of the transformer includes a third terminal and a fourth terminal. The third terminal is connected to the closing port P3, and the fourth terminal is connected to the second branch port P2 of the power divider through the second resistor R2 (in series). (3) The first resistor R1 is a coupling resistor, and the two ends of R1 are connected to the combiner port P3 and the second branch port P2 of the power divider, respectively. (4) The fourth terminal is grounded through the third resistor R3 (in parallel).
[0031] The resistance values of R1, R2, and R3 satisfy the following relationship: The resistance value of R2 is generally fixed and depends on the load impedance of each port. The load impedance of the first branch port, the second branch port, and the combiner port should be matched with the resistance value of the second resistor. For example, when the load impedance of each port is 50Ω, the resistance value of the second resistor is preferably 50Ω. The resistance values of R1 and R3 can be finely adjusted according to the resistance relationship to change the insertion loss between each branch port and the combiner port.
[0032] In the power combining circuit of the RF broadband power divider provided in this embodiment, different configurations of R1, R2, and R3 can achieve different power distribution schemes. For better explanation, this embodiment sets the load impedance of the first branch port P1, the second branch port P2, and the combining port P3 to 50Ω, and provides the following two schemes: Option 1: Using an ideal transformer (impedance ratio of 1:1), when R1=R2=R3=50Ω, experiments show that the insertion loss between P1, P2 and P3 is -6.02dB. At the same time, this option achieves ideal isolation between branches and ideal reflection loss at each port.
[0033] When R1=25Ω, R2=50Ω, and R3=100Ω, experiments show that the insertion loss between P1 and P3 is approximately -9.5dB, and the insertion loss between P2 and P3 is approximately -3.5dB. This achieves unequal power distribution between the two branch ports. At the same time, this scheme obtains ideal isolation performance between branches and ideal reflection loss performance at each port.
[0034] Option 2: Use an RF transformer (impedance ratio of 1:1). When R1=R2=R3=50Ω, experiments show that the insertion loss between P1~P3 and P2~P3 is not completely equal. This is because the electrical characteristics of the transformer used in practice are not ideal, resulting in some parasitic effects. However, the isolation between each port and the reflection loss of the three ports can basically meet the requirements of conventional use scenarios.
[0035] When R1=25Ω, R2=50Ω, and R3=100Ω, experiments show that there are certain differences in insertion loss between each branch port (P1 and P2) and the combined port P3, which can achieve different power distribution between P1 and P2. The isolation and reflection loss of the three ports can basically meet the requirements of conventional use scenarios.
[0036] In summary, using a non-ideal RF transformer leads to some degradation in insertion loss, isolation, and port reflection loss, but overall, it balances the requirements for high bandwidth and high isolation. Furthermore, the actual RF transformer size is approximately 4×4×4mm, and with three additional resistors, the total PCB area occupied by the power combining circuit is approximately 36mm. It accounts for approximately 3% of the area used in a multi-stage Wilkinson power divider with equivalent bandwidth requirements. Therefore, the circuit in this embodiment is particularly suitable for electronic devices that do not have high requirements for insertion loss but have high requirements for miniaturization, ultra-wideband, and isolation.
[0037] Based on the above embodiments, this embodiment provides a design method for a power combining circuit, such as... Figure 2 The diagram shown is a flowchart of the design method for a power combining circuit, including: S201: Determine the resistance value of the second resistor; S202: Determine the resistance values of the first and third resistors based on the resistance value of the second resistor and the preset resistance value relationship; S203: Adjust the insertion loss of the first branch port, the second branch port, and the combiner port by adjusting the resistance values of the first resistor and the third resistor.
[0038] In one or more embodiments, the resistance relationship includes: The product of the resistances of the first and third resistors is equal to the square of the resistance of the second resistor, expressed as:
[0039] This resistance relationship is equivalent to adjusting the "golden formula" of the three resistors. By setting the resistance values according to this relationship, the entire circuit can reach its optimal state, that is, the signal energy can be efficiently distributed or combined, while the ports do not interfere with each other, achieving a high degree of isolation. This embodiment uses very few components (one transformer and three resistors) to achieve the functions that traditional complex circuits can only achieve through a unique circuit connection method and resistance relationship, which is conducive to miniaturization.
[0040] In one or more embodiments, determining the resistance value of the second resistor includes: obtaining the load impedance of the first branch port, the second branch port, and the combiner port; and determining the resistance value of the second resistor based on the load impedance.
[0041] According to another aspect of the embodiments of this disclosure, a design apparatus for a power combining circuit is provided, such as... Figure 3 As shown, the device includes: The first calculation module 301 is used to determine the resistance value of the second resistor; The second calculation module 302 is used to determine the resistance values of the first resistor and the third resistor based on the resistance value of the second resistor and a preset resistance value relationship. The adjustment module 303 is used to adjust the insertion loss of the first branch port, the second branch port, and the combiner port by adjusting the resistance values of the first resistor and the third resistor.
[0042] In one or more embodiments, the first calculation module 301 is used to: obtain the load impedance of the first branch port, the second branch port, and the combining port; The value of the second resistor is determined based on the load impedance.
[0043] The design apparatus for the power combining circuit provided in this disclosure and the design method for the power combining circuit provided in this disclosure are based on the same inventive concept and have the same beneficial effects as the methods used, operated or implemented.
[0044] This disclosure also provides a computer device for executing the above-described power combining circuit design method. Please refer to... Figure 4 It illustrates a schematic diagram of a computer device provided by some embodiments of this disclosure. For example... Figure 4 As shown, the computer device 4 includes: a processor 400, a memory 401, a bus 402, and a communication interface 403. The processor 400, the communication interface 403, and the memory 401 are connected via the bus 402. The memory 401 stores a computer program that can run on the processor 400. When the processor 400 runs the computer program, it executes the design method of the power combining circuit provided in any of the foregoing embodiments of this disclosure.
[0045] The memory 401 may include high-speed random access memory (RAM) or non-volatile memory, such as at least one disk storage device. Communication between this device network element and at least one other network element is achieved through at least one communication interface 403 (which can be wired or wireless), such as the Internet, wide area network, local area network, metropolitan area network, etc.
[0046] Bus 402 can be an ISA bus, PCI bus, or EISA bus, etc. The bus can be divided into an address bus, a data bus, a control bus, etc. Memory 401 is used to store programs. After receiving an execution instruction, the processor 400 executes the program. The design method of the power combining circuit disclosed in any of the foregoing embodiments of this disclosure can be applied to the processor 400, or implemented by the processor 400.
[0047] The processor 400 may be an integrated circuit chip with signal processing capabilities. In implementation, each step of the above method can be completed by the integrated logic circuitry in the hardware of the processor 400 or by instructions in software form. The processor 400 may be a general-purpose processor, including a central processing unit (CPU), a network processor (NP), etc.; it may also be a digital signal processor (DSP), an application-specific integrated circuit (ASIC), an off-the-shelf programmable gate array (FPTA), or other programmable logic devices, discrete gate or transistor logic devices, or discrete hardware components. It can implement or execute the methods, steps, and logic block diagrams disclosed in the embodiments of this disclosure. The general-purpose processor may be a microprocessor or any conventional processor. The steps of the methods disclosed in the embodiments of this disclosure can be directly embodied in the execution of a hardware decoding processor, or executed by a combination of hardware and software modules in the decoding processor. The software modules may reside in random access memory, flash memory, read-only memory, programmable read-only memory, electrically erasable programmable memory, registers, or other mature storage media in the art. The storage medium is located in memory 401. The processor 400 reads the information in memory 401 and, in conjunction with its hardware, completes the steps of the above method.
[0048] The computer device and the power combining circuit design method provided in this disclosure are based on the same inventive concept and have the same beneficial effects as the methods used, operated or implemented.
[0049] This disclosure also provides a computer-readable storage medium corresponding to the design method of the power combining circuit provided in the foregoing embodiments. The computer-readable storage medium is an optical disc, on which a computer program (i.e., a computer program product) is stored. When the computer program is run by a processor, it executes the design method of the power combining circuit provided in any of the foregoing embodiments.
[0050] It should be noted that examples of the computer-readable storage medium may also include, but are not limited to, phase-change memory (PRAM), static random access memory (SRAM), dynamic random access memory (DRAM), other types of random access memory (RAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash memory or other optical and magnetic storage media, which will not be elaborated here.
[0051] The computer-readable storage medium provided in the above embodiments of this disclosure and the design method of the power combining circuit provided in the embodiments of this disclosure are based on the same inventive concept and have the same beneficial effects as the methods adopted, run or implemented by the application programs stored therein.
[0052] This disclosure also provides a computer program product; please refer to [reference needed]. Figure 5 The computer program product 500 carries program code, namely computer program 501. The instructions included in the computer program 501 can be used to execute the steps of the power combining circuit design method described in the above method embodiments. For details, please refer to the above method embodiments, which will not be repeated here.
[0053] The aforementioned computer program product can be implemented through hardware, software, or a combination thereof. In one optional embodiment, the computer program product is specifically embodied in a computer storage medium; in another optional embodiment, the computer program product is specifically embodied in a software product, such as a software development kit (SDK), etc.
[0054] The basic principles of this disclosure have been described above with reference to specific embodiments. However, it should be noted that the advantages, benefits, and effects mentioned in this disclosure are merely examples and not limitations, and should not be considered as essential features of each embodiment of this disclosure. Furthermore, the specific details disclosed above are for illustrative and facilitative purposes only, and are not limitations. These details do not limit the scope of this disclosure to the necessity of employing the aforementioned specific details for implementation.
[0055] The block diagrams of devices, apparatuses, devices, and systems disclosed herein are merely illustrative examples and are not intended to require or imply that they must be connected, arranged, or configured in the manner shown in the block diagrams. As those skilled in the art will recognize, these devices, apparatuses, devices, and systems can be connected, arranged, and configured in any manner. Words such as “comprising,” “including,” “having,” etc., are open-ended terms meaning “including but not limited to,” and are used interchangeably with them. The terms “or” and “and” as used herein refer to the terms “and / or,” and are used interchangeably with them unless the context clearly indicates otherwise. The term “such as” as used herein refers to the phrase “such as but not limited to,” and is used interchangeably with it.
[0056] Additionally, as used herein, the "or" used in a list of items beginning with "at least one" indicates a separate list, such that a list of, for example, "at least one of A, B, or C" means A or B or C, or AB or AC or BC, or ABC (i.e., A and B and C). Furthermore, the word "exemplary" does not imply that the described example is preferred or better than other examples.
[0057] It should also be noted that in the systems and methods of this disclosure, the components or steps can be decomposed and / or recombined. These decompositions and / or recombinations should be considered as equivalent solutions to this disclosure.
[0058] Various changes, substitutions, and modifications can be made to the technology described herein without departing from the teachings defined by the appended claims. Furthermore, the scope of the claims of this disclosure is not limited to the specific aspects of the processes, machines, manufactures, events, means, methods, and actions described above. Currently existing or later-developed processes, machines, manufactures, events, means, methods, or actions that perform substantially the same function or achieve substantially the same result as the corresponding aspects described herein can be utilized. Therefore, the appended claims include such processes, machines, manufactures, events, means, methods, or actions within their scope.
[0059] The above description of the disclosed aspects is provided to enable any person skilled in the art to make or use this disclosure. Various modifications to these aspects will be readily apparent to those skilled in the art, and the general principles defined herein may be applied to other aspects without departing from the scope of this disclosure. Therefore, this disclosure is not intended to be limited to the aspects shown herein, but rather to be carried out within the widest scope consistent with the principles and novel features disclosed herein.
[0060] The above description has been given for purposes of illustration and description. Furthermore, this description is not intended to limit the embodiments of this disclosure to the forms disclosed herein. Although numerous exemplary aspects and embodiments have been discussed above, those skilled in the art will recognize certain variations, modifications, alterations, additions, and sub-combinations therein.
Claims
1. A power combining circuit, characterized in that, include: Transformer, first resistor, second resistor, and third resistor; The primary side of the transformer includes a first terminal and a second terminal, the first terminal being connected to the first branch port of the power divider, and the second terminal being grounded; The secondary side of the transformer includes a third terminal and a fourth terminal. The third terminal is connected to the combiner port, and the fourth terminal is connected to the second branch port of the power divider through the second resistor. The two ends of the first resistor are respectively connected to the combiner port and the second branch port. The fourth terminal is grounded through the third resistor.
2. The power combining circuit as described in claim 1, characterized in that, The load impedances of the first branch port, the second branch port, and the combined port are matched with the resistance value of the second resistor.
3. The power combining circuit as described in claim 1, characterized in that, The impedance ratio of the transformer is 1:
1.
4. A design method for a power combining circuit, used to design the power combining circuit as described in any one of claims 1 to 3, characterized in that, include: Determine the resistance value of the second resistor; Based on the resistance value of the second resistor and the preset resistance value relationship, the resistance values of the first resistor and the third resistor are determined; The insertion loss of the first branch port, the second branch port, and the combining port is adjusted by adjusting the resistance values of the first resistor and the third resistor.
5. The design method of the power combining circuit as described in claim 4, characterized in that, The resistance relationship includes: The product of the resistance values of the first resistor and the third resistor is equal to the square of the resistance value of the second resistor.
6. The design method of the power combining circuit as described in claim 4, characterized in that, Determining the resistance value of the second resistor includes: Obtain the load impedance of the first branch port, the second branch port, and the combining port; The resistance value of the second resistor is determined based on the load impedance.
7. A design apparatus for a power combining circuit, used to implement the design method according to any one of claims 4 to 6, characterized in that, include: The first calculation module is used to determine the resistance value of the second resistor; The second calculation module is used to determine the resistance values of the first resistor and the third resistor based on the resistance value of the second resistor and a preset resistance value relationship. The adjustment module is used to adjust the insertion loss of the first branch port, the second branch port, and the combining port by adjusting the resistance values of the first resistor and the third resistor.
8. A computer embedded device, comprising a memory, a processor, and a computer program stored in the memory, characterized in that, The processor executes the computer program to implement the method according to any one of claims 4 to 6.
9. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by a processor, it implements the method described in any one of claims 4 to 6.
10. A computer program product, comprising a computer program, characterized in that, When the computer program is executed by a processor, it implements the method described in any one of claims 4 to 6.