Overlay pattern and overlay error compensation method

Abstract

The invention discloses an overlay pattern and an overlay error compensation method, and relates to an overlay pattern which comprises a first overlay mark and a second overlay mark which are formed on a first structure layer, the first overlay mark comprises a plurality of first overlay marks corresponding to the first structure layer; the second overlay mark comprises at least one second overlay mark and at least one third overlay mark which correspond to the second structural layer and the third structural layer respectively; the second overlay mark determines the quantitative proportion of the second overlay mark and the third overlay mark based on the preset influence weights of the second structure layer and the third structure layer on the first structure layer. The first overlay mark and the second overlay mark of the overlay pattern are both formed on the first structure layer, the occupied area of the overlay pattern in a wafer cutting channel area can be effectively reduced, an engineer only needs to establish a set of overlay forms, and the wafer processing efficiency is further improved.

Description

Technical Field

[0001] This invention belongs to the field of semiconductor technology, and particularly relates to an overlay pattern and an overlay error compensation method. Background Technology

[0002] Overlay error refers to the process in IC manufacturing where, after completing the processing of one layer (current layer), the overlay error compensation data between the overlay mark of the current layer and the overlay mark of the previous layer is calculated to correct the processing positioning of the next batch of wafers.

[0003] In semiconductor photolithography processes, there are situations where layer 1 (the first structural layer) needs to be aligned with layer 2 (the second structural layer) and layer 3 (the third structural layer) respectively. The overlay pattern of layer 2:layer 1 is as follows: Figure 1 As shown, the overlay pattern of layer 3: layer 1 is as follows: Figure 2 As shown; engineers need to create two sets of overlay programs and find the coordinates of the two sets of overlays, which requires a long measurement time; and the two sets of overlay patterns will also occupy more of the dicing area on the wafer, such as Figure 3 As shown.

[0004] Therefore, how to reduce the area occupied by overlay patterns in the wafer dicing area and further improve wafer processing efficiency has become an urgent problem to be solved. Summary of the Invention

[0005] This application provides an overlay pattern and an overlay error compensation method. The overlay pattern is formed on a first structural layer and includes a first overlay identifier and a second overlay identifier. The first overlay identifier includes multiple first overlay marks, corresponding to the first structural layer. The second overlay identifier includes at least one second overlay mark and at least one third overlay mark, corresponding to the second structural layer and the third structural layer, respectively. The number ratio of the second overlay marks and the third overlay marks is determined based on preset influence weights of the second and third structural layers on the first structural layer. Since both the first and second overlay identifiers of the overlay pattern are formed on the first structural layer, the area occupied by the overlay pattern in the wafer dicing area can be effectively reduced, and engineers only need to create one overlay program, further improving wafer processing efficiency.

[0006] Other objects and advantages of the present invention can be further understood from the technical features disclosed herein.

[0007] To achieve one or more of the above objectives or other objectives, the present invention provides an overlay pattern and an overlay error compensation method.

[0008] An overprinted graphic includes: a first overprinted mark and a second overprinted mark formed in a first structural layer; The first set of engraving marks includes multiple first set of engraving marks, corresponding to the first structural layer; The second set of engraving marks includes at least one second set of engraving marks and at least one third set of engraving marks, corresponding to the second structural layer and the third structural layer, respectively; The second set of engraving marks determines the ratio of the number of the second set of engraving marks and the third set of engraving marks based on the preset influence weights of the second and third structural layers on the first structural layer, respectively.

[0009] The preset influence weight of the second structural layer on the first structural layer is a, and the preset influence weight of the third structural layer on the first structural layer is b. The number of the second set of engraving marks and the third set of engraving marks in the second set of engraving marks are determined based on the ratio of the preset influence weight a to the preset influence weight b. The sum of the preset influence weight a and the preset influence weight b is 1.

[0010] The width of the first set of markings, the second set of markings, and the third set of markings is at least 2 ± 0.5 μm.

[0011] The second set of engraved marks and the third set of engraved marks in the second set of engraved marks are distributed in multiple rows and / or columns along the first direction and the second direction, respectively.

[0012] The second set of engraving marks and the third set of engraving marks are respectively arranged parallel to the first set of engraving marks.

[0013] The first direction is the X direction, and the second direction is the Y direction.

[0014] The overlay pattern is located within the dicing area of ​​the wafer, and the width of the dicing area is 60±5um, accommodating at least one set of the overlay pattern.

[0015] The first structural layer, the second structural layer, and the third structural layer are stacked sequentially. The first structural layer is the lower layer, the second structural layer is the middle layer, and the third structural layer is the upper layer.

[0016] A method for compensating overprinting errors, based on the overprinted pattern described in any one of the above claims, includes: A wafer with an overlay pattern is provided, the overlay pattern including a first overlay identifier and a second overlay identifier, both the first overlay identifier and the second overlay identifier being formed on a first structural layer; The first set of engraving marks includes multiple first set of engraving marks, corresponding to the first structural layer; The second set of engraving marks includes at least one second set of engraving marks and at least one third set of engraving marks, corresponding to the second structural layer and the third structural layer, respectively; The second set of engraving marks determines the quantity ratio of the second set of engraving marks and the third set of engraving marks based on the preset influence weights of the second and third structural layers on the first structural layer, respectively. By measuring the offset of the centers of the first and second overlay marks in the first and second directions, overlay error compensation data is obtained, the overlay error compensation value for the next batch of wafers is determined, and the exposure machine is compensated according to the overlay error compensation value.

[0017] The specific process of obtaining the overlay error compensation data by measuring the offset of the centers of the first set of engraving marks and the second set of engraving marks in the first and second directions is as follows: Obtain the geometric center point coordinates of the first overlay mark as the first coordinate; obtain the geometric center point coordinates of the second overlay mark as the second coordinate; obtain the difference between the first coordinate and the second coordinate to obtain overlay error compensation data, and feed it back to the exposure system to compensate for the next batch of wafers.

[0018] Compared with the prior art, the beneficial effects of the present invention mainly include: This application provides an overlay pattern and an overlay error compensation method. The overlay pattern is formed on a first structural layer and includes a first overlay identifier and a second overlay identifier. The first overlay identifier includes multiple first overlay marks, corresponding to the first structural layer. The second overlay identifier includes at least one second overlay mark and at least one third overlay mark, corresponding to the second structural layer and the third structural layer, respectively. The number ratio of the second overlay marks and the third overlay marks is determined based on preset influence weights of the second and third structural layers on the first structural layer. Since both the first and second overlay identifiers of the overlay pattern are formed on the first structural layer, the area occupied by the overlay pattern in the wafer dicing area can be effectively reduced. Furthermore, engineers only need to create one overlay program, which can further improve wafer processing efficiency.

[0019] To make the above and other objects, features and advantages of the present invention more apparent and understandable, preferred embodiments are described below in detail with reference to the accompanying drawings. Attached Figure Description

[0020] To more clearly illustrate the technical solutions in the specific embodiments of the present invention, the drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0021] Figure 1 Illustration of overlaying graphics using existing technology Figure 1 .

[0022] Figure 2 Illustration of overlaying graphics using existing technology Figure 2 .

[0023] Figure 3 A schematic diagram of the overlay pattern on the cutting area of ​​the existing technology.

[0024] Figure 4 This is a schematic diagram of the overlay pattern provided in Embodiment 1 of this application.

[0025] Figure 5 This is a schematic diagram of the overlay pattern of the cutting area provided in Embodiment 1 of this application. Detailed Implementation

[0026] The foregoing and other technical contents, features, and effects of the present invention will be clearly presented in the following detailed description of a preferred embodiment with reference to the accompanying drawings. The directional terms mentioned in the following embodiments, such as up, down, left, right, front, or back, are merely for reference to the accompanying drawings. Therefore, the directional terms used are for illustrative purposes and not for limiting the present invention.

[0027] The embodiments of this application will now be described in detail with reference to the accompanying drawings. However, those skilled in the art will understand that many technical details have been provided in the embodiments of this application to facilitate a better understanding of the application. However, the technical solutions claimed in this application can be implemented even without these technical details and various variations and modifications based on the following embodiments.

[0028] Example 1 like Figure 4 As shown, an overlay pattern includes: a first overlay identifier and a second overlay identifier formed in a first structural layer; the first overlay identifier includes multiple first overlay marks, corresponding to the first structural layer; the second overlay identifier includes at least one second overlay mark and at least one third overlay mark, corresponding to the second structural layer and the third structural layer respectively; the number ratio of the second overlay mark and the third overlay mark is determined based on the preset influence weights of the second structural layer and the third structural layer on the first structural layer.

[0029] Specifically, such as Figure 4 As shown, the second set of engraved marks and the third set of engraved marks in the second set of engraved marks are distributed in multiple rows and / or multiple columns along the first direction and the second direction, respectively, and the second set of engraved marks and the third set of engraved marks are set parallel to the first set of engraved marks.

[0030] As a preferred embodiment of this application, the width of the first set of markings, the second set of markings, and the third set of markings in this embodiment is at least 2±0.5um to ensure that the line width is sufficient and the markings can be stably identified.

[0031] In a preferred embodiment of this application, the first structural layer, the second structural layer, and the third structural layer are stacked sequentially; the first structural layer is the lower layer, the second structural layer is the middle layer, and the third structural layer is the upper layer.

[0032] During the alignment of layer 1 (first structural layer) with layer 2 (second structural layer), as follows: Figure 1 The layer 2 overlay pattern shown in the image is used to compensate for overlay errors in layer 1, for example: X_Tran:Xt1 Y_Tran:Yt1 X_Exp:Xe1 Y_Exp:Ye1 Rot: R1 N_Ortho:No1 R_Mag:Rm1 AR_Mag:ARm1 R_Rot:Rr1 AR_Rot:ARr1 During the alignment of layer 1 (first structural layer) with layer 3 (third structural layer), as follows: Figure 2 The layer 3 overlay pattern shown in the image is used to compensate for overlay errors in layer 1, for example: X_Tran:Xt2 Y_Tran:Yt2 X_Exp:Xe2 Y_Exp:Ye2 Rot: R2 N_Ortho:No2 R_Mag:Rm2 AR_Mag:ARm2 R_Rot:Rr2 AR_Rot:ARr2 This application's overprinted graphic includes a first overprinted identifier and a second overprinted identifier; the first overprinted identifier includes multiple first overprinted marks, corresponding to a first structural layer; the second overprinted identifier includes at least one second overprinted mark and at least one third overprinted mark, corresponding to a second structural layer and a third structural layer, respectively; the preset influence weight of the second structural layer on the first structural layer is 'a', and the preset influence weight of the third structural layer on the first structural layer is 'b'. The number of second overprinted marks and third overprinted marks within the second overprinted identifier is determined (rounded up) based on the ratio of the preset influence weight 'a' to the preset influence weight 'b'. Figure 4 As shown, and according to as Figure 4 The overprinted pattern shown is used to compensate for overprinting errors, for example: X_Tran:a a ·Xt1+b a ·Xt2 Y_Tran:a b ·Yt1+b b ·Yt2 X_Exp:a c ·Xe1+b c ·Xe2 Y_Exp:a d ·Yt1+b d ·Yt2 Rot: a e ·R1+b e ·R2 N_Ortho:a f ·No1+b f No. 2 R_Mag:a g ·Rm1+b g ·Rm2 AR_Mag:a h ·ARm1+b h ·ARm2 R_Rot:a i ·Rr1+b i XRr2 AR_Rot:a j ·ARr1+b j ARr2 Among them, a a ~a j b a ~b j They are constants and can be equal.

[0033] In a preferred embodiment of this application, the first direction is the X direction and the second direction is the Y direction.

[0034] like Figure 5 As shown, the overlay pattern is located in the dicing area of ​​the wafer. The width of the dicing area is 60±5um, which can accommodate at least one set of overlay patterns. This can effectively reduce the area occupied by the overlay pattern in the wafer dicing area and further improve the wafer processing efficiency.

[0035] Example 2 Embodiment 2 of this application provides a method for compensating for overprinting errors, based on the above-mentioned overprinting pattern, including: A wafer with an overlay pattern is provided, the overlay pattern including a first overlay mark and a second overlay mark, both of which are formed in a first structural layer; The first set of engraved markings includes multiple first set of engraved marks, corresponding to the first structural layer; The second set of engraving marks includes at least one second set of engraving marks and at least one third set of engraving marks, corresponding to the second structural layer and the third structural layer, respectively; The second set of markings determines the ratio of the number of the second set of markings to the third set of markings based on the preset influence weights of the second and third structural layers on the first structural layer, respectively. By measuring the offset of the center of the first and second overlay markings in the first and second directions, overlay error compensation data is obtained, the overlay error compensation value of the next batch of wafers is determined, and the exposure machine is compensated according to the overlay error compensation value.

[0036] Specifically, the geometric center point coordinates of the first set of markings are obtained as the first coordinates (x1, y1); the geometric center point coordinates of the second set of markings are obtained as the second coordinates (x2, y2); based on the offsets of the first and second coordinates in the first and second directions, the marking error compensation data (ΔX, ΔY) are obtained and fed back to the exposure system to compensate for the next batch of wafers.

[0037] In summary, this application provides an overlay pattern and an overlay error compensation method. The overlay pattern is formed on a first structural layer and includes a first overlay identifier and a second overlay identifier. The first overlay identifier includes multiple first overlay marks, corresponding to the first structural layer. The second overlay identifier includes at least one second overlay mark and at least one third overlay mark, corresponding to the second structural layer and the third structural layer, respectively. The number ratio of the second overlay marks and the third overlay marks is determined based on the preset influence weights of the second and third structural layers on the first structural layer. Since both the first and second overlay identifiers of the overlay pattern are formed on the first structural layer, the area occupied by the overlay pattern in the wafer dicing area can be effectively reduced. Furthermore, engineers only need to create one overlay program, which can further improve wafer processing efficiency.

[0038] The common English terms or letters used in this invention for clarity of description are for illustrative purposes only and are not limiting interpretations or specific uses. They should not be used to limit the scope of protection of this invention based on their possible Chinese translations or specific letters.

[0039] It should also be noted that in this article, relational terms such as “first” and “second” are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations.

Claims

1. A type of overprinted graphic, characterized in that, include: The first set of engraved markings and the second set of engraved markings formed in the first structural layer; The first set of engraving marks includes multiple first set of engraving marks, corresponding to the first structural layer; The second set of engraving marks includes at least one second set of engraving marks and at least one third set of engraving marks, corresponding to the second structural layer and the third structural layer, respectively; The second set of engraving marks determines the ratio of the number of the second set of engraving marks and the third set of engraving marks based on the preset influence weights of the second and third structural layers on the first structural layer, respectively.

2. The overprinted pattern according to claim 1, characterized in that, The preset influence weight of the second structural layer on the first structural layer is a, and the preset influence weight of the third structural layer on the first structural layer is b. The number of the second set of engraving marks and the third set of engraving marks in the second set of engraving marks are determined based on the ratio of the preset influence weight a to the preset influence weight b. The sum of the preset influence weight a and the preset influence weight b is 1.

3. The overprinted pattern according to claim 1, characterized in that, The width of the first set of markings, the second set of markings, and the third set of markings is at least 2 ± 0.5 μm.

4. The overprinted pattern according to claim 1, characterized in that, The second set of engraved marks and the third set of engraved marks in the second set of engraved marks are distributed in multiple rows and / or columns along the first direction and the second direction, respectively.

5. The overprinted pattern according to claim 4, characterized in that, The second set of engraving marks and the third set of engraving marks are respectively arranged parallel to the first set of engraving marks.

6. The overprinted pattern according to claim 4, characterized in that, The first direction is the X direction, and the second direction is the Y direction.

7. The overprinted pattern according to claim 1, characterized in that, The overlay pattern is located within the dicing area of ​​the wafer, and the width of the dicing area is 60±5um, accommodating at least one set of the overlay pattern.

8. The overprinted pattern according to claim 1, characterized in that, The first structural layer, the second structural layer, and the third structural layer are stacked sequentially. The first structural layer is the lower layer, the second structural layer is the middle layer, and the third structural layer is the upper layer.

9. A method for compensating overprinting errors, based on the overprinted pattern according to any one of claims 1-8, characterized in that, include: A wafer with an overlay pattern is provided, the overlay pattern including a first overlay identifier and a second overlay identifier, both the first overlay identifier and the second overlay identifier being formed on a first structural layer; The first set of engraving marks includes multiple first set of engraving marks, corresponding to the first structural layer; The second set of engraving marks includes at least one second set of engraving marks and at least one third set of engraving marks, corresponding to the second structural layer and the third structural layer, respectively; The second set of engraving marks determines the quantity ratio of the second set of engraving marks and the third set of engraving marks based on the preset influence weights of the second and third structural layers on the first structural layer, respectively. By measuring the offset of the centers of the first and second overlay marks in the first and second directions, overlay error compensation data is obtained, the overlay error compensation value for the next batch of wafers is determined, and the exposure machine is compensated according to the overlay error compensation value.

10. The overprinting error compensation method according to claim 9, characterized in that, The specific process of obtaining the overlay error compensation data by measuring the offset of the centers of the first set of engraving marks and the second set of engraving marks in the first and second directions is as follows: Obtain the geometric center point coordinates of the first overlay mark as the first coordinate; obtain the geometric center point coordinates of the second overlay mark as the second coordinate; obtain the difference between the first coordinate and the second coordinate to obtain overlay error compensation data, and feed it back to the exposure system to compensate for the next batch of wafers.

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