Use of alternating layer pattern approach for efficient overlay metrology in multi-stack die applications

Abstract

Embodiments of the present disclosure include a method for forming an element, the method including: generating an image of a second die bonded on a first die, the first die bonded on a base substrate, the first die has a first feature formed on a first surface of the first die and the second die has a second feature formed on a second surface of the second die; determining a relative displacement between portions of the first feature and the second feature based on the generated image; and determining an updated alignment instruction based on the determined relative displacement.

Description

[0001] Cross-reference to related applications

[0002] This application claims the benefit of U.S. nonprovisional patent application No. 18 / 485,147, filed October 11, 2023, which is incorporated herein by reference. Technical Field

[0003] Embodiments of this disclosure generally relate to a method and apparatus for forming aligned 3D integrated circuits (3D ICs). Background Technology

[0004] Electronic components (such as those included in tablet computers, computers, copiers, digital cameras, smartphones, control systems, and ATMs) often include integrated circuit dies for desired functionality. Three-dimensional (3D) component packaging is a type of microelectronic component packaging structure that integrates multiple fabricated dies into a single, stacked, compact package. This approach allows designers to create more complex and powerful systems by integrating different components with improved power consumption levels and performance.

[0005] 3D component packaging can include three-dimensional integrated circuits (3D ICs), which are integrated circuits fabricated by vertically stacking at least two or more 2D ICs (e.g., dies) using, for example, through-silicon vias (TSVs) or copper-copper (Cu-Cu) connections. In other words, multiple dies can be stacked vertically on top of each other, such that they act as a single component, thereby achieving improved component performance with reduced power consumption and area (size).

[0006] For 3D ICs in a 3D component package to function correctly, the patterned layers of at least two or more ICs (or dies) must be aligned so that the stacked ICs can be interconnected as desired. Misalignment between 2D ICs can lead to short circuits, connection failures, or the like. As the complexity of 2D ICs increases while their size decreases, alignment becomes even more critical and complex.

[0007] Therefore, there is a need for an apparatus and method for reliably stacking two or more ICs or chips to solve the problem described above. Summary of the Invention

[0008] In one embodiment, a method for forming an element includes: generating an image of a second die bonded on a first die bonded on a base substrate, the first die having a first feature formed on a first surface of the first die and the second die having a second feature formed on a second surface of the second die; determining a relative displacement between portions of the first feature and the second feature based on the generated image; and determining an updated alignment instruction based on the determined relative displacement.

[0009] In another embodiment, a method for forming an element includes: generating a first image of a second die bonded to a first die on a base substrate, the first die being bonded to a base substrate, the second die having a first feature disposed on a first surface of the second die, the base substrate having a base feature formed on a base surface of the base substrate, and the first image being parallel to a first plane and including at least a portion of the first feature of the second die and at least a portion of the base feature of the base substrate, the first plane being parallel to the base surface of the base substrate; determining a first distance in a first direction between the first feature and portions of the base feature, the first direction being a direction parallel to the first plane; and determining an updated alignment instruction based on the first distance between the first feature and the base feature.

[0010] In another embodiment, an optical inspection system includes: a controller; and memory for storing a program to be executed in the controller, the program containing instructions that, when executed, cause the controller to: generate an image of a second die bonded on a first die bonded on a base substrate, the first die having a first feature formed on a first surface of the first die and the second die having a second feature formed on a second surface of the second die; determine a relative displacement between portions of the first and second features based on the generated image; and determine updated alignment instructions based on the determined relative displacement.

[0011] In another embodiment, a stacked semiconductor assembly includes: a first die bonded on a base substrate, the first die having a first feature formed on a first surface of the first die; and a second die bonded on the first die, the second die having a second feature formed on a second surface of the second die, wherein the second die is aligned to the first die based on the second feature and the first feature.

[0012] In another embodiment, a stacked semiconductor assembly includes: a first die bonded to a base substrate having a base feature formed on a base surface of the base substrate; and a second die bonded to the first die having a first feature disposed on a first surface of the second die, wherein the second die is aligned with the base substrate when a first distance between the first feature and the base feature is equal to a predetermined distance. Attached Figure Description

[0013] To gain a more detailed understanding of the features described above in this disclosure, a more specific description of the disclosure, which has been briefly summarized above, can be obtained with reference to the embodiments, some of which are illustrated in the accompanying drawings. However, it will be noted that the drawings are merely illustrative and are not intended to limit the scope of the disclosure, and other equivalent embodiments are permissible.

[0014] Figure 1A It is a schematic cross-sectional view of an optical inspection system according to one or more embodiments.

[0015] Figure 1B Is Figure 1A A top-down view of a portion of the die of a stacked semiconductor assembly located in an optical inspection system.

[0016] Figure 2 This is a more detailed cross-sectional view of the configuration of the optical inspection system 100 according to one or more embodiments.

[0017] Figure 3 The figure illustrates a method for forming a stacked semiconductor assembly according to one or more embodiments.

[0018] Figure 4 The figure illustrates a method for forming a stacked semiconductor assembly according to one or more embodiments.

[0019] Figures 5A to 5F It is a schematic cross-sectional view of a portion of a stacked semiconductor assembly during a method of aligning stacked semiconductor assemblies according to one or more embodiments.

[0020] Figures 6A to 6F It is a schematic cross-sectional view of a portion of a stacked semiconductor assembly during a method of forming a stacked semiconductor assembly according to one or more embodiments.

[0021] Figures 7A to 7F It is a schematic cross-sectional view of a portion of a stacked semiconductor assembly during a method of forming a stacked semiconductor assembly according to one or more embodiments.

[0022] Figures 8A to 8F It is a schematic cross-sectional view of a portion of a stacked semiconductor assembly during a method of forming a stacked semiconductor assembly according to one or more embodiments.

[0023] Figures 9A to 9H It is a schematic cross-sectional view of a portion of a stacked semiconductor assembly during a method of forming a stacked semiconductor assembly according to one or more embodiments.

[0024] To facilitate understanding, the same reference numerals have been used where possible to identify common elements in the figures. It is anticipated that elements and features of one embodiment may be advantageously incorporated into other embodiments without further description. Detailed Implementation

[0025] Three-dimensional integrated circuits (3D ICs) are integrated circuits fabricated by vertically stacking at least two or more 2D ICs (also referred to herein as dies). For a 3D IC to operate correctly, the patterned layers of interconnecting circuit elements (e.g., conductive pads, traces, or other similar current-carrying elements) within at least two or more ICs must be aligned before being bonded together. Misalignment between 2D ICs can lead to short circuits, connection failures, or the like. Two-dimensional (2D) ICs are formed as vertically stacked individual dies (i.e., portions of a larger wafer). In various embodiments, each of the dies includes features formed on a non-functional portion of each die. The non-functional portion of a die can include regions of the die containing non-electrical circuitry, such as regions located within one or more component fabrication layers or a base substrate positioned at the peripheral edge (e.g., remaining scribe lines), or open areas formed between circuits formed within the die. Features on different dies may have the same or different cross-sectional shapes and / or critical dimensions. 2D ICs can be stacked and aligned based on measurements of the overlay (OVL) distance between different features formed on different grains, determined using an optical inspection system, and / or the critical size of each feature.

[0026] Exemplary optical inspection system

[0027] Figure 1A This is a simplified cross-sectional view of an optical inspection system 100 according to one or more embodiments. In various embodiments, the optical inspection system 100 may include an imaging device 101, a robot end effector system 106, and a controller 126. The imaging device 101 may include, but is not limited to, a platform 104, at least one lens (not shown), an imaging sensor 140, and a light source (not shown). The controller 126 may be communicatively coupled to the imaging device 101 and the robot end effector system 106. The optical inspection system 100 is used to detect the position of features formed in components within a stacked semiconductor assembly 105 and to align the components of the stacked semiconductor assembly 105 (i.e., 3D IC) based on the position of the features. The components within the stacked semiconductor assembly 105 may include a base substrate and at least one or more dies, also referred to herein as 2D ICs.

[0028] In one example, each component (e.g., a base substrate or die) of the stacked semiconductor assembly 105 includes at least one feature configured to have a negligible impact on the operation of the stacked semiconductor assembly 105. Each of the features can be utilized by an optical inspection system 100 to align each of the components of the stacked semiconductor assembly 105. Each layer may be a 2D IC, which includes functional electrical elements (referred to herein as “elements”) used in the operation of the stacked semiconductor assembly 105. Each of the features is formed on a non-functional portion of each layer. For example, the stacked semiconductor assembly 105 may be configured to include three layers: a base substrate 108, a first die 109, and a second die 110. However, the stacked semiconductor assembly 105 is not limited to three layers. For example, the stacked semiconductor assembly 105 may include two or more layers. The base substrate 108 may include a base feature 111. The first die 109 may include a first feature 112, and the second die 110 may include a second feature 114. The base substrate 108 may be aligned to the first die 109 based on the base feature 111 and the first feature 112. The second die 110 can be aligned to the first die 109 based on the second feature 114 and the first feature 112. Thus, in one example, the size of the base feature 111 is smaller than the size of the first feature 112, and the size of the first feature is smaller than the size of the second feature 114. Therefore, the first die 109 can be aligned to the base substrate 108 by alignment features (such as centering the base feature 111 within the first feature 112). The second die 110 can be aligned to the first die 109 by centering the second feature 114 within the first feature 112.

[0029] Each feature within each die and in adjacent die pairs is positioned such that it has a negligible effect on the operation of the elements of the stacked semiconductor assembly 105 and is used for alignment purposes. Each feature within each die comprises a material, such as a metal, that provides contrast relative to the base substrate and / or die pads (e.g., silicon) at the inspection wavelength of light. Undesirably positioned features within or adjacent dies can cause electrical short circuits or capacitive coupling problems when high-speed electrical signals are provided through adjacent circuitry that is not in physical contact within the stacked semiconductor assembly 105. In one example, if a feature is formed on the element side (i.e., the front side) of the die, the feature is formed in a non-electrical segment away from the element or in a non-electrical segment intersecting with adjacent elements, so that the feature does not affect the functionality of the stacked semiconductor assembly 105. In another example, features may be formed on the back side (opposite to the element side) of each layer.

[0030] In various embodiments, controller 126 instructs robot end effector system 106 to position base plate 108 onto platform 104. Controller 126 includes a central processing unit (CPU) 133, memory 134, and support circuitry 135. Controller 126 is used to control robot end effector system 106. The CPU is a general-purpose computer processor configured for use in industrial settings to control robot end effector system 106. Memory 134 (typically non-volatile memory) described herein may include random access memory, read-only memory, hard disk, or other suitable forms of digital storage (local or remote). Support circuitry 135 is conventionally coupled to CPU 133 and includes cache, frequency circuitry, input / output subsystems, power supply, and the like, and combinations thereof. Software instructions (programs) and data may be encoded and stored in memory 134 to instruct the processor within CPU 133.

[0031] Typically, the program, readable by the CPU 133 in the controller 126, includes code that, when executed by the CPU 133, performs tasks related to the alignment of the layers of the stacked semiconductor assembly 105 described herein. The program may include instructions for controlling various hardware and electrical components within the optical inspection system 100 to perform various process tasks and sequences for implementing the methods described herein. In one example, the program includes an image processing algorithm. In one embodiment, the program includes instructions for performing the following description... Figure 3 Instructions for one or more operations as described in Figure 9.

[0032] A robotic end effector system 106, which may include robotic arm motion components, is configured to transport, stack, and subsequently align each layer of the stacked semiconductor assembly 105 based on instructions received from a controller 126. Thus, the robotic end effector system 106 is configured to move the dies of the stacked semiconductor assembly 105 along the x, y, and z axes. Furthermore, the robotic end effector system 106 is configured to rotate the dies of the stacked semiconductor assembly about (around) the x, y, and z axes.

[0033] Subsequently, controller 126 instructs robot end effector system 106 to stack the first die 109 onto base substrate 108 and to bond the first die 109 to base substrate 108. In one example, a special tool (such as a bonding machine or similar) is used to bond the first die 109 to base substrate 108. The first die 109 and base substrate 108 can be bonded using any suitable bonding process (such as microbump bonding, hybrid bonding, or similar). After the first die 109 is bonded to base substrate 108, imaging device captures an image of the stacked semiconductor assembly 105. Imaging device 101 delivers light toward the stacked semiconductor assembly 105 (i.e., base substrate 108 and first die 109) and based on the reflected light ( Figure 2 or light transmitted through the stacked semiconductor assembly 105 Figure 3 The image sensor 140 captures images of the stacked semiconductor assembly 105. Based on the captured images, the controller 126 determines the positions of the base feature 111 and the first feature 112, and determines an overlap (OVL) measurement between the base feature 111 and the first feature 112. The OVL measurement may include the xy plane ( Figure 1A The distance between a portion of the base feature 111 and a portion of the first feature 112, either within or relative to the x and y axes. Based on OVL measurements of the base feature 111 and the first feature 112, when aligning the base substrate and the first die of the same stacked semiconductor assembly, the controller 126 provides updated alignment instructions to the robot end effector system 106. The updated alignment instructions may include instructions for shifting and / or rotating the first die and / or base substrate of the same stacked semiconductor assembly for the actuators of the robot end effector system 106 and / or platform 104, such that the base feature is aligned with the first feature when the first die and base substrate of the same stacked semiconductor assembly are engaged.

[0034] The controller 126 may then instruct the robot end effector system 106 to stack the second die 110 onto the first die 109. The second die 110 is then bonded to the first die 109. After the second die 110 is bonded to the first die 109, the imaging device 101 captures an image of the stacked semiconductor assembly 105, and using this image, the controller 126 determines the positions of the first feature 112 and the second feature 114 and determines an OVL measurement between the first feature 112 and the second feature 114. The OVL measurement may include the distance between the first feature 112 and the second feature 114 in the xy plane or relative to the x-axis and y-axis. Based on the OVL measurement between the first feature 112 and the second feature 114, the controller 126 provides updated alignment instructions to the robot end effector system 106 when aligning the second die and the first die of the same stacked semiconductor assembly. The updated alignment instructions may include instructions for shifting and / or rotating the first and / or second dies of the same stacked semiconductor assembly for the actuators of the robot end effector system 106 and / or platform 104, such that the second feature and the first feature are aligned before engaging the first and second dies of the same stacked semiconductor assembly. In one example, as will be further discussed below, the robot end effector system 106 and / or platform 104 shifts / rotates the second die 110 until the first feature 112 is centered within the second feature 114.

[0035] Although the basic feature 111 is described as being smaller in size than the first feature 112, and the first feature is described as being smaller in size than the second feature 114, this is not intended to limit the scope of the disclosure provided herein, and is provided only as an example.

[0036] Figure 1B A top-down view of a portion of a component 150 disposed within a stacked semiconductor assembly is shown. Component 150 may correspond to any layer of the stacked semiconductor assembly, such as stacked semiconductor assembly 105. For example, component 150 may correspond to a base substrate 108, a first die 109, a second die 110, or any other layer of the stacked semiconductor assembly 105. Figure 1BAs shown, the front side (i.e., the component side) of component 150 may include an electrical section 152, which includes a functional IC component and one or more sections 154 containing non-electrical circuitry. The sections 154 containing non-electrical circuitry may surround the electrical section 152, and these sections may correspond to portions of component 150 separated from or intersect with the electrical section 152. As described above, features (such as basic feature 111, first feature 112, and second feature 114) for aligning the layers of the stacked semiconductor assembly 105 are formed within the sections 154 containing non-electrical circuitry in such a way that they do not affect the functionality of the stacked semiconductor assembly 105. Thus, the features for alignment have a negligible effect on the operation of the stacked semiconductor assembly 105 and serve the purpose of aligning the dies (layers) of the stacked semiconductor assembly 105.

[0037] Figure 2 This is a more detailed cross-sectional view of the configuration of the optical inspection system 100. In various embodiments, the imaging device 101 may include a light source 118, a platform 104, a beam splitter 121, a first lens 120, a second lens 122, a third lens 123, and an imaging sensor 140. In various embodiments, an input beam 116 is provided via a light source 118 (such as an infrared (IR) light source) positioned above the platform 104, which passes through the first lens 120 and the beam splitter 121. In some embodiments, the light source 118 is configured to generate single-wavelength or multi-wavelength light that can be transmitted through the sample 124, such as infrared wavelengths used with samples comprising grains of silicon material. In one embodiment, the first lens 120 is a large field-of-view lens having a measurement field of view (or illumination area) slightly larger than the size of the light source 118.

[0038] The beam is guided from beam splitter 121 to second lens 122, where the beam is focused onto sample 124 positioned on platform 104. Platform 104 may include optical and motion control components, such as, for example, x-direction, y-direction, and rotational actuators. In one example, sample 124 may be a stacked semiconductor assembly 105 (… Figure 1AA first portion 130 of the light beam exiting beam splitter 121 is reflected from alignment features of the sample (e.g., base feature 111, first feature 112, and / or second feature 114), and a second portion 132 of the light beam exiting beam splitter 121 is reflected from the remainder of the sample 124. The first portion 130 and the second portion 132 are reflected toward a second lens 122 and focused into beam splitter 121. Beam splitter 121 guides the first portion 130 and the second portion 132 to imaging sensor 140. In various embodiments, both portions of the reflected light guided to imaging sensor 140 by beam splitter 121 may be focused onto imaging sensor 140 by a third lens 123. Based on the received reflected light and the contrast between the material of the features at the inspection wavelength of the light and the material of each layer of the stacked semiconductor assembly (e.g., base substrate 108, first die 109, and second die 110), imaging sensor 140 can generate an image of sample 124. Using the resulting images and image processing algorithms, controller 126 (FIG. 1) can determine the characteristics of sample 124, such as the location and critical dimensions of features, and the OVL measurement of features. Using the determined characteristics, controller 126 provides updated alignment instructions to robot end effector system 106 to locate and align components of the same stacked semiconductor assembly (e.g., base substrate and / or die), which will be described in more detail below.

[0039] In one embodiment, the second lens 122 and the third lens 123 are large field-of-view lenses, having a measurement field of view (or illumination area) slightly larger than the size of the sample 124, allowing the entire sample image to be acquired by the imaging sensor 140 without scanning light and / or the moving platform 104. The second lens 122 and the third lens 123 may be telecentric lenses, such that light rays traveling from the second lens 122 to the sample 124 and from the third lens 123 to the imaging sensor 140 are substantially parallel to the optical axis substantially perpendicular to the surface of the sample 124. This provides substantially normal illumination over the entire sample 124 or across the entire measurement area. This can reduce measurement errors because the illumination angles are approximately the same.

[0040] In some embodiments, the field of view of the second lens 122 is smaller than the diameter of the sample 124. In this case, the region (or measurement region) is imaged, and movable optics and / or the sample 124 and / or scannable optical modules are used to image adjacent fields of view. Depending on the application, the size of the measurement region may be approximately the same as the size of the grain or stepper region. Adjacent images can be stitched together using known techniques to provide multi-field or full-sample images.

[0041] Imaging sensor 140 may be a region imaging sensor, which includes one or more digital cameras (e.g., CCD-based cameras) for capturing light reflected from sample 124. Imaging sensor 140 provides an image of sample 124 based on the received light. In some embodiments, imaging sensor 140 may include a single camera configured to image the entire surface of sample 124. In other embodiments, imaging sensor 140 may include multiple cameras, each imaging a neighboring or slightly overlapping field of view (or measurement area) on sample 124. Adjacent images may be stitched together using known techniques. Image resolution can be increased by using a higher resolution imaging sensor or by using multiple imaging sensors, each imaging sensor imaging a smaller field of view. Using the images generated by the imaging sensor, controller 126 ( Figure 1A Image processing algorithms can be used to determine the location of features formed on layers of stacked semiconductor components and to determine OVL measurements between features. Based on the OVL measurements, controller 126 determines the robot end effector system 106 ( Figure 1A Updated alignment instructions for platform 104 and / or platform 104 for aligning layers of the same stacked semiconductor assembly. In one example, the updated alignment instructions include instructions for shifting and / or rotating different layers of the same stacked semiconductor assembly along the x, y, and z axes based on OVL measurements of sample 124 (i.e., stacked semiconductor assembly 105), which will be described in more detail below.

[0042] Grain alignment method

[0043] Figure 4 This is a diagram illustrating a method 400 for forming a stacked semiconductor assembly according to one or more embodiments. Method 400 can be performed using the optical inspection system 100 described above or any other optical inspection system. Aspects of method 400 are... Figures 5A to 5E It is shown schematically in the diagram. Figures 5A to 5E This is a schematic cross-sectional view of a portion of the stacked semiconductor assembly 500 during a method for aligning the stacked semiconductor assembly 500.

[0044] At point 402, the first die 514 is positioned and bonded to the base substrate 504. The base substrate can utilize the robot end effector system 106. Figure 1A Positioned and fixed on platform 104 ( Figures 1A to 3 The first die 514 can be bonded to the base substrate 504 by any suitable bonding method, including but not limited to microbump bonding, hybrid bonding, or the like.

[0045] like Figure 5AAs shown, basic feature 502 may be formed on base substrate 504. In some embodiments, base substrate 504 may include an interposer, bridging substrate, hybrid bonding substrate, or other similar substrate. Base substrate 504 may contain any suitable material for forming stacked semiconductor components, including but not limited to silicon (Si), silicon dioxide (SiO2), doped SiO2, fused silica, quartz, silicon carbide (SiC), glass, or the like. As mentioned above, basic feature 502 is configured to have a negligible effect on the operation of the stacked semiconductor components and for the purpose of aligning subsequent dies to be stacked over base substrate 504. Basic feature 502 may be formed on base surface 503 of base substrate 504. In one example, base surface 503 may be a side of base substrate 504 where elements are formed (i.e., the front side of base substrate 504). If basic feature 502 is formed on the front side, basic feature 502 may be in a segment 154 containing non-electrical circuitry on base surface 503 of base substrate 504, away from (and separated from) the elements. Figure 1B On the other hand, the basic feature 502 can be formed on the section 154 of the base substrate 504 containing non-electrical circuits that is interspersed with the grains.

[0046] The basic feature 502 can be formed by at least the following steps: patterning the front side of the base substrate 504 to have the basic feature 502 using any suitable lithography and etching method; depositing material into the patterned basic feature 502, such as a metal (e.g., aluminum, titanium, tantalum, tungsten) or other useful material that provides contrast relative to the base substrate material (e.g., silicon) at the inspection wavelength of light; and subsequently performing chemical mechanical planarization (CMP) on the front side of the base substrate 504. The basic feature 502 can be formed on the front side of the base substrate 504 simultaneously with components or using separate processes.

[0047] In other instances, the base surface 503 may be the back side of the base substrate 504. In an instance where the base feature 502 is formed on the back side of the base substrate 504, the base feature 502 may be formed by at least the following steps: flipping the base substrate 504, grinding the back side of the base substrate 504 downward to a certain thickness, patterning the back side of the base substrate 504 to form the base feature 502 using any suitable lithography and etching method, depositing material (such as metal) into the base feature 502, and subsequently performing chemical mechanical planarization on the back side of the base substrate 504.

[0048] The basic feature 502 may have any suitable cross-sectional shape for aligning layers of the stacked semiconductor assembly 500. For example, the basic feature 502 may have a square, rectangular, circular, plus-shaped cross-section, or the like. The basic feature has a basic critical dimension 510, which is relative to the alignment direction (such as the direction in the xy plane) of the various components within the semiconductor assembly. Figure 5B )) Measured.

[0049] like Figure 5B As shown, the first die 514 may include a first feature 512. The first feature 512 may be formed on a first surface 513 of the first die 514. The first die 514 may contain any suitable material for forming a stacked semiconductor assembly. The first die 514 may be made of the same or different material as the base substrate 504. In one example, the first surface 513 may be the side of the first die 514 where an IC element is formed (i.e., the front side of the first die 514). If the first feature 512 is formed on the front side, the first feature 512 may be in a segment 154 containing non-electrical circuitry on the first surface 513 of the first die 514, away from (and separated from) the formed IC element. Figure 1B On the other hand, the first feature 512 may be formed on a segment 154 of the first die 514 containing non-electrical circuitry interspersed with the element. The first feature 512 may be formed by at least the following steps: patterning the front side of the first die 514 to have the first feature 512 using any suitable lithography and etching method, depositing material into the first feature 512, such as a metal or other useful material that provides contrast relative to the material forming the first die 514, and subsequently performing chemical mechanical planarization on the front side of the first die 514. The first feature 512 may be formed on the front side of the first die 514 simultaneously with the element or using a separate process.

[0050] In other instances, the first surface 513 may be the back side of the first grain 514. In an instance where the first feature 512 is formed on the back side of the first grain 514, the first feature 512 is formed by at least the following steps: flipping the first grain 514, grinding the back side of the first grain 514 to a certain thickness, patterning the back side of the first grain 514 to have the first feature 512 using any suitable lithography, etching, or polishing method, depositing material (such as metal) into the formed first feature 512, and subsequently performing chemical mechanical planarization on the back side of the first grain 514.

[0051] The first die 514 and the base substrate 504 can be stacked in such a way that the first surface 513 and the base surface 503 face each other (i.e., are directly adjacent to each other).

[0052] The first feature 512 can be used to connect the first die 514 with the base substrate 504 and with the second die 524. Figure 5D ( ) Any suitable cross-sectional shape for alignment. For example, the first feature 512 may have a square, rectangular, circular, plus sign-shaped cross-section, or similar. The first feature 512 and the basic feature 502 may have the same or different cross-sectional shapes.

[0053] In one example, the first feature 512 has a first critical dimension 520 measured relative to the alignment direction (e.g., the xy plane) of the first grain 514 to the base substrate 504. In some embodiments, the size of the first critical dimension 520 may be larger than the basic critical dimension 510. In other words, from a top-down view of an optical inspection system (such as optical inspection system 100) Figure 5C The basic feature 502 can be fitted within the first feature 512 and can be used to align the first die 514 with the base substrate 504.

[0054] At point 404, the relative displacement between a feature on the first die 514 and a feature on the base substrate 504 is determined. For example, the relative displacement between the first feature 512 and the base feature 502 can be determined using an optical inspection system (such as optical inspection system 100). Figure 5C As shown, the optical inspection system 100 generates an image 501 of a portion of the stacked semiconductor assembly 500. In one example, image 501 is a top-down view of a portion of the stacked semiconductor assembly 500. In one example, image 501 is parallel to a plane parallel to a base surface 503. Image 501 corresponds to a moment after the first die 514 is bonded to the base substrate 504. Image 501 includes at least a portion of a base feature 502 and a first feature 512. In one example, the base feature 502 and the first feature 512 have a circular cross-sectional shape as seen when the feature is viewed in a direction orthogonal to the alignment direction (e.g., a direction in the xy plane). Thus, image 501 includes two circles. Controller 126 can then determine the relative displacement between the base feature 502 and the first feature 512 based on image 501 and using an image processing algorithm. Controller 126 can determine an OVL measurement between the first feature 512 and the base feature 502 based on the relative displacement between the first feature 512 and the base feature 502. In one example, the OVL measurement between the first feature 512 and the base feature 502 may include a first distance 527 measured from at least one point of interest (POI) (such as POI 511) located on the outer peripheral surface 522 of the first feature 512 to the center 507 of the base feature 502. The POI may be determined based on image analysis performed by one or more software applications running on the controller 126.

[0055] At activity 406, controller 126 (FIG. 1) determines updated alignment instructions. In one instance, controller 126 stores the updated alignment instructions in its memory and provides updated alignment instructions when stacking / bonding the first die to a base substrate of the same stacked semiconductor assembly. In one instance, the updated alignment instructions are based on the relative displacement between a feature on the first die 514 and a base feature 502 on the base substrate 504. The updated instructions result in the first die being aligned to the base substrate of the same stacked semiconductor assembly. For example, as shown by arrow 407, activities 402 and 404 can be repeated, and the first die can be bonded to the base substrate of the same (subsequent) stacked semiconductor assembly using the appropriate alignment based on the updated alignment instructions. In other words, controller 126 stacks the first die onto the base substrate of the same semiconductor assembly based on the OVL measurement between base feature 502 and first feature 512 and using robot end effector system 106 and / or platform 104 such that the OVL measurement equals the predetermined distance stored in the memory of controller 126. For example, updated alignment instructions result in the base substrate and first die of the same stacked semiconductor assembly being stacked such that the base feature is centered within the first feature. For example, updated alignment instructions include instructions for shifting and / or rotating the first die and / or base substrate of the same stacked semiconductor element along the x, y, and / or z axes until the center of the base feature (i.e., center 507) is centered within the first feature of the same stacked semiconductor element. A predetermined distance may be determined based on a first critical dimension 520. In some instances, the predetermined distance is a fraction of the first critical dimension 520. For example, if the cross-sectional shape of the first feature 512 is circular, then the first distance 527 may be equal to the radius of the cross-sectional shape of the first feature 512, which is half the first critical dimension 520 (i.e., the diameter of the first feature 512).

[0056] At point 408, the second die 524 is stacked and bonded to the first die 514. The second die 524 can be positioned onto the first die 514 using the robot end effector system 106. The second die 524 can be bonded to the first die 514 by any suitable bonding method, including but not limited to microbump bonding, hybrid bonding, or the like.

[0057] like Figure 5DAs shown, the second die 524 may include a second feature 526. The second feature 526 may be formed on a first surface 523 of the second die 524. In one example, the first surface 523 may be a side of the second die 524 where elements are formed (i.e., the front side of the second die 524). The second die 524 and the first die 514 may be aligned such that the first surface 523 and the second surface 515 of the first die 514 face each other (i.e., directly adjacent to each other). If the second feature 526 is formed on the front side, the second feature 526 may be formed on a region of the first surface 523 containing non-electrical circuitry (such as segment 154 containing non-electrical circuitry) such that it has a negligible effect on the functionality of the stacked semiconductor assembly 500. The second feature 526 may be formed by the following steps: patterning the front side of the second die 524 to have the second feature 526 using any suitable patterning process, depositing material (such as a metal) into the second feature 526, and subsequently performing chemical mechanical planarization. The second feature 526 may be formed on the front side of the second die 524 simultaneously with the element or using a separate process.

[0058] In other instances, the first surface 523 may be the back side of the second grain 524. In an instance where the second feature 526 is formed on the back side of the second grain 524, the second feature 526 may be formed by the following steps: grinding the back side of the second grain 524 to a certain thickness, patterning the back side of the second grain 524 to have the second feature 526 using any suitable patterning method, depositing material (such as a metal) into the second feature 526, and subsequently performing chemical mechanical planarization on the back side of the second grain 524.

[0059] The second feature 526 can be any suitable cross-sectional shape that can be used to align stacked semiconductor components on the base substrate 504. For example, when viewed in a direction orthogonal to the surface forming the second feature (such as the xy plane), the second feature 526 can have a square, rectangular, circular, plus-shaped cross-section, or similar. Figure 5B or Figure 5D The second feature 526, the first feature 512, and / or the basic feature 502 may have the same or different cross-sectional shapes.

[0060] In one example, the second feature 526 has a second critical dimension 530, which is measured in a direction parallel to the surface forming the second feature or in a direction perpendicular to the normal direction. The second critical dimension 530 may be larger than the first critical dimension 520. In other words, from a top-down view of an optical inspection system (such as optical inspection system 100), the first feature 512 may fit within the second feature 526 and may be used to align the second die 524 with the first die 514. The second die 524 may contain any suitable material for forming a stacked semiconductor assembly. The material of the second die 524 may be the same as or different from that of the base substrate 504 and / or the first die 514.

[0061] At point 410, the relative displacement between the positions of the first feature 512 on the first grain 514 and the second feature 526 on the second grain 524 is determined. For example... Figure 5E As shown, the optical inspection system 100 generates an image 505 of a portion of the stacked semiconductor assembly 500. In one example, image 505 is parallel to a plane parallel to a base surface 503. Image 505 corresponds to a moment after the second die 524 is bonded to the first die 514. Image 505 includes at least a portion of a first feature 512 and a second feature 526. In one example, the second feature 526 has a circular cross-sectional shape. Because a second critical dimension 530 is greater than a first critical dimension 520, which is greater than a base critical dimension 510, depending on the transparency of the base substrate and the die at the emitted light source wavelength, base feature 502, first feature 512, and second feature 526 are all visible in image 505. Each of the features having a different reflectivity or transmittance than the material disposed around the feature within the base substrate or die is visible because the cross-sectional shape of base feature 502 can fit within the cross-sectional shape of first feature 512, which can fit within the cross-sectional shape of second feature 526. The controller 126 may then determine the relative displacement between the first feature 512 and the second feature 526 based on the image 505 and using an image processing algorithm. The controller 126 may determine an OVL measurement between the first feature 512 and the second feature 526 based on the relative displacement between the first feature 512 and the second feature 526. The OVL measurement between the first feature 512 and the second feature 526 may include a second distance 537 measured from at least one point of interest (POI) (such as POI 521) located on the outer peripheral surface 532 of the second feature 526 to the center 517 of the first feature 512 or the center 507 of the base feature 502.

[0062] At activity 412, controller 126 (FIG. 1) determines updated alignment instructions. In one instance, controller 126 saves the updated alignment instructions to its memory and provides updated alignment instructions when a second die is stacked / bonded to a first die of the same stacked semiconductor assembly. In one instance, the updated alignment instructions are based on the relative displacement between second feature 526 and first feature 512. In another instance, the updated alignment instructions are based on the relative displacement between first feature 512 and base feature 502. The updated alignment instructions result in the second die being aligned to the first die of the same stacked semiconductor assembly. For example, as shown by arrow 413, activities 408 and 410 can be repeated, and the second die can be bonded to the first die of the same (subsequent) stacked semiconductor assembly using the appropriate alignment based on the updated alignment instructions. In other words, controller 126 aligns a second die of the same stacked semiconductor assembly onto the first die based on the OVL measurement between the first feature 512 and the second feature 526 and using robot end effector system 106 and / or platform 104, such that the first feature 512 is centered within the second feature 526. For example, updated alignment instructions include instructions for shifting and / or rotating the second die and / or the first die of the same stacked semiconductor assembly along the x, y, and / or z axes until the center of the first feature (i.e., center 517) is centered within the second feature of the same stacked semiconductor assembly. In other words, the second die is stacked onto the first die of the same stacked semiconductor assembly such that the relative distance between the second die and the first die (i.e., the second distance 537) is equal to a predetermined distance stored in the memory of controller 126. The predetermined distance can be determined based on a second critical dimension 530 in the same manner as described above with respect to the first distance 527.

[0063] At activity 414, the third die 534 is stacked and bonded to the second die 524. The third die 534 can be positioned onto the second die 524 using the robot end effector system 106. The third die 534 can be bonded to the second die 524 by any suitable bonding method, including but not limited to microbump bonding, hybrid bonding, or the like.

[0064] like Figure 5FAs shown, the third die 534 may include a third feature 536. The third feature 536 may be formed on a first surface 535 of the third die 534. In one example, the first surface 535 may be a side of the third die 534 in which an element is formed (i.e., the front side of the third die 534). The third die 534 and the second die 524 may be aligned such that the first surface 535 and the second surface 525 of the second die 524 face each other (i.e., directly adjacent to each other). If the third feature 536 is formed on the front side, the third feature 536 may be formed on a region of the first surface 535 containing non-electrical circuitry (such as segment 154 containing non-electrical circuitry) such that it has a negligible effect on the functionality of the stacked semiconductor assembly 500. The third feature 536 may be formed by the following steps: patterning the front side of the third die 534 to have the third feature 536 using any suitable patterning process, depositing material (such as a metal) into the third feature 536, and subsequently performing chemical mechanical planarization. The third feature 536 may be formed on the front side of the third die 534 simultaneously with the component or using a separate process.

[0065] In other instances, the first surface 535 may be the back side of the third grain 534. In an instance where the third feature 536 is formed on the back side of the third grain 534, the third feature 536 is formed by the following steps: grinding the back side of the third grain 534 to a certain thickness, patterning the back side of the third grain 534 to have the third feature 536 using any suitable patterning method, depositing material (such as a metal) into the third feature 536, and subsequently performing chemical mechanical planarization on the back side of the third grain 534.

[0066] The third feature 536 can be any suitable cross-sectional shape that can be used to align stacked semiconductor components on the base substrate 504. For example, when viewed in a direction orthogonal to the surface forming the third feature 536 (such as the xy plane), the third feature 536 can have a square, rectangular, circular, plus-shaped cross-section, or similar. Figure 5B or Figure 5D The third feature 536, the second feature 526, the first feature 512, and / or the basic feature 502 may have the same or different cross-sectional shapes.

[0067] In one example, the third feature 536 has a third critical dimension 540, which is measured in a direction parallel to the surface forming the third feature 536 or in a direction perpendicular to the normal direction. The third critical dimension 540 may be larger than the second critical dimension 530 and the first critical dimension 510. In other words, from a top-down view of an optical inspection system (such as optical inspection system 100), the second feature 526 may fit within the third feature 536 and may be used to align the third die 534 with the second die 524. The third die 534 may contain any suitable material for forming a stacked semiconductor assembly. The third die 534 may be made of the same or different material from the base substrate 504, the first die 514, and / or the second die 524.

[0068] At activity 416, the relative displacement between the positions of the second feature 526 on the second die 524 and the third feature 536 on the third die 534 is determined. As mentioned above, due to the cross-sectional shape and critical dimensions of each of the features, the base feature 502 can fit within the cross-sectional shape of the first feature 512, the first feature 512 can fit within the cross-sectional shape of the second feature 526, and the second feature 526 can fit within the cross-sectional shape of the third feature 536. In the same manner as described above, the controller 126 can generate an image of the stacked semiconductor assembly 500 and use an image processing algorithm to determine the relative displacement between the second feature 526 and the third feature 536. The controller 126 can determine the OVL measurement between the second feature 526 and the third feature 536 based on the relative displacement between the second feature 526 and the third feature 536.

[0069] At activity 418, controller 126 (FIG. 1) determines an updated alignment instruction. In one instance, controller 126 saves the updated alignment instruction to its memory and provides the updated alignment instruction when a third die is stacked / bonded to a second die of the same stacked semiconductor assembly. In one instance, the updated alignment instruction is based on the relative displacement between third feature 536 and second feature 526. The updated alignment instruction results in the third die being aligned to the second die of the same stacked semiconductor assembly. For example, as shown by arrow 419, activities 414 and 416 can be repeated, and the third die is bonded to the second die of the same (subsequent) stacked semiconductor assembly using the appropriate alignment based on the updated alignment instruction. In other words, controller 126 aligns the third die of the same stacked semiconductor assembly to the second die based on the OVL measurement between second feature 526 and third feature 536 and using robot end effector system 106 and / or platform 104, such that second feature 526 is centered within third feature 536. For example, the updated alignment instructions include instructions for shifting and / or rotating a third die and / or a second die of the same stacked semiconductor assembly along the x, y, and / or z axes until the center of the second feature is centered within the third feature of the same stacked semiconductor assembly. In other words, the third die is stacked on top of the second die of the same stacked semiconductor assembly such that the relative distance between the third die and the second die is equal to a predetermined distance stored in the memory of the controller 126.

[0070] In some embodiments, multiple features are formed in and distributed across the surface of a base substrate or die to allow proper positioning and alignment of the die to the base substrate and / or to other dies. In one example, base surface 503 and first surface 513 each include at least two of base features 502 and first features 512 respectively positioned relative to each other in the +x direction, such that when properly positioned, the two concentric features set the xy position and angular alignment of the second die 524 to the base substrate 504. Therefore, in some embodiments, activity 412 may include additional activity of comparing the positions of more than one pair of mating features for properly positioning and aligning dies of identical stacked semiconductor components to the base substrate or for properly positioning and aligning first dies to second dies.

[0071] In some embodiments, multiple features are formed in and distributed across the surface of a base substrate or die to allow proper positioning and alignment of the die to the base substrate and / or to other dies. In one example, base surface 503 and first surface 513 each include at least two of base features 502 and first features 512 respectively positioned relative to each other in the +x direction, such that when properly positioned, the two pairs of concentric features set the xy position and angular alignment of the first die 514 to the base substrate 504. Therefore, in some embodiments, activity 412 may include additional activity of comparing the positions of more than one pair of mating features for properly positioning and aligning dies of identical stacked semiconductor components to the base substrate or for properly positioning and aligning the first die to a second die.

[0072] In another example, the first surface 523 further includes at least two second features 526, each positioned in the +x direction relative to at least two of the base feature 502 and the first feature 512, such that when correctly positioned, the three pairs of concentric features align the third die 534 to the base substrate 504 in xy position and angle. Therefore, in some embodiments, activity 416 may also include additional activity of comparing the positions of more than one pair of mating features for correctly positioning and aligning dies of identically stacked semiconductor components to the base substrate or correctly positioning and aligning a second die to a third die.

[0073] Alternative grain alignment methods

[0074] Figures 6A to 6E This is a schematic cross-sectional view of a portion of a stacked semiconductor assembly 500 during a method for forming a stacked semiconductor assembly. (Reference) Figure 4 describe Figures 6A to 6E .

[0075] At point 402, the first die 614 is positioned and bonded to the base substrate 604. The base substrate 604 can utilize the robot end effector system 106 ( Figure 1A ) and / or actuators coupled to platform 104 on platform 104 Figures 1A to 3 Position and fix it on the top.

[0076] like Figure 6AAs shown, feature 602, having a critical dimension 610, may be formed on a base substrate 604. In some embodiments, base substrate 604 may include an interposer, a bridging substrate, a hybrid bonding substrate, or other similar substrate. Base substrate 604 may contain any suitable material for forming a stacked semiconductor assembly, including but not limited to silicon (Si), silicon dioxide (SiO2), doped SiO2, fused silica, quartz, silicon carbide (SiC), glass, or the like. As mentioned above, feature 602 is configured to have a negligible effect on the operation of the stacked semiconductor assembly 600 and for the purpose of aligning subsequent dies to be stacked over base substrate 604. Feature 602 may be formed on a base surface 603 of base substrate 604. As described above, base surface 603 may be the front or back side of base substrate 604. Feature 602 may be formed in the same manner as described with respect to base feature 502. Feature 602 may be any suitable cross-sectional shape that can be used to align additional dies within the stacked semiconductor assembly on base substrate 604. For example, feature 602 may have a cross-section that is square, rectangular, circular, plus sign shaped, or similar.

[0077] like Figure 6B As shown, the first die 614 may include a feature 612 formed on a first surface 613 of the first die 614 and a feature 626 formed on a second surface 615 of the first die 614. The second surface 615 is on a side of the first die 614 opposite to the first surface 613. The first die 614 may contain any suitable material for forming a stacked semiconductor assembly. The first die 614 may be the same as or different from the base substrate 604. In one example, feature 612 has a critical dimension 620, and feature 626 has a critical dimension 621, which is measured relative to the alignment direction (e.g., the xy plane) of the first die 614 to the base substrate 604. In some embodiments, the critical dimension 621 may be greater than the critical dimension 620. The critical dimension 620 may be less than the critical dimension 610. The critical dimension 610 may be equal to or may not be equal to the critical dimension 621.

[0078] The first die 614 and the base substrate 604 can be stacked such that the first surface 613 and the base surface 603 face each other (i.e., directly adjacent to each other). In some embodiments, the first die 614 and the base substrate 604 are aligned based on features 602 and 612. The first die 614 and the base substrate 604 can be aligned by centering feature 612 within feature 602. Feature 612 can be positioned on the first surface 613 such that when the feature is centered within feature 602, the base substrate 604 and the first die 614 are aligned. In one example, feature 626 is used to connect the first die 614 and the second die 624 (…). Figure 6DAlignment. Thus, feature 626 can be horizontally offset from feature 612 by a horizontal distance 619, which is measured relative to the alignment direction (such as the direction in the xy plane) of the various components within the semiconductor assembly, such that when aligning the first die 614 and the second die 624 ( Figure 6D Feature 626 does not cover feature 602 in the image captured by the optical inspection system 100. Horizontal distance 619 can be measured between centerlines 608 and 609. Centerline 608 can be oriented in the vertical direction (i.e., the z-axis) and intersects the center of feature 612. Centerline 609 can be oriented in the vertical direction and intersects the center of feature 626. Figure 6B As shown, if the first die 614 and the base substrate 604 are aligned, the center line 608 can coincide with the center line 607. The center line 607 can be oriented in the vertical direction and intersect the center of the feature 602.

[0079] In one instance, feature 602 and feature 626 may have the same cross-sectional shape and equal critical dimensions. In another instance, feature 612 may have the same or different cross-sectional shape as feature 602 and / or feature 626.

[0080] At point 404, the relative displacement between a feature on the first die 614 and a feature on the base substrate 604 is determined. For example, the relative displacement between feature 612 and feature 602 can be determined using an optical inspection system (such as optical inspection system 100). Figure 6CAs shown, the optical inspection system 100 generates an image 601 of a portion of the stacked semiconductor assembly 600. In one example, image 601 is a top-down view of a portion of the stacked semiconductor assembly 600. In one example, image 601 is parallel to a plane parallel to the base surface 603. Image 601 corresponds to a moment after the first die 614 is bonded to the base substrate 604. In one example, image 601 includes at least a portion of features 602 and 612. In another example, image 601 includes at least a portion of feature 626. In one example, each of the features has a circular cross-sectional shape as seen when the feature is viewed in a direction orthogonal to the alignment direction (e.g., a direction in the xy plane). Advantageously, because the critical dimension 620 is smaller than the critical dimension 610, feature 612 does not cover feature 602 even though feature 612 is positioned above feature 602. Furthermore, because feature 626 is horizontally offset from feature 612, feature 626 does not cover feature 612. Controller 126 may use image processing algorithms to determine the relative displacement between feature 602 and feature 612 based on image 601. Controller 126 may determine an OVL measurement between feature 612 and feature 602 based on the relative displacement between them. In one example, the OVL measurement between feature 612 and feature 602 may include a first distance 627 measured from at least one point of interest (POI) (such as POI 611) located on the outer peripheral surface 622 of feature 612 to the centerline 607. POI 611 may be determined based on image analysis performed by one or more software applications running on controller 126.

[0081] At activity 406, controller 126 (FIG. 1) determines updated alignment instructions. In one instance, controller 126 stores the updated alignment instructions in its memory and provides updated alignment instructions when stacking / bonding the first die to the base substrate of the same stacked semiconductor assembly. In one instance, the updated alignment instructions are based on the relative displacement between feature 602 and feature 612. The updated alignment instructions result in the first die being aligned to the base substrate of the same stacked semiconductor assembly. For example, as shown by arrow 407, activities 402 and 404 can be repeated, and the first die can be bonded to the base substrate of the same (subsequent) stacked semiconductor assembly using the appropriate alignment based on the updated alignment instructions. In other words, controller 126 uses robot end effector system 106 and / or platform 104 to stack the first die onto the base substrate of the same stacked semiconductor assembly such that the OVL measurement between feature 612 and feature 602 of the same stacked semiconductor assembly is equal to a predetermined distance stored in the memory of controller 126. In some embodiments, the first die 614 and / or the base substrate 604 are shifted and / or rotated along the x, y, and / or z axes until feature 612 is centered within feature 602. For example, the first die is stacked onto the base substrate of the same stacked semiconductor assembly such that the OVL measurement (i.e., the first distance) between feature 612 and feature 602 is equal to a first predetermined distance away from the centerline 607 of the same stacked semiconductor assembly. The first predetermined distance can be determined based on critical dimension 610 and stored in the memory of controller 126. In some instances, the first predetermined distance is a fraction of critical dimension 610. For example, if the cross-sectional shape of feature 602 is circular, the first predetermined distance can be equal to the radius of the cross-sectional shape of feature 602, which is half the critical dimension 610 (i.e., the diameter of feature 602). Furthermore, feature 626 is located at a horizontal distance 619 away from the centerline 609.

[0082] At point 408, the second die 624 is stacked and bonded to the first die 614. The second die 624 can be positioned onto the first die 614 using the robot end effector system 106.

[0083] like Figure 6DAs shown, the second grain 624 may include a feature 628 formed on a first surface 623 of the second grain 624 and a feature 630 formed on a second surface 625 of the second grain 624. The second surface 625 is on a side of the second grain 624 opposite to the first surface 623. Feature 628 may have a critical size 640, and feature 630 may have a critical size 641, these critical sizes being measured in a direction parallel to the surfaces forming features 628 and 630 or in a direction perpendicular to the normal direction. Critical size 641 may be greater than critical size 640. Critical size 640 may be less than critical size 621. Critical sizes 610, 621, and 641 may be equal to or unequal to each other. The second grain 624 and the first grain 614 may be positioned such that the second surface 615 and the first surface 623 face each other (i.e., directly adjacent to each other). In one example, a second die and a first die of the same stacked semiconductor assembly can be aligned based on features 626 and 628. Feature 628 is positioned on a first surface 623 such that when the feature is centered within feature 626, it aligns the second die 624 and the first die 614. Feature 630 can be offset from feature 628 by a horizontal distance 629, which is measured relative to the alignment direction (such as a direction in the xy plane) of the various components within the semiconductor assembly. The horizontal distance 629 can be measured between center lines 616 and 617. Center line 616 is oriented in the vertical direction and intersects the center of feature 628. Figure 6D As shown, if the second grain 624 and the first grain 614 are aligned, then the center line 616 coincides with the center line 609. The center line 617 may be oriented in the vertical direction and intersect the center of the feature 630. The horizontal distances 619 and 629 may be different or equal to each other.

[0084] At point 410, the relative displacement between the feature on the first grain 614 and the feature on the second grain 624 is determined. For example... Figure 6E As shown, the optical inspection system 100 generates an image 605 of a portion of the stacked semiconductor assembly 600. In one example, image 605 is a top-down view of a portion of the stacked semiconductor assembly 600. In one example, image 605 is parallel to a plane parallel to the base surface 503. Image 605 corresponds to a moment after the second die 624 is bonded to or over the first die 614. In one example, image 605 includes at least a portion of features 602, 612, 626, and 628. In another example, image 605 includes at least a portion of each of the features formed on the base substrate 604 and the first die 614.

[0085] In one example, features 602, 612, 626, 628, and 630 have a circular cross-sectional shape. The critical dimension 640 is smaller than the critical dimension 621, so even though feature 628 is positioned above feature 626, feature 628 does not cover feature 626. Furthermore, because feature 630 is horizontally offset from feature 628, feature 630 does not cover feature 628. Additionally, because features 602 and 612 are horizontally offset from features 626, 628, and 630, features 626, 628, and 630 do not cover features 602 and 612. Because the critical dimension 620 is smaller than the critical dimension 610, feature 612 does not cover feature 602. Advantageously, depending on the transparency of the base substrate and the die at the wavelength of the emitted light source, each of the features can be observed in image 605.

[0086] In one example, controller 126 may subsequently use image 605 to determine at least the relative displacement between features 626 and 628. Controller 126 may use image processing algorithms to determine an OVL measurement between features 626 and 628 based on the relative displacement between them. The OVL measurement between features 626 and 628 may include a second distance 637 measured from at least one point of interest (POI) (such as POI 631) located on the outer peripheral surface 632 of feature 626 to the centerline 616. In another example, as described above, image 605 may be used to determine an OVL measurement between features 602 and 612.

[0087] At activity 412, controller 126 (FIG. 1) determines updated alignment instructions. In one instance, controller 126 saves the updated alignment instructions to its memory and provides updated alignment instructions when a second die is stacked / bonded to a first die of the same stacked semiconductor assembly. In one instance, the updated alignment instructions are based on the relative displacement between features 626 and 628. The updated alignment instructions result in the alignment of the second and first dies of the same stacked semiconductor assembly. For example, as shown by arrow 413, activities 408 and 410 can be repeated, and the second die is bonded to the first die of the same (subsequent) stacked semiconductor assembly using the appropriate alignment based on the updated alignment instructions. In other words, controller 126 of robot end effector system 106 and / or platform 104 aligns the second and first dies of the same stacked semiconductor assembly based on OVL measurements between features 626 and 628. For example, the updated alignment instructions include instructions for shifting and / or rotating a second die and / or a first die of the same stacked semiconductor assembly along the x, y, and / or z axes until feature 628 is centered within feature 626 of the same stacked semiconductor assembly. In other words, the second die is stacked on top of the first die of the same stacked semiconductor assembly such that a second distance 637 is a second predetermined distance away from the centerline 609. The second predetermined distance may be equal to or may not be equal to the first predetermined distance and is stored in the memory of the controller 126.

[0088] At point 414, the third die 634 is stacked and bonded to the second die 624. The third die 634 can be positioned onto the second die 624 using the robot end effector system 106.

[0089] like Figure 6FAs shown, the third grain 634 may include a feature 638 formed on a first surface 633 of the third grain 634 and a feature 660 formed on a second surface 635 of the third grain 634. The second surface 635 is on a side of the third grain 634 opposite to the first surface 633. Feature 638 may have a critical size 650, and feature 660 may have a critical size 651, these critical sizes being measured in a direction parallel to the surfaces forming features 638 and 660 or in a direction perpendicular to the normal direction. Critical size 651 may be greater than critical size 650. Critical size 650 may be less than critical size 641. Critical sizes 610, 621, 641, and 651 may be equal to or unequal to each other. The third grain 634 and the second grain 624 may be positioned such that the second surface 625 and the first surface 633 face each other (i.e., directly adjacent to each other). In one example, the second and first dies of the same stacked semiconductor assembly can be aligned based on features 630 and 638. Feature 638 is positioned on the first surface 633 such that when the feature is centered within feature 630, it aligns with the third die 634 and the second die 624. Feature 660 can be offset from feature 638 by a horizontal distance 659, which is measured relative to the alignment direction (such as a direction in the xy plane) of the various components within the semiconductor assembly. The horizontal distance 659 can be measured between centerline 657 and centerline 661. Centerline 657 is oriented in the vertical direction and intersects the center of feature 638. Figure 6F As shown, if the third grain 634 and the second grain 624 are aligned, then the center line 657 coincides with the center line 617. The center line 657 may be oriented in the vertical direction and intersect the center of the feature 660. The horizontal distances 629 and 659 may be different or equal to each other.

[0090] At activity 416, the relative displacement between features on the second die 624 and features on the third die 634 is determined. As mentioned above, the optical inspection system 100 generates an image of a portion of the stacked semiconductor assembly 600. In one example, the image is a top-down view of a portion of the stacked semiconductor assembly 600. In one example, the image is parallel to a plane parallel to the base surface 503. The image is mapped at a time after the third die 634 is bonded to or over the second die 624. In one example, the image includes at least a portion of features 602, 612, 626, 628, 630, and 638. In another example, the image includes at least a portion of each of the features formed on the base substrate 604 and the third die 634.

[0091] In one example, features 602, 612, 626, 628, 630, 638, and 660 have a circular cross-sectional shape. The critical dimension 650 is smaller than the critical dimension 641, so even though feature 638 is positioned above feature 630, feature 638 does not cover feature 630. Furthermore, because feature 660 is horizontally offset from feature 638, feature 660 does not cover feature 638. Advantageously, depending on the transparency of the base substrate and the die at the wavelength of the emitted light source, each of the features can be observed in the image.

[0092] In one instance, controller 126 may subsequently use the imagery to determine at least the relative displacement between features 630 and 638. Controller 126 may use image processing algorithms to determine the OVL measurement between features 630 and 638 based on the relative displacement between them.

[0093] At activity 418, controller 126 (FIG. 1) determines updated alignment instructions. In one instance, controller 126 saves the updated alignment instructions to its memory and provides updated alignment instructions when a third die is stacked / bonded to a second die of the same stacked semiconductor assembly. In one instance, the updated alignment instructions are based on the relative displacement between feature 630 and feature 638. The updated alignment instructions result in the alignment of the third and second dies of the same stacked semiconductor assembly. For example, as shown by arrow 419, activities 414 and 416 can be repeated, and the third die is bonded to the second die of the same (subsequent) stacked semiconductor assembly using the appropriate alignment based on the updated alignment instructions. In other words, controller 126 of robot end effector system 106 and / or platform 104 aligns the third and second dies of the same stacked semiconductor assembly based on OVL measurements between feature 630 and feature 638. For example, updated alignment instructions include instructions for shifting and / or rotating a third and / or second die of the same stacked semiconductor assembly along the x, y, and / or z axes until feature 630 is centered within feature 638 of the same stacked semiconductor assembly. This process can be repeated for each layer of the stacked semiconductor assembly 600.

[0094] In some embodiments, multiple features are formed in and distributed across the surface of a base substrate or die to allow proper positioning and alignment of the die to the base substrate and / or to other dies. For example, base surface 603 and first surface 613 each include at least two of features 602 and 612 positioned relative to each other in the +x direction, such that when properly positioned, the two pairs of concentric features set the xy position and angular alignment of the first die 614 to the base substrate 604. In another example, second surface 615 and first surface 613 include at least two of features 626 and at least two of features 628 positioned relative to each other in the +x direction, such that when properly positioned, the two pairs of concentric features set the xy position and angular alignment of the second die 624 to the first die 614. In another example, the second surface 625 and the first surface 633 include at least two of the features 630 and at least two of the features 638 that are positioned relative to each other in the +x direction, such that when correctly positioned, the two pairs of concentric features set the xy position and angle alignment of the third grain 634 to the second grain 624.

[0095] Therefore, in some embodiments, activities 412 and 418 may include additional activities for comparing the positions of more than one pair of mating features for properly positioning and aligning the dies of the same stacked semiconductor components to the base substrate, properly positioning and aligning the first die to the second die, and / or properly positioning and aligning the second die to the third die.

[0096] Alternative grain alignment methods

[0097] Figures 7A to 7E This is a schematic cross-sectional view of a portion of the stacked semiconductor component 700 during a method for forming the stacked semiconductor component 700. Figures 7A to 7E refer to Figure 4 describe.

[0098] At point 402, the first die 714 is positioned and bonded to the base substrate 704. The base substrate 704 can be used with the robot end effector system 106. Figure 1A ) on platform 104 ( Figures 1A to 3 Positioning and fixing on top.

[0099] like Figure 7AAs shown, feature 702, having a critical dimension 710, can be formed on a base substrate 704. The base substrate 704 may contain any suitable material for forming a stacked semiconductor assembly. In some embodiments, the base substrate 704 may include an interposer, a bridging substrate, a hybrid bonding substrate, or other similar substrate. The base substrate 704 may contain any suitable material for forming a stacked semiconductor assembly, including but not limited to silicon (Si), silicon dioxide (SiO2), doped SiO2, fused silica, quartz, silicon carbide (SiC), glass, or the like. As mentioned above, feature 702 is configured to have a negligible effect on the operation of the stacked semiconductor assembly 700 and is used for aligning subsequent dies to be positioned above the base substrate 704. Feature 702 can be formed on a base surface 703 of the base substrate 704. In one example, the base surface 703 may be a side of the base substrate 704 where elements are formed (i.e., the front side of the base substrate 704). If feature 702 is formed on the front side, feature 702 can be formed on a segment 154 containing non-electrical circuitry on the base surface 703 of the base substrate 704 interleaved with the die. Feature 702 can be formed on the front side of the base substrate 704 simultaneously with IC elements formed thereon or during a separate process sequence.

[0100] In other examples, the base surface 703 may be the back side of the base substrate 704. Feature 702 may be formed in the same manner as base feature 502 and feature 602.

[0101] Feature 702 may have any suitable cross-sectional shape for aligning layers of the stacked semiconductor assembly 700. For example, feature 702 may have a square, rectangular, circular, plus-shaped cross-section, or the like. Feature 702 has a critical dimension 710, which is relative to the alignment direction of the various components within the semiconductor assembly (such as the direction in the xy plane). Figure 5B )) Measured.

[0102] like Figure 7B As shown, a first die 714 can be stacked on a base substrate 704. The first die 714 includes a feature 712 formed on a first surface 713 of the first die 714 and a feature 726 formed on a second surface 715 of the first die 714. The second surface 715 is on a side of the first die 714 opposite to the first surface 713. Feature 712 may have a critical dimension 720, and feature 726 may have a critical dimension 721, which is measured relative to the alignment direction (e.g., the xy plane) of the first die 714 to the base substrate 704. The critical dimension 721 may be equal to the critical dimension 710. The critical dimension 721 may be greater than the critical dimension 720. The critical dimension 720 may also be less than the critical dimension 710.

[0103] The first die 714 and the base substrate 704 can be positioned such that the first surface 713 and the base surface 703 face each other (i.e., directly adjacent to each other). In one example, the first die and the base die of the same stacked semiconductor assembly are aligned based on features 702 and 726. The first die and the base substrate of the same stacked semiconductor assembly are aligned by covering feature 702 with feature 726 of the same stacked semiconductor assembly in an image captured by an optical inspection system (such as optical inspection system 100). Feature 726 is positioned on the first die 714 such that when feature 726 covers feature 702 in an image captured by optical inspection system 100, the base substrate 704 and the first die 714 are aligned. In one example, features 702, 712, and 726 may have the same cross-sectional shape and equal critical dimensions. In another example, features 702, 712, and 726 may have the same or different cross-sectional shapes.

[0104] At location 404, the relative displacement between a feature on the first die 714 and a feature on the base substrate 704 is determined. For example, the positions of feature 726 and feature 702 can be determined using an optical inspection system (such as optical inspection system 100). Figure 7C As shown, the optical inspection system 100 generates an image 701 of a portion of the stacked semiconductor assembly 700. In one example, image 701 is a top-down view of a portion of the stacked semiconductor assembly 700. In one example, image 701 is parallel to a plane parallel to the base surface 703. Image 701 corresponds to a moment after the first die 714 is bonded to the base substrate 704. In one example, features 702, 712, and 726 have a circular cross-sectional shape as seen when viewed in a direction orthogonal to the alignment direction (e.g., a direction in the xy plane). Controller 126 can then determine the relative positions of features 702 and 726 based on image 701. Controller 126 can determine an OVL measurement (not shown) corresponding to the distance between features 702 and 726 based on the relative positions of features 702 and 726.

[0105] At activity 406, controller 126 (FIG. 1) determines updated alignment instructions. In one instance, controller 126 saves the updated alignment instructions to its memory and provides updated alignment instructions when stacking / bonding the first die to the base substrate of the same stacked semiconductor assembly. In one instance, the updated alignment instructions are based on the relative displacement between feature 726 and feature 702. In one instance, the updated alignment instructions result in feature 726 completely covering feature 702 of the same stacked semiconductor element. For example, as shown by arrow 407, activities 402 and 404 can be repeated, and the first die can be bonded to the base substrate of the same (subsequent) stacked semiconductor assembly using the appropriate alignment based on the updated alignment instructions. Figure 7C As shown, when feature 702 is no longer visible in image 701, the base substrate 704 and / or the first die 714 are aligned.

[0106] At point 408, the second die 724 is positioned and bonded to the first die 714. The second die 724 can be positioned onto the first die 714 using the robot end effector system 106.

[0107] like Figure 7D As shown, a second grain 724 may be stacked and bonded to a first grain 714. The second grain 724 includes a feature 728 formed on a first surface 723 and a feature 730 formed on a second surface 725 of the second grain 724. The second surface 725 is on a side of the second grain 724 opposite to the first surface 723. Feature 728 may have a critical dimension 740 measured relative to an alignment direction (e.g., an xy plane) from the second grain 724 to the first grain 714. Feature 730 may have a critical dimension 741 measured relative to an alignment direction (e.g., an xy plane) from the second grain 724 to the first grain 714. Critical dimension 741 may be equal to critical dimension 721. Critical dimension 740 may be equal to critical dimension 720.

[0108] The second die 724 and the first die 714 can be stacked such that the second surface 715 and the first surface 723 face each other (i.e., directly adjacent to each other). In one example, the second and first dies of the same stacked semiconductor assembly are aligned based on features 726 and 730. The second die 724 and the first die 714 are aligned when feature 726 is covered by feature 730 in an image captured by the optical inspection system 100. Feature 730 is positioned on the second die 724 such that when feature 730 covers feature 726 in an image captured by the optical inspection system 100, the second die 724 and the first die 714 are aligned. In one example, features 702, 712, 726, 728, and 730 may have the same cross-sectional shape and equal critical dimensions. In another example, features 702, 712, 726, 728, and 730 may have the same or different cross-sectional shapes.

[0109] At activity 410, the relative displacement between a feature on the first grain 714 and a feature on the second grain 724 is determined. For example, the relative displacement between the positions of feature 726 and feature 730 can be determined using an optical inspection system (such as optical inspection system 100). Figure 7E As shown, the optical inspection system 100 generates an image 705 of a portion of the stacked semiconductor assembly 700. In one example, image 705 is a top-down view of a portion of the stacked semiconductor assembly 700. In one example, image 705 is parallel to a plane parallel to the base surface 703. Image 705 corresponds to a moment after the second die 724 is bonded to the first die 714. In one example, features 702, 712, 726, 728, and 730 have a circular cross-sectional shape. Controller 126 can then use an image processing algorithm based on image 705 to determine the relative positions of features 726 and 730. Controller 126 can determine an OVL measurement (not shown) corresponding to the distance between features 726 and 730 based on the relative displacement between features 726 and 730.

[0110] At activity 412, controller 126 (FIG. 1) determines updated alignment instructions. In one instance, controller 126 saves the updated alignment instructions to its memory and provides updated alignment instructions when a second die is stacked / bonded to a first die of the same stacked semiconductor assembly. In one instance, the updated alignment instructions are based on the relative displacement between feature 728 and feature 730. The updated alignment instructions result in the second die being aligned to the first die of the same stacked semiconductor assembly. In one instance, the updated alignment instructions result in feature 730 complexly covering feature 726 of the same stacked semiconductor element. For example, as shown by arrow 413, activities 408 and 410 can be repeated, and the second die can be bonded to the first die of the same (subsequent) stacked semiconductor assembly using the appropriate alignment based on the updated alignment instructions.

[0111] At point 414, the third die 734 is positioned and bonded to the second die 724. The third die 734 can be positioned onto the second die 724 using the robot end effector system 106.

[0112] like Figure 7F As shown, a third grain 734 may be stacked and bonded to a second grain 724. The third grain 734 includes a feature 738 formed on a first surface 733 of the third grain 734 and a feature 755 formed on a second surface 735 of the third grain 734. The second surface 735 is on a side of the third grain 734 opposite to the first surface 733. Feature 738 may have a critical dimension 750 measured relative to the alignment direction (e.g., the xy plane) from the third grain 734 to the second grain 724. Feature 755 may have a critical dimension 751 measured relative to the alignment direction (e.g., the xy plane) from the third grain 734 to the second grain 724. Critical dimension 751 may be equal to critical dimension 741. Critical dimension 750 may be equal to critical dimension 740.

[0113] The third die 734 and the second die 724 can be stacked such that the second surface 725 and the first surface 733 face each other (i.e., directly adjacent to each other). In one example, the third die and the second die of the same stacked semiconductor assembly are aligned based on features 730 and 755. The third die 734 and the second die 724 are aligned when feature 730 is covered by feature 755 in an image captured by the optical inspection system 100. Feature 755 is positioned on the third die 734 such that the third die 734 and the second die 724 are aligned when feature 755 covers feature 730 in an image captured by the optical inspection system 100. In one example, features 702, 712, 726, 728, 730, 738, and 755 may have the same cross-sectional shape and equal critical dimensions. In another instance, features 702, 712, 726, 728, 730, 738, and 755 may have the same or different cross-sectional shapes.

[0114] At activity 416, the relative displacement between a feature on the second die 724 and a feature on the third die 734 is determined. For example, using an optical inspection system (such as optical inspection system 100), the relative displacement between the positions of feature 730 and feature 755 can be determined. Optical inspection system 100 generates an image of a portion of the stacked semiconductor assembly 700. In one example, the image is a top-down view of a portion of the stacked semiconductor assembly 700. In one example, the image is parallel to a plane parallel to the base surface 703. The image is mapped to a time after the third die 734 is bonded to the second die 724. In one example, features 702, 712, 726, 728, 730, 738, and 755 have a circular cross-sectional shape. Controller 126 can then use an image processing algorithm based on the image to determine the relative positions of features 730 and 755. The controller 126 can determine an OVL measurement (not shown) corresponding to the distance between features 730 and 755 based on the relative displacement between features 730 and 755.

[0115] At activity 418, controller 126 (FIG. 1) determines updated alignment instructions. In one instance, controller 126 saves the updated alignment instructions to its memory and provides updated alignment instructions when a third die is stacked / bonded to a second die of the same stacked semiconductor assembly. In one instance, the updated alignment instructions are based on the relative displacement between feature 730 and feature 755. The updated alignment instructions result in the third die being aligned to the second die of the same stacked semiconductor assembly. In one instance, the updated alignment instructions result in feature 755 completely covering feature 730 of the same stacked semiconductor element. For example, as shown by arrow 419, activities 414 and 416 can be repeated, and the third die can be bonded to the second die of the same (subsequent) stacked semiconductor assembly using the appropriate alignment based on the updated alignment instructions.

[0116] In some embodiments, multiple features are formed in and distributed across the surface of a base substrate or die to allow proper positioning and alignment of the die to the base substrate and / or to other dies. For example, base surface 703 and first surface 713 each include at least two of features 702 and 712 positioned relative to each other in the +x direction, such that when properly positioned, the two pairs of concentric features set the xy position and angular alignment of the first die 714 to the base substrate 704. In another example, second surface 715 and first surface 723 include at least two of features 726 and at least two of features 728 positioned relative to each other in the +x direction, such that when properly positioned, the two pairs of concentric features set the xy position and angular alignment of the second die 724 to the first die 714. In another example, the second surface 725 and the first surface 733 include at least two of the features 730 and at least two of the features 738 that are positioned relative to each other in the +x direction, such that when correctly positioned, the two pairs of concentric features set the xy position and angle alignment of the third grain 734 to the second grain 724.

[0117] Therefore, in some embodiments, activities 412 and 418 may include additional activities for comparing the positions of more than one pair of mating features to properly position and align the dies of identical stacked semiconductor elements to the base substrate or to properly position and align the first die to the second die.

[0118] Alternative grain alignment methods

[0119] Figures 8A to 8E This is a schematic cross-sectional view of a portion of a stacked semiconductor assembly 800 during a method for forming a stacked semiconductor assembly. Figure 3This is a diagram illustrating a method 300 for forming a stacked semiconductor assembly according to one or more embodiments. Method 300 can be performed using the optical inspection system 100 described above or any other optical inspection system.

[0120] At point 302, the first die 814 is positioned and bonded to the base substrate 804. The base substrate 804 can be used with the robot end effector system 106. Figure 1A ) on platform 104 ( Figures 1A to 3 Positioning and fixing on top.

[0121] like Figure 8A As shown, features 802 and 808 may be formed on a base substrate 804. In some embodiments, the base substrate 804 may include an interposer, a bridging substrate, a hybrid bonding substrate, or other similar substrate. The base substrate 804 may contain any suitable material for forming a stacked semiconductor assembly, including but not limited to silicon (Si), silicon dioxide (SiO2), doped SiO2, fused silica, quartz, silicon carbide (SiC), glass, or the like. As mentioned above, features 802 and 808 have a negligible effect on the operation of the stacked semiconductor assembly 800 and are used for aligning subsequent dies to be stacked over the base substrate 804. Features 802 and 808 may be formed on a base surface 803 of the base substrate 804. As described above, the base surface 803 may be the front or back side of the base substrate 804. Features 802 and 808 may be any suitable cross-sectional shape that can be used to align layers of the stacked semiconductor assembly on the base substrate 804. For example, features 802 and 808 may have a square, rectangular, circular, plus-shaped cross-section, or similar. As will be discussed in more detail below, feature 808 may be positioned on the base substrate 804 such that the feature is horizontally offset from a feature formed on a subsequent die by a horizontal distance. As will be described in more detail below, feature 808 may be positioned and used to align layers of the same stacked semiconductor assembly based on the horizontal distance between feature 808 and a feature formed on a subsequent die.

[0122] like Figure 8BAs shown, a first die 814 can be positioned and bonded to a base substrate 804. The first die 814 includes at least one of a feature 812 formed on a first surface 813 of the first die 814 and a feature 826 formed on a second surface 815 of the first die. In some embodiments, the first die 814 includes at least a feature formed on a surface of the first die 814 that exposes the surface when the first die 814 is positioned on the base substrate 804. In one example, feature 826 is formed on the second surface 815 of the first die 814, exposing the second surface when the first die 814 is positioned on the base substrate 804 during activity 1002. The second surface 815 is on a side of the first die 814 opposite to the first surface 813. In one example, features 812 and 826 have the same cross-section and critical dimensions. In another example, features 812 and 826 have different cross-sectional shapes and / or critical dimensions. In one example, features 812 and 826 may be horizontally aligned on the first die 814. In another example, features 812 and 826 may be horizontally offset from each other. The first die 814 and the base substrate 804 may be positioned such that the first surface 813 and the base surface 803 face each other (i.e., directly adjacent to each other). Features 812 and 826 are positioned on the first die 814 such that when features 812 and 826 are moved away from feature 808 by a distance 819, the first die 814 and the base substrate 804 are aligned. In one example, the distance 819 is measured relative to the alignment direction (such as the direction in the xy plane) of the various components within the semiconductor assembly. In other words, the first die 814 and the base substrate 804 are aligned by stacking the first die 814 on the base substrate 804 and adjusting the first die 814 and / or the base substrate 804 until the distance 819 is equal to a predetermined distance. This predetermined distance is stored in the memory of the controller 126, indicating that the base substrate 804 and the first die 814 are aligned. In one example, the distance 819 is measured from the center 807 of feature 808 to the center 809 of feature 826. Figure 8C In other words, the distance 819 is measured relative to a direction parallel to a plane, which is parallel to the base surface 803.

[0123] At point 304, the distance between a feature on the first die 814 and a feature on the base substrate 804 is determined. For example, the distance 819 between feature 826 and feature 808 can be determined using an optical inspection system (such as optical inspection system 100). Figure 8CAs shown, the optical inspection system 100 generates an image 801 of a portion of the stacked semiconductor assembly 800. In this embodiment, the first die 814 may not include material that transmits wavelengths of light supplied from the optical inspection system 100 because feature 826 is positioned on the exposed second surface 815. In one example, image 801 is formed from a top-down view of a portion of the stacked semiconductor assembly 800. In one example, image 801 is parallel to a plane parallel to the base surface 803. Image 801 corresponds to a moment after the first die 814 has been bonded to the base substrate 804. In one example, feature 808 has a plus-shaped cross-section, and feature 826 has a circular cross-section, as seen when the feature is viewed in a direction orthogonal to the alignment direction (e.g., a direction within the xy-plane). Because feature 812 is aligned with feature 826, and both features have the same critical dimensions and cross-sectional shape, feature 826 covers feature 812 in image 801. The controller 126 may then use an image processing algorithm based on image 801 to determine the positions of features 808 and 826. The controller 126 may determine an OVL measurement between features 826 and 808 based on their positions. The OVL measurement between features 826 and 808 may include a distance 819 measured between the center 807 of feature 808 and the center 809 of feature 826.

[0124] At activity 306, controller 126 (FIG. 1) determines updated alignment instructions. In one example, controller 126 saves the updated alignment instructions to its memory and provides updated alignment instructions when stacking / bonding a first die to a base substrate of the same stacked semiconductor assembly. For example, as shown by arrow 307, activities 302 and 304 can be repeated, and the first die can be bonded to the base substrate of the same (subsequent) stacked semiconductor assembly using the appropriate alignment based on the updated alignment instructions. The updated alignment instructions result in the alignment of the first die and base substrate of the same stacked semiconductor assembly. For example, controller 126 uses robot end effector system 106 and / or platform to align the first die and base substrate of the same stacked semiconductor element based on OVL measurements between feature 826 and feature 808. For example, the updated alignment instructions result in robot end effector system 106 and / or platform shifting and / or rotating the first die or base substrate of the same stacked semiconductor element such that distance 819 is equal to a predetermined distance.

[0125] At point 308, the second die 824 is positioned and bonded to the first die 814. The second die 824 can be positioned onto the first die 814 using the robot end effector system 106 and / or platform 104.

[0126] like Figure 8DAs shown, a second grain 824 can be positioned and bonded to a first grain 814. The second grain 824 includes a feature 828 formed on a first surface 823 and a feature 830 formed on a second surface 825. The second surface 825 is on a side of the second grain 824 opposite to the first surface 823. In one example, features 828 and 830 have the same cross-sectional shape as features 812 and 826. In another example, each of the features has the same or different cross-sectional shape and / or critical dimensions. The second grain 824 and the first grain 814 can be positioned such that the first surface 823 of the second grain 824 and the second surface 815 of the first grain 814 face each other (i.e., directly adjacent to each other). Features 828 and 830 are positioned on the second grain 824 in such a way that when features 828 and 830 are moved away from feature 808 by a specific horizontal distance, the second grain 824 is aligned with the first grain 814, as will be described in more detail below.

[0127] At activity 310, the distance between a feature on the second die 824 and a feature on the base substrate 804 is determined. For example, the distance between feature 830 and feature 808 can be determined using an optical inspection system (such as optical inspection system 100). Figure 8E As shown, the optical inspection system 100 generates an image 805 of a portion of the stacked semiconductor assembly 800. In one example, image 805 is a top-down view of a portion of the stacked semiconductor assembly 800. In one example, image 805 is parallel to a plane parallel to the base surface 803. Image 805 corresponds to a moment after the second die 824 is bonded to the first die 814. In one example, features 828 and 830 have a circular cross-sectional shape as seen when viewed in a direction orthogonal to the alignment direction (e.g., a direction in the xy plane). Because features 828 and 830 are aligned, and both features have the same critical dimensions and cross-sectional shape, feature 830 covers feature 826 in image 805. Similarly, because features 812, 826, 828, and 830 have the same critical dimensions, cross-sectional shape, and are aligned, only features 808 and 830 are visible in image 805. Controller 126 can then determine the positions of features 808 and 830 based on image 805. The controller 126 may use an image processing algorithm to determine an OVL measurement between feature 830 and feature 808 based on the positions of feature 830 and feature 826. The OVL measurement between feature 830 and feature 808 may include a distance 829 measured between the center 807 of feature 808 and the center 811 of feature 830. In one example, the distance 829 is measured relative to the alignment direction (such as a direction in the xy plane) of the various components within the semiconductor assembly.

[0128] At activity 312, controller 126 (FIG. 1) determines updated alignment instructions. The updated alignment instructions are based on the OVL measurement between feature 830 and feature 808. In one instance, controller 126 stores the updated alignment instructions in its memory and provides updated alignment instructions when a second die is stacked / bonded to a first die of the same stacked semiconductor assembly. For example, as shown by arrow 313, activities 308 and 310 can be repeated, and the second die can be bonded to the first die of the same (subsequent) stacked semiconductor assembly using the appropriate alignment based on the updated alignment instructions. In other words, the updated alignment instructions cause the OVL measurement between feature 808 and feature 830 to equal a predetermined distance also stored in the memory of controller 126. For example, the updated alignment instructions cause the second die and / or the first die of the same stacked semiconductor assembly to shift and / or rotate along the x, y, and / or z axes until distance 829 equals the predetermined distance.

[0129] At point 314, the third die 834 is positioned and bonded to the second die 824. The third die 834 can be positioned onto the second die 824 using the robot end effector system 106 and / or platform 104.

[0130] like Figure 8F As shown, a third grain 834 can be positioned and bonded to a second grain 824. The third grain 834 includes a feature 838 formed on a first surface 833 and a feature 840 formed on a second surface 835. The second surface 835 is on a side of the third grain 834 opposite to the first surface 833. In one example, features 838 and 840 have the same cross-sectional shape as features 812, 826, 828, and 830. In another example, each of the features has the same or different cross-sectional shape and / or critical dimensions. The third grain 834 and the second grain 824 can be positioned such that the first surface 833 of the third grain 834 and the second surface 825 of the second grain 824 face each other (i.e., directly adjacent to each other). Features 838 and 840 are positioned on the third grain 834 in such a way that when features 838 and 840 are moved away from feature 808 by a specific horizontal distance, the third grain 834 is aligned with the second grain 814 and the first grain 814, as will be described in more detail below.

[0131] At activity 316, the distance between a feature on the third die 834 and a feature on the base substrate 804 is determined. For example, the distance between feature 840 and feature 808 can be determined using an optical inspection system (such as optical inspection system 100). Optical inspection system 100 generates an image of a portion of the stacked semiconductor assembly 800. In one example, the image is a top-down view of a portion of the stacked semiconductor assembly 800. In one example, the image is parallel to a plane parallel to the base surface 803. The image is mapped to a point in time after the third die 834 is bonded to the second die 824. In one example, features 838 and 840 have a circular cross-sectional shape as seen when viewed in a direction orthogonal to the alignment direction (e.g., a direction in the xy plane). Because features 838 and 840 are aligned, and both features have the same critical dimensions and cross-sectional shape, feature 840 overlaps feature 838 in the image. Similarly, because features 812, 826, 828, 830, 838, and 840 have the same critical dimensions, cross-sectional shape, and are aligned, only features 808 and 840 are visible in the image. Controller 126 can then determine the positions of features 808 and 838 based on the image. Controller 126 can use image processing algorithms to determine an OVL measurement between features 838 and 808 based on the positions of features 838 and 828. The OVL measurement between features 838 and 808 may include a distance 839 measured between the center of feature 808 and the center of feature 838. In one example, distance 839 is measured relative to the alignment direction (such as a direction in the xy plane) of the various components within the semiconductor assembly.

[0132] At activity 318, controller 126 (FIG. 1) determines updated alignment instructions. The updated alignment instructions are based on the OVL measurement between feature 840 and feature 808. In one example, controller 126 stores the updated alignment instructions in its memory and provides updated alignment instructions when a third die is stacked / bonded to a second die of the same stacked semiconductor assembly. For example, as shown by arrow 319, activities 314 and 316 can be repeated, and the third die can be bonded to a second die of the same (subsequent) stacked semiconductor assembly using the appropriate alignment based on the updated alignment instructions. In other words, the updated alignment instructions cause the OVL measurement between feature 808 and feature 840 to equal a predetermined distance also stored in the memory of controller 126. For example, the updated alignment instructions cause the third die and / or second die of the same stacked semiconductor assembly to shift and / or rotate along the x, y, and / or z axes until distance 839 equals the predetermined distance. This process can be repeated for each subsequent layer of the stacked semiconductor assembly 800.

[0133] In some embodiments, multiple features are formed in and distributed across the surfaces of the base substrate and the die to allow for proper positioning and alignment of each consecutively placed die onto the base substrate. In one example, base surface 803, first surface 813, and first surface 823 each include at least two of features 808, 826, and 828, which are positioned relative to each other such that, when correctly positioned, the three sets of features define the xy position and angular alignment of the first die 814 to the base substrate 804 and the second die 824 to the base substrate 804. Therefore, in some embodiments, activities 312 and 318 may include additional activities for comparing the positions of more than one pair of mating features for properly positioning and aligning dies of identical stacked semiconductor components to the base substrate, properly positioning and aligning a first die to a second die, or properly positioning and aligning a third die to a second die.

[0134] Alternative layer alignment methods

[0135] Figures 9A to 9G This is a schematic cross-sectional view of a portion of the stacked semiconductor component 900 during a method for forming the stacked semiconductor component 900. Figures 9A to 9G refer to Figure 4 describe.

[0136] At point 402, the first die 914 is positioned and bonded to the base substrate 904. The base substrate 904 can be used with the robot end effector system 106. Figure 1A ) on platform 104 ( Figures 1A to 3 Positioning and fixing on top.

[0137] like Figure 9A As shown, feature 902 having a critical dimension 910 and feature 942 having a critical dimension 944 can be formed on the base substrate 904. The critical dimensions 910 and 944 can be alignment directions relative to the various components within the semiconductor assembly (such as directions in the xy plane). Figure 9BThe measurement is performed. In some embodiments, the base substrate 904 may include an interposer, a bridging substrate, a hybrid bonding substrate, or other similar substrate. The base substrate 904 may contain any suitable material for forming the stacked semiconductor assembly, including but not limited to silicon (Si), silicon dioxide (SiO2), doped SiO2, fused silica, quartz, silicon carbide (SiC), glass, or the like. As mentioned above, features 902 and 942 are configured to have a negligible effect on the operation of the stacked semiconductor assembly and for the purpose of aligning subsequent dies to be stacked over the base substrate 904. Feature 902 may be formed on a first surface 903 of the base substrate 904. The first surface 903 may be the front or back side of the base substrate 904. Feature 942 may be formed on a second surface 905 of the base substrate 904. The second surface 905 is on a side of the base substrate 904 opposite to the first surface 903. Features 902 and 942 may be formed in the same manner as described with respect to features 502, 602, 702, and 802. Features 902 and 942 may have any suitable cross-sectional shape for aligning stacked semiconductor components on the base substrate 904. For example, features 902 and 942 may have a square, rectangular, circular, plus-shaped cross section, or the like.

[0138] The critical dimension 910 may be larger than the critical dimension 944. In one example, feature 942 may be offset from feature 902 by a distance 911. Distance 911 may be a distance measured along a horizontal axis (i.e., the x-axis) between center lines 907 and 909. Center line 907 is oriented vertically and intersects the center of feature 902. Center line 909 is oriented vertically and intersects the center of feature 942.

[0139] like Figure 9B As shown, a first die 914 can be bonded to a base substrate 904. The first die 914 includes a feature 912 formed on a first surface 913 of the first die 914 and a feature 926 formed on a second surface 915 of the first die. The second surface 915 is on a side of the first die 914 opposite to the first surface 913. Feature 912 may have a critical dimension 920. Feature 926 may have a critical dimension 921 measured relative to the alignment direction (e.g., the xy plane) of the first die 914 to the base substrate 904. Critical dimension 920 may be equal to critical dimension 944. Critical dimension 921 may be equal to critical dimension 910.

[0140] The first die 914 and the base substrate 904 can be joined such that the first surfaces 913 and 903 face each other (i.e., are directly adjacent to each other). In one example, the first die 914 and the base substrate 904 are aligned based on alignment features 902 and 912. Because the critical dimension 920 is less than the critical dimension 910 and the critical dimension 921 is greater than the critical dimension 944, features 912 and 926 can be positioned on the first die 914 such that the first die 914 and the base substrate 904 are aligned when feature 912 is centered within feature 902 and feature 942 is centered within feature 926. Thus, features 912 and 926 are also offset by a distance 917. The distance 917 can be a distance measured along a horizontal axis (i.e., the x-axis) between center lines 908 and 916. Center line 908 is oriented in the vertical direction and intersects the center of feature 912. Centerline 916 is oriented vertically and intersects the center of feature 926. When the first die 914 and the base substrate 904 are aligned, centerlines 907 and 908 intersect, and centerlines 909 and 916 intersect. In some configurations, when the first die 914 and the base substrate 904 are aligned, features 912 and 926 are out of focus in the image 901 captured by the optical inspection system during the alignment of the first die 914 and the base substrate 904. Figure 9C Thus, in some instances, when feature 912 is centered within feature 902, it aligns with the first die 914 and the base substrate 904.

[0141] At point 404, the relative displacement between a feature on the first die 914 and a feature on the base substrate 904 is determined. For example, the relative displacement between feature 902 and feature 912 can be determined using an optical inspection system (such as optical inspection system 100). Figure 9CAs shown, the optical inspection system 100 generates an image 901 of a portion of the stacked semiconductor assembly 900. In one example, the top-down view may be an image 901 of the elements of a portion of the stacked semiconductor assembly 900 captured by the optical inspection system 100. In one example, image 901 is parallel to a plane parallel to a first surface 903. Image 901 corresponds to a moment after the first die 914 is bonded to the base substrate 904. In one example, image 901 includes at least a portion of feature 902. As described above, in some configurations, features 926 and 942 are not visible in image 901 (i.e., out of focus) and are included for reference. Controller 126 may determine the relative displacement between feature 902 and feature 912 based on image 901. Controller 126 may determine an OVL measurement between feature 912 and feature 902 based on the relative displacement between feature 912 and feature 902. The OVL measurement between feature 912 and feature 902 may include measuring the distance 948 from at least one point of interest (POI) (such as POI 946) located on the outer peripheral surface 929 of feature 902 to the centerline 908. In one example, features 902, 912, 926, and 942 have a circular cross-sectional shape. POI 946 may be determined based on image analysis performed by one or more software applications running on controller 126.

[0142] At activity 406, controller 126 (FIG. 1) determines updated alignment instructions. In one instance, controller 126 saves the updated alignment instructions to its memory and provides updated alignment instructions when stacking / bonding the first die to the base substrate of the same stacked semiconductor assembly. In one instance, the updated alignment instructions are based on the relative displacement between features 902 and 912.

[0143] The updated alignment instructions can be determined to center feature 912 within feature 902. Using the updated alignment instructions and the robot end effector system 106 and / or platform 104, the controller 126 aligns the first die and base substrate of the same stacked semiconductor assembly. For example, as shown by arrow 407, the method can repeat activities 402 and 404, and utilize the appropriate alignment based on the updated alignment instructions to bond the first die to the base substrate of the same (subsequent) stacked semiconductor assembly. In other words, the updated alignment instructions cause the robot end effector system 106 and / or platform 104 to shift and / or rotate the first die and / or base substrate of the same stacked semiconductor assembly along the x, y, and / or z axes, such that a distance 948 is equal to a first predetermined distance stored in the memory of the controller 126. The first predetermined distance can be determined based on a critical dimension 910.

[0144] At point 408, the second die 924 is positioned and bonded to the first die 914. The second die 924 can be positioned onto the first die 914 using the robot end effector system 106. For example... Figure 9D As shown, a second die 924 can be stacked and bonded to a first die 914. The second die 924 includes a feature 902 formed on a second surface 925 and a feature 942 formed on a first surface 923. The second surface 925 is on a side of the second die 924 opposite to the first surface 923. The second die 924 and the first die 914 can be stacked such that the first surface 923 and the second surface 915 face each other (i.e., directly adjacent to each other). Features 902 and 942 are formed and positioned on the second die 924 in the same manner as described with respect to the base substrate 904. In one example, the second die 924 and the first die 914 are aligned based on alignment features 926 and 942. In some configurations, when aligning the second die 924 and the first die 914, features 902 and 912 are out of focus in an image 937 captured by an optical inspection system during the alignment of the second die 924 and the first die 914. Figure 9E Thus, in some instances, when feature 942 is centered within feature 926, it aligns with the second grain 924 and the first grain 914.

[0145] At activity 410, the relative displacement between a feature on the second grain 924 and a feature on the first grain 914 is determined. For example, the relative displacement between feature 926 and feature 942 can be determined using an optical inspection system (such as optical inspection system 100). Figure 9EAs shown, the optical inspection system 100 generates an image 937 of a portion of the stacked semiconductor assembly 900. In one example, the top-down view may be an image 937 of the elements of a portion of the stacked semiconductor assembly 900 captured by the optical inspection system 100. In one example, image 937 is parallel to a plane parallel to a first surface 903. Image 937 corresponds to a moment after the second die 924 is bonded to the first die 914. In one example, image 901 includes at least a portion of features 926 and 942. As described above, in some configurations, features 902 and 912 are not visible in image 937 (i.e., out of focus) and are included for reference. Controller 126 may determine the relative displacement between features 926 and 942 based on image 937. Controller 126 may determine an OVL measurement between features 926 and 942 based on the relative displacement between features 926 and 942. The OVL measurement between feature 926 and feature 942 may include measuring the distance 958 from at least one point of interest (POI) (such as POI 956) located on the outer peripheral surface 933 of feature 926 to the centerline 909. In one example, features 902, 912, 926, and 942 have a circular cross-sectional shape. POI 956 may be determined based on image analysis performed by one or more software applications running on controller 126.

[0146] At activity 412, controller 126 (FIG. 1) determines updated alignment instructions. In one instance, controller 126 saves the updated alignment instructions to its memory and provides updated alignment instructions when stacking / bonding a second die to a first die of the same stacked semiconductor assembly. In one instance, the updated alignment instructions are based on the relative displacement between features 926 and 942. The updated alignment instructions may be determined such that feature 942 is centered within feature 926. Using the updated alignment instructions and robot end effector system 106 and / or platform 104, controller 126 aligns the second die and the first die of the same stacked semiconductor assembly. For example, as shown by arrow 413, activities 408 and 410 may be repeated, and the second die may be bonded to the first die of the same (subsequent) stacked semiconductor assembly using the appropriate alignment based on the updated alignment instructions.

[0147] This process can be repeated for each layer of the stacked semiconductor assembly 900. In other words, each layer of the stacked semiconductor assembly can be assigned an index equal to an integer N starting from N=0. For example, the base substrate 904 can be assigned a value of 0, the first die 914 can be assigned a value of 1, and the second die 924 can be assigned a value of 2, and so on. Each die assigned an even value may include features 902 and 942. Each die assigned an odd value may include features 912 and 926. Adjacent even-numbered layers and odd-numbered layers can be aligned with each other in the manner described above. For example, the base substrate 904 is aligned to the first die 914 by centering feature 912 within feature 902. Subsequently, the second die 924 is aligned to the first die 914 by centering feature 942 within feature 926. Furthermore, the third grain (not shown) will include features 902 and 942, and will be aligned with the second grain 924 by centering feature 912 within feature 902.

[0148] At activity 414, such as Figure 9H As shown, the third grain 934 is positioned and bonded to the second grain 924. As mentioned above, the third grain 934 is assigned the value 3 (an odd number), therefore the third grain 934 includes features 912 and 926.

[0149] At activity 416, the relative displacement between a feature on the third grain 934 and a feature on the second grain 924 is determined. In the same manner as described above (activity 404), the relative displacement between feature 912 (of the third grain 934) and feature 902 (of the second grain 924) is determined using an optical inspection system (such as optical inspection system 100) in the same manner as described above.

[0150] At activity 418, controller 126 (FIG. 1) determines updated alignment instructions. The updated alignment instructions can be determined in the same manner as described in activity 406. In one instance, controller 126 saves the updated alignment instructions to its memory and provides updated alignment instructions when a third die is stacked / bonded to a second die of the same stacked semiconductor assembly. In one instance, the updated alignment instructions are based on the relative displacement between features 912 and 902. The updated alignment instructions can be determined such that feature 912 is centered within feature 902. Using the updated alignment instructions and robot end effector system 106 and / or platform 104, controller 126 aligns the third and second dies of the same stacked semiconductor assembly. For example, as shown by arrow 419, activities 414 and 416 can be repeated, and the third die can be bonded to the second die of the same (subsequent) stacked semiconductor assembly using the appropriate alignment based on the updated alignment instructions.

[0151] Figure 9F A top view of a portion of the even-indexed layers of the stacked semiconductor assembly 900 is shown. As described above, each even-indexed layer of the stacked semiconductor assembly includes feature 902 and feature 942.

[0152] Figure 9G A top view of a portion of the odd-indexed layers of the stacked semiconductor assembly 900 is shown. As described above, each odd-indexed layer of the stacked semiconductor assembly includes features 912 and 926.

[0153] Implementations based on this principle can be carried out in hardware, firmware, software, or any combination thereof. Implementations can also be carried out using instructions stored on one or more computer-readable media, which can be read and executed by one or more processors. Computer-readable media may include any mechanism for storing or transmitting information in a machine-readable form (e.g., a computing platform or a “virtual machine” running on one or more computing platforms). For example, computer-readable media may include any suitable form of volatile or non-volatile memory. In some implementations, computer-readable media may include non-transitory computer-readable storage media.

[0154] Although the foregoing relates to implementations of this principle, other and further implementations of this principle may be designed without departing from its basic scope.

Claims

1. A method for forming an element, the method comprising: An image of a second grain bonded on a first grain bonded on a base substrate, the first grain having a first feature formed on a first surface of the first grain and the second grain having a second feature formed on a second surface of the second grain; The relative displacement between portions of the first feature and the second feature is determined based on the generated image. as well as The updated alignment command is determined based on the determined relative displacement.

2. The method of claim 1, wherein: The first feature has a first critical size; and The second feature has a second critical size, wherein the first critical size is smaller than the second critical size. The alignment instruction for determining the update includes: determining an updated alignment instruction that causes the first feature to be centered within the second feature of a subsequent element.

3. The method of claim 1, wherein: The first feature has a first critical size; and The second feature has a second critical size, wherein the first critical size is larger than the second critical size. The determination of the updated alignment instruction includes: determining an updated alignment instruction that causes the second feature to be centered within the first feature of a subsequent element.

4. The method of claim 3, wherein the first grain includes a third feature disposed on a second surface of the first grain offset from the first feature in a direction parallel to a plane, the plane being parallel to a base surface of the base feature, the second surface being opposite to the first surface of the first grain, and wherein the third feature is aligned with a base feature formed on the base substrate.

5. The method of claim 1, wherein: The first feature has a first critical size; and The second feature has a second critical size, wherein the first critical size and the second critical size are equal, wherein The determination of the updated alignment instruction includes: determining an updated alignment instruction that causes the second feature to cover the formation of a third feature on the base substrate of a subsequent element.

6. The method of claim 1, wherein the first surface of the first grain is the element side of the first grain, and the first feature is formed in a non-electrical segment of the first grain.

7. The method of claim 1, wherein the first surface of the first grain is the back side of the first grain.

8. The method of claim 1, wherein: The first grain includes a third feature formed on a second surface of the first grain, the third feature being offset from the first feature by a first distance in a first direction, wherein the first direction is a direction parallel to the base surface of the base substrate and the first distance is measured in the first direction; The second grain includes a fourth feature formed on a second surface of the second grain, the fourth feature being offset from the second feature in the first direction by a first distance; Position the second grain onto the first grain such that the first surface of the first grain and the first surface of the second grain face each other; The first feature has a first critical size; The second feature has a second critical dimension smaller than the first critical dimension; The third feature has a critical size equal to the second critical size; and The fourth feature has a critical size equal to the first critical size. The alignment instruction for determining the update includes: determining an updated alignment instruction that causes the second feature to be centered within the first feature.

9. The method of claim 1, further comprising: Delivering light of a first wavelength toward the first and second grains; and The relative displacement between the first feature and the second feature is determined based on light reflected from the first and second grains and captured by an image sensor, wherein the updated alignment command is determined based on the determined relative displacement between the second feature and the first feature.

10. A method for forming an element, the method comprising: A first image of a second die bonded to a first die on a base substrate is generated. The first die is bonded to a base substrate. The second die has a first feature disposed on a first surface of the second die. The base substrate has a base feature formed on a base surface of the base substrate. The first image is parallel to a first plane and includes at least a portion of the first feature of the second die and at least a portion of the base feature of the base substrate. The first plane is parallel to the base surface of the base substrate. Determine a first distance in a first direction between the first feature and the portions of the basic feature, wherein the first direction is a direction parallel to the first plane; and The updated alignment command is determined based on the first distance between the first feature and the base feature.

11. The method of claim 10, wherein determining the updated alignment instruction comprises: determining an updated alignment instruction that causes the first distance to be equal to a predetermined distance.

12. The method of claim 10, further comprising: Before generating the first image, a second image of the first grain bonded to the base substrate is generated, the first grain having a third feature formed on a first surface of the first grain. Determine a second distance in the first direction between the portion of the third feature and the basic feature; and The updated alignment command is determined based on the second distance between the third feature and the basic feature.

13. The method of claim 12, wherein determining the updated alignment instruction based on the second distance between the third feature and the basic feature comprises: determining an updated alignment instruction that causes the second distance to be equal to a predetermined distance.

14. An optical inspection system, the optical inspection system comprising: Controller; Memory, used to store a program to be executed in the controller, the program containing instructions that, when executed, cause the controller to: An image of a second grain bonded on a first grain bonded on a base substrate, the first grain having a first feature formed on a first surface of the first grain and the second grain having a second feature formed on a second surface of the second grain; The relative displacement between portions of the first feature and the second feature is determined based on the generated image; as well as The updated alignment command is determined based on the determined relative displacement.

15. The optical inspection system of claim 14, wherein: The first feature has a first critical size; and The second feature has a second critical size, wherein the first critical size is smaller than the second critical size, wherein The instructions for determining the updated alignment instructions further include instructions for determining the updated alignment instructions that cause the first feature to be centered within the second feature of a subsequent element.

16. The optical inspection system of claim 15, wherein: The first feature has a first critical size; and The second feature has a second critical size, wherein the first critical size is larger than the second critical size, wherein The instructions for determining the updated alignment instructions further include instructions for determining the updated alignment instructions that cause the second feature to be centered within the first feature of a subsequent element.

17. The optical inspection system of claim 16, wherein the first grain includes a third feature disposed on a second surface of the first grain offset from the first feature in a direction parallel to a plane, the plane being parallel to a base surface of the base feature, the second surface being opposite to the first surface of the first grain, and wherein the third feature is aligned with a base feature formed on the base substrate.

18. The optical inspection system of claim 15, wherein: The first feature has a first critical size; and The second feature has a second critical size, wherein the first critical size and the second critical size are equal, wherein The instructions for determining the updated alignment instructions include instructions for determining updated alignment instructions that cause the second feature to cover the third feature formed on the base substrate.

19. The optical inspection system of claim 15, wherein: The first grain includes a third feature formed on a second surface of the first grain, the third feature being offset from the first feature by a first distance in a first direction, wherein the first direction is a direction parallel to the base surface of the base substrate and the first distance is measured in the first direction; The second grain includes a fourth feature formed on a second surface of the second grain, the fourth feature being offset from the second feature in the first direction by a first distance; Position the second grain onto the first grain such that the first surface of the first grain and the first surface of the second grain face each other; The first feature has a first critical size; The second feature has a second critical dimension smaller than the first critical dimension; The third feature has a critical size equal to the second critical size; and The fourth feature has a critical size equal to the first critical size, wherein The instructions for determining the updated alignment instructions further include instructions for determining the updated alignment instructions that cause the second feature to be centered within the first feature.

20. The optical inspection system of claim 15, wherein the optical inspection system includes an infrared light source disposed on the platform.

21. A stacked semiconductor assembly, the stacked semiconductor assembly comprising: A first grain, the first grain being bonded to a base substrate, the first grain having a first feature formed on a first surface of the first grain; and A second grain, which is bonded to the first grain, has a second feature formed on a second surface of the second grain, wherein the second grain is aligned to the first grain based on the second feature and the first feature.

22. The stacked semiconductor assembly of claim 21, wherein: The first feature has a first critical size; The second feature has a second critical size and the first critical size is smaller than the second critical size; and When the first feature is centered within the second feature, the second grain aligns with the first grain.

23. The stacked semiconductor assembly of claim 21, wherein: The first feature has a first critical size; The second feature has a second critical size and the first critical size is greater than the second critical size; and When the second feature is centered within the first feature, the second grain is aligned with the first grain.

24. The stacked semiconductor assembly of claim 23, further comprising: A third feature is disposed on a second surface of the first grain offset from the first feature in a direction parallel to a plane, the plane being parallel to the base surface of the base feature, the second surface being opposite to the first surface of the first grain, wherein the third feature is aligned with a base feature formed on the base substrate.

25. The stacked semiconductor assembly of claim 21, wherein the first surface of the first die is the element side of the first die, and the first feature is formed in a non-electrical segment of the first die.

26. The stacked semiconductor assembly of claim 21, wherein the first surface of the first die is the back side of the first die.

27. The stacked semiconductor assembly of claim 21, further comprising: A third feature is formed on a second surface of the first grain, the third feature being offset from the first feature by a first distance in a first direction, wherein the first direction is a direction parallel to the base surface of the base substrate and the first distance is measured in the first direction; A fourth feature is formed on the second surface of the second grain, and the fourth feature is offset from the second feature by the first distance in the first direction, wherein: Position the second grain onto the first grain such that the first surface of the first grain and the first surface of the second grain face each other; The first feature has a first critical size; The second feature has a second critical dimension smaller than the first critical dimension; The third feature has a critical size equal to the second critical size; The fourth feature has a critical size equal to the first critical size; and When the second feature is within the first feature, the first grain aligns with the second grain.

28. A stacked semiconductor assembly, the stacked semiconductor assembly comprising: A first grain, the first grain being bonded to a base substrate, the base substrate having a basic feature formed on a base surface of the base substrate; and A second grain, which is bonded to the first grain, has a first feature disposed on a first surface of the second grain, wherein the second grain is aligned with the base substrate when a first distance between the first feature and the base feature is equal to a predetermined distance.

29. The stacked semiconductor assembly of claim 28, wherein the first die further includes a third feature formed on a first surface of the first die, and the first die is aligned with the base substrate when a second distance between the third feature and the base feature is equal to the predetermined distance.

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