Wafer detector and wafer surface resistivity detection method

Abstract

The invention provides a wafer detector and a wafer surface resistivity detection method. Relates to the field of semiconductor wafer manufacturing and measurement. The wafer detector includes: a back plate; the source meter module is arranged on the back plate; the flexible substrate is arranged on one side of the back plate in a protruding manner; the probe array module is arranged on the side, away from the back plate, of the flexible substrate, and the probe array module comprises a plurality of probe units arranged in an array mode; the thin film circuit module is laid on the flexible substrate and is configured to electrically connect the plurality of probe units with the source meter module; wherein under the condition that the back plate moves to a target position, the flexible substrate is deformed under the action of external force, so that the plurality of probe units and the wafer to be measured are in electric contact at the same time, and the source meter module measures the resistivity of a plurality of point locations to be measured on the wafer to be measured through the plurality of probe units.

Description

Technical Field

[0001] This application relates to the field of semiconductor wafer manufacturing and measurement, and more specifically, to a wafer detector and a method for detecting wafer surface resistivity. Background Technology

[0002] In thin film deposition, ion implantation, and diffusion processes used to manufacture semiconductor wafers, the full-field resistivity map of the semiconductor wafer is a core tool for evaluating material uniformity and production line yield. As the feature size of semiconductor devices continues to shrink and the wafer diameter continues to increase, higher demands are placed on the accuracy, speed, and non-destructive nature of resistivity measurement.

[0003] In related technologies, there is still a lack of a safe and fast effective means to acquire the full-field resistivity map of semiconductor wafers before they enter the subsequent photolithography process. Summary of the Invention

[0004] In view of this, this application provides a wafer detector and a method for detecting wafer surface resistivity.

[0005] One aspect of this application provides a wafer detector, comprising: a backplane; a source meter module disposed on the backplane; a flexible substrate protruding from one side of the backplane; a probe array module disposed on the side of the flexible substrate away from the backplane, the probe array module including a plurality of probe units arranged in an array; and a thin-film circuit module disposed on the flexible substrate and configured to electrically connect the plurality of probe units and the source meter module; wherein, when the backplane is moved to a target position, the flexible substrate deforms under the action of an external force, causing the plurality of probe units to simultaneously make electrical contact with the wafer under test, and the source meter module measures the resistivity of a plurality of test points on the wafer under test through the plurality of probe units.

[0006] According to an embodiment of this application, the probe unit includes a first probe, a second probe, a third probe, and a fourth probe. When the backplate is moved to the target position, the target probe unit among the multiple probe units makes electrical contact with the target test point among the multiple test points. The source meter module applies a measurement current to the target test point through the first and second probes of the target probe unit, and collects the voltage of the target test point through the third and fourth probes of the target probe unit, so that the source meter module can determine the resistivity of the target test point based on the measurement current and the voltage of the target test point.

[0007] According to an embodiment of this application, the thin-film circuit module includes a first multiplexer, a second multiplexer, a third multiplexer, and a fourth multiplexer; multiple input terminals of the first multiplexer are electrically connected to the first probes of each of the multiple probe units; multiple input terminals of the second multiplexer are electrically connected to the second probes of each of the multiple probe units; multiple input terminals of the third multiplexer are electrically connected to the third probes of each of the multiple probe units; multiple input terminals of the fourth multiplexer are electrically connected to the fourth probes of each of the multiple probe units; and the output terminals of the first, second, third, and fourth multiplexers are all electrically connected to the source meter module.

[0008] According to an embodiment of this application, for any one of the first multiplexer, the second multiplexer, the third multiplexer, and the fourth multiplexer, the multiplexer further includes a gating terminal, which enables the output terminal of the multiplexer to be connected to one of the multiple input terminals of the multiplexer according to the received control signal.

[0009] According to an embodiment of this application, the source meter module includes: a digital source meter, which is electrically connected to a first multiplexer, a second multiplexer, a third multiplexer, and a fourth multiplexer. When the backplane is moved to the target position, the digital source meter releases a measurement current at the target test point among multiple test points through the target probe unit among the multiple probe units and collects the voltage of the target test point, so that the digital source meter can determine the resistivity of the target test point based on the measurement current and the voltage of the target test point; and a controller, which is electrically connected to the first multiplexer, the second multiplexer, the third multiplexer, and the fourth multiplexer, and is configured to send control signals to the first multiplexer, the second multiplexer, the third multiplexer, and the fourth multiplexer, respectively.

[0010] According to embodiments of this application, the probe unit is made of one or more of nickel, gold-titanium, or copper.

[0011] According to an embodiment of this application, the flexible substrate includes: a first substrate layer, which is deposited on a back plate; and a second substrate layer, which protrudes from the side of the first substrate layer away from the back plate, and a plurality of probe units protruding from the side of the second substrate layer away from the first substrate layer.

[0012] According to an embodiment of this application, the wafer detector further includes a vertical driving module connected to the side of the backplane away from the flexible substrate, the vertical driving module being used to drive the backplane to move to a target position.

[0013] According to embodiments of this application, multiple probe units are arranged at intervals on multiple concentric circles.

[0014] Another aspect of this application provides a method for detecting the resistivity of a wafer surface, comprising: in response to a resistivity acquisition command, acquiring electrical characteristic data of multiple test points on the wafer under test; generating multiple point tuples based on the position coordinates of the multiple test points and the electrical characteristic data; extracting the correlation relationship between the coordinate positions of the wafer under test and the electrical characteristic data based on the multiple point tuples through a convolutional network and a self-attention mechanism to obtain correlation features; and predicting the resistivity of the target point based on the correlation features to obtain a resistivity prediction result.

[0015] According to embodiments of this application, the aforementioned wafer detector, employing a flexible substrate, can independently compensate for height differences on the wafer surface through the adaptive deformation of the flexible substrate under external force. This ensures uniform electrical contact across the entire field from the center to the edge of the wafer under test. Compared to the stress penetration of rigid probes, the aforementioned wafer detector can control the contact pressure within a smaller range through an elastic deformation mechanism, avoiding damage to the polished wafer surface and the risk of scratches. This supports repeated monitoring during the production process without affecting the wafer yield. Attached Figure Description

[0016] The above and other objects, features and advantages of this application will become clearer from the following description of embodiments with reference to the accompanying drawings, in which:

[0017] Figure 1 A schematic cross-sectional view of a wafer detector according to an embodiment of this application is shown.

[0018] Figure 2 A schematic diagram of the structure of a wafer detector according to an embodiment of this application is shown.

[0019] Figure 3 A schematic diagram illustrating the process of deformation of a flexible substrate according to an embodiment of this application is shown.

[0020] Figure 4 A schematic diagram of the probe unit according to an embodiment of this application is shown.

[0021] Figure 5(a) schematically shows a three-dimensional diagram of the probe array module for performing Kelvin four-probe measurements.

[0022] Figure 5(b) schematically shows the bottom view of the probe array module when performing Kelvin four-probe measurements.

[0023] Figure 6(a) schematically shows a three-dimensional view of the probe array module during transmission line measurement.

[0024] Figure 6(b) schematically shows a bottom-view diagram of the probe array module when performing transmission line measurements.

[0025] Figure 7(a) schematically shows a three-dimensional view of the probe array module used for Van der Burg fa Holm measurement.

[0026] Figure 7(b) schematically shows the bottom view of the probe array module during the Van der Burg fa Holm measurement.

[0027] Figure 8 A schematic diagram of a portion of the structure of a flexible substrate according to an embodiment of this application is shown.

[0028] Figure 9 A flowchart illustrating a wafer surface resistivity detection method according to an embodiment of this application is shown schematically.

[0029] Figure 10 A data flow diagram of a wafer surface resistivity detection method according to an embodiment of this application is illustrated schematically.

[0030] In the diagram: 100, backplane; 200, thin-film circuit module; 300, probe array module; 400, flexible substrate; 500, source / meter module; 110, I-interface; 120, I+interface; 130, U+interface; 140, U-interface; 201-1, first first multiplexer; 201-m, mth first multiplexer; 202-1, first second multiplexer; 202-m, mth second multiplexer; 203-1, first third multiplexer; 203-m, mth third multiplexer; 204-1, 1st fourth multiplexer; 204-m, mth fourth multiplexer; 301, probe unit; 301-1, first probe unit; 301-2, second probe unit; 301-3, third probe unit; 301-4, fourth probe unit; 301-5, fifth probe unit; 301-n, nth probe unit; 311, first probe; 312, second probe; 313, third probe; 314, fourth probe; 410, first substrate; 420, second substrate; 501, digital source meter; 502, controller; A, wafer under test. Detailed Implementation

[0031] The embodiments of this application will now be described with reference to the accompanying drawings. However, it should be understood that these descriptions are exemplary only and are not intended to limit the scope of this application. In the following detailed description, numerous specific details are set forth to provide a thorough understanding of the embodiments of this application for ease of explanation. However, it will be apparent that one or more embodiments may be implemented without these specific details. Furthermore, descriptions of well-known structures and technologies are omitted in the following description to avoid unnecessarily obscuring the concepts of this application.

[0032] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the scope of this application. The terms “comprising,” “including,” etc., as used herein indicate the presence of the stated features, steps, operations, and / or components, but do not exclude the presence or addition of one or more other features, steps, operations, or components.

[0033] All terms used herein (including technical and scientific terms) have the meanings commonly understood by those skilled in the art, unless otherwise defined. It should be noted that the terms used herein are to be interpreted in a manner consistent with the context of this specification, and not in an idealized or overly rigid way.

[0034] When using expressions such as "at least one of A, B and C", they should generally be interpreted in accordance with the meaning that is commonly understood by those skilled in the art (e.g., "a system having at least one of A, B and C" should include, but is not limited to, a system having A alone, a system having B alone, a system having C alone, a system having A and B, a system having A and C, a system having B and C, and / or a system having A, B and C, etc.).

[0035] In the embodiments of this application, the user's authorization or consent was obtained before obtaining or collecting the user's personal information.

[0036] Currently, the main methods for determining the full-field resistivity map of semiconductor wafers include the following: (1) Automatic probe tester based on mechanical step displacement: The displacement stage drives a single rigid probe to scan the semiconductor wafer surface point by point. Its core limitation is that the measurement mode is a serial operation, and it takes several minutes to obtain a high-density full-field resistivity map of a semiconductor wafer, which restricts the throughput of the production line; and the mechanical reciprocating motion is prone to introducing vibration deviation and particle contamination, which is difficult to meet the requirements of advanced packaging for extremely high positioning accuracy. (2) Rigid probe card based on MEMS (Micro-Electro-Mechanical Systems) cantilever beam or vertical needle tip. Multi-point measurement is achieved by pressing down once through a multi-probe array. However, such probes are mostly made of high-hardness metals such as tungsten or tungsten carbide, which can easily cause crater-like mechanical damage to the fragile semiconductor film or polished surface when pressed down. In addition, since the rigid structure lacks the deformation compensation capability in the vertical direction of the Z-axis, when facing semiconductor wafers that have micron-level warping after heat treatment, the probe card is difficult to ensure the consistency of pressure at all measurement points in the entire field, which leads to contact resistance fluctuations or even measurement failure. (3) Non-contact optical detection methods based on eddy currents or terahertz waves. Although such methods are non-destructive, their sensitivity to ultrathin metal layers or lightly doped semiconductors is limited, and the measurement results are highly dependent on complex physical model calibration, making it difficult to directly reflect the true electrical impedance information.

[0037] In view of this, embodiments of this application provide a wafer detector, including: a backplane; a source meter module disposed on the backplane; a flexible substrate protruding from one side of the backplane; a probe array module disposed on the side of the flexible substrate away from the backplane, the probe array module including a plurality of probe units arranged in an array; and a thin-film circuit module disposed on the flexible substrate and configured to electrically connect the plurality of probe units and the source meter module; wherein, when the backplane is moved to a target position, the flexible substrate deforms under the action of an external force, causing the plurality of probe units to simultaneously make electrical contact with the wafer under test, and the source meter module measures the resistivity of a plurality of test points on the wafer under test through the plurality of probe units.

[0038] Figure 1 A schematic cross-sectional view of a wafer detector according to an embodiment of this application is shown.

[0039] Figure 2 A schematic diagram of the structure of a wafer detector according to an embodiment of this application is shown.

[0040] According to the embodiments of this application, refer to Figure 1 and Figure 2 The backplate 100 mentioned above can be a standard silicon substrate. The backplate 100 serves to support the thin-film circuit module 200, the probe array module 300, the flexible substrate 400, and the source meter module 500. Furthermore, the flexible substrate 400 can be a low Young's modulus polymer substrate, and the polymer can be PDMS (polydimethylsiloxane). The flexible substrate 400 protrudes from one side of the backplate, and the flexible substrate can face the semiconductor wafer under test, facilitating subsequent resistivity measurements.

[0041] According to the embodiments of this application, refer to Figure 1 and Figure 2 The probe array module 300 may include multiple probe units, which may be arranged in a ring on the flexible substrate, or in other array arrangements; the arrangement method is not limited here. Figure 1 In the diagram, the first probe unit 301-1, the second probe unit 301-2, the third probe unit 301-3, the fourth probe unit 301-4, and the fifth probe unit 301-5 shown are all the same probe unit, distinguished by different numbers due to their different locations. Figure 2 In the diagram, the nth probe unit 301-n represents any probe unit in the probe array module 300. The maximum value of n can be 121.

[0042] The probe array module 300 is disposed on the side of the flexible substrate 400 away from the backplane 100. The thin-film circuit module 200 connects multiple probe units in the probe array module 300 to the source meter module 500. The thin-film circuit module 200 can be fabricated using standard CMOS (Complementary Metal-Oxide-Semiconductor) technology. The size of the thin-film circuit module 200 can be matched to the size of the wafer under test, serving as a bottom-level signal transmission path and providing logic control for the multiple probe units connected to it.

[0043] Figure 3 A schematic diagram illustrating the process of deformation of a flexible substrate according to an embodiment of this application is shown.

[0044] According to an embodiment of this application, when the backplate is pressed down to the target position, the flexible substrate deforms under the action of external force, causing multiple probe units to simultaneously make electrical contact with the wafer A under test. The source meter module can then measure the resistivity of multiple test points on the wafer A under test through the multiple probe units. Since the probe units are disposed on the flexible substrate, each probe unit has independent elastic compensation capability. When the entire wafer detector is pressed down to the surface of the wafer A under test, it can compensate for warping or micro-undulations on the surface of the wafer A under test caused by thermal stress. Figure 3 The flexible substrate can achieve adaptive conformal contact through local elastic deformation, ensuring that multiple probe units 301 can establish stable electrical contact with uniform and minimal contact pressure, which can reduce the physical damage caused by rigid insertion into the wafer under test.

[0045] According to embodiments of this application, a four-probe method can be used to determine resistivity, avoiding the influence of the probe unit's own resistance on the measurement results.

[0046] According to embodiments of this application, the aforementioned wafer detector, employing a flexible substrate, can independently compensate for height differences on the wafer surface through the adaptive deformation of the flexible substrate under external force. This ensures uniform electrical contact across the entire field from the center to the edge of the wafer under test. Compared to the stress penetration of rigid probes, the aforementioned wafer detector can control the contact pressure within a smaller range through an elastic deformation mechanism, avoiding damage to the polished wafer surface and the risk of scratches. This supports repeated monitoring during the production process without affecting the wafer yield.

[0047] According to an embodiment of this application, the probe unit includes a first probe, a second probe, a third probe, and a fourth probe. When the backplate is moved to the target position, the target probe unit among the multiple probe units makes electrical contact with the target test point among the multiple test points. The source meter module applies a measurement current to the target test point through the first and second probes of the target probe unit, and collects the voltage of the target test point through the third and fourth probes of the target probe unit, so that the source meter module can determine the resistivity of the target test point based on the measurement current and the voltage of the target test point.

[0048] Figure 4 A schematic diagram of the probe unit according to an embodiment of this application is shown.

[0049] According to the embodiments of this application, refer to Figure 4 The probe unit 301 may include a first probe 311, a second probe 312, a third probe 313, and a fourth probe 314. The first probe 311, second probe 312, third probe 313, and fourth probe 314 in the probe unit can be connected to the source meter module 500 via the thin-film circuit module 200. Furthermore, when the backplane is moved to the target position, the target probe unit in the probe array module 300 can make electrical contact with the target test point among the multiple test points. Then, the source meter module 500 can apply a measurement current to the target test point through the first probe 311 and second probe 312 of the target probe unit, and collect the voltage of the target test point through the third probe 313 and fourth probe 314 of the target probe unit, so that the source meter module can determine the resistivity of the target test point based on the measurement current and the voltage of the target test point.

[0050] According to the embodiments of this application, the above-mentioned method for determining resistivity is the four-probe method. Specifically, the four-probe method is a resistivity measurement method that eliminates the influence of contact resistance. Its principle is to arrange four probes at equal intervals and contact them with the surface of the sample to be measured. The outer two probes are connected to a constant current source to inject current. The two inner probes are connected to a high-resistance voltmeter to measure the voltage drop. Because the voltmeter has extremely high input impedance, the current flowing through the inner probe is negligible, therefore the measured voltage is... It can reflect the voltage drop caused by the intrinsic resistance of the target test point on the wafer as much as possible, without being affected by the contact resistance between the probe and the wafer; then, based on the measured current... and voltage Combined with the thickness of the wafer to be measured The resistivity of the target test point can be calculated by formula (1). Correspondingly, once the current-voltage value of the test point is determined by measurement, the resistivity of the test point can be considered to have been obtained.

[0051] (1)

[0052] According to embodiments of this application, the aforementioned wafer detector employs a four-probe array arranged on a flexible substrate, upgrading traditional single-point successive measurement to multi-point parallel static measurement. The adaptive deformation of the flexible substrate also enables uniform contact between the probe units and the warped wafer surface. This probe unit structure, combined with the deformation capability of the flexible substrate, retains the high-precision measurement advantages of the traditional four-probe method while achieving efficient static measurement at multiple points across the entire wafer through arrayed parallel arrangement. Simultaneously, it avoids the time overhead and positioning errors associated with mechanical scanning, thereby improving the accuracy and reliability of multi-point resistivity measurement on the wafer surface.

[0053] According to an embodiment of this application, the thin-film circuit module includes a first multiplexer, a second multiplexer, a third multiplexer, and a fourth multiplexer; multiple input terminals of the first multiplexer are electrically connected to the first probes of each of the multiple probe units; multiple input terminals of the second multiplexer are electrically connected to the second probes of each of the multiple probe units; multiple input terminals of the third multiplexer are electrically connected to the third probes of each of the multiple probe units; multiple input terminals of the fourth multiplexer are electrically connected to the fourth probes of each of the multiple probe units; and the output terminals of the first, second, third, and fourth multiplexers are all electrically connected to the source meter module.

[0054] According to embodiments of this application, the thin-film circuit module 200 may include a first multiplexer, a second multiplexer, a third multiplexer, and a fourth multiplexer, as shown in the reference. Figure 2 Multiple first multiplexers can be arranged in parallel, namely, the first first multiplexer 201-1 to the m-th first multiplexer 201-m; multiple second multiplexers can also be arranged in parallel, namely, the first second multiplexer 202-1 to the m-th second multiplexer 202-m; multiple third multiplexers can also be arranged in parallel, namely, the first third multiplexer 203-1 to the m-th third multiplexer 203-m; multiple fourth multiplexers can also be arranged in parallel, namely, the first fourth multiplexer 204-1 to the m-th fourth multiplexer 204-m.

[0055] According to the embodiments of this application, refer to Figure 2Taking the first multiplexer 201-1 as an example, its multiple input terminals can be electrically connected to the first probes of each of the multiple probe units. An I-interface 110 can also be provided on the backplane 100 between the multiple input terminals of the first multiplexer 201-1 and the first probes of each of the multiple single-frame units, making it easier for the multiple first probes to connect to the first multiplexer. Similarly, taking the first second multiplexer 202-1 as an example, its multiple input terminals are electrically connected to the second probes of each of the multiple probe units. An I+ interface 120 can also be provided on the backplane 100 between the multiple input terminals of the first second multiplexer 202-1 and the second probes of each of the multiple single-frame units, making it easier for the multiple second probes to connect to the second multiplexer. For example, taking the first third multiplexer 203-1 as an example, the multiple input terminals of the third multiplexer are electrically connected to the third probes of the multiple probe units respectively. Between the multiple input terminals of the first third multiplexer 203-1 and the third probes of the multiple single-frame units, a U+ interface 130 can also be provided on the backplane 100 to make it easier for the multiple third probes to be connected to the third multiplexer. Taking the first fourth multiplexer 204-1 as an example, the multiple input terminals of the fourth multiplexer are electrically connected to the fourth probes of the multiple probe units respectively. Between the multiple input terminals of the first fourth multiplexer 204-1 and the fourth probes of the multiple single-frame units, a U- interface 140 can also be provided on the backplane 100 to make it easier for the multiple fourth probes to be connected to the fourth multiplexer.

[0056] According to an embodiment of this application, the output terminals of the first multiplexer, the second multiplexer, the third multiplexer, and the fourth multiplexer are all electrically connected to the source table module 500.

[0057] According to an embodiment of this application, for any one of the first multiplexer, the second multiplexer, the third multiplexer, and the fourth multiplexer, the multiplexer further includes a gating terminal, which enables the output terminal of the multiplexer to be connected to one of the multiple input terminals of the multiplexer according to the received control signal.

[0058] According to the embodiments of this application, any one of the first multiplexer, second multiplexer, third multiplexer and fourth multiplexer mentioned above includes a gating terminal, which can control which input terminal the output terminal of the multiplexer is connected to according to the control signal.

[0059] Figures 5(a) and 5(b) schematically illustrate the probe array module for performing Kelvin four-probe measurements.

[0060] Figures 6(a) and 6(b) schematically illustrate the probe array module during transmission line measurements.

[0061] Figures 7(a) and 7(b) schematically illustrate the probe array module for performing Van der Burg fa Hall measurements.

[0062] According to embodiments of this application, the thin-film circuit module can control the selection of different probes in the probe array module according to the control signal, thereby enabling each group of probes on the probe array module and the probes within the group to be combined with other groups of probes in a variety of ways to achieve different functions, including Kelvin four-probe measurement, transmission line (TLM) measurement and van der Berghauer measurement.

[0063] Referring to Figures 5(a) and 5(b), the electrical properties of the probes are defined by control signals. For example, the selected probes are mapped to the positive terminal (I+) of the current source, the negative terminal (I-) of the current source, the positive terminal (V+) of the voltage detection, and the negative terminal (V-) of the voltage detection, respectively. When the measurement function is dynamically switched to the Kelvin four-probe measurement mode, the thin-film circuit module can select four probes in the probe unit 301 in a local area of ​​the probe array module to form a miniature Kelvin detection unit. The two outer probes act as current-forcing terminals to inject excitation current, while the two inner probes act as potential-sensing terminals to directly extract the sample voltage drop. Through the isobaric contact of the flexible probes, the interference of probe tip resistance and lead resistance on the testing of ultrathin semiconductor thin films is eliminated.

[0064] Referring to Figures 6(a) and 6(b), when the measurement function is switched to the transmission line (TLM) step measurement mode, the thin-film circuit module can sequentially select probe combinations with different spacings along the linear direction of the probe array. Without requiring mechanical movement of the probes, the physical distance L between the voltage sensing pair and the current injection pair is changed via electrical switching. The host computer can then rotate radially to measure a length of... The resistance data in the sequence can then be used to extract the sheet resistance of the semiconductor material using linear fitting. With contact resistance This enables the separation of intrinsic parameters under padless conditions.

[0065] Referring to Figures 7(a) and 7(b), when switching to the Van der Berg Hall measurement mode, the thin-film circuit module can select four probes arranged in a square or rectangular pattern in the probe array, bringing them into contact with the periphery of the wafer under test. The topological relationship between the current injection pair and the voltage measurement pair is cyclically switched through path reconstruction defined by the control signal. When a vertical external magnetic field is applied, this mode can be further transformed into Hall measurement, enabling in-situ discrimination of sample carrier concentration, intrinsic mobility, and conductivity type.

[0066] According to the embodiments of this application, the wafer detector described above achieves interconnection between the probe array and the source meter module by configuring independent multiplexers for each of the four probes. The collaborative operation of multiple multiplexers enables the wafer detector to quickly switch between multiple probe units, completing point-by-point or parallel resistivity measurements of the entire wafer under test without mechanical displacement. In addition, the modular multiplexing design facilitates system expansion and maintenance, and the scale of the probe array can be flexibly configured according to wafers of different sizes. Furthermore, the probe units can be precisely selected and flexibly controlled through the selection terminal. The above-mentioned interface enables the wafer detector to replace traditional mechanical displacement with digital logic instructions, improving the measurement efficiency of surface resistivity of semiconductor wafers.

[0067] According to an embodiment of this application, the source meter module includes: a digital source meter, which is electrically connected to a first multiplexer, a second multiplexer, a third multiplexer, and a fourth multiplexer. When the backplane is moved to the target position, the digital source meter releases a measurement current at the target test point among multiple test points through the target probe unit among the multiple probe units and collects the voltage of the target test point, so that the digital source meter can determine the resistivity of the target test point based on the measurement current and the voltage of the target test point; and a controller, which is electrically connected to the first multiplexer, the second multiplexer, the third multiplexer, and the fourth multiplexer, and is configured to send control signals to the first multiplexer, the second multiplexer, the third multiplexer, and the fourth multiplexer, respectively.

[0068] According to the embodiments of this application, refer to Figure 2 The source meter module 500 may include a digital source meter 501 and a controller 502. The digital source meter 501 is electrically connected to multiple first multiplexers, multiple second multiplexers, multiple third multiplexers, and multiple fourth multiplexers. When the backplane is moved to the target position, the digital source meter can determine the voltage-current values ​​of the target test point through the target probe unit, and further obtain the resistivity of the target test point. The controller is also electrically connected to the multiple first multiplexers, multiple second multiplexers, multiple third multiplexers, and multiple fourth multiplexers, and can send control signals to each of the multiple first multiplexers, multiple second multiplexers, multiple third multiplexers, and multiple fourth multiplexers, thereby controlling different gating terminals to connect the output terminal to different input terminals. The aforementioned controller can be an FPGA logic controller. Driven by the FPGA logic controller, the wafer detector can perform parallel sampling or fast time-division multiplexing polling of each test point on the wafer under test at a frequency of milliseconds.

[0069] According to the embodiments of this application, the above structure is based on an electrical logic switching measurement method. After the backplane is pressed into place, a precisely controlled measurement current is released to the target probe unit, and the weak voltage signal of the target test point is acquired simultaneously. The resistivity is directly calculated based on the current-voltage ratio, ensuring the accuracy and traceability of the measurement data. The controller is independent of the measurement loop and is used to send gating control signals to multiple multiplexers, realizing the time decoupling of measurement channel switching and electrical signal acquisition, avoiding electromagnetic interference of control signals to sensitive measurement loops. The above structure can complete the acquisition of the original electrical characteristics of the entire wafer in a few seconds, which originally required several minutes of mechanical scanning, improving the throughput of wafer production line inspection and ensuring the static stability of the measurement environment.

[0070] According to embodiments of this application, the probe unit is made of one or more of nickel, gold-titanium, or copper.

[0071] According to the embodiments of this application, the probe material in the probe unit is prepared by a multi-layer metal composite process from the inside out, which can deposit copper, nickel and gold in sequence, and multiple metals can take into account both conductivity and wear resistance.

[0072] According to embodiments of this application, a composite micro-nano fabrication process is employed when preparing the thin-film circuit module and the probe array module. Specifically, to ensure the reliability of the circuit connection when the flexible substrate composed of polymer undergoes elastic stretching or bending, the wires in the thin-film circuit module can use a flexible and stretchable structure, fabricated using conductive materials with tensile strength. The wire shape can be linear to reduce space occupation, or serpentine to enhance tensile strength through geometric stretchability. The position of the probe unit is defined using photolithography, and the probe metal body can be constructed using an electrochemical deposition process. Specifically, firstly, electroplated copper is used as a highly conductive core, followed by the deposition of nickel and gold protective layers on the copper surface. The nickel or gold protective layer can be prepared by electroplating or electroless plating. For electroplating, the thickness of the electroplated metal layer can be controlled by adjusting the current density, plating time, and electrolyte composition; for electroless plating, the thickness of the plating layer can be controlled by adjusting the loading ratio, reaction time, and plating solution composition. This ultimately forms a multilayer composite probe unit with both low resistance and excellent oxidation resistance.

[0073] According to embodiments of this application, among the various metal materials constituting the probe unit, nickel, as a protective layer, provides good mechanical strength and corrosion resistance, ensuring the structural integrity of the microprobe during repeated pressure deformation; gold, as a protective layer, utilizes its chemical inertness and low contact resistance to form a stable electrical contact between the probe and the surface of the wafer under test, avoiding measurement drift caused by oxidation or contamination; titanium, as an adhesion layer or alloy component, enhances the bonding force between metal layers, preventing plating peeling during long-term use; and copper, as a conductive core, provides high conductivity to reduce signal transmission loss, making it suitable for high-frequency and high-speed measurement scenarios.

[0074] According to an embodiment of this application, the flexible substrate includes: a first substrate layer, which is deposited on a back plate; and a second substrate layer, which protrudes from the side of the first substrate layer away from the back plate, and a plurality of probe units protruding from the side of the second substrate layer away from the first substrate layer.

[0075] According to embodiments of this application, multiple probe units are arranged at intervals on multiple concentric circles.

[0076] Figure 8 A schematic diagram of a portion of the structure of a flexible substrate according to an embodiment of this application is shown.

[0077] According to the embodiments of this application, refer to Figure 8 The flexible substrate 400 may further include a first substrate layer 410 and a second substrate layer 420, wherein the second substrate layer 420 protrudes from the first substrate layer, and the probe unit 301 is disposed on the second substrate layer 420. The second substrate layer 420 may be configured as multiple concentric circles with different radii, and the probe unit 301 may be arranged at intervals on the multiple concentric circles, so that the probe unit can cover as much of the surface of the wafer under test as possible.

[0078] According to embodiments of this application, when transferring a thin-film circuit module and a probe array module onto a flexible substrate, a sacrificial layer release technique can be used to transfer the connected thin-film circuit module and probe array module from a standard silicon substrate to the flexible substrate. Specifically, the probe array module can first be transferred from the silicon substrate to the sacrificial layer. The sacrificial layer material can include a water-soluble substrate or a thermoplastic substrate. The water-soluble substrate can be polyvinyl alcohol, and the thermoplastic substrate can be paraffin wax. Subsequently, the connected thin-film circuit module and probe array module can be fixed onto the flexible substrate, and the sacrificial layer can be peeled off or dissolved. The flexible substrate material can be a silicone-based material, a polyurethane-based material, or a hydrogel-based material. The silicone-based material can be polydimethylsiloxane or ultra-flexible silicone rubber, and the hydrogel-based material can be polyethylene glycol diacrylate hydrogel. Finally, the non-destructive transfer of the thin-film circuit module and probe array module is completed by dissolving or melting the sacrificial layer.

[0079] According to an embodiment of this application, the flexible substrate is a double-layer composite structure comprising a first substrate layer and a second substrate layer. The first substrate layer is directly laid on the backplate, providing a reliable interface with the rigid backplate and basic support for the overall structure, ensuring that the flexible substrate remains firmly connected to the backplate during repeated pressing without slippage or peeling. The second substrate layer protrudes above the first substrate layer, forming a locally thickened, highly elastic region. Since the probe unit is disposed on the second substrate layer, it provides concentrated elastic deformation space for the probe unit, enabling each probe unit to independently generate controlled collapse and bending according to local undulations on the wafer surface, achieving more precise vertical displacement compensation. This double-layer structure avoids the edge probe contact failure problem caused by insufficient overall stiffness of a single-layer thick substrate, and overcomes the stress concentration defect in the central region caused by excessive local deformation of a single-layer thin substrate, providing a stable flexible foundation for high-precision resistivity measurement.

[0080] According to an embodiment of this application, the wafer detector further includes a vertical driving module connected to the side of the backplate away from the flexible substrate, the vertical driving module being used to drive the backplate to a target position.

[0081] According to an embodiment of this application, when using the aforementioned wafer detector for measurement, the wafer under test is horizontally placed on a high-precision transfer stage. Under the control of the vertical drive module, the probe array module moves downward as a whole to perform quasi-static pressing until it reaches the target position. Thanks to the mechanical adaptive properties of the flexible substrate, when the probe array module contacts the surface of the wafer under test, which is warped at the micrometer level due to thermal stress, each group of flexible four-probe units will generate controlled elastic bending and structural collapse according to the local height difference. The deformation mechanism can effectively compensate for the planar height error of the wafer under test across the entire field, achieving conformal contact between the probe array and the surface of the wafer under test. By precisely controlling the pressing stroke, it is ensured that each group of flexible four probes from the center to the edge can establish a stable electrical contact with a uniform and minimal contact force.

[0082] According to embodiments of this application, by placing the vertical drive module on the side of the backplate away from the flexible substrate, precise control and stable drive of the overall pressing action of the flexible probe array can be achieved. The vertical drive module acts directly on the rigid backplate rather than the flexible substrate, avoiding mechanical interference between the drive mechanism and the probe measurement area. This ensures that the flexible substrate and the probe array on it are subjected to uniform pressure in the vertical direction only during the pressing process, without being affected by lateral shear force or torque. This ensures that each probe unit can contact the surface of the wafer under test with a consistent mechanical posture. This improves the repeatability and positioning accuracy of the measurement process and the long-term reliability of the equipment, providing a mechanical execution basis for resistivity measurement.

[0083] According to embodiments of this application, the wafer detector described above includes: in response to a resistivity acquisition command, acquiring electrical characteristic data of multiple test points on the wafer under test; generating multiple point pairs based on the position coordinates of the multiple test points and the electrical characteristic data; extracting the correlation between the coordinate positions of the wafer under test and the electrical characteristic data based on the multiple point pairs using a convolutional network and a self-attention mechanism to obtain correlation features; and predicting the resistivity of the target point based on the correlation features to obtain a resistivity prediction result.

[0084] Figure 9 A flowchart illustrating a wafer surface resistivity detection method according to an embodiment of this application is shown schematically.

[0085] like Figure 9 As shown, the wafer surface resistivity detection method according to the embodiments of this application may include steps S910 to S940.

[0086] In step S910, in response to the resistivity acquisition command, electrical characteristic data of multiple test points on the wafer under test are acquired.

[0087] In step S920, multiple point tuples are generated based on the position coordinates and electrical characteristic data of multiple test points.

[0088] In step S930, the correlation between the coordinate position of the wafer under test and the electrical feature data is extracted based on multiple point binary pairs through a convolutional network and a self-attention mechanism to obtain the correlation features.

[0089] In step S940, the resistivity of the target point is predicted based on the correlation features to obtain the resistivity prediction result.

[0090] Figure 10 A data flow diagram of a wafer surface resistivity detection method according to an embodiment of this application is illustrated schematically.

[0091] According to the embodiments of this application, refer to Figure 10 The aforementioned electrical characteristic data can refer to the current-voltage values ​​collected by the digital source meter at the point under test.

[0092] Specifically, during the signal acquisition phase, the controller synchronously drives multiple multiplexers to perform cyclic or parallel sampling on hundreds of probe units distributed across the entire wafer field. The sampled current-voltage values, along with the position coordinates of each probe unit in the wafer coordinate system, form a point-to-position tuple 1010. Then, the point-to-position tuple 1010 can be used as input physical information neural network model 1020.

[0093] For the selection and training of physical information neural network models, based on computational resources and accuracy requirements, the base model of the physical information neural network can be a self-diffusion model, a generative adversarial network (GAN), or a convolutional neural network (CNN) to construct a high-dimensional nonlinear mapping model. Self-diffusion models can include: denoising diffusion probability models, super-resolution diffusion models, and stable diffusion models; generative adversarial networks can include: such as super-resolution GANs, enhanced GANs, and recurrent consistent GANs; convolutional neural networks can include: such as super-resolution convolutional neural networks, enhanced deep super-resolution networks, and U-shaped convolutional neural networks.

[0094] Furthermore, to ensure that data predictions conform to physical laws, a physical constraint-driven training strategy can be adopted. Supervised training can obtain dense ground truth labels by controlling the probe array module to perform multiple small-angle rotation and superposition measurements, and construct a composite loss function that integrates data prediction errors with constraints from the Poisson equation and the current continuity equation for model optimization. If self-supervised training is adopted, when ground truth labels are lacking, only the residuals of the above physical equations can be used as the loss function. Through physical regularization, the network can achieve dense parameter interpolation predictions that conform to the electrical transmission mechanism under label-less conditions.

[0095] Finally, after receiving the point-to-point binary data from a single pressure sampling, the trained physical information neural network model extracts associated features and outputs a high-density full-field resistivity map 1030 of the entire wafer under test. Further, to obtain the resistivity prediction result 1040, this full-field resistivity map can be input into the production line quality judgment engine to identify which points have abnormal resistivity. The engine calculates the resistivity uniformity and range in the full-field resistivity map in real time and compares it with preset target specifications. If the resistivity is within the specification range, for example, if the resistivity uniformity is less than 3%, a GooD command is output, and the wafer under test proceeds to the next process. If the resistivity is abnormal, a No-GooD command is output, and based on the relationship between resistivity and position coordinates in the predicted full-field resistivity map, the physical spatial position coordinates on the surface of the wafer under test can be traced back. This position coordinate information can then be fed back to upstream thin film deposition or ion implantation equipment, which can be used to guide targeted correction of process parameters or troubleshoot equipment malfunctions. This enables static, full-field, and non-destructive precision monitoring of the quality of the wafer under test.

[0096] According to the embodiments of this application, the technical solution of this disclosure, through the above steps, can collect electrical characteristic data of multiple test points, predict the electrical characteristics of other points on the semiconductor wafer using a physical information neural network model, and determine a high-density full-field resistivity mapping map of the entire wafer through resistivity calculation. Finally, quality judgment can be performed through a threshold to obtain the resistivity prediction result. The above prediction process can overcome the limitation of spatial resolution on the density of the probe array module, thereby realizing the reconstruction of a continuous full-field resistivity mapping map from discrete and sparse sampling. This can improve the spatial resolution of resistivity mapping and the prediction accuracy of edge regions, providing semiconductor production lines with a quality monitoring method that balances detection speed and characterization accuracy.

[0097] According to embodiments of this application, program code for executing the computer programs provided in the embodiments of this application can be written in any combination of one or more programming languages. Specifically, these computational programs can be implemented using high-level procedural and / or object-oriented programming languages, and / or assembly / machine languages. Programming languages ​​include, but are not limited to, languages ​​such as Java, C++, Python, "C", or similar programming languages. The program code can be executed entirely on the user's computing device, partially on the user's device, partially on a remote computing device, or entirely on a remote computing device or server. In cases involving remote computing devices, the remote computing device can be connected to the user's computing device via any type of network, including a local area network (LAN) or a wide area network (WAN), or it can be connected to an external computing device (e.g., via the Internet using an Internet service provider).

[0098] The flowcharts and block diagrams in the accompanying drawings illustrate the architecture, functionality, and operation of possible implementations of systems, methods, and computer program products according to various embodiments of this application. In this regard, each block in a flowchart or block diagram may represent a module, segment, or portion of code containing one or more executable instructions for implementing a specified logical function. It should also be noted that in some alternative implementations, the functions indicated in the blocks may occur in a different order than those indicated in the drawings. For example, two consecutively indicated blocks may actually be executed substantially in parallel, and they may sometimes be executed in reverse order, depending on the functions involved. It should also be noted that each block in a block diagram or flowchart, and combinations of blocks in a block diagram or flowchart, may be implemented using a dedicated hardware-based system that performs the specified function or operation, or using a combination of dedicated hardware and computer instructions. Those skilled in the art will understand that the features described in the various embodiments of this application can be combined and / or combined in various ways, even if such combinations are not explicitly described in this application. In particular, without departing from the spirit and teachings of this application, the features described in the various embodiments of this application can be combined and / or combined in various ways. All such combinations and / or combinations fall within the scope of this application.

[0099] The embodiments of this application have been described above. However, these embodiments are merely illustrative and not intended to limit the scope of this application. Although various embodiments have been described above, this does not mean that the measures in the various embodiments cannot be used advantageously in combination. The application does not depart from its scope, and those skilled in the art can make various substitutions and modifications, all of which should fall within the scope of this application.

Claims

1. A wafer detector, characterized in that, include: Back panel; The source table module is located on the backplane; A flexible substrate, the flexible substrate protruding from one side of the back plate; A probe array module is disposed on the side of the flexible substrate away from the back plate, and the probe array module includes multiple probe units arranged in an array. A thin-film circuit module, which is laid on the flexible substrate and configured to electrically connect a plurality of probe units and the source meter module; When the backplate moves to the target position, the flexible substrate deforms under the action of external force, causing multiple probe units to make electrical contact with the wafer under test at the same time. The source meter module measures the resistivity of multiple test points on the wafer under test through multiple probe units.

2. The wafer detector according to claim 1, characterized in that: The probe unit includes a first probe, a second probe, a third probe, and a fourth probe; When the backplate moves to the target position, the target probe unit among the plurality of probe units makes electrical contact with the target test point among the plurality of test points. The source meter module applies a measuring current to the target test point through the first and second probes of the target probe unit, and collects the voltage of the target test point through the third and fourth probes of the target probe unit, so that the source meter module can determine the resistivity of the target test point based on the measuring current and the voltage of the target test point.

3. The wafer detector according to claim 2, characterized in that: The thin-film circuit module includes a first multiplexer, a second multiplexer, a third multiplexer, and a fourth multiplexer; The multiple input terminals of the first multiplexer are electrically connected to the first probe of each of the multiple probe units; The multiple input terminals of the second multiplexer are electrically connected to the second probes of the respective multiple probe units; The multiple input terminals of the third multiplexer are electrically connected to the third probes of the multiple probe units, respectively. The multiple input terminals of the fourth multiplexer are electrically connected to the fourth probe of each of the multiple probe units; The outputs of the first, second, third, and fourth multiplexers are all electrically connected to the source meter module.

4. The wafer detector according to claim 3, characterized in that: For any one of the first multiplexer, the second multiplexer, the third multiplexer, and the fourth multiplexer, the multiplexer further includes a gating terminal, which enables the output terminal of the multiplexer to be connected to one of the multiple input terminals of the multiplexer according to the received control signal.

5. The wafer detector according to claim 4, characterized in that, The source table module includes: The digital source meter is electrically connected to a first multiplexer, a second multiplexer, a third multiplexer, and a fourth multiplexer. When the backplane is moved to the target position, the digital source meter releases a measuring current at the target test point among the multiple test points through the target probe unit of the multiple probe units and collects the voltage of the target test point, so that the digital source meter can determine the resistivity of the target test point based on the measuring current and the voltage of the target test point. A controller is electrically connected to a first multiplexer, a second multiplexer, a third multiplexer, and a fourth multiplexer, and the controller is configured to send control signals to the first multiplexer, the second multiplexer, the third multiplexer, and the fourth multiplexer, respectively.

6. The wafer detector according to claim 1, characterized in that, The probe unit is made of one or more of nickel, gold-titanium, or copper.

7. The wafer detector according to claim 1, characterized in that: The flexible substrate includes: A first substrate layer is laid on the back plate; A second substrate layer is provided on the side of the first substrate layer away from the back plate, and the plurality of probe units are provided on the side of the second substrate layer away from the first substrate layer.

8. The wafer detector according to claim 1, characterized in that, Also includes: A vertical drive module is connected to the side of the backplate away from the flexible substrate, and the vertical drive module is used to drive the backplate to move to a target position.

9. The wafer detector according to claim 1, characterized in that, Multiple probe units are arranged at intervals on multiple concentric circles.

10. A method for detecting the resistivity of a wafer surface, characterized in that, The wafer detector applied to any one of claims 1 to 9 comprises: In response to the resistivity acquisition command, electrical characteristic data of multiple test points on the wafer under test are acquired; Based on the position coordinates of multiple test points and the electrical characteristic data, multiple point tuples are generated. By employing convolutional networks and self-attention mechanisms, the correlation between the coordinate positions of the wafer under test and electrical feature data is extracted based on multiple point-position pairs, thus obtaining the associated features; and Based on the aforementioned correlation features, the resistivity of the target point is predicted, and the resistivity prediction result is obtained.

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