Fault detection method of relay circuit and relay circuit

Abstract

The invention provides a fault detection method of a relay circuit and the relay circuit, the relay circuit comprises a fault detection pin, the relay circuit comprises at least one voltage transmission path, and each voltage transmission path is provided with at least one relay. The method comprises the following steps: respectively detecting an alternating current voltage signal and a direct current voltage signal corresponding to each voltage transmission path in a first working state or a second working state through a fault detection pin; a fault state of the relay circuit is determined based on the AC voltage signal and the DC voltage signal. The fault detection method of the relay circuit can detect the working state of the relay, realizes fault detection before equipment operation, provides an overhaul basis for equipment maintenance, and ensures safe and reliable operation of the equipment.

Description

Technical Field

[0001] This application relates to the technical field of power electronics, and in particular to a fault detection method for a relay circuit and a relay circuit. Background Technology

[0002] In photovoltaic and energy storage PCS equipment, relays are indispensable components, and their disconnection and engagement reliability directly determine the safety and reliability of equipment operation. In current mainstream inverter equipment, AC port relays are basically two sets connected in series per phase. This scheme mainly considers that there is sufficient electrical clearance redundancy between the AC and DC networks when the relay is disconnected. However, under some abnormal conditions, such as high current conditions, relay contacts may stick together. If the relay contact sticking fault cannot be detected and reported in time, it may cause the fault to spread further during equipment operation, thereby affecting the reliability of the equipment. Summary of the Invention

[0003] This application mainly provides a fault detection method for relay circuits and a relay circuit. The fault detection method for relay circuits can detect the working status of relays, realize fault detection before equipment operation, provide a basis for equipment maintenance, and ensure the safe and reliable operation of equipment.

[0004] To solve the above-mentioned technical problems, the first technical solution adopted in this application is: to provide a fault detection method for a relay circuit, wherein the relay circuit includes a fault detection pin, the relay circuit includes at least one voltage transmission path, and at least one relay is provided on each voltage transmission path, the method comprising: The AC voltage signal and DC voltage signal corresponding to each voltage transmission path are detected by the fault detection pin in either the first or second working state. The fault state of the relay circuit is determined based on AC voltage signals and DC voltage signals.

[0005] In one embodiment, the AC voltage signal and DC voltage signal corresponding to each voltage transmission path are detected by a fault detection pin in either a first operating state or a second operating state, including: All relays in each voltage transmission path are kept in the off state so that the relay circuit is in the first working state. Detect the AC and DC voltage signals of each voltage transmission path; Determining the fault state of a relay circuit based on AC and DC voltage signals includes: In response to the fact that all target voltage signals are the same and their absolute values ​​are greater than a first preset value, and the absolute value of the difference between the associated voltage signal and the target voltage signal corresponding to the same voltage transmission path is less than a second preset value, it is determined that all relays in the voltage transmission path corresponding to the associated voltage signal are in a stuck state; wherein, the target voltage signal is one of a DC voltage signal and an AC voltage signal, and the associated voltage signal is the other of a DC voltage signal and an AC voltage signal.

[0006] In one embodiment, determining the fault state of a relay circuit based on AC voltage signals and DC voltage signals includes: If the sum of all target voltage signals equals a first preset value, and the absolute value of any target voltage signal is greater than the first preset value, then it is determined that all relays in all voltage transmission paths are in a stuck state.

[0007] In one embodiment, determining the fault state of the relay circuit based on the AC voltage signal and the target voltage signal includes: In response to the sum of the first target voltage signal and the second target voltage signal being equal to a preset multiple of the third target voltage signal, it is determined that all relays in the voltage transmission path corresponding to the first target voltage signal and the second target voltage signal are in a stuck state.

[0008] In one embodiment, the AC voltage signal and DC voltage signal corresponding to each voltage transmission path are detected by the fault detection pin in either the first operating state or the second operating state, including: In each voltage transmission path, some relays are controlled to be in the energized state while the rest are in the OFF state, so that the relay circuit is in the second working state. Detect the AC and DC voltage signals of each voltage transmission path; Determining the fault state of a relay circuit based on AC and DC voltage signals includes: In response to the fact that all target voltage signals are the same and their absolute values ​​are greater than a first preset value, and the absolute value of the difference between the associated voltage signal and the target voltage signal corresponding to the same voltage transmission path is less than a second preset value, it is determined that the relay in the voltage transmission path corresponding to the associated voltage signal is in a stuck state; wherein, the target voltage signal is one of a DC voltage signal and an AC voltage signal, and the associated voltage signal is the other of a DC voltage signal and an AC voltage signal.

[0009] In one embodiment, determining the fault state of the relay circuit based on the AC voltage signal and the target voltage signal includes: If the sum of all target voltage signals equals a first preset value, and the absolute value of any target voltage signal is greater than the first preset value, then it is determined that the relays in the open state in all voltage transmission paths are in a stuck state.

[0010] In one embodiment, determining the fault state of the relay circuit based on the AC voltage signal and the target voltage signal includes: In response to the sum of the first target voltage signal and the second target voltage signal being equal to a preset multiple of the third target voltage signal, it is determined that the relays in the voltage transmission paths corresponding to the first target voltage signal and the second target voltage signal, which are in an open state, are in a stuck state.

[0011] To solve the above-mentioned technical problems, the second technical solution adopted in this application is: to provide a relay circuit, including: There is at least one voltage transmission path, and a relay is installed on the voltage transmission path. The first end of the voltage transmission path is connected to the DC side, and the second end of the voltage transmission path is connected to the AC side. The detection unit includes multiple detection paths. The first end of each detection path is connected to the first end and the second end of each voltage transmission path, respectively. The second end of the detection path serves as a fault detection pin. The fault detection pin is used to detect the AC voltage signal and DC voltage signal corresponding to each voltage transmission path in the first or second operating state, so as to determine the fault state of the relay circuit based on the AC voltage signal and DC voltage signal using any of the above fault detection methods.

[0012] In one embodiment, the detection unit includes: a first detection unit and a second detection unit. The first detection unit includes multiple first detection paths. The first end of each first detection path is connected between the DC side and the relay, and the second ends of each first detection path are interconnected as a first fault detection pin. The first fault detection pin is used to detect DC voltage signals in a first working state or a second working state. The second detection unit includes multiple second detection channels. The first end of each second detection channel is connected between the AC side and the relay, and the second ends of each second detection channel are interconnected as a second fault detection pin. The second fault detection pin is used to detect AC voltage signals in the first working state or the second working state.

[0013] In one embodiment, each first detection path includes: A capacitor or resistor connected in series between the DC side and the first fault detection pin; or A capacitor and a resistor are connected in parallel between the DC side and the first fault detection pin.

[0014] In one embodiment, each second detection path includes: A capacitor connected in series between the AC side and the second fault detection pin; or A capacitor and a resistor are connected in parallel between the AC side and the second fault detection pin.

[0015] In one embodiment, the second detection unit further includes: The filter unit is connected between the second fault detection pin and the ground terminal.

[0016] In one embodiment, the first fault detection pin and the second fault detection pin are interconnected.

[0017] The beneficial effects of this application are as follows: Unlike existing technologies, the relay circuit provided in this application includes a fault detection pin. The relay circuit includes at least one voltage transmission path, and at least one relay is provided on each voltage transmission path. The fault detection method includes: detecting the AC voltage signal and DC voltage signal corresponding to each voltage transmission path through the fault detection pin in a first operating state or a second operating state; and determining the fault state of the relay circuit based on the AC voltage signal and DC voltage signal. This fault detection method for the relay circuit can detect the operating state of the relay, realize fault detection before equipment operation, provide a basis for equipment maintenance, and ensure the safe and reliable operation of the equipment. Attached Figure Description

[0018] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0019] Figure 1 This is a flowchart illustrating the first embodiment of the fault detection method for relay circuits according to this application. Figure 2 This is a schematic diagram of the structure of the relay circuit of the first embodiment of this application; Figure 3 This is a flowchart illustrating a second embodiment of the fault detection method for relay circuits according to this application. Figure 4 This is a flowchart illustrating the third embodiment of the fault detection method for relay circuits according to this application. Figure 5 This is a flowchart illustrating the fourth embodiment of the fault detection method for relay circuits according to this application. Figure 6 This is a schematic diagram of the structure of a second embodiment of the relay circuit of this application; Figure 7This is a schematic diagram of the structure of the third embodiment of the relay circuit of this application; Figure 8 This is a schematic diagram of the structure of the fourth embodiment of the relay circuit of this application; Figure 9 This is a schematic diagram of the fifth embodiment of the relay circuit of this application; Figure 10 This is a schematic diagram of the sixth embodiment of the relay circuit of this application. Detailed Implementation

[0020] The embodiments of this application will now be described in detail with reference to the accompanying drawings.

[0021] In the following description, specific details such as particular system architectures, interfaces, and technologies are presented for illustrative purposes rather than for limiting purposes, in order to provide a thorough understanding of this application.

[0022] In this article, the term "and / or" simply describes the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A alone, A and B simultaneously, or B alone. Additionally, the character " / " generally indicates that the preceding and following related objects have an "or" relationship. Furthermore, "more" in this article means two or more objects.

[0023] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein is for the purpose of describing embodiments of this application only and is not intended to limit this application.

[0024] Before providing a further detailed description of the embodiments of this application, the nouns and terms involved in the embodiments of this application will be explained, and the nouns and terms involved in the embodiments of this application shall be interpreted as follows.

[0025] To enable those skilled in the art to better understand the technical solutions of this application, the application will be further described in detail below with reference to the accompanying drawings and specific embodiments.

[0026] See Figure 1 , Figure 1 This is a flowchart illustrating an embodiment of the relay fault detection method of this application, specifically including: Step S11: Detect the AC voltage signal and DC voltage signal corresponding to each voltage transmission path through the fault detection pin in the first working state or the second working state respectively.

[0027] Specifically, the relay circuit includes at least one voltage transmission path, and each voltage transmission path has at least one relay. It should be noted that in inverter equipment, the three-phase AC circuit is generally connected between the inverter's power output side and the load / grid; it is used to convert the DC power output from the power output side, such as photovoltaic panels, lithium batteries, or fuel cells, into AC power. The three-phase AC circuit generally includes three voltage transmission paths, and each voltage transmission path uses a dual-relay series design. This application uses a relay circuit as an example of a three-phase AC circuit for illustration.

[0028] The relay circuit fault detection pin of this application detects the AC voltage signal and DC voltage signal corresponding to each voltage transmission path in the first working state or the second working state, respectively.

[0029] Step S12: Determine the fault state of the relay circuit based on the AC voltage signal and the DC voltage signal.

[0030] In one embodiment, all relays in each voltage transmission path are controlled to be in an open state, so that the relay circuit is in a first operating state. The AC voltage signal and DC voltage signal of each voltage transmission path are detected.

[0031] Specifically, in combination Figure 2 The relay circuit shown is explained below. It controls two relays in the three voltage transmission paths to be in the open state, i.e., relays K1-K6 are in the open state. At this time, the DC voltage signals Ua, Ub, and Uc of the voltage transmission paths are detected through the fault detection pin N1, and the AC voltage signals UA, UB, and UC of the voltage transmission paths are detected through the fault detection pin. Based on the DC voltage signals Ua, Ub, and Uc and the AC voltage signals UA, UB, and UC, it is determined whether K1-K6 are in a stuck state. If they are in a stuck state, it indicates a fault.

[0032] In one embodiment, in order to improve the accuracy of fault diagnosis, after acquiring DC voltage signals Ua, Ub, Uc and AC voltage signals UA, UB, UC, the acquired DC voltage signals and AC voltage signals are further processed by noise reduction, filtering and other methods to eliminate the interference of transient noise.

[0033] It should be noted that when relays K1-K6 are in the open state, if none of the relays are stuck together, it means that each voltage transmission path is cut off by the relays, resulting in complete electrical isolation between the inverter side (DC side) and the grid / load side (AC side). Theoretically, the collected DC voltage signals Ua, Ub, Uc and AC voltage signals UA, UB, UC should all be 0 at this time. However, if the absolute values ​​of the collected DC voltage signals Ua, Ub, Uc and AC voltage signals UA, UB, UC are greater than 0, it indicates that a voltage transmission path is stuck together. In this case, it is necessary to further determine which voltage transmission path the stuck relay is located on.

[0034] In one embodiment, in response to all target voltage signals being identical and having an absolute value greater than a first preset value, and the absolute value of the difference between the associated voltage signal and the target voltage signal corresponding to the same voltage transmission path being less than a second preset value, it is determined that all relays in the voltage transmission path corresponding to the associated voltage signal are in a stuck state; wherein, the target voltage signal is one of a DC voltage signal and an AC voltage signal, and the associated voltage signal is the other of a DC voltage signal and an AC voltage signal. This embodiment uses a DC voltage signal as the target voltage signal and an AC voltage signal as the associated voltage signal for illustration. In other embodiments, the target voltage signal may also be an AC voltage signal and the associated voltage signal may be a DC voltage signal.

[0035] Specific combination Figure 3 With relays K1-K6 in the open state, if all DC voltage signals are identical and their absolute values ​​are greater than the first preset value (i.e., |Ua|=|Ub|=|Uc|>m), it indicates that a voltage transmission path is stuck. See details... Figure 3 The process is shown in section 21.

[0036] If, in the A-phase voltage transmission path, the absolute value of the difference between the AC voltage signal UA and the DC voltage signal Ua is less than the second preset value, i.e., |UA-Ua| < n, then all relays in the A-phase voltage transmission path, namely K1 and K4, are determined to be in a stuck state. If, in the B-phase voltage transmission path, the absolute value of the difference between the AC voltage signal UB and the DC voltage signal Ub is less than the second preset value, i.e., |UB-Ub| < n, then all relays in the B-phase voltage transmission path, namely K2 and K5, are determined to be in a stuck state. If, in the C-phase voltage transmission path, the absolute value of the difference between the AC voltage signal UC and the DC voltage signal Uc is less than the second preset value, i.e., |UC-Uc| < n, then all relays in the C-phase voltage transmission path, namely K3 and K6, are determined to be in a stuck state.

[0037] Understandably, the second preset value can be set to a smaller value. In the A-phase voltage transmission path, if |UA-Ua| < n, it means that the amplitude and phase of the DC voltage signal and the AC voltage signal are almost the same. That is to say, the DC voltage signal Ua may be transmitted by the AC voltage signal UA through relays K1 and K4. To achieve voltage transmission, relays K1 and K4 must be in a stuck state. The judgment logic for the B-phase voltage transmission path and the C-phase voltage transmission path is the same, and will not be repeated here.

[0038] In other embodiments, a DC voltage signal Ub or Uc may be used as a reference DC voltage signal.

[0039] In the above embodiment, the first preset value m is, for example, 0. In other application scenarios, it can also be other values, and there is no specific limitation. The second preset value n is a smaller value than the preset value, for example, less than 10V. In other application scenarios, it can also be 2V, 8V, 5V, etc., and there is no specific limitation.

[0040] In one embodiment, in response to the sum of all target voltage signals equaling a first preset value, and the absolute value of any target voltage signal being greater than the first preset value, it is determined that all relays in all voltage transmission paths are in a stuck state. Specifically, if Ua + Ub + Uc = m, |Ua| > m, or |Ub| > m, or |Uc| > m, then it is determined that all relays in all voltage transmission paths are in a stuck state, i.e., K1-K6 are all in a stuck state. See details below. Figure 3 The process is shown in section 22.

[0041] It should be noted that, ideally, the sum of the three-phase AC voltage signals is 0, i.e., UA + UB + UC = 0. If |Ua| > 0 or |Ub| > 0 or |Uc| > 0, it indicates that there is voltage input on the DC side, and Ua + Ub + Uc = 0. This proves that the state of the three-phase DC voltage signal is completely consistent with the state of the three-phase AC voltage signal, indicating that the DC voltage signal and the AC voltage signal meet the requirements of symmetrical three-phase voltage, i.e., equal amplitude and phase difference of 120°. To ensure that the DC voltage signal meets the requirements of symmetrical three-phase voltage, K1-K6 must be in a sticky state.

[0042] In one embodiment, in response to the sum of the first target voltage signal and the second target voltage signal being equal to a preset multiple of the third target voltage signal, it is determined that all relays in the voltage transmission path corresponding to the first target voltage signal and the second target voltage signal are in a stuck state.

[0043] It should be noted that, in the case of relays sticking together in a two-phase current transmission path, the DC voltage signal of the unsticking current transmission path is equal to half the sum of the DC voltage signals of the other two sticking current transmission paths. Assuming the relay in phase A's current transmission path is not sticking together, and phases B and C's current transmission paths are sticking together, then the DC voltage signal of phase A's current transmission path satisfies: ; in, This represents the DC voltage signal of the current transmission path in phase A at time t. This represents the DC voltage signal of the B-phase current transmission path at time t. This represents the DC voltage signal of the C-phase current transmission path at time t.

[0044] Based on the above analysis, see Figure 3 The process shown in section 23 assumes that the first DC voltage signal is Ua, the second DC voltage signal is Ub, and the third DC voltage signal is Uc. If (Ua+Ub)=PUc, where P is a positive integer greater than 1, representing a preset multiple, typically 2, then it is determined that all relays in the voltage transmission path corresponding to DC voltage signals Ua and Ub are in a stuck state, i.e., relays K1, K2, K4, and K5 are in a stuck state.

[0045] Assuming the first DC voltage signal is Ub, the second DC voltage signal is Uc, and the third DC voltage signal is Ua, if (Uc+Ub)=PUa, then all relays in the voltage transmission path corresponding to the DC voltage signals Uc and Ub are in a stuck state, that is, relays K3, K2, K6, and K5 are in a stuck state.

[0046] Assuming the first DC voltage signal is Ua, the second DC voltage signal is Uc, and the third DC voltage signal is Ub, if (Uc+Ua)=PUb, then all relays in the voltage transmission path corresponding to the DC voltage signals Uc and Ua are in a stuck state, that is, relays K3, K1, K6, and K4 are in a stuck state.

[0047] In another embodiment of this application, combined with Figure 2 The relay circuit shown controls some relays in each voltage transmission path to be in the energized state and the rest to be in the OFF state, so that the relay circuit is in a second working state; detects the AC voltage signal and DC voltage signal of each voltage transmission path; and determines the fault state of the relay circuit based on the AC voltage signal and DC voltage signal.

[0048] In one embodiment, combined with Figure 4The relays K1, K2, and K3 are in the energized state, while the relays K4, K5, and K6 are in the de-energized state. At this time, the relay circuit is in the second working state.

[0049] In response to the condition that all target voltage signals are identical and their absolute values ​​are greater than a first preset value, and the absolute value of the difference between the associated voltage signal and the target voltage signal corresponding to the same voltage transmission path is less than a second preset value, it is determined that the relay in the voltage transmission path corresponding to the associated voltage signal, which is in an open state, is in a stuck state. Here, the target voltage signal is one of a DC voltage signal and an AC voltage signal, and the associated voltage signal is the other of a DC voltage signal and an AC voltage signal. This embodiment also uses the example of a DC voltage signal as the target voltage signal and an AC voltage signal as the associated voltage signal for explanation. For details, see Figure 4 As shown in section 31, if all DC voltage signals are identical and their absolute values ​​are greater than the first preset value (i.e., |Ua|=|Ub|=|Uc|>m), it indicates that a voltage transmission path is in a stuck state. Further, if in phase A voltage transmission path, the absolute value of the difference between AC voltage signal UA and DC voltage signal Ua is less than the second preset value (i.e., |UA-Ua|<n), then all relays K4 in phase A voltage transmission path are determined to be in a stuck state. If in phase B voltage transmission path, the absolute value of the difference between AC voltage signal UB and DC voltage signal Ub is less than the second preset value (i.e., |UB-Ub|<n), then all relays K5 in phase B voltage transmission path are determined to be in a stuck state. If in phase C voltage transmission path, the absolute value of the difference between AC voltage signal UC and DC voltage signal Uc is less than the second preset value (i.e., |UC-Uc|<n), then all relays K6 in phase C voltage transmission path are determined to be in a stuck state.

[0050] Understandably, in the A-phase voltage transmission path, if relay K1 is engaged, |UA-Ua| < n, for example, 0, it indicates that the amplitudes and phases of the DC and AC voltage signals are almost identical. This means the DC voltage signal Ua may be transmitted from the AC voltage signal UA through relays K1 and K4. For voltage transmission to occur, the A-phase voltage transmission path must be open. Since relay K1 is engaged, relay K4 must be in a stuck state. The judgment logic for the B-phase and C-phase voltage transmission paths is the same and will not be repeated here.

[0051] In one embodiment, in response to the sum of all target voltage signals equaling a first preset value, and the absolute value of any target voltage signal being greater than the first preset value, it is determined that the relays in the open state in all voltage transmission paths are in a stuck state. Specifically, if Ua + Ub + Uc = m, |Ua| > m, or |Ub| > m, or |Uc| > m, then it is determined that the relays in the open state in all voltage transmission paths are in a stuck state, that is, K4, K5, and K6 are all in a stuck state. See details below. Figure 4 The process is shown in section 32.

[0052] It should be noted that, ideally, the sum of the three-phase AC voltage signals is 0, i.e., UA + UB + UC = 0. If |Ua| > 0 or |Ub| > 0 or |Uc| > 0, it indicates that there is voltage input on the DC side, and Ua + Ub + Uc = 0. This proves that the state of the three-phase DC voltage signal is completely consistent with the state of the three-phase AC voltage signal, indicating that the DC voltage signal and the AC voltage signal meet the requirements of symmetrical three-phase voltage, i.e., equal amplitude and phase difference of 120°. To ensure that the DC voltage signal meets the requirements of symmetrical three-phase voltage, all three-phase voltage transmission paths must be open. Since relays K1, K2, and K3 are engaged, K4, K5, and K6 must be in a sticky state.

[0053] In one embodiment, in response to the sum of the first target voltage signal and the second target voltage signal being equal to a preset multiple of the third target voltage signal, it is determined that the relay in the voltage transmission path corresponding to the first target voltage signal and the second target voltage signal, which is in an open state, is in a stuck state.

[0054] For details, see Figure 4 The process shown in section 33 assumes that the first DC voltage signal is Ua, the second DC voltage signal is Ub, and the third DC voltage signal is Uc. If (Ua+Ub)=PUc, where P is a positive integer greater than 1, representing a preset multiple, typically 2, then the relays in the voltage transmission paths corresponding to DC voltage signals Ua and Ub that are in the open state are in the sticky state, i.e., relays K4 and K5 are in the sticky state.

[0055] Assuming the first DC voltage signal is Ub, the second DC voltage signal is Uc, and the third DC voltage signal is Ua, if (Uc+Ub)=PUa, then the relays that are in the open state in the voltage transmission path corresponding to the DC voltage signals Uc and Ub are in the sticky state, that is, relays K6 and K5 are in the sticky state.

[0056] Assuming the first DC voltage signal is Ua, the second DC voltage signal is Uc, and the third DC voltage signal is Ub, if (Uc+Ua)=PUb, then the relays that are in the open state in the voltage transmission path corresponding to DC voltage signals Uc and Ua are in the sticky state, that is, relays K6 and K4 are in the sticky state.

[0057] In another embodiment, combined Figure 5 The relays K4, K5, and K6 are in the energized state, while relays K1, K2, and K3 are in the de-energized state. At this time, the relay circuit is in the second working state.

[0058] In response to the fact that all target voltage signals are the same and their absolute values ​​are greater than a first preset value, and the absolute value of the difference between the associated voltage signal and the target voltage signal corresponding to the same voltage transmission path is less than a second preset value, it is determined that the relay in the voltage transmission path corresponding to the associated voltage signal, which is in an open state, is in a stuck state.

[0059] For details, see Figure 5 As shown in section 41, if all DC voltage signals are identical and their absolute values ​​are greater than the first preset value (i.e., |Ua|=|Ub|=|Uc|>m), it indicates that a voltage transmission path is in a stuck state. Further, if in phase A voltage transmission path, the absolute value of the difference between AC voltage signal UA and DC voltage signal Ua is less than the second preset value (i.e., |UA-Ua|<n), then all relays K1 in phase A voltage transmission path are determined to be in a stuck state. If in phase B voltage transmission path, the absolute value of the difference between AC voltage signal UB and DC voltage signal Ub is less than the second preset value (i.e., |UB-Ub|<n), then all relays K2 in phase B voltage transmission path are determined to be in a stuck state. If in phase C voltage transmission path, the absolute value of the difference between AC voltage signal UC and DC voltage signal Uc is less than the second preset value (i.e., |UC-Uc|<n), then all relays K3 in phase C voltage transmission path are determined to be in a stuck state.

[0060] Understandably, in the A-phase voltage transmission path, if relay K4 is engaged, and |UA-Ua| < n (e.g., 0), it indicates that the amplitudes and phases of the DC and AC voltage signals are almost identical. This means the DC voltage signal Ua may be transmitted from the AC voltage signal UA through relays K1 and K4. For voltage transmission to occur, the A-phase voltage transmission path must be open. Since relay K1 is engaged, it must be in a stuck state. The judgment logic for the B-phase and C-phase voltage transmission paths is the same and will not be elaborated here.

[0061] In one embodiment, in response to the sum of all target voltage signals equaling a first preset value, and the absolute value of any target voltage signal being greater than the first preset value, it is determined that the relays in the open state in all voltage transmission paths are in a stuck state. Specifically, if Ua + Ub + Uc = m, |Ua| > m, or |Ub| > m, or |Uc| > m, then it is determined that the relays in the open state in all voltage transmission paths are in a stuck state, that is, K1, K2, and K3 are all in a stuck state. See details below. Figure 5 The process is shown in section 42.

[0062] It should be noted that, ideally, the sum of the three-phase AC voltage signals is 0, i.e., UA + UB + UC = 0. If |Ua| > 0 or |Ub| > 0 or |Uc| > 0, it indicates that there is voltage input on the DC side, and Ua + Ub + Uc = 0. This proves that the state of the three-phase DC voltage signal is completely consistent with the state of the three-phase AC voltage signal, indicating that the DC voltage signal and the AC voltage signal meet the requirements of symmetrical three-phase voltage, i.e., equal amplitude and phase difference of 120°. To ensure that the DC voltage signal meets the requirements of symmetrical three-phase voltage, all three-phase voltage transmission paths must be open. However, since relays K4, K5, and K6 are engaged, K1, K2, and K3 must be in a sticky state.

[0063] In one embodiment, in response to the sum of the first target voltage signal and the second target voltage signal being equal to a preset multiple of the third target voltage signal, it is determined that the relay in the voltage transmission path corresponding to the first target voltage signal and the second target voltage signal, which is in an open state, is in a stuck state.

[0064] For details, see Figure 5 The process shown in section 43 assumes that the first DC voltage signal is Ua, the second DC voltage signal is Ub, and the third DC voltage signal is Uc. If (Ua+Ub)=PUc, where P is a positive integer greater than 1, representing a preset multiple, typically 2, then the relays in the voltage transmission paths corresponding to DC voltage signals Ua and Ub that are in the open state are in the sticky state, i.e., relays K1 and K2 are in the sticky state.

[0065] Assuming the first DC voltage signal is Ub, the second DC voltage signal is Uc, and the third DC voltage signal is Ua, if (Uc+Ub)=PUa, then the relays that are in the open state in the voltage transmission path corresponding to DC voltage signals Uc and Ub are in the sticky state, that is, relays K3 and K2 are in the sticky state.

[0066] Assuming the first DC voltage signal is Ua, the second DC voltage signal is Uc, and the third DC voltage signal is Ub, if (Uc+Ua)=PUb, then the relays that are in the open state in the voltage transmission path corresponding to DC voltage signals Uc and Ua are in the sticky state, that is, relays K3 and K1 are in the sticky state.

[0067] It should be noted that in the above process, if the DC voltage signal is used as the target voltage signal and the AC voltage signal is used as the associated voltage signal, then the DC voltage signal is the instantaneous voltage value, while the AC voltage signal is the instantaneous voltage value of the DC voltage signal at the corresponding time. If the AC voltage signal is used as the target voltage signal and the DC voltage signal is used as the associated voltage signal, then the AC voltage signal is the average voltage value of the voltage collected over a period of time, and the DC voltage signal is also the average voltage value of the voltage collected over that period of time.

[0068] The fault detection method for relay circuits disclosed in this application can detect whether relays in the relay circuit are stuck together, realize fault detection before equipment operation, provide a basis for equipment maintenance, and ensure the safe and reliable operation of the equipment.

[0069] See Figure 2 , Figure 2 This is a schematic diagram of the structure of a first embodiment of the relay circuit of this application. The relay circuit specifically includes: at least one voltage transmission path and a detection unit 100. A relay is disposed on the voltage transmission path. The first end of the voltage transmission path is connected to the DC side, and the second end of the voltage transmission path is connected to the AC side. In this embodiment, the relay circuit includes three voltage transmission paths, namely, a phase A voltage transmission path, a phase B voltage transmission path, and a phase C voltage transmission path. The detection unit 100 includes multiple detection paths. The first end of each detection path is connected to the first end and the second end of each voltage transmission path, respectively. The second end of the detection path serves as a fault detection pin. The fault detection pin is used to detect the AC voltage signal and DC voltage signal corresponding to each voltage transmission path in a first operating state or a second operating state, so as to determine the fault state of the relay circuit based on the AC voltage signal and the DC voltage signal.

[0070] In one embodiment, the detection unit 100 includes a first detection unit 100A and a second detection unit 100B. The first detection unit 100A includes a plurality of first detection paths 101. The first end of each first detection path 101 is connected between a DC side and a relay such as K1, K2, K3, and the second end of each first detection path 101 is interconnected as a first fault detection pin N1. The first fault detection pin N1 is used to detect DC voltage signals Ua, Ub, and Uc in a first operating state or a second operating state.

[0071] The second detection unit 100B includes multiple second detection paths 102. The first end of each second detection path 102 is connected between the AC side and relays such as K4, K5, and K6. The second ends of each second detection path 102 are interconnected to form a second fault detection pin N2. The second fault detection pin N2 is used to detect AC voltage signals UA, UB, and UC in either the first or second operating state. The detected AC voltage signals UA, UB, and UC, and DC voltage signals Ua, Ub, and Uc, are used to determine the fault state of the relay circuit. (See the description above.) Figures 3 to 5 As shown, it will not be elaborated further here.

[0072] In one embodiment, such as Figure 2 As shown, each first detection path 101 includes a capacitor C1 and a resistor R1 connected in parallel between the DC side and the first fault detection pin N1. The capacitor C1 filters out high-frequency harmonics, making the DC voltage signal on the DC side closer to a sine wave. The resistor R1, together with the capacitor C1, forms an RC filter, which can further attenuate high-frequency interference. Additionally, the resistor R1 can also act as a bleed resistor, forming a discharge circuit with the capacitor C1, allowing residual charge on the capacitor C1 to be released through the resistor R1. In this embodiment, the second detection path 102 includes a capacitor C2 connected in series between the AC side and the second fault detection pin N2. The capacitor C2 acts as a filter capacitor, used to optimize the voltage waveform on the AC side, suppress harmonic interference, and stabilize the voltage.

[0073] See Figure 6 , Figure 6 This is a schematic diagram of the structure of the second embodiment of the relay circuit of this application, which is consistent with the above. Figure 2 The difference in the embodiment shown is that, in this embodiment, the second detection unit 100B further includes a filter capacitor C3, which is used to suppress common-mode interference.

[0074] In one embodiment, the first detection path 101 includes a capacitor or resistor connected in series between the DC side and the first fault detection pin. See details. Figure 7 , Figure 7 This is a schematic diagram of the third embodiment of the relay circuit of this application. In this embodiment, the first detection path 101 includes a capacitor C1 connected in series between the DC side and the first fault detection pin N1. See also... Figure 8 , Figure 8 This is a schematic diagram of the structure of the relay circuit of the present application in the fourth embodiment. In this embodiment, the first detection path 101 includes a resistor R1 connected in series between the DC side and the first fault detection pin N1.

[0075] Furthermore, Figure 7 and Figure 8In the illustrated embodiment, the first fault detection pin N1 and the second fault detection pin N2 are interconnected. In other embodiments, the first fault detection pin N1 and the second fault detection pin N2 may not be interconnected, such as... Figure 9 As shown, no specific restrictions are imposed.

[0076] In one embodiment, see Figure 10 The second detection channel 102 also includes a capacitor C2 and a resistor R2 connected in parallel between the AC side and the second fault detection pin N2. The parallel capacitor C2 and resistor R2 are related to the above... Figure 2 The resistor R1 and capacitor C1 connected in parallel have the same function, which will not be elaborated here.

[0077] The relay circuit provided in this application is equipped with a detection unit, which can detect the AC voltage signal and DC voltage signal corresponding to each voltage transmission path through the fault detection pin in the first or second working state, thereby determining whether the relay in the relay circuit has stuck together, realizing fault detection before equipment operation, providing a basis for equipment maintenance, and ensuring the safe and reliable operation of the equipment.

[0078] The above are merely embodiments of this application and do not limit the scope of patent protection of this application. Any equivalent structural or procedural changes made using the content of this application’s specification and drawings, or direct or indirect applications in other related technical fields, are similarly included within the scope of patent protection of this application.

Claims

1. A fault detection method for a relay circuit, characterized in that, The relay circuit includes a fault detection pin, and the relay circuit includes at least one voltage transmission path, with at least one relay disposed on each voltage transmission path. The method includes: The fault detection pins detect the AC voltage signal and DC voltage signal corresponding to each voltage transmission path in either the first or second operating state. The fault state of the relay circuit is determined based on the AC voltage signal and the DC voltage signal.

2. The detection method according to claim 1, characterized in that, The fault detection pin detects the AC voltage signal and DC voltage signal corresponding to each voltage transmission path in either the first operating state or the second operating state, including: All relays in each voltage transmission path are controlled to be in the off state so that the relay circuit is in the first working state; Detect the AC voltage signal and DC voltage signal of each voltage transmission path; Determining the fault state of the relay circuit based on the AC voltage signal and the DC voltage signal includes: In response to the fact that all target voltage signals are the same and their absolute values ​​are greater than a first preset value, and the absolute value of the difference between the associated voltage signal and the target voltage signal corresponding to the same voltage transmission path is less than a second preset value, it is determined that all relays in the voltage transmission path corresponding to the associated voltage signal are in a stuck state; wherein, the target voltage signal is one of the DC voltage signal and the AC voltage signal, and the associated voltage signal is the other of the DC voltage signal and the AC voltage signal.

3. The detection method according to claim 2, characterized in that, Determining the fault state of the relay circuit based on the AC voltage signal and the DC voltage signal includes: In response to the sum of all the target voltage signals being equal to the first preset value, and the absolute value of any target voltage signal being greater than the first preset value, it is determined that all the relays in all the voltage transmission paths are in a stuck state.

4. The detection method according to claim 2, characterized in that, Determining the fault state of the relay circuit based on the AC voltage signal and the target voltage signal includes: In response to the sum of the first target voltage signal and the second target voltage signal being equal to a preset multiple of the third target voltage signal, it is determined that all the relays in the voltage transmission path corresponding to the first target voltage signal and the second target voltage signal are in a stuck state.

5. The detection method according to claim 1, characterized in that, The fault detection pin detects the AC voltage signal and DC voltage signal corresponding to each voltage transmission path in the first working state or the second working state, including: In each voltage transmission path, some relays are controlled to be in the energized state, while the remaining relays are in the de-energized state, so that the relay circuit is in the second operating state. Detect the AC voltage signal and DC voltage signal of each voltage transmission path; Determining the fault state of the relay circuit based on the AC voltage signal and the DC voltage signal includes: In response to the fact that all target voltage signals are the same and their absolute values ​​are greater than a first preset value, and the absolute value of the difference between the associated voltage signal and the target voltage signal corresponding to the same voltage transmission path is less than a second preset value, it is determined that the relay in the voltage transmission path corresponding to the associated voltage signal, which is in an open state, is in a stuck state; wherein, the target voltage signal is one of the DC voltage signal and the AC voltage signal, and the associated voltage signal is the other of the DC voltage signal and the AC voltage signal.

6. The detection method according to claim 5, characterized in that, Determining the fault state of the relay circuit based on the AC voltage signal and the target voltage signal includes: In response to the sum of all the target voltage signals being equal to the first preset value, and the absolute value of any target voltage signal being greater than the first preset value, it is determined that the relays in the open state in all the voltage transmission paths are in a stuck state.

7. The detection method according to claim 5, characterized in that, Determining the fault state of the relay circuit based on the AC voltage signal and the target voltage signal includes: In response to the sum of the first target voltage signal and the second target voltage signal being equal to a preset multiple of the third target voltage signal, it is determined that the relays in the voltage transmission paths corresponding to the first target voltage signal and the second target voltage signal, which are in an open state, are in a stuck state.

8. A relay circuit, characterized in that, include: At least one voltage transmission path is provided, and a relay is provided on the voltage transmission path. The first end of the voltage transmission path is connected to the DC side, and the second end of the voltage transmission path is connected to the AC side. The detection unit includes multiple detection paths, with the first end of each detection path connected to the first end and the second end of each voltage transmission path, respectively; the second end of the detection path serves as a fault detection pin, which is used to detect the AC voltage signal and DC voltage signal corresponding to each voltage transmission path in a first operating state or a second operating state, so as to determine the fault state of the relay circuit based on the AC voltage signal and the DC voltage signal using the fault detection method according to any one of claims 1 to 7.

9. The relay circuit according to claim 8, characterized in that, The detection unit includes: a first detection unit and a second detection unit. The first detection unit includes multiple first detection paths, with a first end of each first detection path connected between the DC side and the relay, and a second end of each first detection path interconnected as a first fault detection pin; the first fault detection pin is used to detect the DC voltage signal in the first operating state or the second operating state. The second detection unit includes multiple second detection paths. The first end of each second detection path is connected between the AC side and the relay, and the second end of each second detection path is interconnected as a second fault detection pin. The second fault detection pin is used to detect the AC voltage signal in the first operating state or the second operating state.

10. The relay circuit according to claim 9, characterized in that, Each of the first detection pathways includes: A capacitor or resistor connected in series between the DC side and the first fault detection pin; or A capacitor and a resistor are connected in parallel between the DC side and the first fault detection pin.

11. The relay circuit according to claim 9, characterized in that, Each of the second detection pathways includes: A capacitor connected in series between the AC side and the second fault detection pin; or A capacitor and a resistor are connected in parallel between the AC side and the second fault detection pin.

12. The relay circuit according to claim 9, characterized in that, The second detection unit further includes: A filtering unit is connected between the second fault detection pin and the ground terminal.

13. The relay circuit according to claim 9, characterized in that, The first fault detection pin and the second fault detection pin are interconnected.

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