Polar zero cancellation circuit and method capable of automatically and correctly compensating

Abstract

The invention discloses a polar zero cancellation circuit and method capable of automatically and correctly compensating, relates to the technical field of radiation measurement equipment, adopts a combination of a digital potentiometer and a high-speed comparator, realizes automatic compensation of the circuit, does not need complex calculation or tedious replacement process, and improves debugging efficiency. The output result can guide the improvement of a subsequent circuit, such as the simplification of the circuit. And when the output results are enough, empirical judgment can be given out according to the compensation effect of the pole zero cancellation circuit, and detection and maintenance of a part of circuits are facilitated. And the digital controllable potentiometer can select whether compensation is needed or not and the compensation effect according to the actual application requirement, so that the digital controllable potentiometer has a wide application range.

Description

Technical Field

[0001] This invention relates to the field of radiation measurement equipment technology, and in particular to an automatic and correct compensation circuit and method for zero-phase cancellation. Background Technology

[0002] Pole-zero cancellation is an important concept in control theory and electronics, referring to optimizing system performance by adjusting the positions of the poles and zeros in the system's transfer function to cancel each other out.

[0003] The core of pole-zero cancellation lies in the mathematical treatment of the system's transfer function. When the numerator (zeros) and denominator (poles) of the transfer function have the same factors, these factors can be reduced, causing the corresponding poles and zeros to overlap and cancel each other out in the complex plane. This phenomenon is directly related to the structural characteristics of linear time-invariant systems, especially in state-space analysis, and may lead to a loss of system controllability or observability.

[0004] Patent document CN202210329362 describes an automatic digital pole-zero cancellation method. This patent describes a digital automatic pole-zero method comprising: Step 1, sending a default threshold and pole-zero parameters to a lower-level computer for setting and sampling the spectral lines after pole-zeroing; Step 2, adjusting the pole-zero parameters by analyzing the relationship between the spectral line tail and the baseline, until the minimum number of bits of the parameter is adjusted.

[0005] The above-mentioned pole-zero cancellation method can obtain a relatively suitable pole-zero parameter, but its system consists of host computer software and a digital pulse amplitude analyzer, which is relatively large and complex. Furthermore, the digital pulse amplitude analyzer is a precision instrument with high cost requirements. If a fault occurs, directly replacing the system would be too costly, and the maintenance of a complex system is very troublesome. Summary of the Invention

[0006] In view of the above problems, the present invention provides an automatic and correct compensation pole-zero phase cancellation circuit and method for overcoming or at least partially solving the above problems.

[0007] This invention provides the following solution: An automatically correct compensation pole-zero cancellation circuit includes: A digital potentiometer is connected to the feedback loop of a pole-zero cancellation network, and the digital potentiometer is used to adjust the resistance in the feedback loop. A control chip is connected to the digital potentiometer and is used to control the resistance value of the digital potentiometer. A polarity determination module, comprising a first digital-to-analog converter and a first high-speed comparator, wherein the polarity determination module is used to identify the polarity of an input signal; The compensation discrimination module includes a second digital-to-analog converter, a high-voltage slew rate operational amplifier, and a second high-speed comparator. The compensation discrimination module is used to determine the compensation status. The control chip sets the output voltage polarity of the second digital-to-analog converter according to the output of the polarity discrimination module, and dynamically adjusts the resistance value of the digital potentiometer according to the output of the compensation discrimination module, so that the circuit can automatically compensate for signal fluctuations until optimal compensation is achieved.

[0008] Preferably, the digital potentiometer is a non-volatile digital potentiometer.

[0009] Preferably, the control chip is any one of a microcontroller, FPGA, or CPLD.

[0010] An automatic correct compensation method for pole-zero cancellation, applied to the aforementioned automatic correct compensation pole-zero cancellation circuit, the method comprising: S1: The control chip controls the first digital-to-analog converter to sequentially output positive and negative reference voltages to the comparison terminal of the first high-speed comparator, and determines the signal polarity based on the comparison result; S2: Based on the signal polarity, the control chip controls the second digital-to-analog converter to output the opposite voltage polarity; S3: The control chip controls the initial resistance value of the output resistor of the digital potentiometer; S4: The waveform of pole-zero cancellation is amplified by the high-voltage slew rate operational amplifier and then input to one input terminal of the second high-speed comparator. The output of the second digital-to-analog converter is connected to the other input terminal of the second high-speed comparator as a compensation reference. S5: Based on the high and low level output of the second high-speed comparator, perform supplementary state judgment to obtain the compensation result; S6: Based on the judgment result and the corresponding relationship of the initial resistance value of the resistor, the control chip adjusts the resistance value of the digital potentiometer. The adjustment of the digital potentiometer resistance value adopts a step approximation method, adjusting from the over-compensated state to the under-compensated state, until the over-compensated signal disappears; repeat S4-S6 until the output status of the second high-speed comparator indicates that the compensation is correct and the optimal compensation is achieved.

[0011] Preferably, if the signal polarity is positive, the second digital-to-analog converter outputs a negative voltage; otherwise, it outputs a positive voltage.

[0012] Preferably: if the second high-speed comparator outputs a high level, it is determined to be overcompensated; if the second high-speed comparator outputs a low level or no pulse output, it is determined to be undercompensated.

[0013] Preferably, the initial resistance value of the resistor is set within its adjustable range.

[0014] Preferably, the initial resistance value is any value between 1 / 4 and 3 / 4 of the total resistance of the digital potentiometer.

[0015] Preferably, the adjustment from overcompensated state to undercompensated state includes adjusting to decrease the resistance value if it is overcompensated, and adjusting to increase the resistance value if it is undercompensated.

[0016] Preferably, it also includes storing the final optimized resistance value and recalling it when the system restarts.

[0017] According to specific embodiments provided by the present invention, the present invention discloses the following technical effects: This application provides an automatic and correct compensation circuit and method for pole-zero cancellation, which uses a combination of digital potentiometers and high-speed comparators to achieve automatic circuit compensation without complex calculations or tedious replacement processes, thus improving debugging efficiency. The output results can guide subsequent circuit improvements, such as circuit simplification. Furthermore, with a sufficient number of output results, empirical judgments can be made on the compensation effect of the pole-zero cancellation circuit, facilitating the testing and repair of certain circuits. It also provides waveform monitoring, and the digitally controllable potentiometer allows for selection of whether compensation is needed and the compensation effect according to actual application requirements, thus having a wide range of applications.

[0018] Of course, any product implementing this invention does not necessarily need to achieve all of the advantages described above at the same time. Attached Figure Description

[0019] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the embodiments will be briefly described below. Obviously, the drawings described below are merely some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without any creative effort.

[0020] Figure 1 This is a compensation flowchart of an automatic and correct compensation pole-zero phase cancellation circuit provided in an embodiment of the present invention. Detailed Implementation

[0021] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of the present invention, and not all of them. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention are within the scope of protection of the present invention.

[0022] This invention provides an automatically correct compensation pole-zero phase cancellation circuit, which may include: A digital potentiometer is connected to the feedback loop of a pole-zero cancellation network, and the digital potentiometer is used to adjust the resistance in the feedback loop. A control chip is connected to the digital potentiometer and is used to control the resistance value of the digital potentiometer. A polarity determination module, comprising a first digital-to-analog converter and a first high-speed comparator, wherein the polarity determination module is used to identify the polarity of an input signal; The compensation discrimination module includes a second digital-to-analog converter, a high-voltage slew rate operational amplifier, and a second high-speed comparator. The compensation discrimination module is used to determine the compensation status. The control chip sets the output voltage polarity of the second digital-to-analog converter according to the output of the polarity discrimination module, and dynamically adjusts the resistance value of the digital potentiometer according to the output of the compensation discrimination module, so that the circuit can automatically compensate for signal fluctuations until optimal compensation is achieved.

[0023] In specific implementations, the digital potentiometer in this application embodiment can be a non-volatile digital potentiometer. The control chip can be any one of a microcontroller, FPGA, or CPLD.

[0024] The automatic correct compensation zero-phase cancellation circuit provided in this application embodiment is based on replacing the variable resistor in the original zero-phase cancellation circuit with a digital potentiometer. The resistance value is set by the control chip, and the waveform compensation is monitored by the comparator. The digital potentiometer is then adjusted step by step to achieve the best compensation effect.

[0025] The automatic polarity cancellation circuit with correct compensation includes a digital potentiometer, two high-speed comparators, a high-voltage slew rate operational amplifier, two DACs (digital-to-analog converters), and a high-frequency control chip. One high-speed comparator paired with a DAC determines the waveform polarity, while the other high-speed comparator paired with an operational amplifier and a DAC determines the compensation effect. This reduces circuit complexity and makes components easy to replace. The circuit automatically compensates according to signal fluctuations without manual intervention, eliminating the need for a host computer and manual startup. Compensation implementation is much simpler. Similarly, after compensation, a result can be output to determine the parameters of the resistive components to guide the design of next-generation circuits.

[0026] This application embodiment can also provide an automatically correct compensation pole-zero phase cancellation method, applied to the above-mentioned automatically correct compensation pole-zero phase cancellation circuit, such as... Figure 1 As shown, the method includes: S1: The control chip controls the first digital-to-analog converter to output positive and negative reference voltages sequentially to the comparison terminal of the first high-speed comparator (polarity discrimination comparator), and determines the signal polarity based on the comparison result; the chip controls the DAC to output positive and negative voltages to the comparison terminal of the polarity discrimination comparator respectively, and determines the signal polarity based on the comparison result.

[0027] S2: Based on the signal polarity, the control chip controls the second digital-to-analog converter to output a voltage with the opposite polarity; specifically, if the signal polarity is positive, the second digital-to-analog converter outputs a negative voltage, and vice versa. Figure 1 As shown, the chip controls DAC2 to output a positive or negative voltage based on the polarity obtained in step 1. If the signal polarity is positive, DAC2 outputs a negative voltage, and vice versa.

[0028] S3: The control chip controls the initial resistance value of the output resistor of the digital potentiometer; in specific implementations, the embodiments of this application can provide that the initial resistance value is set within its adjustable range. Further, the initial resistance value is any value between 1 / 4 and 3 / 4 of the total resistance value of the digital potentiometer.

[0029] S4: The zero-phase cancellation waveform is amplified by the high-voltage slew rate operational amplifier and then input to one input terminal of the second high-speed comparator. The output of the second digital-to-analog converter is connected to the other input terminal of the second high-speed comparator as a compensation reference. In specific implementation, the zero-phase cancellation waveform can be amplified 10 times by the operational amplifier and then input to the input terminal of the second high-speed comparator (compensation discrimination comparator).

[0030] S5: A compensation result is obtained by performing a supplementary state judgment based on the high / low level output of the second high-speed comparator. Specifically, in this embodiment, if the second high-speed comparator outputs a high level, it is determined to be overcompensated; if the second high-speed comparator outputs a low level or has no pulse output, it is determined to be undercompensated. The compensation determination is further refined: if the compensation discrimination comparator has an output, overcompensation is determined; if the compensation discrimination comparator has no output, undercompensation is determined.

[0031] S6: Based on the judgment result and the corresponding relationship of the initial resistance value of the resistor, the control chip adjusts the resistance value of the digital potentiometer. The adjustment of the digital potentiometer resistance value adopts a step approximation method, adjusting from the over-compensated state to the under-compensated state, until the over-compensated signal disappears; repeat S4-S6 until the output status of the second high-speed comparator indicates that the compensation is correct and the optimal compensation is achieved.

[0032] In specific implementation, the embodiments of this application may provide that the adjustment from overcompensated state to undercompensated state includes adjusting in the direction of decreasing resistance if it is overcompensated, and adjusting in the direction of increasing resistance if it is undercompensated.

[0033] Adjust the digital potentiometers according to the correspondence between the outputs of the digital potentiometers S3 and S5 and the compensation discrimination comparator, moving them closer to the value corresponding to overcompensation than undercompensation, until the compensation discrimination comparator no longer outputs an overcompensation signal. This completes the entire automatic correct compensation process.

[0034] To guide subsequent adjustments of the digital potentiometer and ensure that adjustments can be made on a smaller scale using empirical factors based on numerous examples, this application embodiment can also store the final optimized resistance value and recall it upon system restart.

[0035] In summary, the automatic zero-pole cancellation circuit provided in this application, using a combination of digital potentiometers and high-speed comparators, achieves automatic circuit compensation without requiring complex calculations or tedious replacement processes, thus improving debugging efficiency. The output results can guide subsequent circuit improvements, such as circuit simplification. Furthermore, with a sufficient number of output results, empirical judgments can be made on the compensation effect of the zero-pole cancellation circuit, facilitating the testing and repair of certain circuits. It also provides waveform monitoring, and the digitally controllable potentiometer allows for selection of whether compensation is needed and the compensation effect according to actual application requirements, resulting in a wide range of applications.

[0036] It should be noted that, in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0037] As can be seen from the above description of the embodiments, those skilled in the art can clearly understand that this application can be implemented by means of software plus necessary general-purpose hardware platforms. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, can be embodied in the form of a software product. This computer software product can be stored in a storage medium, such as ROM / RAM, magnetic disk, optical disk, etc., and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute the methods described in various embodiments or some parts of the embodiments of this application.

[0038] The various embodiments in this specification are described in a progressive manner. Similar or identical parts between embodiments can be referred to mutually. Each embodiment focuses on describing the differences from other embodiments. In particular, for system or system embodiments, since they are basically similar to method embodiments, the description is relatively simple, and relevant parts can be referred to the descriptions in the method embodiments. The systems and system embodiments described above are merely illustrative. The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the modules can be selected to achieve the purpose of this embodiment according to actual needs. Those skilled in the art can understand and implement this without creative effort.

[0039] The above description is merely a preferred embodiment of the present invention and is not intended to limit the scope of protection of the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention are included within the scope of protection of the present invention.

Claims

1. A pole-zero cancellation circuit with automatic and correct compensation, characterized in that, include: A digital potentiometer is connected to the feedback loop of a pole-zero cancellation network, and the digital potentiometer is used to adjust the resistance in the feedback loop. A control chip is connected to the digital potentiometer and is used to control the resistance value of the digital potentiometer. A polarity determination module, comprising a first digital-to-analog converter and a first high-speed comparator, wherein the polarity determination module is used to identify the polarity of an input signal; The compensation discrimination module includes a second digital-to-analog converter, a high-voltage slew rate operational amplifier, and a second high-speed comparator. The compensation discrimination module is used to determine the compensation status. The control chip sets the output voltage polarity of the second digital-to-analog converter according to the output of the polarity discrimination module, and dynamically adjusts the resistance value of the digital potentiometer according to the output of the compensation discrimination module, so that the circuit can automatically compensate for signal fluctuations until optimal compensation is achieved.

2. The automatically correct compensation pole-zero cancellation circuit according to claim 1, characterized in that, The digital potentiometer is a non-volatile digital potentiometer.

3. The automatically correct compensation pole-zero phase cancellation circuit according to claim 1, characterized in that, The control chip can be any one of a microcontroller, FPGA, or CPLD.

4. An automatic correct compensation method for pole-zero cancellation, applied to the automatic correct compensation pole-zero cancellation circuit as described in any one of claims 1-3, characterized in that, The method includes: S1: The control chip controls the first digital-to-analog converter to sequentially output positive and negative reference voltages to the comparison terminal of the first high-speed comparator, and determines the signal polarity based on the comparison result; S2: Based on the signal polarity, the control chip controls the second digital-to-analog converter to output the opposite voltage polarity; S3: The control chip controls the initial resistance value of the output resistor of the digital potentiometer; S4: The waveform of pole-zero cancellation is amplified by the high-voltage slew rate operational amplifier and then input to one input terminal of the second high-speed comparator. The output of the second digital-to-analog converter is connected to the other input terminal of the second high-speed comparator as a compensation reference. S5: Based on the high and low level output of the second high-speed comparator, perform supplementary state judgment to obtain the compensation result; S6: Based on the judgment result and the corresponding relationship of the initial resistance value of the resistor, the control chip adjusts the resistance value of the digital potentiometer. The adjustment of the digital potentiometer resistance value adopts a step approximation method, adjusting from the over-compensated state to the under-compensated state, until the over-compensated signal disappears; repeat S4-S6 until the output status of the second high-speed comparator indicates that the compensation is correct and the optimal compensation is achieved.

5. The automatic and correct compensation method for pole-zero cancellation according to claim 4, characterized in that, If the signal polarity is positive, the second digital-to-analog converter outputs a negative voltage; otherwise, it outputs a positive voltage.

6. The automatic correct compensation method for pole-zero cancellation according to claim 4, characterized in that, If the second high-speed comparator outputs a high level, it is determined to be overcompensated; if the second high-speed comparator outputs a low level or no pulse output, it is determined to be undercompensated.

7. The automatic correct compensation method for pole-zero cancellation according to claim 4, characterized in that, The initial resistance value of the resistor is set within its adjustable range.

8. The automatic and correct compensation method for pole-zero cancellation according to claim 7, characterized in that, The initial resistance value is any value between 1 / 4 and 3 / 4 of the total resistance of the digital potentiometer.

9. The automatic correct compensation method for pole-zero cancellation according to claim 4, characterized in that, The adjustment from overcompensated state to undercompensated state includes adjusting to decrease the resistance value if it is overcompensated, and adjusting to increase the resistance value if it is undercompensated.

10. The automatic correct compensation method for pole-zero cancellation according to claim 4, characterized in that, It also includes storing the final optimized resistance value and retrieving it when the system restarts.

Images