Address mapping table updating method and device, equipment, medium and program product

Abstract

The invention relates to the technical field of computers, and particularly provides an address mapping table updating method and device, equipment, a medium and a program product. The method comprises the following steps: in response to a received first write-in request, determining a first logic address to be written in first data in the first write-in request; determining a first physical address corresponding to the first logic address according to a multi-level address mapping table; writing first data according to the first physical address; and in response to successful writing of the first data, updating a root-level address mapping table in the multi-level address mapping table according to the first logic address, the first physical address and the adjacent idle physical address field, so as to add mapping information for mapping to the adjacent idle physical address field in the root-level address mapping table. In this way, the address mapping table is optimized, and then the data writing efficiency can be improved.

Description

Technical Field

[0001] This disclosure relates to the field of computer technology, and specifically to a method, apparatus, device, medium, and program product for updating an address mapping table. Background Technology

[0002] In some data storage scenarios, a Logical Address to Physical Address (L2P) table is typically used to maintain the mapping relationship between the logical addresses and physical addresses of storage devices. This allows the physical address corresponding to the logical address of a data read / write request to be determined based on the L2P table, thus achieving address translation.

[0003] In related technologies, L2P tables typically use a single mapping table or a multi-level mapping table. A multi-level mapping table contains multiple levels of address mapping tables.

[0004] However, maintaining address mapping relationships through only a single-level mapping table will consume a lot of mapping management resources, while maintaining address mapping relationships through multi-level mapping tables will result in low table lookup efficiency during data writing, thus leading to low data writing efficiency. Summary of the Invention

[0005] To address the aforementioned issues, this disclosure provides a method, apparatus, device, medium, and program product for updating an address mapping table.

[0006] On one hand, this disclosure provides a method for updating an address mapping table, the method including:

[0007] In response to receiving a first write request, determine the first logical address at which the first data in the first write request is to be written;

[0008] Based on the multi-level address mapping table, determine the first physical address corresponding to the first logical address;

[0009] Write the first data based on the first physical address;

[0010] In response to the successful writing of the first data, the root address mapping table in the multi-level address mapping table is updated according to the first logical address, the first physical address and its adjacent free physical address segments, so as to add mapping information for mapping to adjacent free physical address segments in the root address mapping table.

[0011] In one implementation, determining the first logical address where the first data in the first write request is to be written includes:

[0012] If it is determined that there is free address segment status information corresponding to a multi-level address mapping table, then the logical address in the free address segment status information is determined as the first logical address;

[0013] If it is determined that there is no free address segment status information, then the first logical address is allocated to the first write request according to the free logical address in the multi-level address mapping table.

[0014] In one embodiment, the method further includes:

[0015] When the multi-level address mapping table meets the detection triggering conditions, check whether there is a free physical address segment in the multi-level address mapping table;

[0016] In response to the existence of a free physical address segment, obtain the first logical address of the detected free physical address segment;

[0017] Generate status information for the free address segment containing the first logical address.

[0018] In one implementation, determining the first physical address corresponding to the first logical address based on a multi-level address mapping table includes:

[0019] The root-level address mapping table is determined as the initial address mapping table to be queried;

[0020] Repeat the following steps until the first physical address is obtained:

[0021] Determine the mapping result of the first logical address in the address mapping table to be queried;

[0022] If the mapping result is the first physical address, then the table lookup process ends;

[0023] If the mapping result is another address mapping table, then that other address mapping table will be identified as the new address mapping table to be queried.

[0024] In one implementation, updating the root-level address mapping table in a multi-level address mapping table based on a first logical address, a first physical address, and its adjacent free physical address segments includes:

[0025] Determine the target address mapping table containing the first physical address;

[0026] In response to the fact that the target address mapping table is not a root-level address mapping table, and there is a free physical address segment adjacent to the first physical address in the target address mapping table, the target data length is determined based on the first physical address and its adjacent free physical address segment.

[0027] In the root-level address mapping table, add the mapping relationship between the first logical address, the first physical address, and the target data length.

[0028] In one implementation, after updating the root-level address mapping table in the multi-level address mapping table, the method further includes:

[0029] In response to receiving a second write request, the second logical address where the second data in the second write request is to be written is determined based on the first logical address;

[0030] Determine the address offset between the second logical address and the first logical address;

[0031] The second physical address is determined based on the first physical address and the address offset;

[0032] Write the second data according to the second physical address.

[0033] On one hand, this disclosure provides an apparatus for updating an address mapping table, comprising:

[0034] The first determining unit is configured to, in response to receiving a first write request, determine the first logical address at which the first data to be written in the first write request is to be written.

[0035] The second determining unit is used to determine the first physical address corresponding to the first logical address based on the multi-level address mapping table;

[0036] The write unit is used to write first data according to the first physical address;

[0037] The update unit is used to update the root-level address mapping table in the multi-level address mapping table in response to the successful writing of the first data, based on the first logical address, the first physical address and its adjacent free physical address segments, so as to add mapping information for mapping to adjacent free physical address segments in the root-level address mapping table.

[0038] In one embodiment, the first determining unit is used to:

[0039] If it is determined that there is free address segment status information corresponding to a multi-level address mapping table, then the logical address in the free address segment status information is determined as the first logical address;

[0040] If it is determined that there is no free address segment status information, then the first logical address is allocated to the first write request according to the free logical address in the multi-level address mapping table.

[0041] In one embodiment, the first determining unit is further configured to:

[0042] When the multi-level address mapping table meets the detection triggering conditions, check whether there is a free physical address segment in the multi-level address mapping table;

[0043] In response to the existence of a free physical address segment, obtain the first logical address of the detected free physical address segment;

[0044] Generate status information for the free address segment containing the first logical address.

[0045] In one embodiment, the second determining unit is used to:

[0046] The root-level address mapping table is determined as the initial address mapping table to be queried;

[0047] Repeat the following steps until the first physical address is obtained:

[0048] Determine the mapping result of the first logical address in the address mapping table to be queried;

[0049] If the mapping result is the first physical address, then the table lookup process ends;

[0050] If the mapping result is another address mapping table, then that other address mapping table will be identified as the new address mapping table to be queried.

[0051] In one implementation, the updating unit is used to:

[0052] Determine the target address mapping table containing the first physical address;

[0053] In response to the fact that the target address mapping table is not a root-level address mapping table, and there is a free physical address segment adjacent to the first physical address in the target address mapping table, the target data length is determined based on the first physical address and its adjacent free physical address segment.

[0054] In the root-level address mapping table, add the mapping relationship between the first logical address, the first physical address, and the target data length.

[0055] In one implementation, the updating unit is further configured to:

[0056] In response to receiving a second write request, the second logical address where the second data in the second write request is to be written is determined based on the first logical address;

[0057] Determine the address offset between the second logical address and the first logical address;

[0058] The second physical address is determined based on the first physical address and the address offset;

[0059] Write the second data according to the second physical address.

[0060] In one aspect, this disclosure provides an electronic device, including:

[0061] Processor; and

[0062] The memory stores computer instructions that cause the processor to perform steps of methods provided in various alternative implementations of any of the above-described address mapping table updates.

[0063] On one hand, this disclosure provides a computer-readable storage medium storing computer instructions for causing a computer to perform steps of the methods provided in various alternative implementations of any of the above-described address mapping table updates.

[0064] On one hand, this disclosure provides a computer program product including computer-readable code, or a non-volatile computer-readable storage medium carrying computer-readable code, wherein when the computer-readable code is run in a processor of an electronic device, the processor in the electronic device performs the steps of the method provided in various alternative implementations of any of the above-described address mapping table updates.

[0065] The address mapping table update method in this embodiment includes determining the first data in the first write request, the first physical address corresponding to the first logical address to be written, based on a multi-level mapping table, performing a data write operation for the first write request, and updating the root-level address mapping table based on the first logical address, the first physical address, and its adjacent free physical address segments to add mapping information for mapping to adjacent free physical address segments. This allows, when a new data write request is received subsequently, the logical address of the new data write request can be directly mapped to the adjacent free physical address segment based on the updated root-level address mapping table, eliminating the need for multi-level mapping, establishing a mapping relationship that improves address translation efficiency, and optimizing the address mapping method. Attached Figure Description

[0066] Figure 1 This is a flowchart of an address mapping table update method according to an embodiment of this disclosure.

[0067] Figure 2 This is an example diagram of a multi-level address mapping table in an embodiment of this disclosure.

[0068] Figure 3 This is a comparison diagram of an address mapping in one embodiment of this disclosure.

[0069] Figure 4 This is a structural block diagram of an address mapping table updating device according to an embodiment of the present disclosure.

[0070] Figure 5 This is a schematic diagram of the structure of an electronic device according to an embodiment of this disclosure. Detailed Implementation

[0071] The technical solutions of this disclosure will now be clearly and completely described with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this disclosure, not all of them. All other embodiments obtained by those skilled in the art based on the embodiments of this disclosure without inventive effort are within the scope of protection of this disclosure. Furthermore, the technical features involved in the different embodiments of this disclosure described below can be combined with each other as long as they do not conflict with each other.

[0072] The following is an explanation of the terms used in the instruction manual:

[0073] Universal Flash Storage (UFS): UFS internal storage consists of multiple blocks and pages. Typically, each page is 4KB in size, and a block contains 64 pages. UFS supports random addressing, using pages as the basic unit for reading and writing, and blocks as the basic unit for erasing. When UFS receives an input / output (I / O) data request (i.e., a data read / write request), it determines the corresponding physical address (PBA) based on the logical block address (LBA) of the I / O data request and processes the I / O data request accordingly.

[0074] In some data storage scenarios, a logical address to physical address (L2P) table is typically used to maintain the mapping relationship between the logical address and the physical address of the storage device. This allows the physical address corresponding to the logical address of a data read / write request to be determined based on the L2P table, thus achieving address translation.

[0075] Taking UFS as an example of a storage device, due to the off-site update characteristic of UFS, if the data of the same LBA is modified, the actual PBA corresponding to that LBA will also change accordingly. Therefore, an address mapping table is usually needed to perform page-level mapping in order to complete the conversion from logical address to physical address.

[0076] The main advantage of page-level mapping is its high conversion efficiency. The mapping unit corresponds one-to-one with the read / write unit, so the physical address of the page can be obtained in a single conversion. However, as the capacity of UFS increases, the space occupied by the required mapping entries also increases. For example, in a 512GB UFS, with a page size of 4KB and each mapping address entry being 10 bytes, the address mapping table would require 1GB. Therefore, the cache space overhead in UFS is enormous.

[0077] Therefore, to conserve mapping management resources, related technologies typically employ multi-level address mapping tables in storage devices, caching a portion of these tables in Static Random-Access Memory (SRAM). Taking N=2 as an example, in these technologies, the root-level address mapping table is first searched based on the logical address to obtain the corresponding second-level address mapping table. Then, the physical address is obtained by searching the determined second-level address mapping table. Each address mapping table can be a Page Table Entry (PTE) table.

[0078] However, maintaining address mapping relationships through multi-level mapping tables can lead to low table lookup efficiency when data read and write requests typically require multi-level mapping, resulting in low data read and write efficiency.

[0079] To address the shortcomings of the aforementioned technologies, this disclosure provides a method, apparatus, device, medium, and program product for updating an address mapping table.

[0080] This disclosure provides a method for updating an address mapping table. This method can be applied to electronic devices. This disclosure does not limit the type of electronic device, which can be any suitable type of device. For example, the electronic device can be a storage device, which will not be described in detail here.

[0081] In one application scenario, the system includes a host device and a storage device. The host device sends data read / write requests to the storage device. The storage device translates the received data read / write requests using a multi-level address mapping table and executes the corresponding data read / write operations based on the determined physical address. Data read / write requests include data write requests and data read requests.

[0082] Optionally, the host device and the storage device can be located on the same electronic device or they can be two different devices. The host device may include an application layer, a file system layer, and a device driver layer. The storage device includes a flash translation layer (FTL) and storage media.

[0083] The FTL (File Transfer Layer) is responsible for address translation and garbage collection. The FTL allows UFS to be used as a regular block device without requiring secondary adaptation for different file systems. The storage medium stores data, such as Logical Address To Physical Address (L2P) tables, control code, and business data. The L2P table is indexed by an LBA (Logical Address To Physical Address) and stores its corresponding PBA (Physical Address BA) in the storage device, representing the mapping between logical and physical addresses. The L2P table can be a multi-level address mapping table, containing 1 to N levels, where N is a positive integer greater than 1.

[0084] Optionally, the storage device can be UFS. UFS is widely used in many fields due to its low power consumption, non-volatility, and excellent I / O throughput, such as embedded devices, high-performance computing modules, and in-vehicle intelligent devices. Its I / O performance is far superior to traditional embedded MultiMediaCard (eMMC), to some extent bridging the speed gap between the Central Processing Unit (CPU) and I / O in embedded mobile terminals. Currently, its capacity is growing exponentially every year.

[0085] See Figure 1 The diagram shown is a flowchart of an address mapping table update method according to an embodiment of this disclosure. The following is a description of the method in conjunction with... Figure 1 The method is described below, and the specific implementation process is as follows:

[0086] Step 101: In response to receiving the first write request, determine the first logical address where the first data in the first write request is to be written.

[0087] In one implementation, step 101 can be performed in any of the following ways:

[0088] Method 1: If it is determined that there is free address segment status information corresponding to a multi-level address mapping table, then the logical address in the free address segment status information is determined as the first logical address.

[0089] Method 2: If it is determined that there is no free address segment status information, then the first logical address is allocated to the first write request according to the free logical address in the multi-level address mapping table.

[0090] Optionally, if there is no free address segment status information, the first logical address can be assigned according to the order of free logical addresses or randomly.

[0091] In this way, the first physical address with multiple adjacent consecutive free physical addresses can be allocated as much as possible for the first write request.

[0092] Furthermore, when the multi-level address mapping table meets the detection triggering condition, it can be determined whether there is a free physical address segment in the multi-level address mapping table; in response to the existence of a free physical address segment, the first logical address of the detected free physical address segment is obtained; and free address segment status information containing the first logical address is generated.

[0093] In one implementation, when the multi-level address mapping table meets the detection trigger condition, the following steps can be performed for each address mapping table in the multi-level address mapping table except for the root-level address mapping table:

[0094] Check if there is a free physical address segment in the address mapping table. If so, generate the corresponding free address segment status information.

[0095] The status information for the free address segment includes the first logical address mentioned above, and may also include the first physical address corresponding to the free physical address segment and the data length. A free physical address segment refers to a series of consecutive free physical addresses. The status information for the free address segment is the configuration information corresponding to a multi-level mapping table.

[0096] Furthermore, based on the detection results, dirty page markers can be generated, which can be represented as Tags.

[0097] Optionally, the system can determine that the detection trigger condition is met when a preset time period is reached, so as to realize the periodic update of the free address segment status information. Alternatively, it can determine that the detection trigger condition is met when a mark update instruction is received, so as to update the free address segment status information according to user or system instructions. Or, it can determine that the detection trigger condition is met when a preset time period is reached and the root-level mapping table has not been updated, so as to update the free address segment status information.

[0098] For example, suppose a multi-level address mapping table includes a root-level mapping table and a second-level address mapping table. When a preset time has elapsed and the root-level mapping table has not been updated, the second-level address mapping table is checked. If it is determined that there are multiple consecutive available addresses (i.e., free physical address segments) in the second-level address mapping table, then free address segment status information is set for the multi-level address mapping table.

[0099] In practical applications, the preset duration (e.g., 1 minute) and detection trigger conditions can be set according to the actual application scenario, and there are no restrictions here.

[0100] Step 102: Determine the first physical address corresponding to the first logical address based on the multi-level address mapping table.

[0101] In one implementation, when performing step 102, the following steps may be adopted:

[0102] S1021: Root-level address mapping table, which is determined as the initial address mapping table to be queried.

[0103] S1022: Repeat the following steps until the first physical address is obtained:

[0104] S1022-1: Determine the mapping result of the first logical address in the address mapping table to be queried.

[0105] S1022-2: If the mapping result is the first physical address, then the table lookup process ends; if the mapping result is another address mapping table, then the other address mapping table is determined as the new address mapping table to be queried.

[0106] For example, if the first physical address corresponding to the first logical address is obtained directly from the root-level address mapping table (i.e., the level 1 address mapping table), then the table lookup process ends.

[0107] For example, if the mapping result of the first logical address is determined to be a certain level 2 address mapping table according to the root-level address mapping table, then the first physical address corresponding to the first logical address can be obtained according to the level 2 address mapping table.

[0108] The following is combined Figure 2 This section provides an example illustrating a multi-level address mapping table. (See also...) Figure 2 The diagram shown is an example of a multi-level address mapping table. Figure 2 The system includes host devices, multi-level address mapping tables, and physical storage areas. The multi-level address mapping tables consist of a first-level address mapping table, two second-level address mapping tables, and three third-level address mapping tables. The first-level address mapping table is Table 3, the two second-level address mapping tables are Table 21 and Table 22, and the three third-level address mapping tables are Table 11, Table 12, and Table 13. Figure 2 In each address mapping table, L2P_m represents a set of mapping relationships.

[0109] For example, after receiving a data write request from the host device, the logical address of the data write request is determined to be [k1 k2 k3], where k1, k2, and k3 are different address segments within the logical address, k1 is the first 10 bits of the logical address, k2 is the middle 10 bits of the logical address, and k3 is the last 10 bits of the logical address. Then, based on Table 3, the mapping result of k1 can be determined, i.e., Table 22. Then, based on Table 22, the mapping result of k2 can be determined, i.e., Table 11. And based on Table 11, the mapping result of k3, i.e., the first physical address, can be determined. Figure 2 The topmost arrow indicates the region corresponding to the first physical address in the physical storage area (via...). Figure 2(Illustration of a single rectangle in the text).

[0110] Step 103: Write the first data according to the first physical address.

[0111] In one implementation, the first data is written to the area corresponding to the first physical address in the physical storage region.

[0112] Step 104: In response to the successful writing of the first data, update the root address mapping table in the multi-level address mapping table according to the first logical address, the first physical address and its adjacent free physical address segments, so as to add mapping information for mapping to adjacent free physical address segments in the root address mapping table.

[0113] In one implementation, step 104 may be performed using the following steps:

[0114] S1041: Determine the target address mapping table containing the first physical address.

[0115] S1042: In response to the fact that the target address mapping table is not a root-level address mapping table, and there is a free physical address segment adjacent to the first physical address in the target address mapping table, determine the target data length based on the first physical address and its adjacent free physical address segment.

[0116] The first physical address and the adjacent free physical address segment form the target physical address segment, and the data length of the target physical address segment is the target data length.

[0117] In one implementation, the spatial locality detection method is used to determine whether the first write request has strong spatial locality, that is, to determine whether there are adjacent free physical address segments for the corresponding first physical address. If so, the target data length of the target physical address segment composed of the first physical address and the adjacent free physical address segments is determined.

[0118] by Figure 2 For example, Figure 2 The last arrow in the diagram indicates the physical region corresponding to the first physical address and its adjacent free physical address range (via...). Figure 2 (A row of rectangles is shown in the image).

[0119] S1043: Add the mapping relationship between the first logical address, the first physical address, and the target data length in the root-level address mapping table.

[0120] In the root-level address mapping table, this mapping relationship can be represented as: starting linear page number (LPN), starting physical page number (PPN), and target data length. The starting LPN is the first logical address, and the starting PPN is the first physical address.

[0121] See Figure 3 The image shown is a comparison diagram of address mapping. Figure 3 The left side of the middle section indicates that each logical address is mapped to a physical address under the relevant technology, which consumes a large amount of mapping resources. Figure 3 The right side indicates that run-length encoding is used in this embodiment of the disclosure. The data is stored in a different form: only the starting LPN, starting PPN, and target data length corresponding to the target physical address segment are recorded in the root-level address mapping table, instead of recording each logical address separately. This address mapping method saves space overhead for mapping management resources. For example, Figure 3 In this context, the starting LPN, starting PPN, and target data length are L1, P5, and 1000, respectively.

[0122] In this way, for mappings where both logical and physical addresses are contiguous, run-length encoding can be used to store them in another form, allowing the limited address mapping table to store as many mapping relationships as possible, thus compressing the root-level address mapping table.

[0123] Furthermore, new data can be written based on the updated root-level address mapping table. One implementation method involves the following steps:

[0124] S1043-1: In response to receiving a second write request, determine the second logical address where the second data in the second write request is to be written, based on the first logical address.

[0125] For example, if the second write request is the next data write request after the first write request, then the second logical address is the first logical address plus one. If the second write request is the h-th data write request after the first write request, then the corresponding second logical address is the first logical address plus h, where h is a positive integer.

[0126] In this way, for example, the free logical address after the first logical address can be determined as the second logical address.

[0127] S1043-2: Determine the address offset between the second logical address and the first logical address.

[0128] S1043-3: Determine the second physical address based on the first physical address and the address offset.

[0129] S1043-4: Write the second data according to the second physical address.

[0130] In related technologies, multi-level mapping is usually required for querying. However, in this embodiment, when there is a free physical address segment, the root-level address mapping table is dynamically updated, so that a linear mapping method can be used to determine the corresponding physical address. That is, the corresponding physical address can be determined only by the starting LPN, starting PPN, target data length, and index offset of the current logical address contained in the root-level address mapping table, without the need for address translation through multiple levels of address mapping tables, thus reducing the time spent on address translation.

[0131] Furthermore, data can also be read through a multi-level address mapping table.

[0132] In one implementation, when a data read request is received, the third logical address of the data read request is determined, and the third physical address corresponding to the third logical address is determined according to a multi-level mapping table, and the corresponding data is read from the corresponding area of ​​the third physical address in the physical storage area.

[0133] In this way, by dynamically updating the root-level address mapping table, more mapping relationships can be included in the root-level address mapping table, and the table can be looked up by index offset, thus improving the performance of random reading of a single file.

[0134] In this embodiment, a batch update dynamic linear mechanism is adopted. When a free physical address segment exists in the multi-level address mapping table, the starting LPN, starting PPN, and target data length corresponding to the free physical address segment are added to the root-level address mapping table. This increases the number of continuously mappable physical addresses in the root-level address mapping table, making full use of the temporal locality and physical spatial locality of sequential write requests. This achieves continuous reorganization of the local space, allowing the root-level address mapping table to contain more mapping relationships while compressing the root-level address mapping table, reducing the occupation of mapping management resources, and increasing the mapping range that the cache can cover. This allows the corresponding physical address to be obtained only through the index offset of the current logical address, realizing direct mapping of the first-level mapping table, reducing the table lookup time of the multi-level mapping table, and improving the table lookup hit rate and table lookup efficiency. In the continuous application startup state, it can improve the efficiency of system calls, thereby improving system performance. It can be applied to high-capacity and read-write intensive application scenarios, and can improve the overall random read performance under more complex application scenarios or under harsh conditions such as larger storage capacity.

[0135] Based on the same inventive concept, this disclosure also provides an apparatus for updating an address mapping table. Since the principle of the above apparatus and device in solving the problem is similar to that of an address mapping table updating method, the implementation of the above apparatus can refer to the implementation of the method, and repeated details will not be elaborated further. This apparatus can be applied to electronic devices. This disclosure does not limit the type of electronic device; it can be any suitable type of device, such as terminal devices and servers, etc., which will not be elaborated further in this disclosure. The apparatus embodiment can be implemented by software, or by hardware, or a combination of software and hardware. Taking software implementation as an example, as a logically defined apparatus, it is formed by the processor of the electronic device reading the corresponding computer program instructions from non-volatile memory into memory and executing them.

[0136] See Figure 4 The diagram shown is a structural block diagram of an address mapping table updating apparatus according to an embodiment of this disclosure. In some embodiments, the address mapping table updating apparatus of this disclosure includes:

[0137] The first determining unit 401 is configured to determine the first logical address where the first data in the first write request is to be written in response to receiving the first write request;

[0138] The second determining unit 402 is used to determine the first physical address corresponding to the first logical address according to the multi-level address mapping table;

[0139] The write unit 403 is used to write first data according to the first physical address;

[0140] The update unit 404 is used to update the root-level address mapping table in the multi-level address mapping table in response to the successful writing of the first data, based on the first logical address, the first physical address and its adjacent free physical address segments, so as to add mapping information for mapping to adjacent free physical address segments in the root-level address mapping table.

[0141] In one embodiment, the first determining unit 401 is used to:

[0142] If it is determined that there is free address segment status information corresponding to a multi-level address mapping table, then the logical address in the free address segment status information is determined as the first logical address;

[0143] If it is determined that there is no free address segment status information, then the first logical address is allocated to the first write request according to the free logical address in the multi-level address mapping table.

[0144] In one embodiment, the first determining unit 401 is further configured to:

[0145] When the multi-level address mapping table meets the detection triggering conditions, check whether there is a free physical address segment in the multi-level address mapping table;

[0146] In response to the existence of a free physical address segment, obtain the first logical address of the detected free physical address segment;

[0147] Generate status information for the free address segment containing the first logical address.

[0148] In one embodiment, the second determining unit 402 is used to:

[0149] The root-level address mapping table is determined as the initial address mapping table to be queried;

[0150] Repeat the following steps until the first physical address is obtained:

[0151] Determine the mapping result of the first logical address in the address mapping table to be queried;

[0152] If the mapping result is the first physical address, then the table lookup process ends;

[0153] If the mapping result is another address mapping table, then that other address mapping table will be identified as the new address mapping table to be queried.

[0154] In one embodiment, the update unit 404 is used to:

[0155] Determine the target address mapping table containing the first physical address;

[0156] In response to the fact that the target address mapping table is not a root-level address mapping table, and there is a free physical address segment adjacent to the first physical address in the target address mapping table, the target data length is determined based on the first physical address and its adjacent free physical address segment.

[0157] In the root-level address mapping table, add the mapping relationship between the first logical address, the first physical address, and the target data length.

[0158] In one embodiment, the updating unit 404 is further configured to:

[0159] In response to receiving a second write request, the second logical address where the second data in the second write request is to be written is determined based on the first logical address;

[0160] Determine the address offset between the second logical address and the first logical address;

[0161] The second physical address is determined based on the first physical address and the address offset;

[0162] Write the second data according to the second physical address.

[0163] The address mapping table update method in this embodiment includes determining the first data in the first write request, the first physical address corresponding to the first logical address to be written, based on a multi-level mapping table, performing a data write operation for the first write request, and updating the root-level address mapping table based on the first logical address, the first physical address, and its adjacent free physical address segments to add mapping information for mapping to adjacent free physical address segments. This allows, when a new data write request is received subsequently, the logical address of the new data write request can be directly mapped to the adjacent free physical address segment based on the updated root-level address mapping table, eliminating the need for multi-level mapping, establishing a mapping relationship that improves address translation efficiency, and optimizing the address mapping method.

[0164] In this embodiment of the disclosure, an electronic device is also provided, including:

[0165] Processor; and

[0166] The memory stores computer instructions that cause the processor to execute the methods of any of the above-described embodiments.

[0167] In this embodiment of the disclosure, a computer-readable storage medium is provided, storing computer instructions for causing a computer to perform the methods of any of the above embodiments.

[0168] This disclosure also provides a computer program product, including computer-readable code, or a non-volatile computer-readable storage medium carrying computer-readable code, wherein when the computer-readable code is run in a processor of an electronic device, the processor in the electronic device performs the method described in any of the above embodiments.

[0169] Figure 5 A schematic diagram of the structure of an electronic device 5000 is shown. (See also...) Figure 5 As shown, the electronic device 5000 includes a processor 5010 and a memory 5020, and optionally may also include a power supply 5030, a display unit 5040, and an input unit 5050.

[0170] The processor 5010 is the control center of the electronic device 5000. It connects various components through various interfaces and lines, and performs various functions of the electronic device 5000 by running or executing software programs and / or data stored in the memory 5020, thereby performing overall monitoring of the electronic device 5000.

[0171] In this embodiment of the present disclosure, the processor 5010 executes the steps in the above embodiments when it calls the computer program stored in the memory 5020.

[0172] Optionally, processor 5010 may include one or more processing units; preferably, processor 5010 may integrate an application processor and a modem processor, wherein the application processor mainly handles the operating system, user interface, and applications, and the modem processor mainly handles wireless communication. It is understood that the modem processor may not be integrated into processor 5010. In some embodiments, the processor and memory may be implemented on a single chip; in some embodiments, they may also be implemented separately on independent chips.

[0173] The memory 5020 may primarily include a program storage area and a data storage area. The program storage area may store the operating system, various applications, etc.; the data storage area may store data created based on the use of the electronic device 5000, etc. In addition, the memory 5020 may include high-speed random access memory, and may also include non-volatile memory, such as at least one disk storage device, flash memory device, or other volatile solid-state storage device, etc.

[0174] Electronic device 5000 also includes a power supply 5030 (such as a battery) that supplies power to various components. The power supply can be logically connected to processor 5010 through a power management system, thereby enabling the management of charging, discharging, and power consumption.

[0175] The display unit 5040 can be used to display information input by the user or information provided to the user, as well as various menus of the electronic device 5000. In this embodiment, it is mainly used to display the display interfaces of various applications in the electronic device 5000, as well as text, images, and other objects displayed on the display interfaces. The display unit 5040 may include a display panel 5041. The display panel 5041 may be configured in the form of a liquid crystal display (LCD), an organic light-emitting diode (OLED), or the like.

[0176] The input unit 5050 can be used to receive information such as numbers or characters input by the user. The input unit 5050 may include a touch panel 5051 and other input devices 5052. The touch panel 5051, also known as a touch screen, can collect touch operations on or near the user (such as operations performed by the user using a finger, stylus, or any suitable object or accessory on or near the touch panel 5051).

[0177] Specifically, the touch panel 5051 can detect user touch operations and the signals generated by these operations, convert them into touch point coordinates, send them to the processor 5010, and receive and execute commands from the processor 5010. Furthermore, the touch panel 5051 can be implemented using various types of sensors, including resistive, capacitive, infrared, and surface acoustic wave sensors. Other input devices 5052 can include, but are not limited to, one or more of the following: physical keyboard, function keys (such as volume control buttons, power buttons, etc.), trackball, mouse, joystick, etc.

[0178] Of course, the touch panel 5051 can cover the display panel 5041. When the touch panel 5051 detects a touch operation on or near it, it transmits the information to the processor 5010 to determine the type of touch event. Subsequently, the processor 5010 provides corresponding visual output on the display panel 5041 according to the type of touch event. Although in Figure 5 In this embodiment, the touch panel 5051 and the display panel 5041 are two separate components to realize the input and output functions of the electronic device 5000. However, in some embodiments, the touch panel 5051 and the display panel 5041 can be integrated to realize the input and output functions of the electronic device 5000.

[0179] The electronic device 5000 may also include one or more sensors, such as a pressure sensor, a gravity acceleration sensor, a proximity sensor, etc. Of course, depending on the specific application, the electronic device 5000 may also include other components such as a camera. Since these components are not the focus of this disclosure, they will not be discussed further. Figure 5 It is not shown in the text and will not be described in detail here.

[0180] Those skilled in the art will understand that Figure 5 This is merely an example of an electronic device and does not constitute a limitation on the electronic device. It may include more or fewer components than shown, or a combination of certain components, or different components.

[0181] For ease of description, the above sections are divided into modules (or units) according to their functions and described separately. Of course, in implementing this disclosure, the functions of each module (or unit) can be implemented in one or more software or hardware components.

Claims

1. A method for updating an address mapping table, characterized in that, The method includes: In response to receiving a first write request, determine the first logical address at which the first data in the first write request is to be written; The first physical address corresponding to the first logical address is determined based on the multi-level address mapping table; Write the first data according to the first physical address; In response to the successful writing of the first data, the root-level address mapping table in the multi-level address mapping table is updated according to the first logical address, the first physical address and its adjacent free physical address segments, so as to add mapping information for mapping to the adjacent free physical address segments in the root-level address mapping table.

2. The method according to claim 1, characterized in that, Determining the first logical address at which the first data in the first write request is to be written includes: If it is determined that there is free address segment status information corresponding to the multi-level address mapping table, then the logical address in the free address segment status information is determined as the first logical address; If it is determined that there is no free address segment status information, then the first logical address is allocated to the first write request according to the free logical address in the multi-level address mapping table.

3. The method according to claim 2, characterized in that, The method further includes: When it is determined that the multi-level address mapping table meets the detection triggering condition, it is detected whether there is a free physical address segment in the multi-level address mapping table; In response to the existence of a free physical address segment, the first logical address of the detected free physical address segment is obtained; Generate the status information of the free address segment containing the first logical address.

4. The method according to any one of claims 1-3, characterized in that, The step of determining the first physical address corresponding to the first logical address based on the multi-level address mapping table includes: The root-level address mapping table is determined as the initial address mapping table to be queried; Repeat the following steps until the first physical address is obtained: Determine the mapping result of the first logical address in the address mapping table to be queried; If the mapping result is the first physical address, then the table lookup process ends; If the mapping result is another address mapping table, then that other address mapping table will be identified as the new address mapping table to be queried.

5. The method according to any one of claims 1-3, characterized in that, The step of updating the root-level address mapping table in the multi-level address mapping table based on the first logical address, the first physical address, and its adjacent free physical address segments includes: Determine the target address mapping table containing the first physical address; In response to the fact that the target address mapping table is not the root-level address mapping table, and there is a free physical address segment adjacent to the first physical address in the target address mapping table, the target data length is determined based on the first physical address and its adjacent free physical address segment. In the root-level address mapping table, add the mapping relationship between the first logical address, the first physical address, and the target data length.

6. The method according to claim 5, characterized in that, After updating the root-level address mapping table in the multi-level address mapping table, the method further includes: In response to receiving a second write request, the second logical address where the second data in the second write request is to be written is determined based on the first logical address; Determine the address offset between the second logical address and the first logical address; The second physical address is determined based on the first physical address and the address offset; Write the second data according to the second physical address.

7. An apparatus for updating an address mapping table, characterized in that, The device includes: The first determining unit is configured to, in response to receiving a first write request, determine the first logical address at which the first data in the first write request is to be written. The second determining unit is used to determine the first physical address corresponding to the first logical address based on the multi-level address mapping table; The writing unit is used to write the first data according to the first physical address; An update unit is configured to, in response to the successful writing of the first data, update the root-level address mapping table in the multi-level address mapping table according to the first logical address, the first physical address and its adjacent free physical address segments, so as to add mapping information for mapping to the adjacent free physical address segments in the root-level address mapping table.

8. An electronic device, characterized in that, include: processor; as well as A memory storing computer instructions for causing the processor to perform the method according to any one of claims 1 to 6.

9. A computer-readable storage medium, characterized in that, The computer contains computer instructions for causing the computer to perform the method according to any one of claims 1 to 6.

10. A computer program product, characterized in that, Includes computer-readable code, or a non-volatile computer-readable storage medium carrying computer-readable code, wherein when the computer-readable code is executed in a processor of an electronic device, the processor in the electronic device is the method according to any one of claims 1 to 6.

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