Hot plug structure applied to output stage of transmitter circuit
By combining a floating substrate structure and an enable control module, the problem of backflow current during hot-plugging of the RS-485 transmitter circuit is solved, achieving backflow prevention capability and reducing the circuit area.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- 58TH RES INST OF CETC
- Filing Date
- 2026-01-27
- Publication Date
- 2026-05-08
AI Technical Summary
Existing RS-485 transmitter circuits are prone to backflow current during hot-swapping, which can cause circuit burnout or abnormal bus signals. Furthermore, existing solutions increase the area and cost of the driver stage.
By employing a floating substrate structure and a port-to-gate connection circuit for the driving transistor, combined with an enable control module, logic signals VE and VF are output through a detection circuit to ensure that the driving transistor is turned off under high or low voltage conditions, thus preventing current from flowing through.
It prevents backflow current during hot-plugging, protects the circuit from burning out, and reduces the area and cost of the driver stage.
Smart Images
Figure CN121996597A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of integrated circuit I / O port technology, and in particular to a hot-swappable structure applied to the output stage of a transmitter circuit. Background Technology
[0002] With the continuous development of electronic communication technology in the industrial field and the widespread application of computer networks, transmitter circuit modules used in interface circuits often need to meet various special requirements, such as high voltage withstand and backflow prevention. RS-485 circuits are a typical application example. The RS-485 bus standard, established by the Electronic Industries Association in 1983, can meet the requirements of long-distance transmission. Compared with other bus technologies, RS-485 uses balanced two-wire transmission, which has the advantages of strong noise immunity, high data transmission rate, and high data transmission reliability, supporting multi-node, long-distance communication. Due to the long transmission distance of RS-485, there is a potential difference between the ground potential of the transmitting and receiving ends of the system, ensuring that the common-mode output voltage meets the range of -7V to +12V. This means that the ports of the output devices need to withstand voltages higher than the power supply voltage and lower than the ground potential voltage to prevent large backflow currents. In hot-swappable scenarios, as large electronic systems integrate more and more modules with increasingly complex functions, plug-and-play functionality of single boards has become a common requirement in system applications and a challenge that needs to be addressed in bus port circuit design. For example, if a module malfunctions, simply plugging and unplugging the faulty module can quickly resolve the issue. Hot-swapping of module circuits requires the bus ports to be hot-swappable, meaning that during plugging and unplugging, the circuit will not be damaged due to mis-connection, nor will it cause a drop in motherboard power or abnormal bus signals.
[0003] A typical RS-485 transmitter's output port often consists of series-connected high-voltage devices. Taking the pull-up driver stage as an example, the series-connected high-voltage devices use a floating substrate structure. The substrates of the two series-connected devices are back-to-back diodes, which prevents backflow into the power supply when the port voltage exceeds the power supply voltage. During normal operation, the power supply voltage will not affect the port signal through the substrate. Similarly, the pull-down structure uses a similar structure and principle. Although this structure effectively solves the problem of backflow current at the port, the series-connected devices make the area of the driver stage four times larger than that of a single-stage structure. In practical applications, the smaller the circuit size, the lower the cost of chip fabrication. Therefore, it is necessary to design a single-stage driver structure that can also prevent backflow of power supply current into the bus. Summary of the Invention
[0004] The purpose of this invention is to provide a hot-swappable structure for use in the output stage of a transmitter circuit, in order to solve the problems in the prior art.
[0005] To solve the above technical problems, the present invention provides a hot-swappable structure for the output stage of a transmitter circuit, including: input terminal A, output terminal Y, NMOS transistors NM1~NM7, PMOS transistors PM1~PM7, data path and enable control module, pull-up drive pre-stage control, and pull-down drive pre-stage control. The input of the data path and enable control module is connected to input terminal A. The output C1 of the data path and enable control module is connected to the input of the pull-up drive pre-stage control. The output VE is connected to the gate of PMOS transistor PM2. The output C2 is connected to the input of the pull-down drive pre-stage control. The output VF is connected to the gate of NMOS transistor NM2. The output D1 of the pull-up drive pre-stage control is connected to the drain of PMOS transistors PM2 and PM4, and also to the gate of PMOS transistor PM1. The source and substrate of PMOS transistor PM2 are connected, and also to the source, substrate, and gate of PMOS transistor PM3. The source and substrate of PMOS transistor PM4 are connected, and also to the substrate and source of PMOS transistor PM5. The gates of PMOS transistors PM4 and PM5 are both connected to VCC. The source of PMOS transistor PM1 is connected to VCC. The substrate B1 of PMOS transistor PM1 is connected to the source, gate, and substrate of PMOS transistor PM6, and also to the source, gate, and substrate of PMOS transistor PM7. The drain of PMOS transistor PM6 is connected to VCC. The drains of PMOS transistors PM3, PM5, and PM7 are all connected to output Y. The output D2 of the pull-down drive pre-stage control is connected to the drain of NMOS transistor NM2 and NMOS transistor NM4, and also to the gate of NMOS transistor NM1; the source and substrate of NMOS transistor NM2 are connected, and also to the source, substrate, and gate of NMOS transistor NM3; the source and substrate of NMOS transistor NM4 are connected, and also to the substrate and source of NMOS transistor NM5; the gates of NMOS transistors NM4 and NMOS transistor NM5 are both connected to GND; the source of NMOS transistor NM1 is connected to GND; the substrate B2 of NMOS transistor NM1 is connected to the source, gate, and substrate of NMOS transistor NM6, and also to the source, gate, and substrate of NMOS transistor NM7; the drain of NMOS transistor NM6 is connected to GND; the drains of NMOS transistors NM3, NMOS transistor NM5, and NMOS transistor NM7 are connected to output Y.
[0006] In one embodiment, when the voltage at the output terminal Y is higher than VCC, the data path and enable control module outputs VE at the L level; when the voltage at the output terminal Y is lower than GND, the data path and enable control module outputs VF at the H level.
[0007] This invention provides a hot-swappable structure for the output stage of a transmitter circuit. It utilizes a floating substrate structure and an association circuit between the port and the gate of the driving transistor. This allows the gate signal to follow the port even under high voltage conditions, ensuring the driving transistor remains off and preventing subthreshold currents exceeding microamp levels. The circuit design is simple to implement and provides an effective solution to the hot-swappable problem in transmitter circuits.
[0008] This invention provides backflow prevention for the output stage of an RS-485 transmitter. It requires an enable control module, which includes detection circuit outputting logic signals VE and VF. When the port voltage is higher than VCC, the enable control module outputs VE at a low level (L); when the port voltage is lower than GND, the enable control module outputs VF at a high level (H). Furthermore, the circuit structure is simple, has a wide range of applications, and is suitable for the design of transmitters such as RS-485 chips. Attached Figure Description
[0009] Figure 1 This is a schematic diagram of a hot-swappable structure applied to the output stage of a transmitter circuit provided by the present invention. Detailed Implementation
[0010] The following detailed description, in conjunction with the accompanying drawings and specific embodiments, provides a further detailed explanation of a hot-swappable structure for the output stage of a transmitter circuit proposed in this invention. The advantages and features of this invention will become clearer from the following description. It should be noted that the drawings are all in a very simplified form and use non-precise proportions, and are only used to facilitate and clarify the illustration of the embodiments of this invention.
[0011] This invention provides a hot-swappable structure for use in the output stage of a transmitter circuit, the structure of which is as follows: Figure 1 As shown, it includes input terminal A, output terminal Y, NMOS transistors NM1~NM7, PMOS transistors PM1~PM7, data path and enable control module, pull-up drive pre-stage control, and pull-down drive pre-stage control.
[0012] Input terminal A is connected to the input of the data path and enable control module. The outputs of the data path and enable control module are C1, C2, VE, and VF. C1 is connected to the input of the pull-up drive pre-stage control, VE is connected to the gate of PMOS transistor PM2, C2 is connected to the input of the pull-down drive pre-stage control, and VF is connected to the gate of NMOS transistor NM2.
[0013] The output D1 of the pull-up drive pre-stage control is connected to the drain of PMOS transistors PM2 and PM4, and also to the gate of PMOS transistor PM1. The source and substrate of PMOS transistor PM2 are connected, as are the source, substrate, and gate of PMOS transistor PM3. The source and substrate of PMOS transistor PM4 are connected, as are the substrate and source of PMOS transistor PM5. The gates of both PMOS transistors PM4 and PM5 are connected to VCC. The source of PMOS transistor PM1 is connected to VCC. The substrate B1 of PMOS transistor PM1 is connected to the source, gate, and substrate of PMOS transistor PM6, and also to the source, gate, and substrate of PMOS transistor PM7. The drain of PMOS transistor PM6 is connected to VCC. The drains of PMOS transistors PM3, PM5, and PM7 are all connected to output Y.
[0014] The output D2 of the pull-down drive pre-stage control is connected to the drain of NMOS transistors NM2 and NM4, and also to the gate of NMOS transistor NM1. The source and substrate of NMOS transistor NM2 are connected, as are the source, substrate, and gate of NMOS transistor NM3. The source and substrate of NMOS transistor NM4 are connected, as are the substrate and source of NMOS transistor NM5. The gates of both NMOS transistors NM4 and NM5 are connected to GND. The source of NMOS transistor NM1 is connected to GND. The substrate B2 of NMOS transistor NM1 is connected to the source, gate, and substrate of NMOS transistor NM6, and also to the source, gate, and substrate of NMOS transistor NM7. The drain of NMOS transistor NM6 is connected to GND. The drains of NMOS transistors NM3, NM5, and NM7 are connected to output Y.
[0015] For example, when the voltage at the output port is greater than VCC, how does the port implement the backflow prevention function? The working principle of this invention is as follows: 1. When VCC + |Vthp| > Y > VCC, |Vthp| represents the absolute value of the threshold voltage of PMOS transistors PM1~PM7, approximately 1.5V. At this time, because the detection circuit of the data path and enable control module detects that port Y is higher than VCC, VE outputs an L level. When port Y is higher than VCC and close to the PN junction voltage drop, port Y is also higher than D1 and close to the PN junction voltage drop, such as 0.7V. Since the threshold voltage of PMOS transistor PM1 is -1.5V, PMOS transistor PM1 has a 0.8V margin before turning on, and PMOS transistor PM1 is fully turned off. When port Y is higher than VCC and the voltage difference is greater than the PN junction voltage drop, the voltage at port Y is transmitted through the substrate PN junction of PMOS transistor PM3 and the linear region of PMOS transistor PM2, making the gate signal D1 of PMOS transistor PM1 approximately equal to Y - 0.7V. At this time, PMOS transistor PM1 is still turned off.
[0016] 2. When Y≥VCC+|Vthp|, PMOS transistors PM4 and PM5 begin to conduct voltage in the linear region, making the gate and drain potentials of PMOS transistor PM1 nearly the same, and PMOS transistor PM1 is turned off; as Y further increases, the situation is the same.
[0017] For example, when the voltage at the output port is less than GND, how does the port achieve backflow prevention? The working principle of this invention is as follows: 1. When GND - Vthn < Y < GND, Vthn represents the threshold voltage of NMOS transistors NM1~NM7, approximately 1.5V. At this time, because the detection circuit of the data path and enable control module detects that port Y is lower than GND, VF outputs a high level (H). When port Y is lower than GND and close to the PN junction voltage drop, port Y is also lower than D2 and close to the PN junction voltage drop (e.g., 0.7V). Since the threshold voltage of NMOS transistor NM1 is 1.5V, NM1 has a 0.8V margin before turning on, and device NM1 is fully turned off. When port Y is lower than GND and the voltage difference is greater than the PN junction voltage drop, the voltage at port Y is transmitted through the substrate PN junction of NMOS transistor NM3 and the linear region of NMOS transistor NM2, making the gate signal D2 of NMOS transistor NM1 approximately equal to Y + 0.7. At this time, NMOS transistor NM1 is turned off.
[0018] 2. When Y ≤ GND - Vthn, NMOS transistors NM4 and NM5 begin to conduct voltage in the linear region, making the gate and drain potentials of NMOS transistor NM1 nearly identical, and NMOS transistor NM1 is turned off. The same situation occurs as Y further decreases.
[0019] The above description is merely a description of preferred embodiments of the present invention and is not intended to limit the scope of the present invention in any way. Any changes or modifications made by those skilled in the art based on the above disclosure shall fall within the protection scope of the claims.
Claims
1. A hot-swappable structure applied to the output stage of a transmitter circuit, characterized in that, include: Input terminal A, output terminal Y, NMOS transistors NM1~NM7, PMOS transistors PM1~PM7, data path and enable control module, pull-up drive pre-stage control, pull-down drive pre-stage control; The input of the data path and enable control module is connected to input terminal A. The output C1 of the data path and enable control module is connected to the input of the pull-up drive pre-stage control. The output VE is connected to the gate of PMOS transistor PM2. The output C2 is connected to the input of the pull-down drive pre-stage control. The output VF is connected to the gate of NMOS transistor NM2. The output D1 of the pull-up drive pre-stage control is connected to the drain of PMOS transistors PM2 and PM4, and also to the gate of PMOS transistor PM1. The source and substrate of PMOS transistor PM2 are connected, and also to the source, substrate, and gate of PMOS transistor PM3. The source and substrate of PMOS transistor PM4 are connected, and also to the substrate and source of PMOS transistor PM5. The gates of PMOS transistors PM4 and PM5 are both connected to VCC. The source of PMOS transistor PM1 is connected to VCC. The substrate B1 of PMOS transistor PM1 is connected to the source, gate, and substrate of PMOS transistor PM6, and also to the source, gate, and substrate of PMOS transistor PM7. The drain of PMOS transistor PM6 is connected to VCC. The drains of PMOS transistors PM3, PM5, and PM7 are all connected to output Y. The output D2 of the pull-down drive pre-stage control is connected to the drain of NMOS transistor NM2 and NMOS transistor NM4, and also to the gate of NMOS transistor NM1; the source and substrate of NMOS transistor NM2 are connected, and also to the source, substrate, and gate of NMOS transistor NM3; the source and substrate of NMOS transistor NM4 are connected, and also to the substrate and source of NMOS transistor NM5; the gates of NMOS transistors NM4 and NMOS transistor NM5 are both connected to GND; the source of NMOS transistor NM1 is connected to GND; the substrate B2 of NMOS transistor NM1 is connected to the source, gate, and substrate of NMOS transistor NM6, and also to the source, gate, and substrate of NMOS transistor NM7; the drain of NMOS transistor NM6 is connected to GND; the drains of NMOS transistors NM3, NMOS transistor NM5, and NMOS transistor NM7 are connected to output Y.
2. The hot-swappable structure applied to the output stage of a transmitter circuit as described in claim 1, characterized in that, When the voltage at the output terminal Y is higher than VCC, the data path and enable control module outputs VE at the L level; when the voltage at the output terminal Y is lower than GND, the data path and enable control module outputs VF at the H level.