Driving circuit, driving method and driving equipment of switch assembly and storage medium

Abstract

The invention discloses a driving circuit, a driving method and driving equipment of a switch assembly and a storage medium. The switch assembly comprises an MOS (Metal Oxide Semiconductor) and an IGBT (Insulated Gate Bipolar Translator), the driving circuit comprises a microcontroller which is respectively connected to a grid electrode of the MOS and a grid electrode of the IGBT, and the microcontroller is configured to control the MOS to be switched on and control the IGBT to be switched off when a working current is smaller than a first current threshold value, so that the working current passes through the MOS; when the working current is larger than or equal to the first current threshold value and smaller than the second current threshold value, the MOS is controlled to be firstly switched on and then switched off relative to the IGBT, so that the working current passes through the MOS and the IGBT which are connected in parallel; and when the working current is greater than or equal to the second current threshold value, controlling the IGBT to be switched on firstly and then switched off relative to the MOS, so that the working current passes through the MOS and the IGBT which are connected in parallel. According to the driving circuit of the switch assembly, different driving modes are implemented according to different current ranges of the working current, the switch device is protected, and the working efficiency of the switch device is improved.

Description

Technical Field

[0001] This application relates to the field of drive circuits, and in particular to a drive circuit, drive method, drive device and storage medium for a switching component. Background Technology

[0002] Currently, in driving schemes for hybrid switching components consisting of parallel-connected Metal-Oxide-Semiconductor Field-Effect Transistors (MOS) and Insulated-Gate Bipolar Transistors (IGBTs), the advantage of low switching losses in MOS is commonly utilized. The MOS is driven to turn on first and then off relative to the IGBT to ensure zero-voltage switching (ZVS) of the IGBT. However, in this scheme, the efficiency remains low at low operating currents. As the operating current increases to a certain level, the MOS is prone to damage due to excessive stress. Summary of the Invention

[0003] This application provides a driving circuit, driving method, driving device, and storage medium for a switching component, which implements different driving modes for different current ranges of the operating current, thereby protecting the switching device and improving its operating efficiency.

[0004] In a first aspect, embodiments of this application provide a driving circuit for a switching component, the switching component including a MOS and an IGBT, the driving circuit including: a microcontroller connected to the gate of the MOS and the gate of the IGBT respectively, wherein the microcontroller is configured to: control the MOS to turn on and control the IGBT to turn off when the operating current is less than a first current threshold, so that the operating current passes through the MOS; control the MOS to turn on and then turn off relative to the IGBT when the operating current is greater than or equal to the first current threshold and less than a second current threshold, so that the operating current passes through the MOS and the IGBT connected in parallel; and control the IGBT to turn on and then turn off relative to the MOS when the operating current is greater than or equal to the second current threshold, so that the operating current passes through the MOS and the IGBT connected in parallel.

[0005] According to the foregoing embodiments of the first aspect of this application, the first current threshold is set such that when the operating current is equal to the first current threshold, the on-state voltage drop of the MOS is equal to the on-state voltage drop of the IGBT.

[0006] According to any of the foregoing embodiments of the first aspect of this application, the second current threshold is set as the operating current corresponding to the maximum switching stress of the MOS.

[0007] According to any of the foregoing embodiments of the first aspect of this application, the driving circuit further includes: a first resistor network connected between the microcontroller and the gate of the MOS, the first resistor network being used to adjust the resistance value of a first driving resistor connected between the microcontroller and the gate of the MOS; and a second resistor network connected between the microcontroller and the gate of the IGBT, the second resistor network being used to adjust the resistance value of a second driving resistor connected between the microcontroller and the gate of the IGBT.

[0008] According to any of the foregoing embodiments of the first aspect of this application, the microcontroller is configured to adjust the resistance values ​​of the first driving resistor and the second driving resistor by the first resistor network and the second resistor network based on the magnitude of the operating current.

[0009] Secondly, embodiments of this application provide a driving method for a switching component, the switching component including a MOS and an IGBT, the driving method including: when the operating current is in a first current range less than a first current threshold, controlling the MOS to turn on and controlling the IGBT to turn off, so that the operating current passes through the MOS; when the operating current is in a second current range greater than or equal to the first current threshold and less than a second current threshold, controlling the MOS to turn on and then turn off relative to the IGBT, so that the operating current passes through the MOS and the IGBT connected in parallel; when the operating current is in a third current range greater than or equal to the second current threshold, controlling the IGBT to turn on and then turn off relative to the MOS, so that the operating current passes through the MOS and the IGBT connected in parallel.

[0010] According to the foregoing embodiments of the second aspect of this application, the switching component is driven by a driving circuit, the driving circuit including a microcontroller, a first resistor network and a second resistor network, the first resistor network being connected between the microcontroller and the gate of the MOS, and the second resistor network being connected between the microcontroller and the gate of the IGBT. The driving method further includes: adjusting the resistance value of a first driving resistor connected between the microcontroller and the gate of the MOS through the first resistor network based on the magnitude of the operating current, and adjusting the resistance value of a second driving resistor connected between the microcontroller and the gate of the IGBT through the second resistor network.

[0011] According to any of the foregoing embodiments of the second aspect of this application, at least one of the first current range, the second current range, and the third current range is divided into at least two current sub-ranges; the step of adjusting the resistance value of the first driving resistor connected between the microcontroller and the gate of the MOS through the first resistor network based on the magnitude of the operating current, and adjusting the resistance value of the second driving resistor connected between the microcontroller and the gate of the IGBT through the second resistor network, includes: adjusting the resistance values ​​of the corresponding first driving resistor and the second driving resistor through the first resistor network and the second resistor network based on the current sub-range in which the operating current is located.

[0012] According to any of the foregoing embodiments of the second aspect of this application, the first current range, the second current range, and the third current range are all divided into three current sub-ranges.

[0013] According to any of the foregoing embodiments of the second aspect of this application, the first current threshold is set such that when the operating current is equal to the first current threshold, the on-state voltage drop of the MOS is equal to the on-state voltage drop of the IGBT.

[0014] According to any of the foregoing embodiments of the second aspect of this application, the second current threshold is set as the operating current corresponding to the maximum switching stress of the MOS.

[0015] Thirdly, embodiments of this application provide a driving device for a switching component, the driving device for the switching component including a memory and at least one processor, the memory storing instructions, the at least one processor calling the instructions in the memory to cause the driving device for the switching component to execute a driving method for a switching component according to any of the foregoing embodiments of the second aspect of this application.

[0016] Fourthly, embodiments of this application provide a computer-readable storage medium storing instructions that, when executed by a processor, implement a driving method for a switching component according to any of the foregoing embodiments of the second aspect of this application.

[0017] According to the driving circuit of the switching component in the embodiments of this application, the microcontroller is configured to generate different driving modes according to different operating currents. When the operating current is less than a first current threshold, the operating current is in the low current region. At this time, the MOS is controlled to turn on and the IGBT is controlled to turn off, so that the operating current passes through the MOS. That is, the MOS is driven alone at this time, and the MOS bears all the switching losses and conduction losses. The IGBT does not work, thus reducing the switching losses and conduction voltage drop of the IGBT and improving the working efficiency of the switching component. When the operating current is greater than or equal to the first current threshold and less than the second current threshold, the MOS is controlled to turn on and then turn off relative to the IGBT, so that the operating current passes through the parallel MOS and IGBT. At this time, the MOS bears all the switching losses, and the conduction losses are shared by the MOS and the IGBT. The MOS turning on and then turning off relative to the IGBT enables the IGBT to achieve ZVS, ensuring that the switching component has high working efficiency at this time. When the operating current is greater than or equal to the second current threshold, the IGBT is controlled to turn on first and then turn off relative to the MOS, so that the operating current passes through the parallel MOS and IGBT. At this time, the IGBT bears the switching loss, and the conduction loss is shared by the MOS and IGBT. This improves the overcurrent capability of the switching component, protects the MOS, and avoids damage to the MOS due to excessive stress. Attached Figure Description

[0018] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on the structures shown in these drawings without creative effort.

[0019] Figure 1 This is a schematic diagram of the structure of a driving circuit for the switching component of this application;

[0020] Figure 2 This is a schematic diagram showing the relationship between the operating current value and the driving mode in one embodiment of the driving circuit of the switching component of this application.

[0021] Figure 3 This is a schematic flowchart of an embodiment of the driving method for the switch component of this application;

[0022] Figure 4 This is a schematic diagram showing the relationship between the operating current value and the driving mode in one embodiment of the driving method for the switching component of this application;

[0023] Figure 5 This is a schematic diagram of the hardware structure of a driving device for the switching component of this application.

[0024] The realization of the purpose, functional features and advantages of this application will be further explained in conjunction with the embodiments and the accompanying drawings. Detailed Implementation

[0025] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of the embodiments. Based on the embodiments of this application, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of this application.

[0026] It should be noted that all directional indicators (such as up, down, left, right, front, back, etc.) in the embodiments of this application are only used to explain the relative positional relationship and movement of each component in a certain specific posture (as shown in the figure). If the specific posture changes, the directional indicator will also change accordingly.

[0027] Furthermore, the use of terms such as "first" and "second" in this application is for descriptive purposes only and should not be construed as indicating or implying their relative importance or implicitly specifying the number of technical features indicated. Therefore, a feature defined as "first" or "second" may explicitly or implicitly include at least one of that feature. Additionally, the technical solutions of the various embodiments can be combined with each other, but only on the basis of being achievable by those skilled in the art. When the combination of technical solutions is contradictory or impossible to implement, such a combination of technical solutions should be considered non-existent and not within the scope of protection claimed in this application.

[0028] This application provides a driving circuit for a switching component. Figure 1 This is a schematic diagram of a driving circuit for a switching assembly according to an embodiment of this application. The switching assembly includes a metal-oxide-semiconductor field-effect transistor (MOS) Q1 and an insulated-gate bipolar transistor (IGBT) Q2. In this embodiment, the first terminal of MOS Q1 is connected to the first terminal of IGBT Q2, and the second terminal of MOS Q1 is connected to the second terminal of IGBT Q2, so that they are connected in parallel and connected in parallel to the operating current source.

[0029] The driving circuit of the switching assembly includes a microcontroller unit (MCU) 110, which is connected to the gate of MOS Q1 and the gate of IGBT Q2.

[0030] Figure 2This is a schematic diagram illustrating the relationship between the operating current value and the driving mode in one embodiment of the driving circuit of the switching component of this application. In this embodiment, the microcontroller 110 is configured to: control MOS Q1 to turn on and control IGBT Q2 to turn off when the operating current is less than a first current threshold Iknee, so that the operating current passes through MOS Q1; control MOS Q1 to turn on and then turn off relative to IGBT Q2 when the operating current is greater than or equal to the first current threshold Iknee and less than a second current threshold ISOA, so that the operating current passes through the parallel-connected MOS Q1 and IGBT Q2; control IGBT Q2 to turn on and then turn off relative to MOS Q1 when the operating current is greater than or equal to the second current threshold ISOA, so that the operating current passes through the parallel-connected MOS Q1 and IGBT Q2.

[0031] The microcontroller 110 is capable of generating a first drive signal to drive the MOS Q1 and a second drive signal to drive the IGBT Q2. The first drive signal and the second drive signal are independent of each other. In one example, both the first drive signal and the second drive signal are pulse width modulation (PWM) drive signals.

[0032] In this embodiment, when the operating current is within a first current range less than the first current threshold Iknee, the drive circuit enters a first drive mode M1, under which MOS Q1 is turned on and IGBT Q2 is turned off. When the operating current is within a second current range greater than or equal to the first current threshold Iknee and less than the second current threshold ISOA, the drive circuit enters a second drive mode M2, under which MOS Q1 is turned on and then turned off relative to IGBT Q2. When the operating current is within a third current range greater than or equal to the second current threshold ISOA, the drive circuit enters a third drive mode M3, under which IGBT Q2 is turned on and then turned off relative to MOS Q1.

[0033] According to the driving circuit of the switching component in the embodiments of this application, the microcontroller 110 is configured to generate different driving modes according to different operating currents. When the operating current is less than the first current threshold Iknee, the operating current is in the low current region. At this time, MOS Q1 is controlled to turn on and IGBT Q2 is controlled to turn off, so that the operating current passes through MOS Q1. That is, MOS Q1 is driven alone at this time, and MOS Q1 bears all the switching losses and conduction losses. IGBT Q2 does not work, thus reducing the switching losses and conduction voltage drop of IGBT Q2 and improving the working efficiency of the switching component. When the operating current is greater than or equal to the first current threshold Iknee and less than the second current threshold ISOA, MOS Q1 is controlled to turn on and then turn off relative to IGBT Q2, so that the operating current passes through the parallel MOS Q1 and IGBT Q2. At this time, MOS Q1 bears all the switching losses, and the conduction losses are shared by MOS Q1 and IGBT Q2. The fact that MOS Q1 turns on and then turns off relative to IGBT Q2 enables IGBT Q2 to achieve zero voltage switching (ZVS), ensuring that the switching component has high working efficiency at this time. When the operating current is greater than or equal to the second current threshold ISOA, the IGBT Q2 is controlled to turn on first and then turn off relative to the MOS Q1, so that the operating current passes through the parallel MOS Q1 and IGBT Q2. At this time, IGBT Q2 bears the switching loss, and the conduction loss is shared by MOS Q1 and IGBT Q2, which improves the overcurrent capability of the switching component, protects MOS Q1, and avoids MOS Q1 from being damaged due to excessive stress.

[0034] According to the driving circuit of the switching component in the embodiment of this application, the switching modes of MOS Q1 and IGBT Q2 can be freely set by switching the driving mode, ensuring that the application range of the hybrid parallel switching component is large enough.

[0035] In some embodiments, the first current threshold Iknee is set such that when the operating current equals the first current threshold Iknee, the on-state voltage drop of MOS Q1 is equal to the on-state voltage drop of IGBT Q2. The on-state voltage drop of MOS Q1 is basically proportional to the operating current. Due to its own structure, IGBT Q2 has a relatively large initial voltage drop. Therefore, there exists a critical current point where the on-state voltage drop of MOS Q1 equals the on-state voltage drop of IGBT Q2. This critical current point is used as the first current threshold Iknee.

[0036] Because silicon carbide (SiC) channel MOSFETs are relatively expensive, when performing hybrid parallel connections, a SiC channel MOSFET with a smaller overcurrent rating is typically selected and connected in parallel with an IGBT with a larger overcurrent rating to form a switching assembly. In this case, the current stress on MOSFET Q1 is significant during high-current switching. In this embodiment, the second current threshold ISOA is set as the operating current corresponding to the maximum switching stress experienced by MOSFET Q1; the second current threshold ISOA is also the upper limit of the MOSFET's current handling capability.

[0037] In some embodiments, the driving circuit further includes a first resistor network 121 and a second resistor network 122. The first resistor network 121 is connected between the microcontroller 110 and the gate of the MOS Q1, and is used to adjust the resistance value of the first driving resistor connected between the microcontroller 110 and the gate of the MOS Q1. The second resistor network 122 is connected between the microcontroller 110 and the gate of the IGBT Q2, and is used to adjust the resistance value of the second driving resistor connected between the microcontroller 110 and the gate of the IGBT Q2.

[0038] In some embodiments, the microcontroller 110 is configured to adjust the resistance values ​​of the first driving resistor and the second driving resistor based on the magnitude of the operating current using the first resistor network 121 and the second resistor network 122. Specifically, the larger the operating current, the larger the resistance values ​​of the corresponding first and second driving resistors; conversely, the smaller the operating current, the smaller the resistance values ​​of the corresponding first and second driving resistors. This allows for the use of smaller driving resistors to drive the switching component during operation, ensuring lower device losses in the switching component. Therefore, the driving circuit of the switching component in the above embodiments can set an optimal combination of driving resistors according to the operating current, ensuring lower losses under different operating conditions.

[0039] In some embodiments, the driving circuit further includes a first driving logic circuit 131 and a second driving logic circuit 132. The first driving logic circuit 131 is connected between the microcontroller 110 and the first resistor network 121. The second driving logic circuit 132 is connected between the microcontroller 110 and the second resistor network 122.

[0040] In some embodiments, the driving circuit further includes a first analog switch 141 and a second analog switch 142. The first analog switch 141 is connected between the first resistor network 121 and the gate of MOS Q1. The second analog switch 142 is connected between the second resistor network 122 and the gate of IGBT Q2.

[0041] This application also provides a method for driving a switching component, the switching component including a MOS Q1 and an IGBT Q2. Figure 3This is a flowchart illustrating an embodiment of the driving method for the switch component of this application. Figure 4 This is a schematic diagram showing the relationship between the operating current value and the driving mode in one embodiment of the driving method for the switching component of this application.

[0042] like Figure 3 , Figure 4 The driving method for the switching component includes: when the operating current I is in a first current range less than a first current threshold Iknee, controlling MOS Q1 to turn on and controlling IGBT Q2 to turn off, so that the operating current I passes through MOS Q1; when the operating current I is in a second current range greater than or equal to the first current threshold Iknee and less than a second current threshold ISOA, controlling MOS Q1 to turn on and then turn off relative to IGBT Q2, so that the operating current I passes through MOS Q1 and IGBT Q2 connected in parallel; when the operating current I is in a third current range greater than or equal to the second current threshold ISOA, controlling IGBT Q2 to turn on and then turn off relative to MOS Q1, so that the operating current I passes through MOS Q1 and IGBT Q2 connected in parallel.

[0043] In this embodiment, when the operating current I is within a first current range less than the first current threshold Iknee, the drive circuit enters a first drive mode M1, under which MOS Q1 is turned on and IGBT Q2 is turned off. When the operating current I is within a second current range greater than or equal to the first current threshold Iknee and less than the second current threshold ISOA, the drive circuit enters a second drive mode M2, under which MOS Q1 is turned on and then turned off relative to IGBT Q2. When the operating current I is within a third current range greater than or equal to the second current threshold ISOA, the drive circuit enters a third drive mode M3, under which IGBT Q2 is turned on and then turned off relative to MOS Q1.

[0044] According to the driving method of the switching component in the embodiments of this application, different driving modes are generated according to different operating currents. When the operating current is less than the first current threshold Iknee, the operating current is in the low current region. At this time, MOS Q1 is controlled to turn on and IGBT Q2 is controlled to turn off, so that the operating current passes through MOS Q1. That is, MOS Q1 is driven alone at this time. MOS Q1 bears all the switching losses and conduction losses, and IGBT Q2 does not work. Therefore, the switching losses and conduction voltage drop of IGBT Q2 are reduced, and the working efficiency of the switching component is improved. When the operating current is greater than or equal to the first current threshold Iknee and less than the second current threshold ISOA, MOS Q1 is controlled to turn on and then turn off relative to IGBT Q2, so that the operating current passes through the parallel MOS Q1 and IGBT Q2. At this time, MOS Q1 bears all the switching losses, and the conduction losses are shared by MOS Q1 and IGBT Q2. The fact that MOS Q1 turns on and then turns off relative to IGBT Q2 enables IGBT Q2 to achieve ZVS, ensuring that the switching component has high working efficiency at this time. When the operating current is greater than or equal to the second current threshold ISOA, the IGBT Q2 is controlled to turn on first and then turn off relative to the MOS Q1, so that the operating current passes through the parallel MOS Q1 and IGBT Q2. At this time, IGBT Q2 bears the switching loss, and the conduction loss is shared by MOS Q1 and IGBT Q2, which improves the overcurrent capability of the switching component, protects MOS Q1, and avoids MOS Q1 from being damaged due to excessive stress.

[0045] According to the driving method of the switching component in the embodiments of this application, the switching modes of MOS Q1 and IGBT Q2 can be freely set by switching the driving mode, ensuring that the application range of the hybrid parallel switching component is large enough.

[0046] In some embodiments, the first current threshold Iknee is set such that when the operating current I equals the first current threshold Iknee, the on-state voltage drop of MOS Q1 is equal to the on-state voltage drop of IGBT Q2. The on-state voltage drop of MOS Q1 is basically proportional to the operating current. Due to its own structure, IGBT Q2 has a relatively large initial voltage drop. Therefore, there exists a critical current point where the on-state voltage drop of MOS Q1 equals the on-state voltage drop of IGBT Q2. This critical current point is used as the first current threshold Iknee.

[0047] Because silicon carbide (SiC) channel MOSFETs are relatively expensive, when performing hybrid parallel connections, a SiC channel MOSFET with a smaller overcurrent rating is typically selected and connected in parallel with an IGBT with a larger overcurrent rating to form a switching assembly. In this case, the current stress on MOSFET Q1 is significant during high-current switching. In this embodiment, the second current threshold ISOA is set as the operating current I corresponding to the maximum switching stress experienced by MOSFET Q1.

[0048] In some embodiments, the driving method drives the switching component via a driving circuit. For example... Figure 1 In some embodiments, the driving circuit includes a microcontroller 110, a first resistor network 121, and a second resistor network 122. The first resistor network 121 is connected between the microcontroller 110 and the gate of MOS Q1, and the second resistor network 122 is connected between the microcontroller 110 and the gate of IGBT Q2.

[0049] In some embodiments, the driving method further includes: adjusting the resistance value of a first driving resistor connected between the microcontroller 110 and the gate of MOS Q1 through a first resistor network 121 based on the magnitude of the operating current I, and adjusting the resistance value of a second driving resistor connected between the microcontroller 110 and the gate of IGBT Q2 through a second resistor network 122.

[0050] In some embodiments, at least one of the first current range, the second current range, and the third current range is divided into at least two current sub-ranges.

[0051] At this time, based on the magnitude of the operating current I, the resistance value of the first driving resistor connected between the gate of the microcontroller 110 and the MOS Q1 is adjusted through the first resistor network 121, and the resistance value of the second driving resistor connected between the gate of the microcontroller 110 and the IGBT Q2 is adjusted through the second resistor network 122. This includes: based on the current subrange in which the operating current I is located, adjusting the resistance values ​​of the corresponding first driving resistor and the second driving resistor through the first resistor network 121 and the second resistor network 122.

[0052] In some embodiments, the current boundary point between adjacent current sub-ranges in the first current range, second current range, and third current range can be determined based on the voltage stress obtained by the working current testing device, as well as the dynamic voltage change rate (dv / dt) and dynamic current change rate (di / dt). Under the premise of ensuring that the voltage stress and dynamic parameters meet the requirements, a relatively small driving resistor value is selected for driving, thereby ensuring that the loss of the switching component is minimized, and thus determining the value of the current boundary point between adjacent current sub-ranges in each driving mode.

[0053] In this embodiment, the first current range, the second current range, and the third current range are each divided into three current sub-ranges. Correspondingly, for each driving mode, there are three groups of driving resistor combinations that match three adjacent current sub-ranges in sequence. Each group of driving resistor combinations includes the resistance value of the first driving resistor and the resistance value of the second driving resistor in that group.

[0054] As described above, according to the measured voltage stress, as well as the dynamic voltage change rate (dv / dt) and the dynamic current change rate (di / dt), the current breakpoints IMN1 and IMN2 between adjacent current sub-ranges in each driving mode can be determined. Specifically, the two current breakpoints within the first current range are IM11 and IM12, and the first current range is divided into three current sub-ranges: 0 < I < Iknee1; IM11 ≤ I < IM12; IM12 ≤ I < Iknee1. The two current breakpoints within the second current range are IM21 and IM22, and the second current range is divided into three current sub-ranges: Iknee ≤ I < IM21; IM21 ≤ I < IM22; IM22 ≤ I < ISOA. The two current breakpoints within the third current range are IM31 and IM32, and the third current range is divided into three current sub-ranges: ISOA ≤ I < IM31; IM31 ≤ I < IM32; IM32 ≤ I. Each current sub-range is matched with a corresponding driving resistor combination, and each group of driving resistor combinations includes the resistance value of the first driving resistor and the resistance value of the second driving resistor in that group.

[0055] According to the above embodiment, according to the current sub-range where the working current I is located, a more optimal driving resistor combination can be matched, thereby ensuring that the losses of the switching component under different working conditions are small.

[0056] The embodiment of the present application also provides a driving device for a switching component. Figure 5 It is a schematic hardware structure diagram of an embodiment of the driving device for the switching component of the present application. The driving device for the switching component includes a memory 510 and at least one processor 520. Instructions are stored in the memory 510, and the at least one processor 520 calls the instructions in the memory 510 to cause the driving device for the switching component to execute the driving method for the switching component according to any one of the foregoing embodiments of the present application.

[0057] The switching assembly includes a MOSFET and an IGBT. The driving method of the switching assembly includes: when the operating current is in a first current range less than a first current threshold, controlling the MOSFET to turn on and controlling the IGBT to turn off, so that the operating current passes through the MOSFET; when the operating current is in a second current range greater than or equal to the first current threshold and less than a second current threshold, controlling the MOSFET to turn on and then turn off relative to the IGBT, so that the operating current passes through the MOSFET and IGBT connected in parallel; when the operating current is in a third current range greater than or equal to the second current threshold, controlling the IGBT to turn on and then turn off relative to the MOSFET, so that the operating current passes through the MOSFET and IGBT connected in parallel.

[0058] Specifically, the processor 510 may include a central processing unit (CPU), an application-specific integrated circuit (ASIC), or one or more integrated circuits that can be configured to implement the embodiments of this application.

[0059] Memory 520 may include a large-capacity memory 520 for data or instructions. For example, and not limitingly, memory 520 may include a hard disk drive (HDD), a floppy disk drive, flash memory, optical disk, magneto-optical disk, magnetic tape, or a Universal Serial Bus (USB) drive, or a combination of two or more of these. Where appropriate, memory 520 may include removable or non-removable (or fixed) media. Where appropriate, memory 520 may be internal or external to the integrated gateway disaster recovery device. In a particular embodiment, memory 520 is non-volatile solid-state memory. In a particular embodiment, memory 520 includes read-only memory (ROM). Where appropriate, the ROM may be a mask-programmed ROM, a programmable ROM (PROM), an erasable PROM (EPROM), an electrically erasable PROM (EEPROM), an electrically rewritable ROM (EAROM), or flash memory, or a combination of two or more of these.

[0060] In one example, the control device may also include a communication interface 530 and a bus 540. The processor 510, memory 520, and communication interface 530 are connected via the bus 540 and communicate with each other.

[0061] The communication interface 530 is mainly used to realize communication between various modules, devices, units and / or equipment in the embodiments of this application.

[0062] Bus 540 includes hardware, software, or both, that couples components of an online data traffic metering device together. For example, and not limitingly, the bus may include an Accelerated Graphics Port (AGP) or other graphics bus, an Enhanced Industry Standard Architecture (EISA) bus, a Front Side Bus (FSB), HyperTransport (HT) interconnect, an Industry Standard Architecture (ISA) bus, an Infinite Bandwidth Interconnect, a Low Pin Count (LPC) bus, a Memory 520 bus, a Microchannel Architecture (MCA) bus, a Peripheral Component Interconnect (PCI) bus, a PCI-Express (PCI-X) bus, a Serial Advanced Technology Attachment (SATA) bus, a Video Electronics Standards Association Local (VLB) bus, or other suitable buses, or combinations of two or more of these. Where appropriate, bus 540 may include one or more buses. Although specific buses are described and illustrated in embodiments of this application, this application contemplates any suitable bus or interconnect.

[0063] Furthermore, in conjunction with the driving method of the switching component in the above embodiments, this application embodiment can provide a computer-readable storage medium for implementation. This computer-readable storage medium stores instructions that, when executed by a processor, implement any of the driving methods of the switching component in the above embodiments.

[0064] The switching assembly includes a MOSFET and an IGBT. The driving method of the switching assembly includes: when the operating current is in a first current range less than a first current threshold, controlling the MOSFET to turn on and controlling the IGBT to turn off, so that the operating current passes through the MOSFET; when the operating current is in a second current range greater than or equal to the first current threshold and less than a second current threshold, controlling the MOSFET to turn on and then turn off relative to the IGBT, so that the operating current passes through the MOSFET and IGBT connected in parallel; when the operating current is in a third current range greater than or equal to the second current threshold, controlling the IGBT to turn on and then turn off relative to the MOSFET, so that the operating current passes through the MOSFET and IGBT connected in parallel.

[0065] This application is not limited to the specific configurations and processes described above and shown in the figures. For the sake of brevity, detailed descriptions of known methods are omitted here. In the above embodiments, several specific steps are described and shown as examples. However, the method process of this application is not limited to the specific steps described and shown. Those skilled in the art can make various changes, modifications, and additions, or change the order of steps, after understanding the spirit of this application.

[0066] The functional blocks shown in the above block diagram can be implemented as hardware, software, firmware, or a combination thereof. When implemented in hardware, they can be, for example, electronic circuits, application-specific integrated circuits (ASICs), appropriate firmware, plug-ins, function cards, etc. When implemented in software, the elements of this application are programs or code segments used to perform the required tasks. Programs or code segments can be stored on a machine-readable medium or transmitted over a transmission medium or communication link via data signals carried on a carrier wave. "Machine-readable medium" can include any medium capable of storing or transmitting information. Examples of machine-readable media include electronic circuits, semiconductor memory devices, ROM, flash memory, erasable ROM (EROM), floppy disks, CD-ROMs, optical disks, hard disks, fiber optic media, radio frequency (RF) links, etc. Code segments can be downloaded via computer networks such as the Internet, intranets, etc.

[0067] It should also be noted that the exemplary embodiments mentioned in this application describe methods or systems based on a series of steps or apparatus. However, this application is not limited to the order of the above steps; that is, the steps can be performed in the order mentioned in the embodiments, or in a different order, or several steps can be performed simultaneously.

[0068] The above description is merely a specific implementation of this application. Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the specific working processes of the systems, modules, and units described above can be referred to the corresponding processes in the foregoing method embodiments, and will not be repeated here. It should be understood that the protection scope of this application is not limited thereto. Any person skilled in the art can easily conceive of various equivalent modifications or substitutions within the technical scope disclosed in this application, and these modifications or substitutions should all be covered within the protection scope of this application.

Claims

1. A driving circuit for a switching assembly, the switching assembly comprising a MOS and an IGBT, characterized in that, The driving circuit includes: The microcontroller is connected to the gate of the MOS and the gate of the IGBT, respectively. The microcontroller is configured as follows: When the operating current is less than the first current threshold, the MOS is controlled to turn on and the IGBT is controlled to turn off, so that the operating current passes through the MOS; When the operating current is greater than or equal to the first current threshold and less than the second current threshold, the MOS is controlled to turn on and then turn off relative to the IGBT, so that the operating current passes through the MOS and the IGBT connected in parallel; When the operating current is greater than or equal to the second current threshold, the IGBT is controlled to turn on and then turn off relative to the MOS, so that the operating current passes through the MOS and the IGBT connected in parallel.

2. The driving circuit for the switching assembly as described in claim 1, characterized in that, The first current threshold is set such that when the operating current is equal to the first current threshold, the on-state voltage drop of the MOS is equal to the on-state voltage drop of the IGBT.

3. The driving circuit for the switching assembly as described in claim 1, characterized in that, The second current threshold is set as the operating current corresponding to the maximum switching stress of the MOS.

4. The driving circuit for the switching assembly as described in claim 1, characterized in that, The driving circuit also includes: A first resistor network is connected between the microcontroller and the gate of the MOS. The first resistor network is used to adjust the resistance value of the first drive resistor connected between the microcontroller and the gate of the MOS. A second resistor network is connected between the microcontroller and the gate of the IGBT. The second resistor network is used to adjust the resistance value of the second drive resistor connected between the microcontroller and the gate of the IGBT.

5. The driving circuit for the switching assembly as described in claim 4, characterized in that, The microcontroller is configured to adjust the resistance values ​​of the first driving resistor and the second driving resistor based on the magnitude of the operating current using the first resistor network and the second resistor network.

6. A method for driving a switching component, the switching component comprising a MOS and an IGBT, characterized in that, The driving method includes: When the operating current is within a first current range that is less than a first current threshold, the MOS is controlled to turn on and the IGBT is controlled to turn off, so that the operating current passes through the MOS; When the operating current is in a second current range that is greater than or equal to the first current threshold and less than the second current threshold, the MOS is controlled to turn on and then turn off relative to the IGBT, so that the operating current passes through the MOS and the IGBT connected in parallel. When the operating current is in a third current range greater than or equal to the second current threshold, the IGBT is controlled to turn on and then off relative to the MOS, so that the operating current passes through the MOS and the IGBT connected in parallel.

7. The driving method for the switching assembly as described in claim 6, characterized in that, The switching assembly is driven by a driving circuit, which includes a microcontroller, a first resistor network, and a second resistor network. The first resistor network is connected between the microcontroller and the gate of the MOS, and the second resistor network is connected between the microcontroller and the gate of the IGBT. The driving method further includes: Based on the magnitude of the operating current, the resistance value of the first driving resistor connected between the microcontroller and the gate of the MOS is adjusted through the first resistor network, and the resistance value of the second driving resistor connected between the microcontroller and the gate of the IGBT is adjusted through the second resistor network.

8. The driving method for the switching assembly as described in claim 7, characterized in that, At least one of the first current range, the second current range, and the third current range is divided into at least two current sub-ranges; The step of adjusting the resistance value of the first driving resistor connected between the microcontroller and the gate of the MOS through the first resistor network based on the magnitude of the operating current, and adjusting the resistance value of the second driving resistor connected between the microcontroller and the gate of the IGBT through the second resistor network, includes: Based on the current sub-range in which the operating current is located, the resistance values ​​of the first driving resistor and the second driving resistor are adjusted through the first resistor network and the second resistor network.

9. The driving method for the switching assembly as described in claim 8, characterized in that, The first current range, the second current range, and the third current range are all divided into three current sub-ranges.

10. The driving method for the switching assembly as described in claim 6, characterized in that, The first current threshold is set such that when the operating current is equal to the first current threshold, the on-state voltage drop of the MOS is equal to the on-state voltage drop of the IGBT.

11. The driving method for the switching assembly as described in claim 6, characterized in that, The second current threshold is set as the operating current corresponding to the maximum switching stress of the MOS.

12. A driving device for a switching assembly, characterized in that, The driving device for the switching assembly includes a memory and at least one processor, wherein the memory stores instructions. The at least one processor invokes the instructions in the memory to cause the driving device of the switching component to perform the driving method of the switching component as described in any one of claims 6 to 11.

13. A computer-readable storage medium storing instructions thereon, characterized in that, When the instructions are executed by the processor, they implement the driving method of the switching component as described in any one of claims 6 to 11.

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