Display panel, preparation method of display panel and display device

By introducing a multi-layered separation structure into the display panel, the problem of poor detection accuracy in built-in touch technology is solved. By disconnecting the first electrode layer and the light-emitting layer in the isolation area, high-precision detection and good optical performance of the touch electrode are achieved.

CN122003035APending Publication Date: 2026-05-08BEIJING VISIONOX TECHNOLOGY CO LTD
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
BEIJING VISIONOX TECHNOLOGY CO LTD
Filing Date
2024-11-04
Publication Date
2026-05-08

AI Technical Summary

Technical Problem

In built-in touch technology, the detection accuracy of touch electrodes is relatively poor and is greatly affected by parasitic capacitance.

Method used

A multi-layer separation structure is introduced into the display panel, including a first film layer and a second film layer, to form an isolation area to disconnect the first electrode layer, reduce the obstruction of the touch electrode, and disconnect the light-emitting layer within the isolation area to avoid charge crosstalk and improve detection accuracy.

Benefits of technology

It effectively reduces the impact of parasitic capacitance on the touch electrode, improves detection accuracy, and enhances optical performance and color uniformity.

✦ Generated by Eureka AI based on patent content.

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Abstract

The invention relates to the technical field of display, in particular to a display panel, a preparation method of the display panel and a display device. The display panel includes: a substrate; the touch electrode is positioned on one side of the substrate; the pixel definition layer covers one side, deviating from the substrate, of the touch electrode and defines a plurality of pixel openings; the multiple separation structures are located on the side, away from the substrate, of the pixel definition layer, at least two separation structures are arranged between every two adjacent pixel openings, isolation areas located between the adjacent pixel openings are formed between the adjacent separation structures, and orthographic projections of the isolation areas on the substrate and orthographic projections of the touch electrodes on the substrate are overlapped; a light emitting layer filling at least part of the space of the pixel opening; the first electrode layer is located on the side, away from the substrate, of the light-emitting layer, and the first electrode layer is disconnected at least in the isolation area. The touch control electrode can be prevented from being shielded by the side, away from the substrate, of the first electrode layer, the influence of stray capacitance on the touch control electrode is weakened, and the detection precision of the touch control electrode is effectively improved.
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Description

Technical Field

[0001] This invention relates to the field of display technology, and in particular to a display panel, a method for manufacturing the display panel, and a display device. Background Technology

[0002] Currently, widely used touch technologies mainly fall into two categories: add-on touch technology and embedded touch technology. Add-on touch technology achieves touch functionality by directly bonding the touch panel (TP) film to the display surface. Its characteristics include a relatively thick film layer, and due to its structural independence, it has a lower overall integration density. Embedded touch technology is further subdivided into two technical solutions: Touch-Panel On Encapsulate (TOE) and In-cell Touch (Incell).

[0003] TOE technology fabricates the touch function layer on top of the encapsulation layer, significantly reducing the overall thickness of the screen. However, this solution requires a low-temperature manufacturing process, which may limit the optical viewing angle and have some impact on the integration of other functional modules. Built-in touch technology, as a more ideal touch solution, integrates the touch sensor directly within the pixel layer of the display, thereby achieving higher integration and a thinner screen design.

[0004] Therefore, embedded touch technology is currently the most commonly used technology. However, embedded touch technology has a relatively large parasitic capacitance, which affects the detection accuracy of the touch electrodes. Summary of the Invention

[0005] In view of this, the present disclosure provides a display panel, a method for manufacturing the display panel, and a display device, which solves the problem of poor detection accuracy of embedded touch electrodes in related technologies.

[0006] This disclosure provides a display panel, comprising: a substrate; a touch electrode located on one side of the substrate; a pixel defining layer covering the side of the touch electrode opposite to the substrate, the pixel defining layer defining a plurality of pixel openings; a plurality of partition structures located on the side of the pixel defining layer opposite to the substrate, at least two partition structures being present between each pair of adjacent pixel openings, and an isolation region being formed between adjacent partition structures located between adjacent pixel openings, the orthographic projection of the isolation region on the substrate overlapping the orthographic projection of the touch electrode on the substrate; a light-emitting layer filling at least a portion of the space of the pixel openings; and a first electrode layer located on the side of the light-emitting layer opposite to the substrate, and the first electrode layer being disconnected at least in the isolation region.

[0007] According to one embodiment of this disclosure, the separating structure includes a first film layer and a second film layer sequentially stacked along a direction away from the pixel definition layer, wherein the orthographic projection of the first film layer on the substrate falls within the orthographic projection range of the second film layer on the substrate; preferably, the first film layer includes an organic film layer, an inorganic film layer, or a metal film layer; preferably, the first film layer includes a black organic film layer; preferably, the second film layer includes an organic film layer, an inorganic film layer, or a metal film layer; preferably, the second film layer includes an inorganic film layer; preferably, the separating structure further includes a third film layer disposed on the side of the first film layer near the pixel definition layer, wherein the orthographic projection of the first film layer on the substrate is located within the orthographic projection range of the third film layer on the substrate, and the orthographic projection of the third film layer on the substrate is located within the orthographic projection range of the second film layer on the substrate; preferably, the third film layer includes a metal conductive film layer.

[0008] According to one embodiment of the present disclosure, the orthographic projection of the isolation region on the substrate covers the orthographic projection of the touch electrode on the substrate.

[0009] According to one embodiment of this disclosure, the separating structure encloses an isolation opening, the orthographic projection of the pixel opening on the substrate is located within the orthographic projection range of the isolation opening on the substrate, a portion of the light-emitting layer is located within the isolation opening, the light-emitting layer includes sub-light-emitting layers of different colors, and the sub-light-emitting layers of different colors are disconnected at least in the isolation region; preferably, the light-emitting layer covers at least a portion of the surface of the separating structure on the side opposite to the substrate; preferably, the first electrode layer is electrically connected to the separating structure; preferably, the first electrode layer extends partially to a sidewall of the separating structure near the light-emitting layer and is electrically connected to the separating structure.

[0010] According to one embodiment of this disclosure, the device further includes: a second electrode layer located on the side of the light-emitting layer near the substrate, and the touch electrode disposed on the second electrode layer; preferably, the second electrode layer includes a plurality of spaced sub-electrodes, and the touch electrode is located between adjacent sub-electrodes; preferably, the orthographic projection of the sub-electrodes on the substrate covers the orthographic projection of the pixel opening on the substrate; preferably, the device further includes a first encapsulation layer, the first encapsulation layer including a first encapsulation portion located on the side of the light-emitting layer away from the substrate and a second encapsulation portion located on the side of the partition structure away from the substrate; preferably, the orthographic projection of the second encapsulation portion on the substrate is within the orthographic projection range of the partition structure on the substrate; preferably, a cutout gap is formed between the side of the second encapsulation portion facing the substrate and the side of the partition structure away from the substrate; preferably, the first encapsulation layer further includes a third encapsulation portion located in an isolation region, at least a portion of the third encapsulation portion covering the sidewall of the partition structure near the isolation region; preferably, the device further includes a second encapsulation layer located on the side of the first encapsulation layer away from the substrate, and the second encapsulation layer fills the cutout gap and the isolation region.

[0011] This disclosure also provides a display panel, comprising: a substrate; a second electrode layer located on one side of the substrate, including a sub-electrode and a touch electrode disposed at a distance and insulated from each other; a pixel definition layer located on the side of the second electrode layer away from the substrate, the pixel definition layer enclosing a pixel opening, adjacent pixel openings being spaced apart; a light-emitting unit located on the side of the sub-electrode away from the substrate, at least a portion of the light-emitting unit being located within the pixel opening; and a first electrode layer located on the side of the light-emitting layer away from the substrate, wherein the orthographic projection of the first electrode layer on the substrate does not overlap with the orthographic projection of the touch electrode on the substrate.

[0012] According to one embodiment of this disclosure, it further includes: a separation structure located on the side of the pixel definition layer away from the substrate and between adjacent pixel openings, the separation structure forming an isolation region between the pixel openings, the touch electrode being disposed corresponding to the isolation region in the direction of the substrate pointing towards the light-emitting unit, and the first electrode layer being disconnected in the isolation region.

[0013] According to one embodiment of this disclosure, there are multiple separating structures, each of which corresponds to a plurality of pixel openings, and the separating structures are arranged around the outside of the pixel openings.

[0014] According to one embodiment of this disclosure, the partition structure is electrically connected to the first electrode layer, or the partition structure is provided with a through hole, and a conductive part is provided inside the through hole, and the conductive part is electrically connected to the first electrode layer.

[0015] According to one embodiment of this disclosure, the separating structure includes a plurality of separating portions, each of which surrounds the outside of the pixel opening and is arranged at intervals. Adjacent separating structures surrounding the outside of the same pixel opening are connected by connecting portions, and the connecting portions are electrically connected to the first electrode layer.

[0016] According to one embodiment of the present disclosure, the separation structure includes at least two film layers stacked sequentially along a direction away from the pixel definition layer, wherein the orthogonal projection of one film layer on the substrate falls within the orthogonal projection range of the other film layer on the substrate on the side away from the substrate.

[0017] This disclosure also provides a method for fabricating a display panel, comprising: providing a substrate; fabricating a touch electrode on one side of the substrate; fabricating a pixel definition layer on one side of the substrate, the pixel definition layer covering the side of the touch electrode opposite to the substrate, the pixel definition layer defining a plurality of pixel openings; fabricating a plurality of separation structures on the side of the pixel definition layer opposite to the substrate, wherein at least two separation structures are fabricated between every two adjacent pixel openings, and an isolation region is formed between at least two adjacent separation structures located between two adjacent pixel openings, the orthographic projection of the isolation region on the substrate overlapping the orthographic projection of the touch electrode on the substrate; fabricating a light-emitting layer, the light-emitting layer filling at least a portion of the space of the pixel openings; and fabricating a first electrode layer on the side of the light-emitting layer opposite to the substrate, the first electrode layer being disconnected at least in the isolation region.

[0018] According to one embodiment of this disclosure, the pixel opening includes a first pixel opening, a second pixel opening, and a third pixel opening. The fabrication of the light-emitting layer and the fabrication of the first electrode layer on the side of the light-emitting layer away from the substrate include: fabricating a first sub-light-emitting layer, the first sub-light-emitting layer filling the pixel opening and covering the side of the pixel definition layer away from the substrate and the side of the partition structure away from the substrate; fabricating a first sub-cathode layer, the first sub-cathode layer covering the surface of the first sub-light-emitting layer away from the substrate; fabricating a first sub-encapsulation layer, the first sub-encapsulation layer located on the side of the first sub-cathode layer away from the substrate; and performing a first patterning process to remove the first sub-light-emitting layer, the first sub-cathode layer, and the first sub-encapsulation layer located at the second pixel opening, the third pixel opening, and the isolation area. Preferably, the fabrication of the light-emitting layer and the fabrication of the first electrode layer on the side of the light-emitting layer away from the substrate further include: fabricating a second sub-light-emitting layer, the second sub-light-emitting layer filling the second pixel opening and the third pixel opening, and the second sub-light-emitting layer covering the first sub-cathode layer, the side of the pixel definition layer away from the substrate, and the side of the partition structure away from the substrate. The process includes: preparing a second sub-cathode layer, which covers the surface of the second sub-emitting layer away from the substrate; preparing a second sub-encapsulation layer, which is located on the side of the second sub-cathode layer away from the substrate; performing a second patterning process to remove the second sub-emitting layer, the second sub-cathode layer, and the second sub-encapsulation layer located on the surface of the first sub-encapsulation layer, at the third pixel opening, and in the isolation region; preferably, the preparation of the emitting layer and the preparation of the first electrode layer on the side of the emitting layer away from the substrate further includes: preparing a third sub-emitting layer, which fills the third pixel opening and covers the first sub-cathode layer, the second sub-cathode layer, the pixel definition layer on the side away from the substrate, and the separation structure on the side away from the substrate; preparing a third sub-cathode layer, which covers the surface of the third sub-emitting layer away from the substrate; preparing a third sub-encapsulation layer, which is located on the side of the third sub-cathode layer away from the substrate; and performing a third patterning process to remove the third sub-emitting layer, the third sub-cathode layer, and the third sub-encapsulation layer located on the surface of the first sub-encapsulation layer, the surface of the second sub-encapsulation layer, and in the isolation region.

[0019] According to one embodiment of this disclosure, before forming the pixel definition layer on one side of the substrate, the method further includes: preparing a second electrode layer, the second electrode layer being located on one side of the substrate and on the side of the light-emitting layer close to the substrate.

[0020] According to one embodiment of this disclosure, the method further includes: preparing a second encapsulation layer, the second encapsulation layer being located on the side of the first sub-encapsulation layer, the second sub-encapsulation layer, the third sub-encapsulation layer, and the separation structure away from the substrate.

[0021] This disclosure also provides a display device, including the display panel of the above embodiments, or the display panel of the above embodiments, or the display panel prepared using the method of the above embodiments.

[0022] The display panel, the method for manufacturing the display panel, and the display device disclosed herein can avoid the first electrode layer from blocking the touch electrode on the side away from the substrate. As a result, the influence of parasitic capacitance on the touch electrode can be weakened, and the detection accuracy of the touch electrode can be effectively improved. Attached Figure Description

[0023] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0024] Figure 1 The diagram shown is a structural schematic of a display panel provided in an embodiment of this disclosure.

[0025] Figure 2 The diagram shown is a structural schematic of a display panel provided in another embodiment of this disclosure.

[0026] Figure 3 The image shown is a schematic diagram of a display panel.

[0027] Figure 4 The diagram shown is a schematic diagram of the partition structure in a display panel before and after fabrication according to an embodiment of this disclosure.

[0028] Figure 5 The diagram shown is a schematic diagram of the first sub-light-emitting layer and the first sub-electrode layer in a display panel provided in an embodiment of this disclosure before and after fabrication.

[0029] Figure 6 The diagram shown is a schematic diagram of the second sub-light-emitting layer and the second sub-first electrode layer in a display panel provided in an embodiment of this disclosure before and after fabrication.

[0030] Figure 7 The diagram shown is a schematic diagram of the second sub-light-emitting layer and the third sub-first electrode layer in a display panel provided in an embodiment of this disclosure before and after fabrication.

[0031] Figure 8The diagram shown is a schematic diagram of the encapsulation layer in a display panel before and after fabrication according to an embodiment of this disclosure.

[0032] Figure 9 The diagram shown is a schematic diagram of the glass cover plate in a display panel before and after fabrication according to an embodiment of this disclosure.

[0033] Figure 10 The diagram shown is a flowchart illustrating a method for manufacturing a display panel according to an embodiment of this disclosure.

[0034] Figure 11 The diagram shown is a flowchart illustrating a method for manufacturing a display panel according to another embodiment of this disclosure.

[0035] Figure label:

[0036] 10. Substrate; 20. Second electrode layer; 30. Touch electrode; 40. Pixel definition layer; 41. Pixel aperture; 50. Separation structure; 51. First film layer; 52. Second film layer; 53. Isolation area; 60. Light-emitting layer; 61. First sub-light-emitting layer; 62. Second sub-light-emitting layer; 63. Third sub-light-emitting layer; 70. First electrode layer; 71. First sub-cathode layer; 72. Second sub-cathode layer; 73. Third sub-cathode layer; 81. First photoresist layer; 82. Second photoresist layer; 83. Third photoresist layer; 91. Encapsulation layer; 91a. First encapsulation layer; 911. First encapsulation part; 912. Second encapsulation part; 913. Third encapsulation part; 914. First sub-encapsulation layer; 915. Second sub-encapsulation layer; 916. Third sub-encapsulation layer; 91b. Second encapsulation layer; 92. Glass cover plate. Detailed Implementation

[0037] Integrated touch technology embeds touch panel functionality into LCD pixels, achieving integration of the touch panel and LCD panel. Compared to traditional external touch sensor technology, integrated touch technology significantly simplifies the manufacturing process and improves production efficiency. However, as... Figure 3 As shown, in the built-in touch technology, there is a large superposition area between the first electrode layer 70 of the display panel and the touch electrode 30, resulting in a large parasitic capacitance, which adversely affects the detection accuracy of the touch electrode 30.

[0038] The present disclosure provides a display panel, a method for manufacturing the display panel, and a display device, which aim to solve the above-mentioned technical problems.

[0039] The technical solutions of the embodiments of this disclosure will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this disclosure, and not all embodiments. Based on the embodiments of this disclosure, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this disclosure.

[0040] like Figure 1 As shown, the display panel of this embodiment includes a substrate 10, a touch electrode 30, a pixel definition layer 40, a plurality of separation structures 50, a light-emitting layer 60, and a first electrode layer 70.

[0041] The touch electrode 30 is located on one side of the substrate 10. The touch electrode 30 is used to detect the touch position of a user's finger or other conductive object on the touchscreen, and converts this touch information into electrical signals, which are then processed by the controller and converted into device-recognizable instructions. In this embodiment, the touch electrode 30 can be an ITO (indium tin oxide) electrode or a metal mesh electrode, etc. Preferably, in this embodiment, the touch electrode 30 is an ITO (indium tin oxide) electrode.

[0042] The pixel definition layer 40 covers the side of the touch electrode 30 away from the substrate 10. The pixel definition layer 40 defines a plurality of pixel openings 41. The pixel definition layer 40 is a key layer for defining and limiting the shape, size and spacing of pixels, and is used to ensure that each pixel can work correctly and independently and prevent crosstalk between pixels.

[0043] Multiple partition structures 50 are located on the side of the pixel definition layer 40 facing away from the substrate 10. At least two partition structures 50 are present between each pair of adjacent pixel openings 41. An isolation region 53 is formed between adjacent partition structures 50 located between adjacent pixel openings 41. The isolation region 53 refers to the area formed between the pixel openings 41. Due to the partitioning effect of the partition structures 50 located on both sides of the isolation region 53, the isolation region 53 is isolated from both adjacent pixel openings 41, and adjacent pixel openings 41 are also isolated from each other. The orthographic projection of the isolation region 53 on the substrate 10 overlaps with the orthographic projection of the touch electrode 30 on the substrate 10; that is, at least a portion of the orthographic projection of the touch electrode 30 on the substrate 10 is covered by the orthographic projection of the isolation region 53 on the substrate 10.

[0044] The light-emitting layer 60 fills at least a portion of the space of the pixel opening 41. The material of the light-emitting layer 60 includes organic materials. The portion of the light-emitting layer 60 located within the pixel opening 41 can emit light when excited by an electric current.

[0045] The first electrode layer 70 is located on the side of the light-emitting layer 60 facing away from the substrate 10. The first electrode layer 70 is made of a metallic material, such as aluminum, magnesium, or silver, giving it good conductivity and electron emission capability. The first electrode layer 70 is disconnected at least in the isolation region 53. Therefore, at the isolation region 53, the touch electrode 30 is not covered by the first electrode layer 70, which weakens the influence of parasitic capacitance on the touch electrode 30 and effectively improves the detection accuracy of the touch electrode 30.

[0046] In some embodiments, the separating structure 50 includes a first film layer 51 and a second film layer 52 sequentially stacked along a direction away from the pixel definition layer 40, wherein the orthographic projection of the first film layer 51 on the substrate 10 falls within the orthographic projection range of the second film layer 52 on the substrate 10. The phrase "the orthographic projection of the first film layer 51 on the substrate 10 falls within the orthographic projection range of the second film layer 52 on the substrate 10" means that the area of ​​the orthographic projection of the first film layer 51 on the substrate 10 is smaller than the area of ​​the orthographic projection of the second film layer 52 on the substrate 10, and the edge of the orthographic projection of the first film layer 51 on the substrate 10 falls inside the orthographic projection of the second film layer 52 on the substrate 10.

[0047] The first film layer 51 includes an organic film layer, an inorganic film layer, or a metal film layer. Preferably, the first film layer 51 includes a black organic film layer, which can avoid light crosstalk between adjacent pixels and thus achieve better light emission effect. The second film layer 52 includes an organic film layer, an inorganic film layer, or a metal film layer. Preferably, the second film layer 52 includes an inorganic film layer.

[0048] Preferably, the separating structure 50 further includes a third film layer (not shown) disposed on the side of the first film layer 51 near the pixel definition layer 40. The orthographic projection of the first film layer 51 on the substrate 10 is within the orthographic projection range of the third film layer on the substrate 10, and the orthographic projection of the third film layer on the substrate 10 is within the orthographic projection range of the second film layer 52 on the substrate 10. Preferably, the third film layer includes a metal conductive film layer. Power supply to the first electrode layer 70 within the pixel opening can be achieved through the third film layer, especially when the first film layer 51 and the second film layer 52 are non-metallic film layers.

[0049] In this embodiment, the multi-layer structure adopted by the partition structure 50 can ensure that the first electrode layer 70 is completely disconnected at the isolation area 53, thereby achieving a good effect of weakening parasitic capacitance. In addition, the partition structure 50 can also disconnect the light-emitting layer 60 at the isolation area 53 to prevent charge crosstalk. Furthermore, the partition structure 50 can also block large-angle light on the side of the pixel opening 41, reduce the divergence range, help solve the light crosstalk problem, improve color uniformity, and ensure good display effect.

[0050] In one alternative approach, there are multiple partition structures 50, each partition structure 50 corresponding to a multiple pixel openings 41, and the partition structures 50 are arranged around the outside of the pixel openings 41.

[0051] Optionally, the first electrode layer 70 is electrically connected to the partition structure 50 to facilitate power supply to the first electrode layer 70. Further, a portion of the first electrode layer 70 extends to a sidewall of the partition structure 50 near the light-emitting layer 60 and is electrically connected to the partition structure 50.

[0052] For example, when the partition structure 50 includes a third film layer, it is electrically connected to the first electrode layer 70 through the third film layer; or, the partition structure 50 is provided with a through hole, and a conductive part is provided inside the through hole, and the conductive part is electrically connected to the first electrode layer 70.

[0053] In another alternative, there are multiple partition structures 50, with multiple partition structures 50 arranged at intervals around the outside of each pixel opening 41. Adjacent partition structures 50 surrounding the same pixel opening 41 are connected by a connecting part, which is made of conductive metal and is electrically connected to the first electrode layer 70.

[0054] In some embodiments, a power supply layer is provided on the side of the touch electrode 30 near the substrate 10. The power supply layer is connected to the partition structure 50, the conductive part or the connecting part through a power via to realize the power supply of the first electrode layer 70.

[0055] In some embodiments, the orthographic projection of the isolation region 53 on the substrate 10 covers the orthographic projection of the touch electrode 30 on the substrate 10, that is, the orthographic projection area of ​​the touch electrode 30 on the substrate 10 is less than or equal to the orthographic projection area of ​​the isolation region 53 on the substrate 10, and the edge of the orthographic projection of the touch electrode 30 on the substrate 10 is located within the orthographic projection range of the isolation region 53 on the substrate 10.

[0056] This minimizes the obstruction of the touch electrode 30 by the first electrode layer 70, thereby further improving the signal accuracy of the touch electrode 30.

[0057] In some embodiments, any partition structure 50 encloses an isolation opening, the orthographic projection of the pixel opening 41 on the substrate 10 is located within the orthographic projection range of the isolation opening on the substrate 10, a portion of the light-emitting layer 60 is located within the isolation opening, the light-emitting layer 60 includes sub-light-emitting layers of different colors, and the sub-light-emitting layers of different colors are disconnected at least in the isolation region 53.

[0058] It should be noted that the aforementioned sub-emissive layers of different colors refer to emissive layers 60 used to make the corresponding pixel positions of the display panel display different colors. The sub-emissive layers of different colors are placed at the positions of multiple pixel openings 41. The light produced by the sub-emissive layers of different colors can be the same or different. For example, each sub-emissive layer emits blue light, and the light emitted by some sub-emissive layers becomes red or green after being converted by quantum dots, while the light emitted by other sub-emissive layers becomes blue after passing through the light-transmitting layer, thereby making different pixel positions of the display panel display different colors. Alternatively, multiple sub-emissive layers emit blue light, red light, and green light respectively, thereby making different pixel positions of the display panel display different colors.

[0059] In this embodiment, by disconnecting the sub-light-emitting layers of different colors in the isolation region 53, it is possible to ensure that the first electrode layer 70 is completely disconnected in the isolation region 53, thereby ensuring the detection accuracy of the touch electrode 30. On the other hand, disconnecting the light-emitting layer 60 at the isolation region 53 position can avoid electrical crosstalk caused by the lateral charge transfer of the light-emitting layer 60, and improve color uniformity.

[0060] Optionally, the light-emitting layer 60 covers at least a portion of the surface of the partition structure 50 on the side opposite to the substrate 10, and the first electrode layer 70 covers at least a portion of the surface of the partition structure 50 on the side opposite to the substrate 10. This arrangement can reduce manufacturing complexity and improve product quality.

[0061] In some embodiments, the display panel further includes a second electrode layer 20, which is located on the side of the substrate 10 near the light-emitting layer 60. The second electrode layer 20 is the starting point for hole injection in the display panel, and when the display panel is in operation, the second electrode layer 20 can effectively inject holes into the light-emitting layer 60 (organic layer).

[0062] The second electrode layer 20 can be made of indium tin oxide (ITO) conductive glass or transparent conductive polymer, etc., without specific limitations.

[0063] Optionally, the orthographic projection of the second electrode layer 20 onto the substrate 10 covers the orthographic projection of the pixel opening 41 onto the substrate 10. That is, the area of ​​the orthographic projection of the second electrode layer 20 onto the substrate 10 is greater than or equal to the area of ​​the orthographic projection of the pixel opening 41 onto the substrate 10, and the edge of the orthographic projection of the pixel opening 41 onto the substrate 10 is located within the range of the orthographic projection of the second electrode layer 20 onto the substrate 10. Therefore, it can be ensured that the light-emitting range at each pixel opening 41 location can reach its maximum.

[0064] Optionally, the second electrode layer 20 includes a plurality of sub-electrodes, with the touch electrode 30 located between adjacent sub-electrodes. Further, the orthogonal projection of the sub-electrodes onto the substrate 10 covers the orthogonal projection of the pixel opening 41 onto the substrate 10.

[0065] Specifically, since the second electrode layer 20 does not need to emit light in conjunction with the light-emitting layer 60 and the first electrode layer 70 in the area outside the pixel opening 41, the area of ​​each sub-electrode only needs to be slightly larger than the corresponding pixel opening 41. The area between adjacent sub-electrodes corresponds to the area between adjacent pixel openings 41 that does not require light emission. Arranging the touch electrode 30 between adjacent sub-electrodes allows for efficient use of space. The arrangement of the touch electrode 30 and the second electrode layer 20 on the same layer effectively reduces the overall thickness of the display panel. Furthermore, the placement of the touch electrode 30 corresponds precisely to the position of the isolation area 53.

[0066] Optionally, the display panel further includes an encapsulation layer 91, which is located on the side of the first electrode layer 70 and the separation structure 50 facing away from the substrate 10. The encapsulation layer 91 may be made of a material with a high refractive index and a low absorption coefficient, thereby increasing the light refractive index generated by the display panel, achieving optimal optical characteristics of the display panel through light absorption suppression, and reducing light loss during transmission, thereby improving light efficiency and energy efficiency.

[0067] Combination Figure 2 Optionally, the display panel further includes a first encapsulation layer 91a, which includes a first encapsulation portion 911 located on the side of the light-emitting layer 60 away from the substrate 10 and a second encapsulation portion 912 located on the side of the separation structure 50 away from the substrate 10. Further, the orthographic projection of the second encapsulation portion 912 on the substrate 10 is located within the orthographic projection range of the separation structure 50 on the substrate 10.

[0068] Optionally, the second packaging portion 912 has a hollow space between the side of the substrate 10 facing the substrate 10 and the side of the partition structure 50 facing away from the substrate 10.

[0069] Optionally, the first encapsulation layer 91a further includes a third encapsulation portion 913 located in the isolation region 53, at least a portion of the third encapsulation portion 913 covering the sidewall of the partition structure 50 near the isolation region 53;

[0070] The third packaging section 913 can also be connected to the second packaging section 912.

[0071] In this embodiment, by providing a first encapsulation part 911, a second encapsulation part 912, and a third encapsulation part 913, the light-emitting layer 60 and the first electrode layer 70 can be shielded during the etching process, avoiding excessive etching during the etching process from affecting the light-emitting effect at the pixel opening 41. The cutout gap between the second encapsulation part 912 and the partition structure 50 is formed when etching the light-emitting layer 60 and the first electrode layer 70, ensuring that the light-emitting layer 60 and the first electrode layer 70 are completely disconnected on the side of the partition structure 50 away from the substrate 10.

[0072] Optionally, the display panel further includes a second encapsulation layer 91b, which is located on the side of the first encapsulation layer 91a facing away from the substrate 10. The second encapsulation layer 91b fills the cutout gaps and the isolation area 53. The cooperation between the second encapsulation layer 91b and the first encapsulation layer 91a helps to improve the integrity of the encapsulation and achieve a better protective effect.

[0073] The following is combined Figures 4 to 10 The method for manufacturing the display panel of this embodiment will be described below. The method for manufacturing the display panel described below can be referred to in conjunction with the display panel described above.

[0074] The method for manufacturing the display panel provided in this embodiment includes:

[0075] S100, providing substrate 10;

[0076] S200, A touch electrode 30 is prepared on one side of the substrate 10;

[0077] S300. A pixel definition layer 40 is prepared on one side of the substrate 10. The pixel definition layer 40 covers the side of the touch electrode 30 away from the substrate 10 and defines a plurality of pixel openings 41.

[0078] Optionally, the pixel opening 41 includes a first pixel opening, a second pixel opening, and a third pixel opening, wherein the first pixel opening, the second pixel opening, and the third pixel opening are used to fill sub-light-emitting layers of different colors. For example, the first pixel opening is used to fill a red sub-light-emitting layer, the second pixel opening is used to fill a green sub-light-emitting layer, and the third pixel opening is used to fill a blue sub-light-emitting layer.

[0079] Optionally, the fabrication method provided in this embodiment further includes the step of fabricating a second electrode layer 20: fabricating a second electrode layer 20, wherein the second electrode layer 20 is located on one side of the substrate 10 and on the side of the light-emitting layer 60 close to the substrate 10. The step of fabricating the second electrode layer 20 can be performed before the step of fabricating the pixel definition layer 40.

[0080] S400. A plurality of partition structures 50 are prepared on the side of the pixel definition layer 40 away from the substrate 10, wherein at least two partition structures 50 are prepared between each pair of adjacent pixel openings 41, and an isolation region 53 is formed between at least two adjacent partition structures 50 located between two adjacent pixel openings 41, and the orthographic projection of the isolation region 53 on the substrate 10 overlaps with the orthographic projection of the touch electrode 30 on the substrate 10.

[0081] Optionally, the separation structure 50 includes a first film layer 51 and a second film layer 52 sequentially stacked along the direction away from the pixel definition layer 40. The step of preparing multiple separation structures 50 on the side of the pixel definition layer 40 away from the substrate 10 includes preparing the first film layer 51 on the side of the pixel definition layer 40 away from the substrate 10, and preparing the second film layer 52 on the side of the first film layer 51 away from the pixel definition layer 40. The first film layer 51 and the second film layer 52 are imaged using wet etching or dry etching so that the orthographic projection of the first film layer 51 on the substrate 10 falls within the orthographic projection range of the second film layer 52 on the substrate 10.

[0082] S500: Prepare a light-emitting layer 60, which fills at least a portion of the space of the pixel opening 41.

[0083] The light-emitting layer 60 includes a first sub-light-emitting layer 61, a second sub-light-emitting layer 62, and a third sub-light-emitting layer 63, which are respectively placed at different pixel openings 41.

[0084] S600, a first electrode layer 70 is prepared on the side of the light-emitting layer 60 away from the substrate 10, and the first electrode layer 70 is disconnected at least in the isolation region 53.

[0085] Combination Figure 5 and Figure 11 In some embodiments of this disclosure, the first electrode layer 70 includes a first sub-light-emitting layer 61, a second sub-light-emitting layer 62, and a third sub-light-emitting layer 63. Fabricating the light-emitting layer 60 and fabricating the first electrode layer 70 on the side of the light-emitting layer 60 facing away from the substrate 10 includes:

[0086] S501. Prepare a first sub-light-emitting layer 61. The first sub-light-emitting layer 61 fills the pixel opening 41 and covers the side of the pixel definition layer 40 away from the substrate 10 and the side of the separation structure 50 away from the substrate 10.

[0087] S502. Prepare a first sub-cathode layer 71, which covers the surface of the first sub-light-emitting layer 61 away from the substrate 10.

[0088] In some embodiments, after the step of preparing the first sub-cathode layer 71, a step of preparing other films (e.g., protective films) on the side of the first sub-cathode layer 71 opposite to the first sub-light-emitting layer 61 may be included, and the other films on the side of the first sub-cathode layer 71 opposite to the first sub-light-emitting layer 61 are etched together with the first sub-cathode layer 71.

[0089] S503 Prepare the first sub-encapsulation layer 915, the first sub-encapsulation layer 915 is located on the side of the first sub-cathode layer 71 away from the substrate;

[0090] S504. Prepare a first photoresist layer 81, which is located on the side of the first sub-encapsulation layer 915 away from the substrate 10.

[0091] The first photoresist layer 81 covers the first sub-encapsulation layer 915 located at the first pixel opening and extends to cover at least a portion of the first sub-encapsulation layer 915 located on the partition structure 50 around the first pixel opening.

[0092] S504. Perform a first patterning process to remove the first sub-light-emitting layer 61, the first sub-cathode layer 71, and the first sub-encapsulation layer 915 located at the second pixel opening, the third pixel opening, and the isolation area 53.

[0093] Optionally, an etching and stripping process is used to remove the first sub-light-emitting layer 61, the first sub-cathode layer 71, and the first sub-encapsulation layer 915 located at the second pixel opening, the third pixel opening, and the isolation area 53.

[0094] When the first photoresist layer 81 covers a portion of the first sub-encapsulation layer 915 on the partition structure 50 located around the first pixel opening, the process of performing the first patterning process further includes: removing the first sub-light-emitting layer 61, the first sub-cathode layer 71, and the first sub-encapsulation layer 915 other than the portion covered by the first photoresist layer 81 on the partition structure 50 around the first pixel opening, as well as all the first sub-light-emitting layer 61, the first sub-cathode layer 71, and the first sub-encapsulation layer 915 on the partition structure 50 other than the partition structure 50 around the first pixel opening.

[0095] Combination Figure 6 and Figure 11 Optionally, the fabrication of the light-emitting layer 60 and the fabrication of the first electrode layer 70 on the side of the light-emitting layer 60 facing away from the substrate 10 further include:

[0096] S505. Prepare a second sub-light-emitting layer 62. The second sub-light-emitting layer 62 fills the second pixel opening and the third pixel opening, and the second sub-light-emitting layer 62 covers the first sub-cathode layer 71, the side of the pixel definition layer 40 away from the substrate 10 and the side of the separation structure 50 away from the substrate 10.

[0097] In the step of preparing the second sub-light-emitting layer 62, the second sub-light-emitting layer 62 covering the side of the pixel definition layer 40 away from the substrate 10 and the side of the separator structure 50 away from the substrate 10 means that the second sub-light-emitting layer 62 covers the portion of the pixel definition layer 40 away from the substrate 10 excluding the portion covered by the first sub-cathode layer 71, and covers the portion of the separator structure 50 away from the substrate 10 excluding the portion covered by the first sub-encapsulation layer 915. S506, Prepare the second sub-cathode layer 72, the second sub-cathode layer 72 covering the surface of the second sub-light-emitting layer 62 away from the substrate 10.

[0098] S506. Prepare a second sub-encapsulation layer 916, wherein the second sub-encapsulation layer 916 is located on the side of the second sub-cathode layer 72 away from the substrate 10;

[0099] In some embodiments, after the step of preparing the second sub-cathode layer 72, a step of preparing other films (e.g., protective films) on the side of the second sub-cathode layer 72 opposite to the second sub-light-emitting layer 62 may be included, and the other films on the side of the second sub-cathode layer 72 opposite to the second sub-light-emitting layer 62 are etched together with the second sub-cathode layer 72.

[0100] S507. Prepare a second photoresist layer 82, which is located on the side of the second sub-encapsulation layer 916 away from the substrate 10.

[0101] The second photoresist layer 82 covers the second encapsulation layer 92 located at the second pixel opening and extends to cover at least a portion of the second encapsulation layer 92 located on the partition structure 50 around the second pixel opening.

[0102] S508, Perform a second patterning process to remove the second sub-light-emitting layer 62, the second sub-cathode layer 72, and the second sub-encapsulation layer 916 located on the surface of the first sub-encapsulation layer 915, at the third pixel opening, and in the isolation area 53.

[0103] Optionally, an etching and stripping process is used to remove the second sub-light-emitting layer 62, the second sub-cathode layer 72, and the second sub-encapsulation layer 916 located on the surface of the first sub-encapsulation layer 915, at the third pixel opening, and in the isolation region 53.

[0104] When the second photoresist layer 82 covers a portion of the second sub-cathode layer 72 on the partition structure 50 located around the second pixel opening, the second patterning process further includes removing the second sub-light-emitting layer 62, the second sub-encapsulation layer 916, and the second sub-cathode layer 72, except for the portion covered by the second photoresist layer 82 on the partition structure 50 around the second pixel opening, as well as all the second sub-light-emitting layer 62, the second sub-encapsulation layer 916, and the second sub-cathode layer 72 on the partition structure 50 other than the partition structure 50 around the second pixel opening.

[0105] Since the second sub-light-emitting layer 62 and the second sub-cathode layer 72 in the isolation region 53 are removed, the first sub-cathode layer 71 and the second sub-cathode layer 72 are disconnected at the location of the isolation region 53, and the first sub-light-emitting layer 61 and the second sub-light-emitting layer 62 are disconnected at the location of the isolation region 53.

[0106] Combination Figure 7 and Figure 11 Optionally, the fabrication of the light-emitting layer 60 and the fabrication of the first electrode layer 70 on the side of the light-emitting layer 60 facing away from the substrate 10 further include:

[0107] S509. Prepare a third sub-light-emitting layer 63. The third sub-light-emitting layer 63 fills the third pixel opening and covers the first sub-cathode layer 71, the second sub-cathode layer 72, the side of the pixel definition layer 40 away from the substrate 10, and the side of the separation structure 50 away from the substrate 10.

[0108] In the step of preparing the third sub-light-emitting layer 63, the third sub-light-emitting layer 63 covering the side of the pixel definition layer 40 away from the substrate 10 and the side of the partition structure 50 away from the substrate 10 means that the third sub-light-emitting layer 63 covers the portion of the pixel definition layer 40 away from the substrate 10 excluding the portion covered by the first sub-cathode layer 71 and the second sub-cathode layer 72, and the portion of the partition structure 50 away from the substrate 10 excluding the portion covered by the first sub-cathode layer 71 and the second sub-cathode layer 72.

[0109] S510, Prepare the third sub-cathode layer 73, the third sub-cathode layer 73 covers the surface of the third sub-light-emitting layer 63 away from the substrate 10.

[0110] S511. Prepare the third sub-encapsulation layer 917, which is located on the side of the third sub-cathode layer 73 away from the substrate 10.

[0111] In some embodiments, after the step of preparing the third sub-cathode layer 73, a step of preparing other films (e.g., protective films) on the side of the third sub-cathode layer 73 opposite to the third sub-light-emitting layer 63 may be included, and the other films on the side of the third sub-cathode layer 73 opposite to the third sub-light-emitting layer 63 are etched together with the third sub-cathode layer 73.

[0112] S511. Prepare the third photoresist layer 83, which is located on the side of the third sub-encapsulation layer 917 away from the substrate 10.

[0113] The third photoresist layer 83 covers the third sub-encapsulation layer 917 located at the third pixel opening and extends to cover at least a portion of the third sub-encapsulation layer 917 located on the partition structure 50 located around the third pixel opening.

[0114] S512, Perform a third patterning process to remove the third sub-light-emitting layer 63, the third sub-cathode layer 73 and the third encapsulation layer 93 located on the surface of the first sub-encapsulation layer 915, the surface of the second sub-encapsulation layer 916 and the isolation region 53.

[0115] The third sub-light-emitting layer 63, the third sub-cathode layer 73, and the third encapsulation layer 93 located on the surface of the first sub-encapsulation layer 915, the surface of the second sub-encapsulation layer 916, and the isolation region 53 are removed by an etching and stripping process.

[0116] When the third photoresist layer 83 covers the portion of the third sub-encapsulation layer 917 on the partition structure 50 located around the third pixel opening, the process of performing the first patterning process further includes removing the third sub-light-emitting layer 63, the third sub-cathode layer 73, and the third encapsulation layer 93 from the portion of the partition structure 50 located around the third pixel opening covered by the third photoresist layer 83, as well as all the third sub-light-emitting layer 63, the third sub-cathode layer 73, and the third encapsulation layer 93 on the partition structure 50 located outside the partition structure 50 around the third pixel opening.

[0117] Since the third sub-light-emitting layer 63 and the third sub-cathode layer 73 of the isolation zone 53 are removed, the first sub-cathode layer 71, the second sub-cathode layer 72 and the third sub-cathode layer 73 can all be disconnected at the location of the isolation zone 53, and the first sub-light-emitting layer 61, the second sub-light-emitting layer 62 and the third sub-light-emitting layer 63 can all be disconnected at the location of the isolation zone 53.

[0118] Combination Figure 8 Optionally, if the display panel further includes a second encapsulation layer 92, the fabrication method further includes:

[0119] S700, Prepare a second encapsulation layer 94, which is located on the side of the first sub-encapsulation layer 915, the second sub-encapsulation layer 916, the third sub-encapsulation layer 917 and the separation structure 50 away from the substrate 10.

[0120] Combination Figure 9 Optionally, after the steps of fabricating the second encapsulation layer 92 and the third encapsulation layer 95 of the display panel are included, the fabrication method further includes:

[0121] S800, a third encapsulation layer 93 is formed on the side of the second encapsulation layer 94 away from the substrate 10.

[0122] The present invention also provides a display device, including the display panel described above or a display panel prepared using the method described above.

[0123] In this embodiment, the display device has an image display function and can be widely used in different scenarios. Optionally, the display device can present static images, such as pictures or photos, to provide users with visual information display. At the same time, it can also play dynamic images, such as video content, to bring users a more vivid and richer visual experience.

[0124] In practical applications, display devices can take many forms, including but not limited to laptops, mobile phones, handheld or portable computers, cameras, camcorders, and other portable devices. Furthermore, display devices can serve as core display components for in-vehicle smart control screens, calculators, smartwatches, GPS navigators, and other devices. In the advertising and commercial sectors, they can also be used as electronic billboards or signs. When combined with a projector, they can display content on the screen.

[0125] It's worth noting that, in addition to basic image display functions, the display device can also possess a variety of other practical features. For example, it can integrate photo and video recording capabilities. Furthermore, to enhance security and convenience, it can be equipped with biometric technologies such as fingerprint and facial recognition, providing users with a safer and more convenient experience. To achieve these functions, the display device can integrate corresponding functional modules, such as under-display cameras and under-display fingerprint sensors.

[0126] The terms "an embodiment" or "embodiment" used in this specification indicate that the described embodiment may include a specific feature, structure, or characteristic, but not every embodiment necessarily includes that specific feature, structure, or characteristic. Furthermore, such phrases do not necessarily refer to the same embodiment. Additionally, when a specific feature, structure, or characteristic is described in connection with an embodiment, implementing such a feature, structure, or characteristic in conjunction with other embodiments, whether explicitly described or not, is within the knowledge scope of those skilled in the art.

[0127] It should be understood that “on,” “above,” and “on top of” in this disclosure should be interpreted in the broadest manner, such that “on” means not only “directly on something” but also “on something” with an intermediate feature or layer therebetween, and that “above” or “on top of” means not only “on top of something” but also “on top of something” without an intermediate feature or layer therebetween (i.e., directly on something).

[0128] Furthermore, for ease of explanation, spatial relative terms such as "below," "below," "under," "above," and "above" may be used to describe the relationship of a component or feature relative to other components or features as shown in the figures. Spatial relative terms are intended to encompass different orientations of components in use or operation other than those shown in the figures. Devices may have other orientations (rotated 90 degrees or in other orientations), and the spatial relative descriptive terms used herein may be interpreted accordingly.

[0129] It should be noted that, in this document, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Unless otherwise specified, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0130] The above description is merely a preferred embodiment of this disclosure and is not intended to limit this disclosure. Any modifications or equivalent substitutions made within the spirit and principles of this disclosure should be included within the scope of protection of this disclosure.

Claims

1. A display panel, characterized in that, include: substrate; The touch electrode is located on one side of the substrate; A pixel definition layer covers the side of the touch electrode opposite to the substrate, and the pixel definition layer defines a plurality of pixel openings; Multiple partition structures are located on the side of the pixel definition layer opposite to the substrate. At least two partition structures are provided between each pair of adjacent pixel openings. An isolation area is formed between adjacent pixel openings between adjacent partition structures. The orthographic projection of the isolation area on the substrate overlaps with the orthographic projection of the touch electrode on the substrate. A light-emitting layer that fills at least a portion of the space of the pixel opening; A first electrode layer is located on the side of the light-emitting layer opposite to the substrate, and the first electrode layer is disconnected at least in the isolation region.

2. The display panel according to claim 1, characterized in that, The separation structure includes a first film layer and a second film layer stacked sequentially along a direction away from the pixel definition layer, wherein the orthogonal projection of the first film layer on the substrate falls within the orthogonal projection range of the second film layer on the substrate. Preferably, the first film layer comprises an organic film layer, an inorganic film layer, or a metal film layer; Preferably, the first film layer comprises a black organic film layer; Preferably, the second film layer includes an organic film layer, an inorganic film layer, or a metal film layer; Preferably, the second membrane layer comprises an inorganic membrane layer; Preferably, the separation structure further includes a third film layer disposed on the side of the first film layer near the pixel definition layer, wherein the orthographic projection of the first film layer on the substrate is located within the orthographic projection range of the third film layer on the substrate, and the orthographic projection of the third film layer on the substrate is located within the orthographic projection range of the second film layer on the substrate; Preferably, the third film layer comprises a metal conductive film layer.

3. The display panel according to claim 1 or 2, characterized in that, The orthographic projection of the isolation area on the substrate overlaps the orthographic projection of the touch electrode on the substrate.

4. The display panel according to claim 1 or 2, characterized in that, The partition structure encloses and forms an isolation opening. The orthographic projection of the pixel opening on the substrate is located within the orthographic projection range of the isolation opening on the substrate. Part of the light-emitting layer is located within the isolation opening. The light-emitting layer includes sub-light-emitting layers of different colors. The sub-light-emitting layers of different colors are disconnected at least in the isolation area. Preferably, the light-emitting layer covers at least a portion of the surface of the separating structure on the side opposite to the substrate; Preferably, the first electrode layer is electrically connected to the partition structure; Preferably, the first electrode layer extends to one sidewall of the partition structure near the light-emitting layer and is electrically connected to the partition structure.

5. The display panel according to claim 1 or 2, characterized in that, Also includes: The second electrode layer is located on the side of the light-emitting layer closer to the substrate, and the touch electrode is disposed on the second electrode layer; Preferably, the second electrode layer includes a plurality of spaced sub-electrodes, and the touch electrode is located between adjacent sub-electrodes; Preferably, the orthographic projection of the sub-electrode on the substrate covers the orthographic projection of the pixel opening on the substrate; Preferably, it further includes a first encapsulation layer, the first encapsulation layer including a first encapsulation portion located on the side of the light-emitting layer opposite to the substrate and a second encapsulation portion located on the side of the separation structure opposite to the substrate; Preferably, the orthographic projection of the second encapsulation portion onto the substrate is located within the orthographic projection range of the separation structure onto the substrate; Preferably, there is a cutout gap between the side of the second packaging portion facing the substrate and the side of the separation structure facing away from the substrate; Preferably, the first encapsulation layer further includes a third encapsulation portion located in the isolation region, at least a portion of the third encapsulation portion covering the sidewall of the separation structure near the isolation region; Preferably, it further includes a second encapsulation layer, which is located on the side of the first encapsulation layer away from the substrate, and the second encapsulation layer fills the cutout gap and the isolation area.

6. A display panel, characterized in that, include: substrate; The second electrode layer, located on one side of the substrate, includes sub-electrodes and touch electrodes that are spaced apart and insulated from each other. A pixel definition layer is located on the side of the second electrode layer away from the substrate. The pixel definition layer encloses and forms a pixel opening, and adjacent pixel openings are spaced apart. A light-emitting unit is located on the side of the sub-electrode facing away from the substrate, and at least a portion of the light-emitting unit is located within the pixel opening; The first electrode layer is located on the side of the light-emitting layer opposite to the substrate, and the orthographic projection of the first electrode layer on the substrate does not overlap with the orthographic projection of the touch electrode on the substrate.

7. The display panel according to claim 6, characterized in that, Also includes: A separation structure is located on the side of the pixel definition layer facing away from the substrate and between adjacent pixel openings. The separation structure forms an isolation area between the pixel openings. In the direction from the substrate to the light-emitting unit, the touch electrode is disposed corresponding to the isolation area, and the first electrode layer is disconnected in the isolation area.

8. The display panel according to claim 7, characterized in that, The number of the separation structures is multiple, and each of the multiple separation structures corresponds one-to-one with a multiple of the pixel openings. The separation structures are arranged around the outside of the pixel openings.

9. The display panel according to claim 8, characterized in that, The partition structure is electrically connected to the first electrode layer, or the partition structure is provided with a through hole, and a conductive part is provided inside the through hole, and the conductive part is electrically connected to the first electrode layer.

10. The display panel according to claim 7, characterized in that, The separation structure includes a plurality of separation portions, each of which surrounds the outside of the pixel opening and is arranged at intervals. Adjacent separation structures surrounding the outside of the same pixel opening are connected by a connecting portion, and the connecting portion is electrically connected to the first electrode layer.

11. The display panel according to any one of claims 7 to 10, characterized in that, The separation structure includes at least two film layers stacked sequentially along a direction away from the pixel definition layer, wherein the orthogonal projection of one film layer on the substrate falls within the orthogonal projection range of the other film layer on the substrate on the side away from the substrate.

12. A method for manufacturing a display panel, characterized in that, include: Provide substrate; A touch electrode is fabricated on one side of the substrate; A pixel definition layer is prepared on one side of the substrate, the pixel definition layer covers the side of the touch electrode opposite to the substrate, and the pixel definition layer defines a plurality of pixel openings; Multiple separation structures are prepared on the side of the pixel definition layer away from the substrate, wherein at least two separation structures are prepared between each pair of adjacent pixel openings, and an isolation region is formed between at least two adjacent separation structures located between two adjacent pixel openings, wherein the orthographic projection of the isolation region on the substrate overlaps with the orthographic projection of the touch electrode on the substrate; A light-emitting layer is prepared, the light-emitting layer filling at least a portion of the space of the pixel opening; A first electrode layer is formed on the side of the light-emitting layer opposite to the substrate, and the first electrode layer is disconnected at least in the isolation region.

13. The preparation method according to claim 12, characterized in that, The pixel opening includes a first pixel opening, a second pixel opening, and a third pixel opening. The fabrication of the light-emitting layer and the fabrication of the first electrode layer on the side of the light-emitting layer opposite to the substrate include: A first sub-light-emitting layer is prepared, which fills the pixel opening and covers the side of the pixel definition layer opposite to the substrate and the side of the separation structure opposite to the substrate. A first sub-cathode layer is prepared, which covers the surface of the first sub-light-emitting layer away from the substrate; A first sub-encapsulation layer is prepared, wherein the first sub-encapsulation layer is located on the side of the first sub-cathode layer away from the substrate; Perform a first patterning process to remove the first sub-light-emitting layer, the first sub-cathode layer, and the first sub-encapsulation layer located at the second pixel opening, the third pixel opening, and the isolation area; Preferably, the fabrication of the light-emitting layer and the fabrication of the first electrode layer on the side of the light-emitting layer opposite to the substrate further include: A second sub-light-emitting layer is prepared, which fills the second pixel opening and the third pixel opening, and covers the first sub-cathode layer, the side of the pixel definition layer opposite to the substrate, and the side of the separation structure opposite to the substrate. A second sub-cathode layer is prepared, which covers the surface of the second sub-light-emitting layer away from the substrate; A second sub-encapsulation layer is prepared, the second sub-encapsulation layer being located on the side of the second sub-cathode layer away from the substrate; A second patterning process is performed to remove the second sub-light-emitting layer, the second sub-cathode layer, and the second sub-encapsulation layer located on the surface of the first sub-encapsulation layer, at the opening of the third pixel, and in the isolation area; Preferably, the preparation of the light-emitting layer and the preparation of the first electrode layer on the side of the light-emitting layer opposite to the substrate further include: A third sub-light-emitting layer is prepared, which fills the third pixel opening and covers the first sub-cathode layer, the second sub-cathode layer, the side of the pixel definition layer opposite to the substrate, and the side of the separation structure opposite to the substrate. A third sub-cathode layer is prepared, the third sub-cathode layer covering the surface of the third sub-light-emitting layer away from the substrate; A third sub-encapsulation layer is prepared, wherein the third sub-encapsulation layer is located on the side of the third sub-cathode layer away from the substrate; A third patterning process is performed to remove the third sub-light-emitting layer, the third sub-cathode layer, and the third sub-encapsulation layer located on the surface of the first sub-encapsulation layer, the surface of the second sub-encapsulation layer, and the isolation area.

14. The preparation method according to claim 12 or 13, characterized in that, Before forming a pixel definition layer on one side of the substrate, the method further includes: A second electrode layer is prepared, which is located on one side of the substrate and on the side of the light-emitting layer closest to the substrate.

15. The preparation method according to claim 13, characterized in that, Also includes: A second encapsulation layer is prepared, which is located on the side of the first sub-encapsulation layer, the second sub-encapsulation layer, the third sub-encapsulation layer, and the separation structure away from the substrate.

16. A display device, characterized in that, The display panel includes any one of claims 1 to 5, or any one of claims 6 to 11, or a display panel prepared using any one of claims 12 to 15.