Capacitive flatness measuring device for ultra-low resistance silicon wafer and control method of capacitive flatness measuring device

Abstract

The invention relates to a capacitive flatness measuring device for an ultra-low resistance silicon wafer and a control method thereof, and belongs to the technical field of semiconductor silicon wafer detection.The capacitive flatness measuring device comprises an objective table, a transplanting table is arranged on the objective table, a rack fixedly connected with the objective table is arranged on the periphery of the transplanting table, the ultra-low resistance silicon wafer is arranged on the transplanting table, and the ultra-low resistance silicon wafer is arranged on the rack. A plurality of capacitive sensors which are arranged in a two-dimensional matrix mode and are parallel to the objective table are arranged above the objective table and on the upper portion of the machine frame, and lifting air cylinders are arranged on the capacitive sensors. And by utilizing the capacitance measurement principle, the influence of the high reflectivity of the ultra-low resistance silicon wafer is completely avoided, and the problem that an optical method fails on such materials is solved. The nonlinear error of the system is eliminated through vertical scanning fitting, and the measurement precision of the flatness of the ultra-low resistance silicon wafer is improved.

Description

Technical Field

[0001] This invention relates to the field of semiconductor silicon wafer inspection technology, and specifically to a capacitive flatness measuring device and its control method for ultra-low resistance silicon wafers. Background Technology

[0002] In semiconductor manufacturing processes, the flatness of silicon wafers is one of the key parameters affecting the accuracy of integrated circuit pattern transfer and device performance. For ultra-low resistance silicon wafers (such as heavily doped silicon wafers used in power devices or radio frequency devices), their high conductivity poses a challenge to traditional non-contact measurement methods.

[0003] Currently, optical interferometry is the mainstream technique for measuring silicon wafer flatness. However, optical methods have significant problems when dealing with ultra-low resistivity silicon wafers: due to the extremely high reflectivity of the silicon wafer surface (close to that of metal), most of the incident light is reflected, resulting in a poor signal-to-noise ratio, blurred interference fringes, difficulty in extracting effective phase information, and a severe decrease in measurement accuracy and repeatability.

[0004] Capacitive sensors offer advantages such as non-contact operation, high resolution, and insensitivity to surface optical properties. However, traditional single-point or array-type capacitive sensors suffer from low scanning efficiency, complex calibration among multiple sensors, and significant edge effects when measuring large-area silicon wafers, making it difficult to meet the demands of high-speed, high-precision measurements in industrial production. Summary of the Invention

[0005] This invention addresses the shortcomings of existing technologies by providing a capacitive flatness measurement device and its control method for ultra-low resistance silicon wafers. Utilizing the principle of capacitance measurement, it is completely unaffected by the high reflectivity of ultra-low resistance silicon wafers, thus solving the problem of optical methods failing on such materials. Vertical scanning fitting eliminates system nonlinear errors, improving the measurement accuracy of ultra-low resistance silicon wafer flatness.

[0006] The above-mentioned technical problems of the present invention are mainly solved by the following technical solutions: A capacitive flatness measuring device for ultra-low resistance silicon wafers includes a stage, a transfer platform on the stage, a frame connected and fixed to the stage around the transfer platform, an ultra-low resistance silicon wafer on the transfer platform, and a plurality of capacitive sensors arranged in a two-dimensional matrix and parallel to the stage above the stage and on the upper part of the frame. Each capacitive sensor is equipped with a lifting cylinder.

[0007] Preferably, the rack side is provided with a multiplexed switch module that is electrically connected to each capacitance sensing unit in the capacitance sensor array.

[0008] Preferably, a tray is provided between the ultra-low resistance silicon wafer and the transfer stage. The tray is made of an insulating material, such as ceramic or Teflon. This prevents leakage of the measurement electric field and ensures that the sensor only senses the height of the silicon wafer surface.

[0009] The control method for the capacitive flatness measuring device includes the following operating steps: Step 1: Place the ultra-low resistance silicon wafer to be tested on the transfer stage, and the transfer stage moves the capacitive sensor array to an initial measurement position Z0.

[0010] Step 2: For each selected capacitive sensor, the capacitance measurement circuit measures and records the capacitance value Cᵢj between it and the ultra-low resistance silicon wafer. The capacitance value Cᵢj is the value at the initial measurement position Z0, where i and j are the coordinates of the capacitive sensor in the array.

[0011] Step 3: Vertical scanning and data recording. The lifting cylinder drives the capacitive sensor to step vertically by a distance ΔZ. Repeat step 2 to collect the complete set of capacitance values ​​Cᵢj at the new height Zk = Z0 + k·ΔZ, where k is the number of changes and determines the frequency at which ΔZ is applied. At this time, it is at the new height Zk. This process is repeated within the preset vertical scanning range.

[0012] Step 4: For the coordinates of each capacitive sensor in the array, set them at different heights Z. k By fitting a series of measured capacitance values, the capacitance-distance characteristic curve of the unit is obtained.

[0013] Step 5: Perform information processing and flatness calculation to obtain the total thickness variation, curvature, warpage, and flatness of the silicon wafer.

[0014] Preferably, the control and data processing unit in the stage initializes the system, and the control and data processing unit uses a multiplexer module to quickly select each capacitance sensing unit in the capacitance sensor array in sequence.

[0015] As a preferred method, according to the parallel plate capacitance model C = ε0εᵣ A / d, where C is the capacitance value, A is the effective area of ​​the sensing unit, d is the plate spacing, also called the measurement distance, and ε0 and εᵣ are the dielectric constants of vacuum and dielectric, respectively; for each capacitance sensor, using the Cd curve obtained by its fitting, the capacitance value Cᵢj measured at the initial height in the second step is reverse-engineered into the corresponding precise distance dᵢj, and the distance dᵢj reflects the height information of the silicon wafer surface at that point.

[0016] Preferably, the height data dᵢj calculated from all capacitive sensors are combined into a two-dimensional height map. Based on this height map, the total thickness variation, curvature, warpage, and flatness of the silicon wafer are obtained using a standard algorithm that calculates the maximum and minimum height differences and fits to a reference plane. The fitting method is a polynomial fitting, C=a / d²+b / d+c.

[0017] The present invention can achieve the following effects: This invention provides a capacitive flatness measurement device and its control method for ultra-low resistance silicon wafers. Compared with existing technologies, this invention uses a multiplexer to select each sensor to record the initial capacitance value. A cylinder is controlled to move the wafer stepwise, collecting multiple sets of capacitance data at different heights. The data from each sensor is fitted to obtain a capacitance-distance characteristic curve. The fitted curve is used to inversely calculate the initial capacitance value into a precise distance, constructing a two-dimensional height map, and then calculating the total thickness variation, curvature, and warpage of the silicon wafer. Vertical scanning fitting eliminates system nonlinear errors, improving the measurement accuracy of ultra-low resistance silicon wafer flatness.

[0018] A capacitive sensor array arranged in a two-dimensional matrix is ​​used, with vertical step scanning achieved via a lifting cylinder. A multiplexer module is used to quickly select each sensor, and a transfer stage at the bottom allows for silicon wafer position adjustment. The use of a multiplexer solves the complexity problem of signal reading from the array sensors.

[0019] A "vertical scanning + curve fitting" strategy is adopted. Instead of directly converting distance using a single capacitance value, multiple sets of capacitance values ​​are first collected at different heights (Zk), and the Cd (capacitance-distance) characteristic curve of each sensor unit is fitted. Through multi-point matrix array and vertical scanning fitting, the measurement accuracy and resolution are significantly improved.

[0020] Based on the fitted curve, the capacitance value at the initial position is inversely calculated into a precise distance, a two-dimensional height map is constructed, and finally, TTV, curvature, and warpage are calculated. This method can effectively perform non-contact measurements on ultra-low resistance silicon wafers, avoiding scratches. Attached Figure Description

[0021] Figure 1 This is a schematic diagram of the structure of the present invention.

[0022] In the diagram: 1. Stage; 2. Frame; 3. Capacitive sensor; 4. Ultra-low resistance silicon wafer; 5. Tray; 6. Transplanting platform; 7. Multiplexer module. Detailed Implementation

[0023] The technical solution of the invention will be further described in detail below through embodiments and in conjunction with the accompanying drawings.

[0024] Example: Figure 1As shown, a capacitive flatness measuring device for ultra-low resistance silicon wafers includes a stage 1, a transfer platform 6 on the stage 1, a frame 2 connected and fixed to the stage 1 around the transfer platform 6, an ultra-low resistance silicon wafer 4 on the transfer platform 6, and a tray 5 between the ultra-low resistance silicon wafer 4 and the transfer platform 6. Eight capacitive sensors 3 arranged in a two-dimensional matrix and parallel to the stage 1 are located above the stage 1 and on the upper part of the frame 2. Each capacitive sensor 3 is equipped with a lifting cylinder. A multiplexer module 7 electrically connected to each capacitive sensing unit in the array of capacitive sensors 3 is located on the side of the frame 2.

[0025] A control method for a capacitive flatness measuring device includes the following operating steps: Step 1: Place the ultra-low resistance silicon wafer 4 to be tested on the transfer stage 6. The transfer stage 6 moves the capacitive sensor array to an initial measurement position Z0.

[0026] The control and data processing unit inside the stage 1 initializes the system. The control and data processing unit uses the multiplexer module 7 to quickly select each capacitance sensing unit in the array of capacitance sensors 3 in sequence.

[0027] Step 2: For each selected capacitive sensor 3, the capacitance measurement circuit measures and records the capacitance value Cᵢj between it and the four ultra-low resistance silicon wafers. The capacitance value Cᵢj is the value at the initial measurement position Z0, where i and j are the coordinates of the capacitive sensor 3 in the array.

[0028] Step 3: Vertical scanning and data recording. The lifting cylinder drives the capacitive sensor to move a vertical distance ΔZ in 3 steps. Repeat step 2 to collect the full set of capacitance values ​​Cᵢj at the new height Zk = Z0 + k·ΔZ, where k is the number of changes and determines the frequency at which ΔZ is applied. At this time, it is at the new height Zk. This process is repeated within the preset vertical scanning range.

[0029] Step 4: For the coordinates of each capacitive sensor 3 in the array, set it at different heights Z. k By fitting a series of measured capacitance values, the capacitance-distance characteristic curve of the unit is obtained.

[0030] Step 5: Perform information calculation and flatness calculation. According to the parallel plate capacitance model C = ε0εᵣ A / d, where C is the capacitance value, A is the effective area of ​​the sensing unit, d is the plate spacing, also called the measurement distance, and ε0 and εᵣ are the dielectric constants of vacuum and dielectric, respectively. For each capacitance sensor 3, using the Cd curve obtained by its fitting, the capacitance value Cᵢj measured at the initial height in step 2 is reverse-calculated into the corresponding precise distance dᵢj. The distance dᵢj reflects the height information of the silicon wafer surface at that point.

[0031] The height data dᵢj calculated by all capacitive sensors 3 are combined into a two-dimensional height map. Based on this height map, the total thickness variation, curvature, warp and flatness of the silicon wafer are obtained by calculating the maximum and minimum height difference and fitting the reference plane using a standard algorithm.

[0032] In summary, the capacitive flatness measurement device and its control method for ultra-low resistance silicon wafers utilize a multiplexer to select each sensor and record its initial capacitance value. A cylinder is controlled to move the device stepwise, collecting multiple sets of capacitance data at different heights. The data from each sensor is fitted to obtain a capacitance-distance characteristic curve. The fitted curve is then used to inversely calculate the precise distance from the initial capacitance value, constructing a two-dimensional height map, and subsequently calculating the total thickness variation, curvature, and warpage of the silicon wafer. Vertical scanning fitting eliminates system nonlinearity errors, improving the measurement accuracy of ultra-low resistance silicon wafer flatness.

[0033] Breaking through optical limitations: By utilizing the principle of capacitance measurement, it is completely unaffected by the high reflectivity of ultra-low resistance silicon wafers, solving the problem of optical methods failing on such materials.

[0034] High precision and high resolution: Capacitive sensors are extremely sensitive to minute changes in distance. By combining vertical scanning and curve fitting techniques, individual differences and systematic errors of the sensors can be eliminated, achieving nanometer-level height measurement resolution.

[0035] High-speed full-field measurement: Utilizing a sensor array covering the entire wafer and multiplexing technology, it eliminates the need for time-consuming lateral mechanical scanning and can complete data acquisition of the entire silicon wafer in seconds, making it far more efficient than point-by-point scanning capacitive sensors.

[0036] Non-contact and non-destructive: The entire measurement process does not involve physical contact with the silicon wafer surface, avoiding the risk of scratches or contamination.

[0037] Strong anti-interference capability: The coaxial sensor design and environmental control cavity can effectively suppress electromagnetic interference and environmental disturbances, ensuring the repeatability and reliability of measurements.

[0038] The above description is only a specific embodiment of the present invention, but the structural features of the present invention are not limited thereto. Any changes or modifications made by those skilled in the art within the scope of the present invention are covered by the patent scope of the present invention.

Claims

1. A capacitive flatness measuring device for ultra-low resistance silicon wafers, characterized in that: The device includes a platform (1), on which a transplanting platform (6) is provided. A frame (2) is provided around the transplanting platform (6) and is connected and fixed to the platform (1). An ultra-low resistance silicon wafer (4) is provided on the transplanting platform (6). Several capacitive sensors (3) arranged in a two-dimensional matrix and parallel to the platform (1) are provided on the upper part of the platform (1) and the upper part of the frame (2). A lifting cylinder is provided on the capacitive sensors (3).

2. The capacitive flatness measuring device for ultra-low resistance silicon wafers according to claim 1, characterized in that: The rack (2) is provided with a multiplexed switch module (7) on the side, which is electrically connected to each capacitive sensing unit in the array of capacitive sensors (3).

3. The capacitive flatness measuring device for ultra-low resistance silicon wafers according to claim 1, characterized in that: A tray (5) is provided between the ultra-low resistance silicon wafer (4) and the transplanting platform (6).

4. A control method for the capacitive flatness measuring device according to claim 2, characterized in that... The following steps are included: Step 1: Place the ultra-low resistance silicon wafer (4) to be tested on the transfer stage (6), and the transfer stage (6) moves the capacitive sensor array to an initial measurement position Z0; Step 2: For each selected capacitive sensor (3), the capacitance measurement circuit measures and records the capacitance value Cᵢj between it and the ultra-low resistance silicon wafer (4). The capacitance value Cᵢj is the value at the initial measurement position Z0, where i and j are the coordinates of the capacitive sensor (3) in the array. Step 3: Vertical scanning and data recording. The lifting cylinder drives the capacitive sensor (3) to advance the vertical distance ΔZ. Repeat step 2 to collect the new height Z. k = Z0+k·ΔZ, where Cᵢj is the total capacitance value under Z0+k·ΔZ, and k is the number of changes, determining the frequency at which ΔZ is applied. This is at the new altitude Z. k This process is repeated within a preset vertical scanning range; Step 4: For the coordinates of each capacitive sensor (3) in the array, set it at different heights Z. k By fitting a series of measured capacitance values, the capacitance-distance characteristic curve of the unit is obtained; Step 5: Perform information processing and flatness calculation to obtain the total thickness variation, curvature, warpage, and flatness of the silicon wafer.

5. The control method of the capacitive flatness measuring device according to claim 4, characterized in that: The control and data processing unit inside the stage (1) initializes the system. The control and data processing unit quickly selects each capacitive sensing unit in the array of capacitive sensors (3) in sequence through the multiplexing switch module (7).

6. The control method of the capacitive flatness measuring device according to claim 4, characterized in that: According to the parallel plate capacitance model C = ε0εᵣ A / d, where C is the capacitance value, A is the effective area of ​​the sensing unit, d is the plate spacing also called the measurement distance, ε0 and εᵣ are the dielectric constants of vacuum and dielectric, respectively; for each capacitance sensor (3), using the Cd curve obtained by its fitting, the capacitance value Cᵢj measured at the initial height in the second step is reverse-calculated into the corresponding accurate distance dᵢj, and the distance dᵢj reflects the height information of the silicon wafer surface at that point.

7. The control method of the capacitive flatness measuring device according to claim 6, characterized in that: Combine the height data dᵢj calculated by all capacitive sensors (3) into a two-dimensional height map; based on this height map, obtain the total thickness variation, curvature, warp flatness of the silicon wafer by calculating the maximum and minimum height difference and the standard algorithm for fitting the reference plane.

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