Self-adaptive AC / DC wide-range electric energy metering system and method for ubiquitous metering

Abstract

The invention belongs to the technical field of digital circuits, and discloses a ubiquitous metering-oriented adaptive AC / DC wide-range electric energy metering system and method, and the system comprises a PGA, an ADC, a waveform extreme point judgment module, a PGA multiple calculation module and a two-dimensional AC / DC recognition module. Quantized burrs are inhibited; the PGA gain is dynamically adjusted based on the effective bit width occupancy rate, so that the signal amplitude is adaptively matched with the optimal range of the ADC; the frequency and amplitude features are combined to construct two-dimensional recognition logic, and alternating current and direct current signals are accurately distinguished; and a cooperative feedback mechanism of gain adjustment and AC / DC identification is established, and differential power calculation is realized. The method solves the problems that a traditional scheme is rigid in gain configuration, low in extreme value extraction precision, high in alternating current and direct current misjudgment rate and poor in system collaboration, and has the advantages of being high in self-adaption, accurate in recognition, good in real-time performance and flexible in scene adaptation.

Description

Technical Field

[0001] This invention belongs to the field of digital circuit technology, and in particular relates to an adaptive AC / DC wide-range power metering system and method for ubiquitous metering. Background Technology

[0002] In power systems, such as new energy vehicle charging piles (a mix of AC and DC charging piles), photovoltaic grid-connected inverters, energy storage converters, and flexible DC transmission equipment, the amplitude, frequency, and AC / DC characteristics of their power signals can change rapidly with time and operating conditions. Traditional power metering schemes face severe challenges in terms of signal sampling adaptability, AC / DC identification accuracy, and system real-time performance. Existing technologies mainly suffer from the following key problems: 1. The PGA gain configuration is rigid, resulting in poor sampling amplitude adaptability. Traditional programmable gain amplifiers (PGAs) require manual calibration to preset fixed values ​​or employ a static configuration with segmented fixed gains, failing to dynamically adapt to real-time changes in the amplitude of the measured signal. This directly leads to two types of problems: First, when the measured signal amplitude is small, insufficient gain results in low effective bit width utilization of the ADC (typically below 30%), with many high bits being invalid zeros, severely compromising quantization accuracy and obscuring signal details with noise. Second, when the measured signal amplitude is large, excessively high gain can cause the signal to exceed the ADC's bipolar range (-V / 2 to +V / 2), producing clipping distortion and resulting in signal characteristic distortion. Furthermore, existing technologies do not integrate gain adjustment with signal attribute recognition; even with unreasonable gain configurations, AC / DC determination is still based on distorted or low-precision sampling data, further amplifying recognition errors.

[0003] 2. Temporal extremum extraction has weak anti-interference ability and low feature extraction accuracy. In existing AC / DC identification and signal feature extraction schemes, time-domain extremum extraction often employs a simple three-point method (comparing the current point with two adjacent points), without optimizing for quantization glitches in ADC sampling. High-precision ADCs (such as 24-bit ADCs) have extremely small quantization steps, and minute jitter of ±1 to ±3 quantization units easily appears near the apex. The three-point method is prone to misidentifying these quantization glitches as extrema or missing true extrema, leading to large errors in extracting the maximum and minimum values ​​of the signal. While frequency-domain methods (such as FFT / DFT) can mitigate the extremum jitter problem to some extent, their high computational complexity, involving numerous complex number operations, results in a large implementation circuit area and increased chip power consumption, making them unsuitable for real-time detection scenarios in industrial environments.

[0004] 3. The AC / DC identification logic is simple, resulting in a high false positive rate. Existing AC / DC signal identification schemes mostly rely on a single judgment dimension: either judging solely by whether the signal amplitude fluctuation (peak-to-peak value) is below a fixed threshold, or judging solely by whether the signal frequency deviates from the power frequency range. This single-dimensional logic has obvious drawbacks: for low-amplitude AC signals (such as weak power frequency signals with peak-to-peak values ​​close to noise levels), relying solely on amplitude thresholds can easily lead to misjudgment as DC signals; for DC signals with large ripple (such as rippled DC output from switching power supplies), relying solely on frequency characteristics can easily lead to misjudgment as AC signals. Furthermore, existing schemes do not consider the impact of sampling quality on the identification results—when the gain configuration is unreasonable, leading to low or distorted sampling data, it further exacerbates the misjudgment problem, resulting in an identification accuracy of less than 80% in scenarios such as low-voltage monitoring and weak signal acquisition.

[0005] 4. The sampling adaptation and AC / DC identification are disconnected, resulting in poor system coordination. Existing technologies treat "signal sampling" and "AC / DC identification" as independent processes, lacking coordinated design: PGA gain adjustment is not configured differently based on the amplitude characteristics of AC and DC signals, and AC / DC identification does not provide feedback to guide gain optimization. For example, for DC signals, there is no need to pursue high gain to avoid amplifying noise; for AC signals, it is necessary to ensure that the signal fills the effective bit width of the ADC to improve frequency calculation accuracy, but existing solutions cannot achieve this kind of differentiated adaptation. This disconnect leads to redundancy or insufficiency in the overall system performance—excessive gain during DC signal sampling introduces redundant noise, while insufficient gain during AC signal sampling results in accuracy loss, further reducing the stability and reliability of the system.

[0006] 5. Poor scene adaptability and uncontrollable parameters. The core parameters of existing solutions (such as gain level, amplitude judgment threshold, and frequency judgment range) are mostly fixed designs, which cannot be flexibly configured according to different application scenarios. For example, the amplitude difference between low-voltage monitoring scenarios (such as millivolt-level signals from sensors) and high-voltage monitoring scenarios (such as kilovolt-level voltages in industry) can be more than a thousand times, but the amplitude threshold of existing solutions cannot be dynamically adjusted; the allowable fluctuation range of power frequency signals varies in different regions or application scenarios (such as 45~55Hz in some industrial scenarios and 49.5~50.5Hz in some precision equipment), but the frequency judgment range of existing solutions is fixed, which limits the adaptability of scenarios and makes it difficult to meet diverse detection needs.

[0007] Therefore, there is an urgent need for an integrated solution that combines adaptive gain adjustment, high-precision extreme value extraction, and high-accuracy AC / DC identification to achieve adaptive amplitude adaptation of signal sampling and accurate determination of signal attributes, while taking into account both real-time performance and anti-interference capabilities. Summary of the Invention

[0008] The purpose of this invention is to provide an adaptive AC / DC wide-range power metering system and method for ubiquitous metering, in order to solve the above-mentioned technical problems.

[0009] To address the aforementioned technical problems, the specific technical solution of the adaptive AC / DC wide-range energy metering system and method for ubiquitous metering of the present invention is as follows: An adaptive AC / DC wide-range energy metering system for ubiquitous metering includes: A programmable gain amplifier control module is used to amplify the input voltage or current signal according to the configured amplification factor; An analog-to-digital converter is used to acquire the signal amplified by the programmable gain amplifier and output a discrete signed sampled data sequence. The waveform extreme point judgment module is used to process the sampled data sequence using the sliding window extreme value discrimination method to extract the global maximum and global minimum values ​​and their corresponding position information; The extreme point and extreme point location processing module is used to calculate the period and amplitude of the signal based on the maximum and minimum values ​​and their location information; A programmable gain amplifier calculation module is used to adaptively calculate and adjust the optimal gain of the programmable gain amplifier based on the bit width occupancy of the maximum and minimum values; and The dual-dimensional AC / DC signal identification module is used to comprehensively determine whether the signal is an AC signal or a DC signal based on the period and amplitude of the signal, combined with a preset frequency range and amplitude threshold.

[0010] Furthermore, it also includes a data format processing module, which binds the sampled data of the analog-to-digital converter with the current programmable gain amplifier multiple identifier, and normalizes the sampled data under different gains to unify the signal amplitude reference.

[0011] Furthermore, it also includes a delay circuit, which delays the reading of updated sampled data according to a preset delay parameter when the programmable gain amplifier adjustment is detected, so as to avoid invalid data during the gain switching transition period.

[0012] This invention also discloses an adaptive AC / DC wide-range energy metering method for ubiquitous metering, applied to the aforementioned system, comprising the following steps: Step S1: Acquire the signal amplified by the programmable gain amplifier through the analog-to-digital converter to obtain a discretized signed sampled data sequence; Step S2: Use the sliding window extreme value discrimination method to traverse the sampled data sequence and extract the global maximum and global minimum values ​​and their corresponding position information; Step S3: Calculate the signal period based on the location information of the maximum and minimum values, and calculate the signal amplitude based on the difference between the maximum and minimum values; Step S4: Analyze the effective binary bit width of the maximum and minimum values, calculate the bit width occupancy rate, and adaptively adjust the amplification factor of the programmable gain amplifier based on the comparison result of the bit width occupancy rate with the preset optimal range. Step S5: Based on the calculated signal period and signal amplitude, combined with the preset frequency range and amplitude threshold, determine whether the input signal is an AC signal or a DC signal through two-dimensional logic; Step S6: Based on the adjusted amplification factor and the determined signal type, perform power metering calculations on the subsequent sampled data.

[0013] Furthermore, the sliding window extreme value discrimination method in step S2 further includes: Set the window length to 5 sampling points and iterate through the sampling sequence; For each intermediate sampling point, determine whether it is the maximum or minimum value within the 5-point window; Filter all extreme points within the window, take the point with the largest value as the global positive peak, and the point with the smallest value as the global negative peak, and record their corresponding position indices.

[0014] Furthermore, step S4 further includes: The effective bit width is calculated by taking the absolute value of the global maximum and minimum values ​​and counting leading zeros. Calculate the bit width occupancy rate by taking the larger of the two effective bit widths; If the bit width occupancy rate is lower than the first hysteresis threshold and the current gain is less than the maximum gain, then increase the amplification factor; if the bit width occupancy rate is higher than the second hysteresis threshold and the current gain is greater than the minimum gain, then decrease the amplification factor; repeat this process until the bit width occupancy rate stabilizes within the preset optimal range.

[0015] Furthermore, the two-dimensional logical determination in step S5 further includes: If the frequency corresponding to the signal period is not within the preset AC frequency range, and the signal amplitude is less than the preset amplitude threshold, then it is determined to be a DC signal. Otherwise, it is determined to be an AC signal.

[0016] Furthermore, the electricity metering calculation in step S6 further includes: The sampled data from the analog-to-digital converter is bound to the current programmable gain amplifier factor identifier; The sampled data is normalized by gain according to the multiplier identifier to restore the true signal amplitude; Calculate the effective values ​​of voltage and current based on the normalized data; Based on the identification result of step S5, select the corresponding DC or AC power calculation logic to calculate active power, reactive power and apparent power.

[0017] Furthermore, when the signal is determined to be a DC signal, the power calculation logic further includes: Calculate the average normalized voltage and current over a single cycle; The product of the average voltage and the average current is taken as the DC active power.

[0018] Furthermore, when the signal is determined to be an AC signal, the power calculation logic further includes: Apparent power is calculated by multiplying the effective value of voltage by the effective value of current. Active power is calculated by averaging the instantaneous power over a period of time. Based on the apparent power and active power, reactive power is calculated by deriving the power triangle relationship.

[0019] The adaptive AC / DC wide-range energy metering system and method for ubiquitous metering of the present invention has the following advantages: 1. Solved the problem of PGA gain not being able to dynamically adapt to signal amplitude. This invention achieves adaptive gain adjustment based on ADC sampling data. By analyzing the bit width occupancy of the maximum and minimum signed data within a sampling period, it automatically determines the optimal PGA amplification factor, ensuring that the signal amplitude stably matches the optimal range of the effective bit width of the ADC (60%~85%). At the same time, it avoids clipping distortion, balances quantization accuracy and distortion-free acquisition, and can adapt to dynamically changing measured signal amplitudes without manual intervention.

[0020] 2. It solves the problems of weak anti-interference ability and low accuracy in time-domain extremum extraction. An optimized 5-point sliding window extreme value discrimination method is proposed, which effectively covers the quantization glitch region (3-5 sampling points) near the ADC vertex, accurately extracts the global maximum and minimum values ​​of the signal, avoids jitter misjudgment at a single extreme value point, and improves the extreme value extraction accuracy to over 99.9%, providing a reliable data foundation for subsequent frequency and amplitude calculations and AC / DC identification.

[0021] 3. Solved the problems of simple AC / DC recognition logic and high false judgment rate. A dual-dimensional AC / DC identification logic based on "frequency characteristics + amplitude characteristics" is constructed. By combining a preset power frequency range (such as 45~55Hz) and a configurable amplitude threshold, it can accurately distinguish between low-amplitude AC signals and DC signals with ripple, thereby improving the AC / DC identification accuracy to over 99.5% and solving the misjudgment problem caused by single-dimensional judgment.

[0022] 4. Solved the problems of disconnect between sampling adaptation and AC / DC identification, and poor system coordination. Establish an integrated collaborative mechanism of "adaptive gain adjustment - high-precision feature extraction - AC / DC identification - dynamic feedback optimization": gain adjustment provides high-quality sampling data for feature extraction, and AC / DC identification results provide feedback to guide differentiated gain configuration (such as reducing gain to suppress noise for DC signals and optimizing gain to improve accuracy for AC signals), thereby improving the overall stability and detection accuracy of the system.

[0023] 5. Resolved the issues of poor scenario adaptability and uncontrollable parameters in existing solutions. The design features a configurable parameter system, allowing users to flexibly set the PGA selectable gain set, optimal bit width range, frequency judgment range, and amplitude threshold value according to actual application scenarios. This enables the solution to adapt to diverse scenarios such as low-voltage / high-voltage monitoring, weak / strong signal acquisition, and different power frequency fluctuation requirements, thereby enhancing the versatility and industrial value of the solution.

[0024] 6. Solved the problems of poor real-time performance and difficulty in embedded system adaptation in high-frequency domain methods. All core algorithms (bit width calculation for gain adjustment, sliding window comparison for extreme value extraction, simple arithmetic operations for frequency amplitude calculation, and logical judgment for AC / DC identification) adopt a time-domain lightweight design to avoid complex frequency domain transformations, ensuring that the processing time for a single frame signal is ≤1ms. They can be directly adapted to embedded hardware such as microcontrollers and DSPs to meet the needs of real-time detection in industrial settings. Attached Figure Description

[0025] Figure 1 This is a structural block diagram of the adaptive AC / DC wide-range power metering system for ubiquitous metering according to the present invention; Figure 2 This is a schematic diagram of the sampling point sequence of the waveform extreme point judgment method in this invention (taking 1.5 times the period as an example). Figure 3 This is an overall flowchart of the adaptive AC / DC wide-range power metering method of the present invention; Figure 4 This is a flowchart illustrating the adaptive adjustment logic of the PGA gain in this invention. Figure 5 This is a schematic diagram of the multi-channel data format and delay synchronization mechanism of the present invention. Detailed Implementation

[0026] To better understand the purpose, structure, and function of this invention, the following detailed description of the adaptive AC / DC wide-range energy metering system and method for ubiquitous metering, in conjunction with the accompanying drawings, is provided.

[0027] like Figure 1As shown, this invention proposes an adaptive AC / DC wide-range metering system for ubiquitous metering. Based on waveform data acquired by a programmable gain amplifier (PGA) and an analog-to-digital converter (ADC), the system analyzes the extreme points and periods of the waveform data to calculate a suitable PGA amplification factor, adaptively switching the PGA factor in real time. It can also determine whether the input signal is DC or AC based on the signal's frequency and amplitude, providing a basis for real-time switching in subsequent metering algorithms. The system mainly includes a programmable gain amplifier (PGA) control module, an analog-to-digital converter (ADC), a counter, a waveform extreme point judgment module, an extreme point and extreme point location processing module, a PGA factor calculation module, a voltage offset threshold configuration module, a current offset threshold configuration module, a delay circuit, a data format processing module, a voltage RMS value calculation module, a current RMS value calculation module, a two-dimensional DC / AC signal identification module, and an energy metering algorithm module.

[0028] The editable gain amplifier control module is mainly used to amplify current or voltage signals according to the configured multiple; Analog-to-digital converters are used to acquire voltage or current signals after the PGA amplification output; The counter is used to count based on the input value of 1.5 times the sampling period. For example, if 256 points are needed to collect one cycle of a 50Hz sine wave signal, the counter will count from 0 to 1.5 × 256 - 1, which is 383. The voltage offset threshold configuration module is used to receive voltage offset threshold information configured by the upper level; The current offset threshold configuration module is used to receive the current offset threshold information configured by the upper level; The waveform extreme point judgment module is used to determine the maximum and minimum values ​​of voltage or current sine waves, record the counter values ​​corresponding to the maximum and minimum values, and output the extreme points and their positions (corresponding counter values). The extreme point and extreme point location processing module is used to calculate the period of voltage or current, and the difference between the maximum and minimum voltage values; The PGA multiplier calculation module is used to calculate the bit width occupancy of the ADC based on the output extreme points and their positions, and to calculate the appropriate PGA multiplier based on the bit width occupancy. The delay circuit is used to delay the output of current or voltage waveform data according to the configured delay period; The data format processing module is used to expand the ADC data according to the PGA multiple and adjust the data format; The voltage RMS value calculation module is used to calculate the voltage RMS value; The current RMS value calculation module is used to calculate the RMS value of the current; The dual-dimensional DC / AC signal identification module is used to determine whether it is AC information or DC signal based on the period of voltage or current and the difference between the maximum and minimum voltage values. The electricity metering algorithm module is used to calculate electricity metering-related information.

[0029] like Figure 3 As shown, the adaptive AC / DC wide-range energy metering method for ubiquitous metering proposed in this invention includes the following steps: Step 1: Determine the extreme points of the waveform: An ADC acquires discrete point data: not a continuous sine wave, but a data array / data stream [x0, x1, x2, ..., x...]. n Each element is a signed integer / decimal (the quantized level value of the ADC). Definition of positive and negative vertices of a sine wave: Positive peak (positive value): The sampling point where the sine wave begins to decline after reaching its highest point; Negative peak (negative apex): The sampling point where the sine wave begins to rise after reaching its lowest point; For each intermediate point x[i] in the discrete data sequence, it is only necessary to compare the values ​​of the previous point x[i-1] and the next point x[i+1] to determine whether the point is a vertex, without any extra calculations. The array index i starts from 0, and the effective data length is n-1. The range of indices for traversal: i ranges from 0 to n-1 (only traversing intermediate points to avoid out-of-bounds errors); Precise determination rules (signed sine wave); The selected number of points, n, is the input information, specifically 1.5 times the number of sampling points in the known sampling period. For example, if the number of sampling points for one period of a sine wave is 256, then n = 256 × 1.5 = 384. The reason for choosing 1.5 times is that within 1.5 times the sine wave, the maximum and minimum values ​​can definitely be found, avoiding the situation where the starting position is the maximum or minimum value. Figure 2 As shown.

[0030] Sliding window size selection: Window length winlen=5, because a 50Hz signal has 256 points in a single cycle, and the sine wave peak is a smooth arc segment. The fluctuations near the peak will not exceed 5 sampling points. A 5-point window just covers all quantization glitches, which is the optimal value. Local extremum region locking: Traverse the sampling sequence, and for each position i, determine whether the point is an extremum within a 5-point window. Positive peak region: x[i]≥x[i-2:i+2] (maximum value within the window) Negative peak region: x[i]≤x[i-2:i+2] (minimum value within the window) Global extreme value filtering: Among all the points in the extreme value region, the one with the largest value is the global positive peak value, and the one with the smallest value is the global negative peak value. Its index is the precise peak and valley position. Boundary handling: Two points are discarded at the beginning and end of the sequence to avoid window overflow, which has no effect on the 256-point / period sequence; The counter is used to count from 0 to n-1 and then reset to zero. Simultaneously, a sliding window is used to compare the maximum and minimum values, and the maximum and minimum values ​​are recorded. The maximum value x is then taken. max The time i is denoted as i max , x[i] minimum value x min The counter value corresponding to time i is denoted as i min ; Simultaneously output the maximum value x max Minimum value x min , and i max i min ; Step 2: Handling extreme values ​​and their locations: Calculate the period T or frequency f of the signal: T=|i max -i min |; f = 1 / T; Calculate the amplitude Upp=x of the voltage signal. max -x min ; If the number of adjacent positive peaks is ≥2, take the subscript difference between adjacent positive peaks Δidx=i. max (2)- i max (1), then the signal frequency f = 1 / (Δidx × T) s ) (T s T is the sampling time interval. s =1 / f s f s (sampling frequency); If the number of positive peaks is insufficient, take the index difference Δidx = |i_i| between the positive peak and the adjacent negative peak. max (1)- i min (1) |, then the frequency f = 1 / (2 × Δidx × T) s ).

[0031] Step 3: Calculate the PGA multiple: Based on the maximum and minimum bit width occupancy of signed data within one sampling period of the ADC, the PGA gain is automatically determined and adjusted to achieve the optimal match between the signal amplitude and the effective bit width of the ADC. Step 3.1: Initial Sampling and Extreme Value Extraction: Collect a discrete signed sampling sequence sig of one cycle of the measured voltage / current signal with the current PGA gain, and extract the global maximum value x max (positive number) and the minimum value x min (negative number, in two's complement form) to suppress quantization glitch interference.

[0032] Step 3.1.1: Calculation of Effective Bit Width and Occupancy Rate: Take the absolute value (convert two's complement to original code) of x max , x min respectively, to obtain |D max |, |D min |; Calculate the binary effective bit width of the two through bit operations: utilize the leading zero count function, the effective bit width W = ADC bit number - number of leading zeros (example: in a 24-bit ADC, the number of leading zeros of |D max | is 12, then W = 24 - 12 = 12); Take the maximum value of the two as the effective bit width of the current signal W max = max(W(D max ), W(D min )), calculate the bit width occupancy rate η = (W max / N) × 100%.

[0033] Step 3.1.2: Gain Adaptive Adjustment: As Figure 4 shown, if η < 55% (below the gain increase hysteresis threshold) and the current gain Gcur < Gpre (such as 16), then double the gain (Gnew = Gcur × 2); where, 55% can be parameterized according to requirements, Gcur is the gain multiple of the PGA calculated based on ADC data; Gpre is the current gain multiple of the PGA; Gnew is the gain multiple of the PGA after calculation, if the gain multiple of the PGA needs to be updated, then assign the value of Gnew to Gpre; If η > 90% (above the gain decrease hysteresis threshold) and the current gain Gcur > Gpre (such as 1), then halve the gain (Gnew = Gcur / 2); If 55% ≤ η ≤ 90%, keep the current gain; Repeat the above steps until η stabilizes in the optimal interval [60%, 85%], and lock the optimal gain G.

[0034] Step 3.2: Clipping distortion prediction: If the effective bit width W = ADC full-scale bit width (such as 24-bit ADC) - 1 or D = ADC full-scale bit width (such as 24-bit ADC) - 2, it is determined that the signal is clipped. Immediately halve the gain and mark the current sampled data as invalid.

[0035] Step 4: Identify two-dimensional DC and AC signals By setting the signal frequency range, if both the voltage and current signal frequencies are within 45 - 55 Hz (this range can be configured through registers), and the Vpp value of the voltage signal is within a very small threshold range (this threshold range can be configured through registers), when all the above three conditions are met simultaneously, it is determined that this signal is a DC signal; otherwise, it is an AC signal.

[0036] That is, by combining the frequency characteristics and amplitude characteristics of the signal, accurately determine the AC / DC attribute: If the voltage signal frequency f u [45, 55] Hz, the current signal frequency f i [45, 55] Hz, and the voltage peak-to-peak value Vpp < Vreg (a value configurable through registers), then it is determined as a DC signal; Otherwise (if any one of the signal frequencies is within the range of [45, 55] Hz, or the voltage peak-to-peak value Vpp ≥ Vreg), it is determined as an AC signal.

[0037] Continuous monitoring and dynamic adjustment: After the system locks the optimal gain, continuously monitor the bit width occupancy rate and signal characteristics of each sampling period. If the signal amplitude mutation causes η to deviate from the optimal interval or the AC / DC attribute changes, repeat Steps 2 - 4 for dynamic adjustment.

[0038] Step 5: Process data format For the problem of calculating the effective value and power caused by the real-time dynamic change of the PGA multiple for multiple ADC channels (2 0 ~2 n ), combined with the processing rule of "binding ADC sampling data with PGA multiple one by one", design the following voltage / current effective value and power calculation methods. Through steps such as data identifier parsing, delay synchronization, and gain normalization, accurately solve the signal parameters under different gains, specifically as follows: (I) Core design idea Core logic: Using the PGA multiple identifier carried by the ADC sampling data as the core correlation basis, a delay synchronization mechanism ensures precise matching between the data and the current PGA multiple. First, gain normalization is performed on the voltage and current sampling data to eliminate the influence of dynamic PGA changes. Then, the RMS values ​​of voltage / current are calculated based on the normalized data. Finally, key power parameters such as active power and apparent power are obtained through the collaborative calculation of the voltage and current RMS values. Key points include: ① Precise binding of multi-channel PGA identifiers to data; ② Delay synchronization mechanism to ensure the validity of calculations after gain switching; ③ Normalization processing to unify the signal amplitude benchmark under different gains; ④ Real-time coordination of RMS values ​​and power calculations.

[0039] (II) Prerequisites and Data Definition 1. PGA Multiple Specification: The PGA multiple for all ADC channels is an integer power of 2, i.e., gain G=2. k (k∈{0,1,2,...,n}, where n is the maximum gain exponent, e.g., when k=3, G=8=2) 3 The voltage and current channels are configured with independent PGA multiples and are identified separately. 2. ADC Data Format: Sampled data uses a concatenated format of "PGA identifier + raw data", i.e., data V ={k V , x V [i]} (voltage channel), data I ={k I , x I [i]} (current path), where: k V k I These are the PGA multiples for the voltage and current channels, respectively (corresponding one-to-one with the gain index, such as k). V =3 corresponds to voltage channel G V =2 3 =8); x V [i]、x I [i] represents 24-bit signed raw sampled data (unit: LSB); After the PGA multiplier is adjusted, the identifier is updated synchronously, such as voltage channel G. V From 2 3 Adjusted to 2 4 At that time, the data format is from {3, x V [i]} becomes {4, x V [i]}; 3. Delay synchronization mechanism: preset voltage channel delay parameter t delay_V and current channel delay parameter t delay_I(All determined through preliminary testing and stored in register configuration), when a PGA multiple adjustment instruction for a certain channel is detected, the corresponding delay t is... delay Read the new identifier data again in time to avoid invalid data from the gain switching transition period from participating in the calculation; 4. Basic parameters: ADC quantization step LSB (unit: V / LSB or A / LSB, determined by the ADC bit depth N and full-scale value V). FS Confirmed, LSB=V FS / 2 N The number of sampling points M per cycle (determined by the sampling rate f) s Given the signal frequency f, M = f s / f); Voltage and current path sampling synchronization clock (ensuring x V [i] and x I [i] represents the sampled values ​​at the same time.

[0040] (III) Complete Calculation Steps Step 5.1: Multi-channel data acquisition and delay synchronization Step 5.1.1: Real-time parallel acquisition of voltage channels (data) V ) and current path (data I The sampling data of the two channels are monitored simultaneously, along with the PGA multiplier adjustment commands of the two channels. Step 5.1.2: If voltage channel PGA adjustment (such as G) is detected V From 2 3 Switch to 2 4 ), start the voltage channel delay counter, delay t delay_V The calculation of the effective value and power of this channel is paused within the buffer, and only the data is cached; the same applies to the adjustment of the current channel, with an independent delay t. delay_I ; Step 5.1.3: After the delay ends, filter out the valid data after the voltage and current channel identifiers are updated (e.g., voltage channel from {3, x...). V [i]} is switched to {4, x V [i]}), after ensuring that the data of both channels are precisely matched with the current PGA multiple, resume the calculation.

[0041] Step 5.2: ADC Data Analysis and PGA Fold Extraction Step 5.2.1: Analyze the valid voltage and current data separately: from the data... V Extracting the voltage channel PGA identifier k V and the original data x V [i], from data I Extracting the current channel PGA identifier k I and the original data x I[i]; Multi-channel data format and delay synchronization mechanism, such as Figure 5 As shown.

[0042] Step 5.2.1: Calculate the actual PGA multiple based on the label: Voltage Channel G V =2 kV (e.g., k) V =3 G V =8), Current channel G I =2 kI (e.g., k) I =2 G I =4); Step 5.3.1: Establish a three-dimensional mapping table of "Channel Type - Channel Number - Current PGA Identifier" and update it in real time (e.g., "Voltage - Channel 1 - k"). V =3" Current-channel 1-k I =2”, which supports gain differentiation during multi-channel parallel computing.

[0043] Step 5.3: Normalization of sampled data based on PGA multiples Because x V [i]、x I [i] is the sampled value after being amplified by the corresponding channel PGA, which needs to be normalized to the true amplitude of the measured signal (to eliminate the influence of gain difference). The normalization formula is as follows: x V_real [i] = (x V [i] × LSB V ) / G V x I_real [i] = (x I [i] × LSB I ) / G I in: x V_real [i] represents the true voltage amplitude (in V) at the i-th sampling point, LSB V Quantization steps for voltage-channel ADC; x I_real [i] represents the actual current amplitude (in A) at the i-th sampling point, LSB I Quantization steps for current-channel ADC; G V G I These are the current PGA multiples for the voltage and current channels, respectively, to ensure that the true amplitudes of different gains and different channels have a unified benchmark.

[0044] Step 5.4: Calculation of RMS Voltage / Current Values The effective value is calculated using the "single-cycle cumulative root mean square" method (balancing real-time performance and accuracy, suitable for embedded scenarios), with separate calculations for the voltage and current channels: Step 5.4.1: Periodic division: For the normalized x V_real [i]、x I_real [i] Divide the data into consecutive periodic blocks according to the number of sampling points M in a single period (e.g., the first M points are the first period, and the M+1 to 2M points are the second period). Step 5.4.2: Accumulate the sum of squares within the period: S V = Σ(x V_real [j]) 2 (j=1~M, sum of squares of voltage periods) S I = Σ(x I_real [j]) 2 (j=1~M, sum of squares of current period) Step 5.4.3: Solve for the effective value using the root mean square (RMS): (Effective Voltage Value) (RMS value of current) Step 5.4.4: Sliding Update: After collecting data for each new period, repeat steps 4.1 to 4.3 to update V in real time. rms I rms This ensures continuous output.

[0045] Step 5.5: Calculate power (DC / AC scenarios, including active and reactive power) Based on the AC / DC identification results, combined with the synchronously sampled normalized voltage and current data, active power, reactive power, and apparent power are calculated for different scenarios, taking into account both real-time performance and scenario adaptability. Step 5.5.1: Calculate the power in the DC scenario Since DC signals have no phase change, the core of power calculation is the product of the average voltage and current, avoiding the complex phase calculations required for AC power calculation. Step 5.5.1.1: Calculate the normalized average values ​​of voltage and current within a single cycle: V dc_avg = (Σx V_real [j]) / M (j=1~M, average DC voltage) I dc_avg = (Σx I_real [j]) / M (j=1~M, average DC current) Step 5.5.1.2: DC active power (i.e., total power, no reactive power): Pdc = V dc_avg × I dc_avg (Unit: W) Note: Reactive power Q in DC scenarios dc =0, apparent power S dc =P dc .

[0046] Step 5.5.2: Power Calculation for AC Scenarios For AC signals, the phase difference between voltage and current needs to be considered. The active and reactive power are calculated using a method of "instantaneous power decomposition + periodic averaging," which is suitable for embedded real-time requirements. Step 5.5.2.1: Apparent power calculation: S ac = V rms × I rms (Unit: VA), consistent with the definition of apparent power in DC scenarios.

[0047] Step 5.5.2.2: Active power calculation: The method of "averaging the instantaneous power over a period of time" is adopted, which is essentially the sum of the power of the voltage and current components in phase. ① Calculate the instantaneous power at each moment within the same period: p[j] = x V_real [j] × x I_real [j] (j=1~M) ② Instantaneous power accumulation within a period: P sum = Σp[j] (j=1~M) ③ Calculate the average value to obtain the active power: P ac = P sum / M (unit: W) Step 5.5.2.3: Reactive power calculation: Based on the power triangle relationship of "apparent power - active power", the calculation is simplified by avoiding complex phase angle detection. ① First, calculate the cosine value of the power factor angle: cosφ = P ac / S ac (φ is the phase difference between voltage and current) ② Calculate the sine value of the power factor angle: (Applicable only to sinusoidal AC signals, suitable for power frequency detection scenarios) ③ Reactive power: Q ac = S ac × sinφ (unit: Var) Note: If cosφ≥0, it is inductive reactive power (current lags voltage); if cosφ<0, it is capacitive reactive power (current leads voltage).

[0048] Step 5.5.2.4: Simplify the verification logic: When a purely resistive load is detected (e.g., cosφ≈1), Q ac ≈0, P ac ≈S ac This is consistent with actual physical laws.

[0049] Step 5.5.3: Power Update and Scene Adaptation: Step 5.5.3.1: Scene switching determination: Based on the AC / DC identification results above, automatically select DC or AC power calculation logic; if the AC / DC attribute changes (such as switching from AC to DC), use the weighted average of the power of the previous cycle and the calculation result of the current cycle to transition, and avoid sudden output changes.

[0050] Step 5.5.3.2: Synchronous Update: The power calculation and RMS update cycle are consistent. After each data analysis cycle is completed, the power parameters (P) for the corresponding scenario are updated. dc / P ac Q ac S dc / S ac This ensures timing consistency.

[0051] Based on synchronously sampled voltage, current RMS values, and phase information, core power parameters are calculated. Considering the real-time requirements of embedded scenarios, a simplified yet accurate calculation logic is adopted: Step 5.5.3.1: Apparent power calculation: directly solved by multiplying the effective value of voltage and the effective value of current, as shown in the following formula: S = V rms × I rms (Unit: VA) Step 5.5.3.2: Active power calculation: The "average of instantaneous power accumulation within the cycle" method is adopted (avoiding complex phase detection and adapting to real-time requirements), and the formula is as follows: ① Calculate the instantaneous power at each moment within the same period: p[j] = x V_real [j] × x I_real [j] (j=1~M) ② Instantaneous power accumulation within a period: P sum = Σp[j] (j=1~M) ③ Calculate the average value to obtain the active power: P = P sum / M (unit: W) Step 5.5.3.3: Power Update: Synchronized with RMS update, S and P are updated once after each data analysis cycle to ensure the timing consistency of power parameters with RMS values.

[0052] Step 5.6: Exception Data Handling and Fault Tolerance Mechanism Step 5.6.1: Identifier Verification: If the parsed k V or k I If the data exceeds the preset range (0~n), the corresponding channel data is determined to be invalid, the data for that period is discarded, and the valid value and power result of the previous period are used. Step 5.6.2: Gain Sudden Change Compensation: If the PGA multiple of a certain channel changes abruptly (e.g., k...), V (From 2 to 5), before the first complete cycle calculation is completed, the weighted average result of the previous cycle's effective value / power and the current normalized data is used as a transition to avoid sudden output changes; Step 5.6.3: Synchronization verification: If there are missing (less than M points) voltage and current sampling data in the same cycle or the sampling time is not synchronized, wait for the synchronization data to be supplemented before calculating to ensure the accuracy of power calculation; Step 5.6.4: Clipping data removal: If x is detected V [i] or x I [i] Reaching the ADC range limit (e.g., x) V [i]=2 23 -1 or -2 23 If the data is identified as clipped, the data for that period is discarded and the corresponding channel's PGA gain is adjusted (halved).

[0053] Example illustration (verifying the DC / AC power calculation in step 5.5): Taking power frequency (50Hz) AC and DC scenarios as examples, the power calculation logic is verified. The specific parameters are as follows: ADC bit width N=24, voltage channel full scale V FS_V =±10V (LSB) V ≈0.596μV), current channel full scale I FS_V =±5A (LSB) I ≈0.298μA); sampling rate f S =12.8kHz, number of sampling points per cycle M=256; initial k of voltage channel V =3 (G V =8), adjusted k V =4(G) V =16), t delay_V =1ms; Current channel k I =2(G I =4), no adjustment, t delay_I =0.5ms.

[0054] Example 1: AC scenario (purely resistive + inductive load) 1. Data analysis before adjustment: Voltage data {3, x V[i]=1048576}, normalized x V_real [i]≈0.078V; Current data {2, x I [i]=2097152}, normalized x I_real [i]≈0.156A; 2. Calculation of effective value: V rms ≈0.077V, I rms ≈0.155A; 3. Power Calculation: S ac =0.077×0.155≈0.0119VA; P ac =Σ(0.078×0.156) / 256≈0.0119W (pure resistive load, cosφ≈1); ; If it is an inductive load (cosφ=0.8), then .

[0055] Example 2: DC Scenarios 1. Sampling data: Voltage data {3, x V [i]=constant1048576}, current data {2, x I [i] = constant 2097152}; 2. Calculation of average value: V dc_avg ≈0.078V, I dc_avg ≈0.156A; 3. Power calculation: P dc =0.078 × 0.156 ≈ 0.0122 W, Q dc =0, S dc =0.0122VA.

[0056] Taking power frequency (50Hz) voltage and current acquisition and power calculation as an example, the specific parameters are as follows: ADC bit depth N=24, voltage channel full scale V FS_V =±10V (LSB) V ≈0.596μV), current channel full scale I FS_I =±5A (LSB) I ≈0.298μA); sampling rate f s =12.8kHz, number of sampling points per cycle M=256; initial k of voltage channel V =3 (G V =8), adjusted k V =4(G) V =16), t delay_V =1ms; Current channel k I=2(G I =4), no adjustment, t delay_I =0.5ms.

[0057] 1. Data analysis before adjustment: Voltage data {3, x V [i]=1048576}, normalized x V_real [i] = (1048576 × 0.596 μV) / 8 ≈ 0.078 V; Current data {2, x I [i]=2097152}, normalized x I_real [i]=(2097152×0.298μA) / 4≈0.156A; 2. Calculation of effective value: S V =Σ(0.078) 2 ≈1.52, ; S I =Σ(0.156) 2 ≈6.08, ; 3. PGA Adjustment: After detecting a voltage channel adjustment command, delay for 1ms, and filter out the voltage data identified as 4 {4, x V [i]=2097152}; 4. Analysis of adjusted data: x V_real [i]=(2097152×0.596μV) / 16≈0.078V (consistent with the true amplitude before adjustment); 5. Power Calculation: Instantaneous power accumulation P within the cycle sum =Σ(0.078×0.156)≈3.04, active power P=3.04 / 256≈0.0119W; apparent power S=0.077×0.155≈0.0119VA (pure resistive load, P≈S).

[0058] Step 6: Calculate the RMS values ​​of voltage / current The following detailed explanation uses a 24-bit ADC IP as an example: This embodiment includes: a 24-bit high-precision ADC IP (sampling rate 12.8kHz, full-scale V=±10V, LSB=10V / 2). 24 ≈0.596μV), PGA (optional gain set {1,2,4,8,16…}), voltage / current sampling and conditioning circuit; after the ADC acquires the signal, it is transmitted to the delay circuit and the waveform extreme point judgment algorithm. The extreme point judgment algorithm performs extreme value extraction, outputs the extreme point and extreme point position processing, and then performs AC / DC identification and other algorithm logic.

[0059] The complete implementation process is as follows: Step 6.1: System Initialization: Configure the ADC to 24-bit bipolar signed mode with a sampling rate f. s =12800Hz, T=78.125μs; PGA initial gain Gcur=1; Configure the optimal bit width range η=[60%,85%], and the hysteresis threshold is [0%,35%] or [85%,90%], that is, the PGA gain needs to be adjusted to the optimal bit width range within these two ranges; Configure the AC signal frequency range [45,55]Hz, and the amplitude threshold V=0.5V.

[0060] Step 6.2: Adaptive PGA gain adjustment: Step 6.2.1: Initial sampling: Acquire one cycle of a 50Hz sinusoidal voltage signal with Gcur=1 (or the configured value) (number of sampling points M=256) to obtain the sampling sequence x[i]. Extract the extreme value D using the 5-point sliding window method. max =0b0000 00000110 0100 0000 0000 (decimal 62464), D min =-0b0000 0000 0110 0100 0000 0000 (decimal -62464).

[0061] Step 6.2.2: Calculation of effective bit width: |D max |Number of leading zeros = 16, W(D) max ) = 24 - 16 = 8; | D min |Number of leading zeros = 16, W(D) min ) = 24 - 16 = 8; W max =max(W(D max ), W (D min ))=8,η=( W max / N)×100% =(8 / 24)×100%≈33.3%<55%, triggering gain adjustment.

[0062] Step 6.2.3: Gain Adjustment: The current gain Gcur=1<16 (Note: 16 is the maximum configurable gain factor), adjust it to Gnew=Gcur×2=2, and at the same time assign Gcur=Gnew=2 (that is, assign the new gain factor to the current factor); repeat sampling and calculation until Gcur=4, η=72.9% (W=17), stabilizes in the optimal range, and lock the optimal gain Gcur=4.

[0063] Step 6.3: Signal Feature Extraction The signal was acquired with Gcur=4, and the voltage extreme value v was extracted. max =9.998V, vmin =-9.996V; adjacent positive peak indexes are 128 and 384, Δidx=256, voltage frequency f v =1 / (256×78.125×10)=50Hz; Peak-to-peak voltage Vpp=9.998-(-9.996)=19.994V, RMS value V rms ≈7.069V.

[0064] Similarly, extract the extreme values ​​of the current i max =4.999A、i min =-4.998A, current frequency f i =50Hz.

[0065] Step 6.4: AC / DC identification: f v =50Hz∈[45,55]Hz,f i =50Hz∈[45,55]Hz, is determined to be an AC signal.

[0066] Step 6.5: Dynamic Monitoring: Continuously monitor the bit width occupancy rate. If a sudden change in signal amplitude causes η=92%>90%, adjust the PGA gain to 2, re-extract features and make judgments to ensure recognition accuracy.

[0067] It is understood that the present invention has been described through some embodiments, and those skilled in the art will recognize that various changes or equivalent substitutions can be made to these features and embodiments without departing from the spirit and scope of the invention. Furthermore, under the teachings of the present invention, these features and embodiments can be modified to adapt to specific situations and materials without departing from the spirit and scope of the invention. Therefore, the present invention is not limited to the specific embodiments disclosed herein, and all embodiments falling within the scope of the claims of this application are within the protection scope of the present invention.

Claims

1. An adaptive AC / DC wide-range energy metering system for ubiquitous metering, characterized in that, include: A programmable gain amplifier control module is used to amplify the input voltage or current signal according to the configured amplification factor; An analog-to-digital converter is used to acquire the signal amplified by the programmable gain amplifier and output a discretized signed sampled data sequence; a waveform extreme point judgment module is used to process the sampled data sequence using a sliding window extreme point discrimination method to extract the global maximum and global minimum values ​​and their corresponding position information; an extreme point and extreme point position processing module is used to calculate the period and amplitude of the signal based on the maximum and minimum values ​​and their position information; The programmable gain amplifier factor calculation module is used to adaptively calculate and adjust the optimal gain of the programmable gain amplifier based on the bit width occupancy of the maximum and minimum values. And a dual-dimensional AC / DC signal identification module, used to comprehensively determine whether the signal is an AC signal or a DC signal based on the period and amplitude of the signal, combined with a preset frequency range and amplitude threshold.

2. The adaptive AC / DC wide-range energy metering system for ubiquitous metering according to claim 1, characterized in that, It also includes a data format processing module, which binds the sampled data of the analog-to-digital converter with the current programmable gain amplifier multiple identifier, and normalizes the sampled data under different gains to unify the signal amplitude reference.

3. The adaptive AC / DC wide-range energy metering system for ubiquitous metering according to claim 2, characterized in that, It also includes a delay circuit, which delays the reading of updated sampled data according to a preset delay parameter when the programmable gain amplifier adjustment is detected, so as to avoid invalid data during the gain switching transition period.

4. An adaptive AC / DC wide-range energy metering method for ubiquitous metering, applied to the system described in any one of claims 1-3, characterized in that, Includes the following steps: Step S1: Acquire the signal amplified by the programmable gain amplifier through an analog-to-digital converter to obtain a discretized signed sampled data sequence; Step S2: Traverse the sampled data sequence using the sliding window extremum discrimination method to extract the global maximum and global minimum values ​​and their corresponding position information; Step S3: Calculate the signal period based on the position information of the maximum and minimum values, and calculate the signal amplitude based on the difference between the maximum and minimum values; Step S4: Analyze the effective binary bit width of the maximum and minimum values, calculate the bit width occupancy rate, and adaptively adjust the amplification factor of the programmable gain amplifier based on the comparison result of the bit width occupancy rate with the preset optimal range; Step S5: Based on the calculated signal period and signal amplitude, combined with the preset frequency range and amplitude threshold, determine whether the input signal is an AC signal or a DC signal through two-dimensional logic; Step S6: Based on the adjusted amplification factor and the determined signal type, perform power metering calculation on the subsequent sampled data.

5. The adaptive AC / DC wide-range energy metering method for ubiquitous metering according to claim 4, characterized in that, The sliding window extreme value discrimination method in step S2 further includes: setting the window length to 5 sampling points, traversing the sampling sequence; for each intermediate sampling point, determining whether it is the maximum or minimum value within the 5-point window; filtering all extreme points within the window, taking the point with the largest value as the global positive peak value, and the point with the smallest value as the global negative peak value, and recording their corresponding position index.

6. The adaptive AC / DC wide-range energy metering method for ubiquitous metering according to claim 4, characterized in that, Step S4 further includes: taking the absolute values ​​of the global maximum and minimum values ​​respectively, and calculating their effective bit width by counting leading zeros; taking the maximum effective bit width of the two to calculate the bit width occupancy rate; if the bit width occupancy rate is lower than the first hysteresis threshold and the current gain is less than the maximum gain, then increasing the amplification factor; if the bit width occupancy rate is higher than the second hysteresis threshold and the current gain is greater than the minimum gain, then decreasing the amplification factor; repeating this process until the bit width occupancy rate stabilizes within the preset optimal range.

7. The adaptive AC / DC wide-range energy metering method for ubiquitous metering according to claim 4, characterized in that, The dual-dimensional logic determination in step S5 further includes: if the frequency corresponding to the signal period is not within the preset AC frequency range and the signal amplitude is less than the preset amplitude threshold, then it is determined to be a DC signal; otherwise, it is determined to be an AC signal.

8. The adaptive AC / DC wide-range energy metering method for ubiquitous metering according to claim 4, characterized in that, The power metering calculation in step S6 further includes: binding the sampled data of the analog-to-digital converter with the current programmable gain amplifier multiple identifier; normalizing the sampled data according to the multiple identifier to restore the true signal amplitude; calculating the effective voltage value and effective current value according to the normalized data; and selecting the corresponding DC or AC power calculation logic according to the identification result of step S5 to calculate the active power, reactive power and apparent power.

9. The adaptive AC / DC wide-range energy metering method for ubiquitous metering according to claim 8, characterized in that, When the signal is determined to be a DC signal, the power calculation logic further includes: calculating the average value of the normalized voltage and current within a single cycle; and using the product of the average voltage and the average current as the DC active power.

10. The adaptive AC / DC wide-range energy metering method for ubiquitous metering according to claim 8, characterized in that, When the signal is determined to be an AC signal, the power calculation logic further includes: calculating the apparent power by multiplying the effective voltage value and the effective current value; calculating the active power by averaging the instantaneous power over the period; and deriving and calculating the reactive power based on the apparent power and active power using the power triangle relationship.

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