Configurable high-precision voltage-controlled oscillator for sensing signal system

Abstract

The embodiment of the invention provides a configurable high-precision voltage-controlled oscillator for a sensing signal system. The circuit is applied to the field of integrated circuit design and comprises a first adjusting circuit and a second adjusting circuit, and the first adjusting circuit and the second adjusting circuit respectively comprise a pulse generation unit, an amplifier unit, a pulse shaping unit, a superposition unit and a feedback unit. The pulse generation unit is used for generating a corresponding pulse signal according to an external control code; the amplifier unit is used for generating a threshold voltage according to the feedback voltage and an external control code and inputting the generated threshold voltage into the pulse shaping unit; the pulse shaping unit is used for shaping the pulse signal generated by the pulse generating unit according to the input threshold voltage and outputting an adjusting pulse signal; and the superposition unit is used for carrying out superposition operation on the adjustment pulse signal output by the pulse shaping unit and a periodic clock, and outputting an adjusted periodic clock signal. The voltage-controlled oscillator improves the precision of the output clock signal.

Description

Technical Field

[0001] This application relates to the field of integrated circuit design, and more particularly to a configurable high-precision voltage-controlled oscillator for a sensing signal system. Background Technology

[0002] Clock signals are often required in communication and control systems. Existing clock signal generation methods mainly include phase-locked clock circuits and voltage-controlled oscillator circuits.

[0003] Phase-locked loop (PLL) clock circuits cannot generate clock signals directly; instead, they require multiplication and division of an external reference clock to obtain the desired frequency. Therefore, PLL clock circuits require a clock source from the system, and the quality of their output clock signal is significantly affected by the quality of the input reference clock.

[0004] A voltage-controlled oscillator (VCO) circuit is a clock circuit that changes the frequency of its output signal by controlling the voltage. It consists of crystal oscillators, RC oscillators, and LC oscillators. VCOs do not require an external clock source, but existing VCOs have limited output clock accuracy, making it difficult to meet the needs of the sensing field for high-precision acquisition, amplification, computation, and processing of minute signals. Summary of the Invention

[0005] This application provides a configurable high-precision voltage-controlled oscillator (VCO) for a sensing signal system, to solve the problem of insufficient accuracy of the output clock signal in existing VCOs. The configurable high-precision VCO for a sensing signal system includes: a first adjustment circuit and a second adjustment circuit, wherein the first and second adjustment circuits respectively include: a pulse generation unit, an amplifier unit, a pulse shaping unit, a superposition unit, and a feedback unit.

[0006] The pulse generation unit is used to generate corresponding pulse signals according to external control codes;

[0007] The amplifier unit is used to generate a threshold voltage based on the feedback voltage and the external control code, and input the generated threshold voltage into the pulse shaping unit.

[0008] The pulse shaping unit is used to shape the pulse signal generated by the configurable pulse generation unit according to the input threshold voltage and output an adjustment pulse signal.

[0009] The superposition unit is used to superimpose the adjustment pulse signal output by the pulse shaping unit with the periodic clock to output the adjusted periodic clock signal.

[0010] Optionally, the pulse generation unit includes: a first external control terminal, a second external control terminal, a first capacitor to a third capacitor, a first resistor, and a first charge / discharge switch to a seventh charge / discharge switch; wherein, the first external control terminal is connected to the fourth charge / discharge switch, the fourth charge / discharge switch is connected to one end of the second capacitor, the second external control terminal is connected to the fifth charge / discharge switch, and the fifth charge / discharge switch is connected to one end of the third capacitor.

[0011] Optionally, the pulse shaping unit includes: a comparator, the first input terminal of which is used to receive a pulse signal generated by the pulse generation unit, the second input terminal of which is used to receive a threshold voltage generated by the amplifier unit, and the output terminal of which is connected to the superposition unit.

[0012] Optionally, the amplifier unit includes: a third external control terminal to an eighth external control terminal, a feedback voltage input terminal, a power supply voltage input terminal, and a threshold voltage output terminal.

[0013] Optionally, the superposition unit includes an AND gate, wherein the output terminal of the AND gate of the first adjustment circuit is connected to the first input terminal of the AND gate of the second adjustment circuit, and the output terminal of the AND gate of the second adjustment circuit is connected to the first input terminal of the AND gate of the first adjustment circuit.

[0014] Optionally, the feedback unit includes a first inverter and a second inverter, which are connected in series, and the output of the second inverter is connected to the pulse generation unit.

[0015] Optionally, the amplifier unit further includes: a first MOS transistor to a sixteenth MOS transistor, wherein the source of the first MOS transistor and the source of the second MOS transistor are connected to the power supply voltage; the gate and drain of the first MOS transistor are connected; the drain of the first MOS transistor and the drain of the third MOS transistor are connected; the gate and drain of the second MOS transistor are connected; the drain of the second MOS transistor and the drain of the fourth MOS transistor are connected; the gate of the third MOS transistor is connected to a reference voltage; the gate of the fourth MOS transistor is connected to an input signal; the sources of the third and fourth MOS transistors are connected to the drain of the fifth MOS transistor; the source of the fifth MOS transistor is grounded; the gate of the fifth MOS transistor is connected to a first bias signal; the source of the sixth MOS transistor is connected to the power supply voltage; the gate of the sixth MOS transistor is connected to a second bias signal; the drain of the sixth MOS transistor is connected to the source of the seventh MOS transistor and the source of the eighth MOS transistor; the gate of the seventh MOS transistor is connected to a reference voltage; the gate of the eighth MOS transistor is connected to an input signal; the drain of the seventh MOS transistor and the drain of the ninth MOS transistor are connected to form a diode. The MOSFETs connected in series act as small resistors. The drains of the eighth and tenth MOSFETs are connected, and the drain and gate of the tenth MOSFET are connected in series. The sources of the ninth MOSFET (M9) and the tenth MOSFET (M10) are grounded. The gate of the thirteenth MOSFET is connected to the third bias signal, the gate of the fourteenth MOSFET is connected to the fourth bias signal, the source of the eleventh MOSFET is connected to the power supply voltage, the gate of the eleventh MOSFET is connected to the drain of the second MOSFET, and the drain of the eleventh MOSFET is connected to the drain of the fifteenth MOSFET. The source of the twelfth MOSFET is connected to the power supply voltage. The gate of the twelfth MOSFET is connected to the drain of the first MOSFET. The drain of the twelfth MOSFET is connected to the drain of the thirteenth MOSFET. The source of the thirteenth MOSFET is connected to the source of the fourteenth MOSFET. The drain of the fourteenth MOSFET is connected to the drain of the sixteenth MOSFET. The gate of the fifteenth MOSFET is connected to the drain of the tenth MOSFET. The source of the fifteenth MOSFET is grounded. The gate of the sixteenth MOSFET is connected to the drain of the ninth MOSFET. The source of the sixteenth MOSFET is grounded.

[0016] This application provides a configurable high-precision voltage-controlled oscillator (VCO) for a sensing signal system, comprising: a first adjustment circuit and a second adjustment circuit. The first and second adjustment circuits respectively include: a pulse generation unit, an amplifier unit, a pulse shaping unit, a superposition unit, and a feedback unit. The pulse generation unit generates a corresponding pulse signal based on an external control code. The amplifier unit generates a threshold voltage based on a feedback voltage and the external control code, and inputs the generated threshold voltage to the pulse shaping unit. The pulse shaping unit shapes the pulse signal generated by the configurable pulse generation unit based on the input threshold voltage, and outputs an adjusted pulse signal. The superposition unit superimposes the adjusted pulse signal output by the pulse shaping unit with a periodic clock signal, and outputs an adjusted periodic clock signal. This VCO improves the accuracy of the output clock signal. Attached Figure Description

[0017] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this application and, together with the description, serve to explain the principles of this application.

[0018] Figure 1 A schematic diagram of the circuit structure of a configurable high-precision voltage-controlled oscillator for a sensing signal system provided in an embodiment of this application;

[0019] Figure 2 A schematic diagram of the circuit structure of a configurable amplifier unit provided in an embodiment of this application.

[0020] The accompanying drawings illustrate specific embodiments of this application, which will be described in more detail below. These drawings and descriptions are not intended to limit the scope of the concept in any way, but rather to illustrate the concept of this application to those skilled in the art through reference to particular embodiments. Detailed Implementation

[0021] To make the objectives, technical solutions, and advantages of this application clearer, the technical solutions of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0022] The terms "first," "second," "third," "fourth," etc. (if present) in the specification, claims, and accompanying drawings of this invention are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that embodiments of the invention described herein can be implemented in orders other than those illustrated or described herein.

[0023] In this application, the terms "exemplary" or "for example" are used to indicate examples, illustrations, or descriptions. Any embodiment or design described as "exemplary" or "for example" in this application should not be construed as being more preferred or advantageous than other embodiments or designs. Specifically, the use of terms such as "exemplary" or "for example" is intended to present the relevant concepts in a specific manner.

[0024] The technical solution of this application and how the technical solution of this application solves the above-mentioned technical problems are described in detail below with specific embodiments. These specific embodiments can be combined with each other, and the same or similar concepts or processes may not be described again in some embodiments. The embodiments of this application will be described below with reference to the accompanying drawings.

[0025] Figure 1 This is a schematic diagram of the circuit structure of a configurable high-precision voltage-controlled oscillator for a sensing signal system provided in an embodiment of this application. Figure 1 As shown, the configurable high-precision voltage-controlled oscillator for a sensing signal system provided in this embodiment includes: a first adjustment circuit 5 and a second adjustment circuit 6. The first adjustment circuit 5 and the second adjustment circuit 6 respectively include: a pulse generation unit 1, an amplifier unit 2, a pulse shaping unit 3, a superposition unit 4, and a feedback unit.

[0026] Specifically, the pulse generation unit 1 includes: a first external control terminal, a second external control terminal, a first capacitor C1 to a third capacitor C3, a first resistor R1, and a first charge / discharge switch M1 to a seventh charge / discharge switch M7; wherein, the first external control terminal is connected to a fourth charge / discharge switch M4, the fourth charge / discharge switch M4 is connected to one end of the second capacitor C2, the second external control terminal is connected to a fifth charge / discharge switch M5, and the fifth charge / discharge switch M5 is connected to one end of the third capacitor C3; the pulse generation unit 1 configures the capacitance value in the RC oscillator through the external control signal ADJ1 of the first external control terminal and the external control signal ADJ2 of the second external control terminal, adjusting the pulse charge / discharge time to achieve the purpose of controlling the pulse width and period. The correspondence between the external control signals ADJ1 and ADJ2 and the configured capacitor values ​​is shown in Table 1.

[0027] Table 1. Correspondence between control signals and capacitors for configurable high-precision voltage-controlled oscillator circuits.

[0028]

[0029] Amplifier unit 2 includes: a third to an eighth external control terminal, a feedback voltage input terminal VB1, a power supply voltage input terminal AVDD, and a threshold voltage output terminal VB2. Amplifier unit 2 configures the resistor network using external control signals ADJ3 to ADJ8 from the third to the eighth external control terminals to form different reference voltages VREF. This amplifier unit 2 forms the threshold voltage VB2 based on the feedback detection voltage VB1. The threshold voltage VB2 is used by pulse shaping unit 3 to shape the clock signal, transforming the pulse signal generated by pulse generation unit 1 into clock signals of different frequencies according to different thresholds. Amplifier unit 2 also includes a resistor divider network and an amplifier.

[0030] The pulse shaping unit 3 is used to shape the clock adjustment signal generated by the pulse generation unit 1; based on the threshold voltage VB2 generated by the amplifier unit 2, it compares and shapes the pulse signal generated by the pulse generation unit 1, and outputs the shaped adjustment pulse signal. The pulse shaping unit 3 includes a comparator A1, whose first input terminal receives the pulse signal generated by the pulse generation unit, and whose second input terminal receives the threshold voltage VB2 generated by the amplifier unit 2. The output terminal of the comparator A1 is connected to the superposition unit 4.

[0031] The superposition unit 4 is used to adjust the clock; by superimposing the adjustment pulse signal generated by the pulse shaping unit 3 with the periodic clock, a configurable and precise periodic clock signal after adjustment time is output; the superposition unit includes a logic AND gate, wherein the output terminal of the logic AND gate of the first adjustment circuit is connected to the first input terminal of the logic AND gate of the second adjustment circuit, and the output terminal of the logic AND gate of the second adjustment circuit is connected to the first input terminal of the logic AND gate of the first adjustment circuit.

[0032] The feedback unit includes a first inverter and a second inverter, which are connected in series. The connection order of the inverters is swapped to select the period time controlled by the regulating circuit. The output of the second inverter is connected to the pulse generation unit to realize the feedback function.

[0033] Understandably, the configurable high-precision voltage-controlled oscillator proposed in this application divides the clock cycle into a first half-cycle and a second half-cycle. Corresponding adjustment circuits are used to adjust the first and second half-cycles respectively. The first adjustment circuit 5 adjusts the first half-cycle, and the second adjustment circuit 6 adjusts the second half-cycle. The pulse generation unit 1, amplifier unit 2, pulse shaping unit 3, and superposition unit 4 of both the first and second adjustment circuits use the same circuit structure. The feedback units of the first and second adjustment circuits differ in their circuit connections, used to select the cycle time. In the first and second adjustment circuits, a periodic pulse is formed by charging and discharging a resistor and a configurable capacitor. The threshold generated by the amplifier unit 2 is compared, and a configurable adjustment pulse signal is formed by the pulse shaping unit 3. The superposition unit 4 then adjusts the time of the first and second half-cycles of the periodic signal, achieving high-precision control of the output clock cycle of the voltage-controlled oscillator.

[0034] Figure 2 This is a schematic diagram of the circuit structure of amplifier unit 2 provided in the embodiments of this application, as shown below. Figure 2 As shown, amplifier unit 2 mainly consists of two parts: input section 7 and amplification output section 8. By encoding and adjusting the threshold voltage VB2 using external control signals ADJ3~ADJ8, configurable high-precision control of the voltage-controlled oscillator (VCO) can be achieved. Input section 7 includes a reference voltage terminal VREF, input signal port P, input biases PVB0, PVB1, PVR1, NVR, and control signal ENP. When control signal ENP is high, MOSFET M0 is in the on state, and the reference voltage VREF is generated by the power supply AVDD through a voltage divider between resistors R0 and R1. By configuring the external control signals ADJ3~ADJ8, the value of resistor R0 is changed, thereby configuring the reference voltage VREF. The correspondence between external control signals ADJ3~ADJ8 and the variable resistor R0 is shown in Table 2.

[0035] Table 2. Correspondence between Configurable Amplifier Control Signals and Variable Resistor R0

[0036]

[0037] Specifically, in the input section 7 of amplifier unit 2, the source of the first MOSFET M1 and the source of the second MOSFET M2 are connected to the power supply voltage AVDD. The gate and drain of the first MOSFET M1 are connected to form a diode-connected MOSFET, providing low resistance. The drain of the first MOSFET M1 is connected to the drain of the third MOSFET M3. The gate and drain of the second MOSFET M2 are connected to form a diode-connected MOSFET, providing low resistance. The drain of the second MOSFET M2 is connected to the drain of the fourth MOSFET M4. The gate of the third MOSFET M3 is connected to the reference voltage VREF. The gate of the fourth MOSFET M4 is connected to the input signal P. The sources of the third MOSFET M3 and the fourth MOSFET M4 are connected to the drain of the fifth MOSFET M5. The source of the fifth MOSFET M5 is grounded. The gate of the fifth MOSFET M5 is connected to the first bias signal PVB1. The sixth MOSFET M... The source of MOSFET M6 is connected to the power supply voltage AVDD. The gate of MOSFET M6 is connected to the second bias signal PVB0. The drain of MOSFET M6 is connected to the source of MOSFET M7 and the source of MOSFET M8. The gate of MOSFET M7 is connected to the reference voltage. The gate of MOSFET M8 is connected to the input signal P. The drain of MOSFET M7 is connected to the drain of MOSFET M9. The drain and gate of MOSFET M9 form a diode-connected MOSFET, which provides low resistance. The drain of MOSFET M8 is connected to the drain of MOSFET M10. The drain and gate of MOSFET M10 form a diode-connected MOSFET, which provides low resistance. The source of MOSFET M9 and the source of MOSFET M10 are grounded to form a symmetrical input signal structure, which completes the reception and transmission of the input signal.In the amplification output section 8 of amplifier unit 2, the gate of the thirteenth MOSFET M13 is connected to the third bias signal PVR1, the gate of the fourteenth MOSFET M14 is connected to the fourth bias signal NVR, the source of the eleventh MOSFET M11 is connected to the power supply voltage, the gate of the eleventh MOSFET M11 is connected to the drain of the second MOSFET M2, the drain of the eleventh MOSFET M11 is connected to the drain of the fifteenth MOSFET M15, the source of the twelfth MOSFET M12 is connected to the power supply voltage, the gate of the twelfth MOSFET M12 is connected to the drain of the first MOSFET M1, and the drain of the twelfth MOSFET M12 is connected to the thirteenth MOSFET M13. The drain of MOSFET M13, the source of MOSFET M13, and the source of MOSFET M14 are connected, and this connection point serves as the output terminal VO of amplification output section 2. The drain of MOSFET M14 is connected to the drain of MOSFET M16. The gate of MOSFET M15 is connected to the drain of MOSFET M10 to amplify the output signal of input section 1. The source of MOSFET M15 is grounded. The gate of MOSFET M16 is connected to the drain of MOSFET M9 to amplify the output signal of input section 1. The source of MOSFET M16 is grounded.

[0038] The configurable high-precision voltage-controlled oscillator (VCO) for sensing signal systems proposed in this application innovatively divides the clock into two half-cycles for precise encoding and adjustment. It adopts an externally configurable pulse width adjustment method, that is, the period of the adjustment pulse is set by external encoders ADJ1 and ADJ2, and the threshold of pulse shaping is set by ADJ3~ADJ8. This achieves high-precision control of the VCO clock cycle, which not only meets the high-precision requirements of the sensing field, but also allows for clock precision configuration according to different system requirements, providing a more flexible and groundbreaking solution for the sensing signal field.

[0039] Other embodiments of this application will readily occur to those skilled in the art upon consideration of the specification and practice of the invention disclosed herein. This application is intended to cover any variations, uses, or adaptations of this application that follow the general principles of this application and include common knowledge or customary techniques in the art not disclosed herein. The specification and examples are to be considered exemplary only, and the true scope and spirit of this application are indicated by the following claims.

[0040] It should be understood that this application is not limited to the precise structure described above and shown in the accompanying drawings, and various modifications and changes can be made without departing from its scope. The scope of this application is limited only by the appended claims.

Claims

1. A configurable high-precision voltage-controlled oscillator for a sensing signal system, characterized in that, include: The first adjustment circuit and the second adjustment circuit each include: a pulse generation unit, an amplifier unit, a pulse shaping unit, a superposition unit, and a feedback unit. The pulse generation unit is used to generate corresponding pulse signals according to external control codes; The amplifier unit is used to generate a threshold voltage based on the feedback voltage and the external control code, and input the generated threshold voltage into the pulse shaping unit. The pulse shaping unit is used to shape the pulse signal generated by the pulse generating unit according to the input threshold voltage and output an adjustment pulse signal. The superposition unit is used to superimpose the adjustment pulse signal output by the pulse shaping unit with the periodic clock to output the adjusted periodic clock signal.

2. The method according to claim 1, characterized in that, The pulse generation unit includes: a first external control terminal, a second external control terminal, a first capacitor to a third capacitor, a first resistor, and a first charge / discharge switch to a seventh charge / discharge switch; wherein, the first external control terminal is connected to the fourth charge / discharge switch, the fourth charge / discharge switch is connected to one end of the second capacitor, the second external control terminal is connected to the fifth charge / discharge switch, and the fifth charge / discharge switch is connected to one end of the third capacitor.

3. The method according to claim 1, characterized in that, The pulse shaping unit includes a comparator, the first input of which is used to receive a pulse signal generated by the pulse generation unit, the second input of which is used to receive a threshold voltage generated by the amplifier unit, and the output of which is connected to the superposition unit.

4. The method according to claim 1, characterized in that, The amplifier unit includes: a third external control terminal to an eighth external control terminal, a feedback voltage input terminal, a power supply voltage input terminal, and a threshold voltage output terminal.

5. The method according to claim 1, characterized in that, The superposition unit includes a logic AND gate, the output terminal of the logic AND gate of the first adjustment circuit is connected to the first input terminal of the logic AND gate of the second adjustment circuit, and the output terminal of the logic AND gate of the second adjustment circuit is connected to the first input terminal of the logic AND gate of the first adjustment circuit.

6. The method according to claim 1, characterized in that, The feedback unit includes a first inverter and a second inverter, which are connected in series, and the output of the second inverter is connected to the pulse generation unit.

7. The method according to claim 1, characterized in that, The amplifier unit further includes: a first MOSFET to a sixteenth MOSFET, wherein the source of the first MOSFET and the source of the second MOSFET are connected to the power supply voltage; the gate and drain of the first MOSFET are connected; the drain of the first MOSFET and the drain of the third MOSFET are connected; the gate and drain of the second MOSFET are connected; the drain of the second MOSFET and the drain of the fourth MOSFET are connected; the gate of the third MOSFET is connected to a reference voltage; the gate of the fourth MOSFET is connected to an input signal; the sources of the third and fourth MOSFETs are connected to the drain of the fifth MOSFET; the source of the fifth MOSFET is grounded; the gate of the fifth MOSFET is connected to a first bias signal; the source of the sixth MOSFET is connected to the power supply voltage; the gate of the sixth MOSFET is connected to a second bias signal; the drain of the sixth MOSFET is connected to the source of the seventh MOSFET and the source of the eighth MOSFET; the gate of the seventh MOSFET is connected to a reference voltage; the gate of the eighth MOSFET is connected to an input signal; the drain of the seventh MOSFET and the drain of the ninth MOSFET are connected to form a diode connection. The connected MOSFETs act as small resistors. The drains of the eighth and tenth MOSFETs are connected, and the drain and gate of the tenth MOSFET are connected in a MOSFET configuration. The sources of the ninth MOSFET (M9) and the tenth MOSFET (M10) are grounded. The gate of the thirteenth MOSFET is connected to the third bias signal, the gate of the fourteenth MOSFET is connected to the fourth bias signal, the source of the eleventh MOSFET is connected to the power supply voltage, the gate of the eleventh MOSFET is connected to the drain of the second MOSFET, and the drain of the eleventh MOSFET is connected to the drain of the fifteenth MOSFET. The source of the twelfth MOSFET is connected to the power supply voltage. The gate of the twelfth MOSFET is connected to the drain of the first MOSFET. The drain of the twelfth MOSFET is connected to the drain of the thirteenth MOSFET. The source of the thirteenth MOSFET is connected to the source of the fourteenth MOSFET. The drain of the fourteenth MOSFET is connected to the drain of the sixteenth MOSFET. The gate of the fifteenth MOSFET is connected to the drain of the tenth MOSFET. The source of the fifteenth MOSFET is grounded. The gate of the sixteenth MOSFET is connected to the drain of the ninth MOSFET. The source of the sixteenth MOSFET is grounded.

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