High-heat-dissipation substrate and processing method thereof

Abstract

The invention discloses a high-heat-dissipation substrate and a processing method thereof. According to the processing method, a circuit pattern A of an operation board is provided with a heat dissipation block; a copper foil adding layer A is arranged on the working plate in a laminated mode, an opening is formed in the surface of the copper foil adding layer A through laser, and a caulking groove with the heat dissipation block as the groove bottom is formed; a seed layer is deposited on the whole plate, the seed layer is covered with an anti-plating photosensitive dry film with a notch, and the notch completely falls into the caulking groove; performing hole filling and electroplating on the notch to obtain a copper column A; filling and electroplating the gap between the copper column A and the inner wall of the caulking groove to form a copper column B filling the gap, and obtaining a heat dissipation structure prototype composed of the copper column B, the copper column A and the seed layer adjacent to the copper column B and the copper column A; electroplating the whole board to obtain a heat dissipation structure A and a copper foil adding layer B which are connected in a flush manner; and performing circuit manufacturing on the copper foil adding layer B to obtain a circuit pattern B which is electrically connected with the circuit pattern A through the heat dissipation structure A. The processing method is reasonable, simple and easy to operate and implement, the obtained substrate is high in reliability and good in heat dissipation effect, and the high-density packaging requirement is met.

Description

Technical Field

[0001] This invention relates to the field of PCB technology, and in particular to a high heat dissipation substrate and its processing method. Background Technology

[0002] Integrated circuits are gradually developing towards high integration, high density, high heat dissipation, and low power consumption. For high heat dissipation functional modules in organic substrates, the current main approach is to increase the volume of copper to improve heat dissipation, that is, to achieve heat dissipation by setting thermal bars or thermal squares between the metal layers.

[0003] The manufacturing process for the aforementioned heat dissipation metal strips / blocks currently mainly employs the following processing methods: The first processing method is to use the Via Post process (an advanced packaging process that combines copper pillar technology with coreless substrate design) to produce large-area heat dissipation metal strips / blocks.

[0004] However, because the core process of the Via Post process is: "seed layer fabrication → dry film coating → pattern electroplating → secondary dry film coating → electroplating of heat dissipation metal strips / blocks → film removal → flash etching → lamination → grinding", the Via Post process has problems such as incomplete film removal and a high risk of CAF failure, which poses a significant threat to the quality of the substrate.

[0005] The second processing method: After the insulation layer is made, the heat dissipation metal strip / block is made by "opening the hole first and then electroplating copper".

[0006] However, the width of the opening is limited by the electroplating process, making it impossible to create a large opening. A large opening would cause poor plating of the copper layer, thus limiting the heat dissipation of the substrate.

[0007] In view of this, the present invention is hereby proposed. Summary of the Invention

[0008] To overcome the above-mentioned defects, the present invention provides a high heat dissipation substrate and its processing method. The processing method is reasonable, the process flow is simple, and it is easy to operate and implement. Moreover, the resulting substrate has high reliability and good heat dissipation effect, which well meets the requirements of high-density packaging.

[0009] The technical solution adopted by this invention to solve its technical problem is: a method for processing a high heat dissipation substrate, comprising the following processing steps: S1: Provide a working board with a circuit pattern A on its surface, wherein the circuit pattern A is provided with a heat dissipation block that serves to conduct and dissipate heat; S2: An insulating layer and a copper foil layer A are laminated on the surface of the working board, and then a groove is laser-cut to process a groove that opens on the surface of the copper foil layer A and has at least a portion of the heat sink as the bottom of the groove. S3: A seed layer is deposited on the entire board, and a photosensitive dry film with notches is coated on the seed layer through a dry film pattern transfer process, while the notches completely fall within the range of the groove; S4: Fill the gap with electroplating to obtain copper pillar A; then remove the film; S5: Electroplating is performed to fill the gap between the copper pillar A and the inner wall of the groove to form a copper pillar B that fills the gap, thereby obtaining a heat dissipation structure prototype composed of the copper pillar B, the copper pillar A and the seed layer adjacent to both; then, the entire board is electroplated to simultaneously thicken the heat dissipation structure prototype and the copper foil layer A, resulting in a flush-connected heat dissipation structure A and copper foil layer B; S6: The copper foil layer B is fabricated to obtain circuit pattern B; and the circuit pattern B is electrically connected to the circuit pattern A through the heat dissipation structure A.

[0010] As a further improvement of the present invention, in S3 above, the distance between the inner wall of the notch and the inner wall of the groove is 60 to 120 μm, and at the same time, the distance between the center of the notch and the inner wall of the groove is not less than 140 μm.

[0011] As a further improvement of the present invention, in S3 above, at least one of PVD process, CVD process and flash plating process is used to process the seed layer with a thickness of 2.5 to 6 μm.

[0012] As a further improvement of the present invention, in S4 above, the copper pillar A obtained by the hole-filling electroplating is higher than the surface of the copper foil layer A, and the height difference between the two is controlled within ±7μm. After removing the photosensitive dry film, the copper pillar A is also dimensionally corrected so that the height difference between the surface of the copper pillar A and the surface of the copper foil extension A is controlled within 3 μm.

[0013] As a further improvement of the present invention, in S4 and S5 above, the processing parameters for the hole-filling electroplating are as follows: the concentration of monovalent chloride ions in the electroplating solution is 30-50 ppm, the concentration of divalent copper ions is 10-13 g / L, the concentration of sulfuric acid is 195-220 g / L, the temperature of the electroplating solution is 22-25°C, the cathode current density is 5-10 ASD, and the electroplating efficiency is 2-3 μm / min.

[0014] As a further improvement of the present invention, in S5 above, the processing parameters for the whole plate electroplating are as follows: the concentration of monovalent chloride ions in the electroplating solution is 30-50 ppm, the concentration of divalent copper ions is 10-13 g / L, the concentration of sulfuric acid is 195-220 g / L, the temperature of the electroplating solution is 22-25°C, the cathode current density is not greater than 1.2 ASD, and the electroplating efficiency decreases in a stepwise manner from top to bottom, so that the copper thickness uniformity of the heat dissipation structure A and the copper foil enhancement layer B is controlled within ±3 μm.

[0015] As a further improvement of the present invention, in S2 above, a CO2 laser is used to laser burn the groove, and the processing parameters of the CO2 laser are: laser energy of 2 to 6 mJ, pulse width of 4 to 6 μs, and number of laser shots of 1 to 5.

[0016] As a further improvement of the present invention, in S6 above, the copper foil layer B is fabricated using any one of the subtractive process, MSAP process and SAP process.

[0017] As a further improvement to the present invention, it also includes: S7: Determine the nature of the circuit pattern B. If the circuit pattern B is an inner layer circuit, proceed to S8 to S9 below; if the circuit pattern B is an outer layer circuit, proceed to S9 below. S8: At least one circuit layer A is stacked above the layer where the circuit pattern B is located, wherein the outermost circuit layer A is the outer circuit layer, the circuit pattern B and its adjacent circuit layer A are electrically connected through a heat dissipation structure B, and / or any two adjacent circuit layers A are electrically connected through a heat dissipation structure C, and the processing method of the heat dissipation structure B and / or the heat dissipation structure C is the same as the processing method of the heat dissipation structure A; S9: Perform conventional outer layer solder mask, surface treatment, molding, finished product electrical testing, and finished product inspection processes in sequence to obtain a high heat dissipation substrate.

[0018] The present invention also provides a high heat dissipation substrate, which is manufactured using the high heat dissipation substrate processing method described in the present invention.

[0019] The beneficial effects of this invention are as follows: Compared with the prior art, the high heat dissipation substrate processing method provided by this invention has the following advantages: ① This invention, through process innovation, adopts a step-by-step electroplating method to manufacture the heat dissipation structure A, that is: the groove is filled / plated through two rapid electroplating processes, and then the heat dissipation structure prototype is thickened through whole-board electroplating; this can significantly reduce the degree of depression on the surface of the obtained heat dissipation structure A, ensure and improve the copper thickness uniformity of the obtained heat dissipation structure A, and well meet the stringent requirements of high-density packaging for substrate flatness. In addition, during whole-board electroplating, this invention simultaneously thickens the heat dissipation structure prototype and the copper foil layer A, which can significantly improve the flatness between the heat dissipation structure A and the copper foil layer B8, further improving the flatness of the substrate product. ② This invention, through process innovation, effectively avoids many problems that occur in the existing heat dissipation metal strip / block manufacturing process, resulting in high reliability and good heat dissipation effect of the substrate product, which well meets the requirements of high-density packaging. ③ The high heat dissipation substrate processing method provided by this invention is reasonable, the process flow is simple, and it is easy to operate and implement. Attached Figure Description

[0020] Figure 1 This is a flowchart of the processing method for the high heat dissipation substrate described in Embodiment 1 of the present invention; Figure 2 This is a cross-sectional view of the work board described in Example 1; Figure 3 This is a schematic cross-sectional view of the intermediate plate A obtained in Example 1; Figure 4 This is a schematic diagram of the cross-sectional structure after the groove is machined on the obtained intermediate plate A in Example 1; Figure 5 This is a schematic cross-sectional view of the intermediate plate B obtained in Example 1; Figure 6 This is a schematic cross-sectional view of the intermediate plate B after a notched photosensitive dry film is applied to it in Example 1. Figure 7 This is a schematic diagram of the cross-sectional structure after the copper column A is machined into the notch in Example 1; Figure 8 This is a schematic cross-sectional view of the intermediate plate C obtained in Example 1; Figure 9 This is a schematic diagram of the cross-sectional structure of the intermediate plate C obtained in Example 1 after dimensional correction; Figure 10 This is a schematic cross-sectional view of the heat dissipation structure A and the copper foil layer B obtained in Example 1. Figure 11 This is a schematic cross-sectional view of the copper foil layer B obtained in Example 1 after circuit fabrication. Figure 12This is a partial cross-sectional view of the high heat dissipation substrate obtained in Example 1.

[0021] Referring to the accompanying drawings, the following explanations are provided: 1. Working board; 10. Heat sink; 11. Base layer; 20. Insulation layer; 21. Copper foil layer A; 3. Embedded groove; 4. Seed layer; 5. Anti-plating photosensitive dry film; 50. Notch; 6. Copper pillar A; 7. Copper pillar B; 8. Copper foil layer B; 80. Circuit pattern B; 9. Outer circuit. Detailed Implementation

[0022] The preferred embodiments of the present invention will be described in detail below with reference to the accompanying drawings.

[0023] Example 1:

[0024] Please see the appendix Figure 1 To be continued Figure 12 As shown, this embodiment 1 provides a method for processing a high heat dissipation substrate, including the following processing steps: S1: Provide work board 1.

[0025] Regarding the aforementioned work board 1, its implementation structure is determined based on the design requirements of the substrate product, and this application does not impose any limiting requirements. However, in order to provide a clear and detailed description of the processing method of the high heat dissipation substrate provided in this application, this application provides an example to illustrate the implementation structure of the work board 1, as detailed below: Please see the appendix Figure 2 As shown, the working board 1 includes a base layer 11 and a circuit pattern A stacked on the surface of the base layer 11. The base layer 11 has multiple copper layers and multiple insulating layers stacked alternately in sequence, and the insulating layer can be, but is not limited to, a prepreg. The circuit pattern A is formed on the surface of the base layer 11 using circuit fabrication processes commonly used in the circuit board processing field (such as subtractive processing, MSAP process, or SAP process, etc.) (specifically, it is formed on the base layer 11 and located on an insulating layer on the outer side). The circuit pattern A has a heat sink 10 that serves to conduct and dissipate heat, providing a basis for subsequent processing steps.

[0026] It can be further understood that the working board 1 provided in this embodiment is essentially a board with an inner layer of circuitry (i.e., circuitry pattern A), on which heat sinks 10 are provided to conduct and dissipate heat.

[0027] S2: An insulating layer 20 and a copper foil layer A21 are sequentially stacked on the surface of the working board 1, and then laminated to obtain an integral intermediate board A. See the appendix for details. Figure 3As shown; then, a window is machined at a predetermined position on the copper foil layer A21, and a laser groove is formed on the intermediate plate A based on the obtained window to create a groove 3 that opens onto the surface of the copper foil layer A21 and has at least a portion of the heat sink 10 as its bottom. See the attached document for details. Figure 4 As shown.

[0028] Furthermore, the insulating enhancement layer 20 may be, but is not limited to, a prepreg or a pure adhesive film, and the thickness of the insulating enhancement layer 20 and the copper foil enhancement layer A21 are determined according to the design requirements of the substrate product (such as the substrate thickness requirements, the copper thickness requirements of the heat dissipation structure A, etc.), and this application does not impose any restrictions.

[0029] Furthermore, the above-mentioned lamination and pressing can preferably be carried out using an electric heating pressing method, and the preferred processing parameters during the lamination and pressing process are: heating rate of 3.5~4.5℃ / min, pressing temperature ≥220℃, and maximum pressing pressure ≥420Psi. Understandably, through the above-mentioned lamination and pressing, the resulting intermediate plate A can achieve high structural stability.

[0030] Furthermore, in this embodiment, an etching windowing process is used to process a window at a predetermined position on the copper foil extension layer A21. This etching windowing process includes: sequentially performing pre-coating treatment on the intermediate plate A (i.e., roughening, cleaning, and drying the intermediate plate A), applying a photosensitive resist film (i.e., applying the photosensitive resist dry film onto the copper foil extension layer A21 using a vacuum laminator), exposure (exposing a predetermined area of ​​the photosensitive resist dry film using an LDI exposure machine), development (removing unexposed areas of the photosensitive resist dry film using a developing solution), etching (etching away areas of the copper foil extension layer A21 exposed outside the photosensitive resist dry film using an alkaline etching solution), and stripping (removing the photosensitive resist dry film using a stripping solution) to obtain the window. It is understood that the projection of the window toward the heat sink 10 falls entirely on the heat sink 10.

[0031] Furthermore, based on the obtained window, this embodiment utilizes a CO2 laser to perform laser grooving to process a groove 3 that opens onto the surface of the copper foil extension layer A21 and has at least a portion of the heat sink 10 as its bottom. Moreover, this embodiment optimizes the processing parameters of the CO2 laser as follows: laser energy of 2–6 mJ, pulse width of 4–6 μs, number of laser shots of 1–5, mask size of 1.5–2 mm, spot diameter of 100 μm, and spot pitch of 50 μm; to achieve very high processing precision in the obtained groove 3, providing good technical support and guarantee for the subsequent fabrication of a high-precision heat sink structure A.

[0032] As can be seen from the above, this embodiment uses a combination of "etching windows and laser grooving" to create the groove 3. This method is not only simple and flexible, but also does not limit the size of the heat dissipation structure A obtained later. It effectively avoids the problem of "opening restricting the size of the copper block" that exists in the prior art.

[0033] In addition, after the groove 3 is formed, this embodiment also performs a degumming process on the groove 3 (specifically, plasma degumming or chemical degumming methods can be used, but are not limited to) and AOI optical inspection to ensure the deposition quality and forming quality of the subsequent seed layer.

[0034] S3: First, a seed layer 4 with a thickness of 2.5-6 μm is deposited on the entire intermediate plate A with the groove 3 to obtain the intermediate plate B. For details, please refer to the appendix. Figure 5 As shown; then, a photosensitive dry film 5 with a notch 50 is coated onto the seed layer 4 using a dry film pattern transfer process, while the notch 50 completely falls within the range of the groove 3; for details, please refer to the appendix. Figure 6 As shown.

[0035] Furthermore, in this S3, at least one of PVD, CVD, and flash plating processes can be used to process the seed layer 4. For example, a thin copper A with a thickness of 0.5 μm or 1 μm can be first produced by CVD process, and then a thin copper B with a thickness of 2 to 5 μm can be deposited on the thin copper A by flash plating process to obtain the seed layer 4; thereby obtaining the intermediate plate B.

[0036] Furthermore, in this S3, the above-mentioned dry film pattern transfer process includes: sequentially performing pre-coating treatment on the obtained intermediate plate B (i.e., roughening, cleaning and drying the intermediate plate B), coating with resist photosensitive dry film 5 (i.e., applying the resist photosensitive dry film 5 onto the seed layer 4 using a vacuum laminator), exposure (exposing a preset area of ​​the resist photosensitive dry film 5 using an LDI exposure machine), and development (removing the unexposed areas on the resist photosensitive dry film 5 using a developer) to obtain the notch 50 that completely falls into the groove 3.

[0037] Furthermore, according to the processing requirements of the substrate product, the notch 50 must meet the following design requirements: Please refer to the appendix. Figure 6 As shown, the distance W1 between the inner wall of the notch 50 and the inner wall of the groove 3 is controlled to be 60-120μm, and at the same time, the distance W2 between the center of the notch 50 (located on the center line L0 of the notch 50) and the inner wall of the groove 3 is controlled to be not less than 140μm.

[0038] Based on the design dimensions of the notch 50, this embodiment adopts a "step-by-step electroplating method" to fill / plate the groove 3. That is, this embodiment adopts a "step-by-step electroplating method" to create the heat dissipation structure A. The beneficial effects of adopting the step-by-step electroplating method are detailed below.

[0039] S4: First, perform hole-filling electroplating on the notch 50 to obtain copper pillar A6. Please refer to the appendix. Figure 7 As shown, the copper pillar A6 is higher than the surface of the copper foil reinforcement layer A21, and the height difference between the two is controlled within ±7μm; then, the photosensitive dry film 5 is removed using an alkaline stripping solution or an organic stripping solution (i.e., the stripping process) to obtain the intermediate board C. For details, please refer to the appendix. Figure 8 As shown. Understandably, after the anti-plating photosensitive dry film 5 is removed, a gap G is formed between the copper pillar A6 and the inner wall of the groove 3.

[0040] Furthermore, in this S4, the preferred processing parameters for the hole-filling electroplating are: a monovalent chloride ion concentration of 30–50 ppm, a divalent copper ion concentration of 10–13 g / L, a sulfuric acid concentration of 195–220 g / L, a plating solution temperature of 22–25°C, a cathode current density of 5–10 ASD, and an electroplating efficiency of 2–3 μm / min. It is understood that this S4 employs a relatively high cathode current density to rapidly fill the gap 50 to obtain the copper pillar A6, effectively overcoming the problem of long cycles in traditional low-current electroplating and significantly improving electroplating efficiency / production efficiency.

[0041] Furthermore, after removing the photosensitive dry film 5, this embodiment also corrects the dimensions of the copper pillar A6 by mechanical polishing (such as polishing with a ceramic brush wheel) to control the height difference between the surface of the copper pillar A6 and the surface of the copper foil extension layer A21 to within 3 μm. Further details can be found in the appendix. Figure 9 As shown, after the copper pillar A6 is dimensionally corrected, the seed layer 4 on the surface of the copper foil layer A21 is ground off, leaving only the seed layer 4 on the inner wall of the groove 3.

[0042] Understandably, the mechanical polishing process described above not only improves the dimensional accuracy of the heat dissipation structure A, but also avoids the problems caused by the existing Via Post process by having the film removal process completed before polishing, thus ensuring the quality and reliability of the substrate product.

[0043] S5: Electroplating is performed on the gap G between the copper pillar A6 and the inner wall of the groove 3 to form a copper pillar B7 filling the gap G, thereby obtaining a preliminary heat dissipation structure composed of the copper pillar B7, the copper pillar A6, and the seed layer 4 adjacent to both; subsequently, whole-board electroplating (preferably a hole-filling electroplating process) is performed to simultaneously thicken the preliminary heat dissipation structure and the copper foil layer A21, resulting in a flush-connected heat dissipation structure ATS and copper foil layer B8; see appendix for details. Figure 10 As shown.

[0044] Furthermore, in this S5, when performing electroplating to fill the gap G, the preferred processing parameters are: a monovalent chloride ion concentration of 30–50 ppm, a divalent copper ion concentration of 10–13 g / L, a sulfuric acid concentration of 195–220 g / L, a plating solution temperature of 22–25°C, a cathode current density of 5–10 ASD, and an electroplating efficiency of 2–3 μm / min. It is understood that this S5 also employs a relatively high cathode current density to rapidly fill the gap G to obtain the copper pillar B7, significantly improving electroplating efficiency / production efficiency.

[0045] Furthermore, in this S5, the preferred processing parameters for whole-board electroplating are: a monovalent chloride ion concentration of 30–50 ppm, a divalent copper ion concentration of 10–13 g / L, a sulfuric acid concentration of 195–220 g / L, a plating solution temperature of 22–25°C, a cathode current density of no more than 1.2 ASD, and an electroplating efficiency that decreases in a stepwise manner from top to bottom, for example: the electroplating efficiency corresponding to the upper part of the intermediate plate C is 110%–125%, the electroplating efficiency corresponding to the middle part of the intermediate plate C is 100%, and the electroplating efficiency corresponding to the lower part of the intermediate plate C is 85%–100%. It is understood that, based on the above whole-board electroplating process, the copper thickness uniformity of the heat dissipation structure ATS and the copper foil enhancement layer B8 can be controlled within ±3 μm.

[0046] Combining S5 and S4 above, it can be seen that this embodiment uses a step-by-step electroplating method to fabricate the heat dissipation structure A (specifically, the attached...). Figure 11 The portion highlighted in red indicates that the groove 3 is filled / plated using two rapid electroplating processes, followed by thickening of the heat dissipation structure prototype using a full-board electroplating process. This significantly reduces the surface depression of the resulting heat dissipation structure A, ensuring and improving the copper thickness uniformity of the resulting heat dissipation structure A, and effectively meeting the stringent requirements of high-density packaging for substrate flatness. Moreover, in this embodiment, during the full-board electroplating, both the heat dissipation structure prototype and the copper foil layer A21 are thickened simultaneously, which significantly improves the flatness between the heat dissipation structure A and the copper foil layer B8, further enhancing the flatness of the substrate product.

[0047] In addition, for ease of description, this embodiment will also define the board obtained after processing S5 as intermediate board D.

[0048] S6: The copper foil layer B8 is fabricated to obtain a circuit pattern B80; and the circuit pattern B80 is electrically connected to the circuit pattern A through the heat dissipation structure ATS; see appendix for details. Figure 11 As shown.

[0049] Furthermore, based on the properties of the copper foil augmentation layer B8 (such as copper thickness) and the precision requirements of the circuit pattern B80 for the substrate product, this embodiment can use any one of the subtractive process, MSAP process, and SAP process to fabricate the circuit of the copper foil augmentation layer B8. For example: ① When the copper foil augmentation layer B8 is a thin copper layer, the MSAP process can be used to produce the circuit pattern B80, including the following sequential processes: pre-coating treatment (i.e., roughening, cleaning and drying of the intermediate board D), coating with resist photosensitive film (i.e., applying the resist photosensitive dry film onto the copper foil augmentation layer B8 using a vacuum laminator), exposure (exposing the resist photosensitive dry film using an LDI exposure machine according to the exposure data), development (removing the unexposed parts of the resist photosensitive dry film using a developer), pattern electroplating (plating copper layer A onto the area of ​​the copper foil augmentation layer B8 exposed outside the resist photosensitive dry film using a pattern electroplating process), stripping (removing the resist photosensitive dry film), baking and flash etching (etching away the area of ​​the copper foil augmentation layer B8 exposed outside the copper layer A) to obtain the circuit pattern B80. ② When the copper foil augmentation layer B8 is a thick copper layer, the circuit pattern B80 can be produced by a subtractive process, including pre-coating treatment (roughening, cleaning and drying the intermediate board D), coating with photoresist (i.e., coating the photoresist dry film onto the copper foil augmentation layer B8 using a vacuum laminator), exposure (exposing the photoresist dry film using an LDI exposure machine according to the exposure data), development, etching (etching away the area of ​​the copper foil augmentation layer B8 exposed outside the photoresist dry film using an alkaline etching solution), and stripping, to obtain the circuit pattern B80.

[0050] In addition, after the circuit pattern B80 is obtained, AOI optical inspection is required to ensure the processing quality of the circuit pattern B80.

[0051] S7: Determine the nature of the circuit pattern B80. If the circuit pattern B80 is an inner layer circuit, proceed to S8 to S9 below; if the circuit pattern B80 is an outer layer circuit, proceed directly to S9 below.

[0052] S8: At least one circuit layer A is stacked above the layer where the circuit pattern B80 is located, according to the processing logic and processing method of S1 to S6 above. The outermost circuit layer A is the outer circuit layer. The circuit pattern B80 and its adjacent circuit layer A are electrically connected through a heat dissipation structure B, and / or any two adjacent circuit layers A are electrically connected through a heat dissipation structure C. The processing method of the heat dissipation structure B and / or the heat dissipation structure C is the same as the processing method of the heat dissipation structure A.

[0053] Furthermore, attached Figure 12 The diagram shows a scenario where the circuit pattern B80 is an inner layer circuit and the circuit layer A is configured as a single layer. In this scenario, the circuit pattern on the circuit layer A is used as the outer layer circuit 9, and the circuit pattern B80 is electrically connected to the circuit pattern on the circuit layer A (i.e., the outer layer circuit 9) through a heat dissipation structure BTS1. The forming method of the heat dissipation structure BTS1 is the same as the processing method of the heat dissipation structure A.

[0054] In addition, for ease of description, this embodiment also defines the board obtained after completing the above S8 processing as a substrate semi-finished product.

[0055] S9: The obtained substrate semi-finished product is subjected to conventional processes such as outer layer solder resist (i.e., setting a solder resist layer at a predetermined position on the outer layer circuit), surface treatment (i.e., setting a surface treatment layer on the outer layer circuit, the surface treatment layer can be, but is not limited to, electroplated soft gold layer, electroless nickel-palladium-gold layer, or electroless nickel-gold layer), molding, finished product electrical testing, finished product inspection, shipment inspection, and packaging and shipping, thus obtaining a high heat dissipation substrate. See Appendix for details. Figure 12 As shown.

[0056] As can be seen from the above, compared with the prior art, the high heat dissipation substrate processing method provided in this embodiment 1 has the following advantages: ① This embodiment, through process innovation, adopts a step-by-step electroplating method to manufacture the heat dissipation structure A, that is: the groove 3 is filled / plated through two rapid electroplating processes, and then the heat dissipation structure prototype is thickened through whole-board electroplating; this can significantly reduce the degree of depression on the surface of the obtained heat dissipation structure A, ensure and improve the copper thickness uniformity of the obtained heat dissipation structure A, and well meet the stringent requirements of high-density packaging for substrate flatness. In addition, in this embodiment, when performing whole-board electroplating, the heat dissipation structure prototype and the copper foil layer A21 are thickened simultaneously, which can significantly improve the flatness between the heat dissipation structure A and the copper foil layer B8, further improving the flatness of the substrate product. ② This embodiment, through process innovation, effectively avoids many problems that occur in the existing heat dissipation metal strip / block manufacturing process, resulting in high reliability and good heat dissipation effect of the substrate product, which well meets the requirements of high-density packaging. ③ The high heat dissipation substrate processing method provided in this embodiment is reasonable, the process flow is simple, and it is easy to operate and implement.

[0057] Example 2:

[0058] Please see the appendix Figure 12 As shown, this embodiment 2 provides a high heat dissipation substrate, which is manufactured using the high heat dissipation substrate processing method described in embodiment 1 above.

[0059] With the help of the high heat dissipation substrate processing method provided in this application, the substrate obtained in this embodiment 2 has good heat dissipation effect and high reliability, which well meets the high-density packaging requirements.

[0060] Finally, the suffixes "A", "B", etc. in the component names in the specification of this invention patent (such as copper foil layer A, copper foil layer B, etc.) are only for the convenience of clear description and are not intended to limit the scope of implementation of this invention patent.

[0061] Many specific details have been set forth in the foregoing description to provide a thorough understanding of the present invention. However, the above description is merely a preferred embodiment of the present invention, and the present invention can be implemented in many other ways different from those described herein. Therefore, the present invention is not limited to the specific embodiments disclosed above. Furthermore, any person skilled in the art can make many possible variations and modifications to the technical solutions of the present invention, or modify them into equivalent embodiments, using the methods and techniques disclosed above, without departing from the scope of the present invention. Any simple modifications, equivalent changes, and modifications made to the above embodiments based on the technical essence of the present invention, without departing from the content of the present invention, shall still fall within the protection scope of the present invention.

Claims

1. A method for processing a high heat dissipation substrate, characterized in that: The processing steps include the following: S1: Provide a working board with a circuit pattern A on its surface, wherein the circuit pattern A is provided with a heat dissipation block (10) that serves to conduct and dissipate heat. S2: An insulating layer (20) and a copper foil layer A (21) are laminated on the surface of the working board, and then a groove is laser-cut to process a groove (3) with an opening on the surface of the copper foil layer A (21) and at least a portion of the heat sink (10) as the bottom of the groove. S3: A seed layer (4) is deposited on the whole plate, and a photosensitive dry film (5) with a notch (50) is coated on the seed layer (4) by a dry film pattern transfer process, while the notch (50) completely falls within the range of the groove (3); S4: Fill the notch (50) with electroplating to obtain copper pillar A (6); then remove the film; S5: Electroplating is performed to fill the gap between the copper pillar A (6) and the inner wall of the groove (3) to form a copper pillar B (7) that fills the gap, thereby obtaining a heat dissipation structure prototype composed of the copper pillar B (7), the copper pillar A (6) and the seed layer (4) adjacent to both; then the whole board is electroplated to simultaneously thicken the heat dissipation structure prototype and the copper foil layer A (21) to obtain a flush-connected heat dissipation structure A and copper foil layer B (8). S6: The copper foil layer B (8) is fabricated to obtain a circuit pattern B (80); and the circuit pattern B (80) is electrically connected to the circuit pattern A through the heat dissipation structure A.

2. The processing method of the high heat dissipation substrate according to claim 1, characterized in that: In the above S3, the distance between the inner wall of the notch (50) and the inner wall of the groove (3) is 60 to 120 μm, and at the same time, the distance between the center of the notch (50) and the inner wall of the groove (3) is not less than 140 μm.

3. The processing method of the high heat dissipation substrate according to claim 1, characterized in that: In S3 above, at least one of PVD process, CVD process and flash plating process is used to process the seed layer (4) with a thickness of 2.5 to 6 μm.

4. The processing method of the high heat dissipation substrate according to claim 1, characterized in that: In the above S4, the copper pillar A (6) obtained by the hole-filling electroplating is higher than the surface of the copper foil layer A (21), and the height difference between the two is controlled within ±7μm; After removing the photosensitive dry film (5), the copper pillar A (6) is also dimensionally corrected so that the height difference between the surface of the copper pillar A (6) and the surface of the copper foil extension layer A (21) is controlled within 3 μm.

5. The processing method of the high heat dissipation substrate according to claim 1, characterized in that: In S4 and S5 above, the processing parameters for the hole-filling electroplating are as follows: the concentration of monovalent chloride ions in the electroplating solution is 30-50 ppm, the concentration of divalent copper ions is 10-13 g / L, the concentration of sulfuric acid is 195-220 g / L, the temperature of the electroplating solution is 22-25℃, the cathode current density is 5-10 ASD, and the electroplating efficiency is 2-3 μm / min.

6. The processing method of the high heat dissipation substrate according to claim 1, characterized in that: In the above S5, the processing parameters for the whole plate electroplating are: the concentration of monovalent chloride ions in the electroplating solution is 30-50 ppm, the concentration of divalent copper ions is 10-13 g / L, the concentration of sulfuric acid is 195-220 g / L, the temperature of the electroplating solution is 22-25℃, the cathode current density is not greater than 1.2 ASD, and the electroplating efficiency decreases stepwise from top to bottom, so that the uniformity of copper thickness of the heat dissipation structure A and the copper foil layer B (8) is controlled within ±3 μm.

7. The processing method of the high heat dissipation substrate according to claim 1, characterized in that: In S2 above, a CO2 laser is used to laser burn the groove, and the processing parameters of the CO2 laser are: laser energy of 2 to 6 mJ, pulse width of 4 to 6 μs, and number of laser shots of 1 to 5.

8. The processing method of the high heat dissipation substrate according to claim 1, characterized in that: In the above S6, the copper foil layer B (8) is fabricated using any one of the subtractive process, MSAP process and SAP process.

9. The processing method of the high heat dissipation substrate according to claim 1, characterized in that: Also includes: S7: Determine the nature of the line pattern B (80). If the line pattern B (80) is an inner layer line, proceed to S8 to S9 below; if the line pattern B (80) is an outer layer line, proceed to S9 below. S8: At least one circuit layer A is stacked above the layer where the circuit pattern B (80) is located, wherein the outermost circuit layer A is the outer circuit layer, the circuit pattern B (80) and its adjacent circuit layer A are electrically connected through a heat dissipation structure B, and / or any two adjacent circuit layers A are electrically connected through a heat dissipation structure C, and the processing method of the heat dissipation structure B and / or the heat dissipation structure C is the same as the processing method of the heat dissipation structure A; S9: Perform conventional outer layer solder mask, surface treatment, molding, finished product electrical testing, and finished product inspection processes in sequence to obtain a high heat dissipation substrate.

10. A high heat dissipation substrate, characterized in that: It is manufactured using the processing method of any one of claims 1-9 for a high heat dissipation substrate.

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