Chip defect intelligent detection method and detection system

By constructing a process gradient field model and a hierarchical detection strategy, the problems of high false alarm rate and insufficient identification of low-contrast defects caused by global process drift on wafers are solved, achieving high-precision and high-efficiency chip defect detection.

CN122048819APending Publication Date: 2026-05-15JIANGXI ANXINMEI TECH CO LTD
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
JIANGXI ANXINMEI TECH CO LTD
Filing Date
2026-01-09
Publication Date
2026-05-15

AI Technical Summary

Technical Problem

Existing chip defect detection technologies have a high false alarm rate when facing global wafer process drift, are difficult to adapt to the gradual changes in the texture of chip dies at different locations, and lack the ability to identify low-contrast macroscopic defects, making it difficult to balance high microscopic accuracy with high production line throughput.

Method used

By constructing a process gradient field model, the wafer is divided into multiple equivalent process regions. Through a hierarchical detection strategy that combines rapid screening and fine diagnosis, local adaptive references are dynamically generated. Combined with multi-level feature extraction and classification decision, chip defects are identified.

Benefits of technology

It significantly reduces the false alarm rate, improves detection accuracy, achieves high throughput efficiency, can identify small and low-contrast defects, and ensures the accuracy of chip yield determination and production line efficiency.

✦ Generated by Eureka AI based on patent content.

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Abstract

The invention relates to the technical field of chip image analysis, and discloses an intelligent chip defect detection method and system, and the method comprises the steps: obtaining a wafer image and process metadata; constructing a process gradient field model representing a global process drift trend, and dividing the wafer into equivalent process regions; quickly screening and identifying suspicious regions based on an equivalent process region generation template; constructing a reference candidate set, dynamically generating a local adaptive reference for the suspicious region, and obtaining a fine residual image; and performing multi-level feature extraction and classification based on the fine residual error, and outputting defect information. The system comprises a data acquisition module, a modeling processing module, a rapid screening module, a fine diagnosis module and a defect discrimination module. According to the method, the wafer process gradient field model is constructed, chip grain texture gradual change is adapted, drift misinformation is effectively overcome, high-throughput full inspection is guaranteed, and meanwhile accurate identification of low-contrast macroscopic and tiny defects of the chip is achieved.
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Description

Technical Field

[0001] This invention relates to the field of chip image analysis technology, specifically to a chip defect intelligent detection method and system. Background Technology

[0002] As a core component of the modern electronic information industry, the manufacturing process of chips is extremely precise. Typically, thousands of functionally identical dies are simultaneously produced on the surface of a single-crystal silicon wafer through a series of complex processes such as photolithography and etching. These dies are then cut and packaged to become independent chips. Therefore, inspecting each die for appearance defects during the wafer manufacturing stage is the first line of defense in eliminating defective chips and ensuring the yield and reliability of the final product.

[0003] Current chip defect detection primarily relies on machine vision-based reference comparison methods. This method leverages the high repeatability of the die structure on a wafer, selecting adjacent "standard" dies or design layouts to construct a benchmark template. The image of the die to be tested is then compared to the template using a difference operation, and anomalies are located based on pixel grayscale differences. In scenarios with stable process environments and high image texture consistency, this method can quickly identify scratches or particles with significant contrast, making it the mainstream approach on current production lines.

[0004] However, in actual manufacturing processes, due to physical factors such as etching uniformity and film thickness distribution, the wafer surface often experiences global process drift from the center to the edge, resulting in non-uniform gradients in the background texture of grains at different locations. Traditional fixed templates or simple neighborhood comparisons are ill-suited to adapt to this global dynamic change, easily causing false defect alarms triggered by normal process fluctuations. Furthermore, while the judgment logic relying solely on single-pixel thresholds is computationally simple, it often fails to provide an effective response when faced with macroscopic defects that have extremely low contrast and wide spatial distribution. On the other hand, introducing complex reconstruction algorithms to process the entire wafer image to improve sensitivity leads to data processing delays, severely restricting the efficiency of online full inspection on the production line.

[0005] Therefore, this invention proposes an intelligent chip defect detection method and system to address the shortcomings of existing technologies. Summary of the Invention

[0006] To address the shortcomings of existing technologies, this invention provides an intelligent chip defect detection method and system, which solves the problem of high false alarm rates caused by the difficulty of adapting to the texture gradients of chip dies at different locations when facing global wafer process drift. At the same time, it solves the technical difficulties of insufficient ability to identify low-contrast macroscopic defects on the chip die surface, and the difficulty of balancing high microscopic precision and high production line throughput requirements when performing full inspection of massive chip dies on wafers.

[0007] To achieve the above objectives, the present invention provides the following technical solution: a chip defect intelligent detection method, comprising the following steps:

[0008] Acquire images and process metadata of the wafer to be inspected;

[0009] Based on the image of the wafer to be inspected and the historical data associated with the process metadata, a process gradient field model is constructed to characterize the global process drift trend of the wafer to be inspected, and the wafer to be inspected is divided into multiple equivalent process regions according to the process gradient field model.

[0010] A rapid screening is performed on the dies to be inspected on the wafer to be inspected. A rapid reference template is generated based on the equivalent process area to which the die to be inspected belongs. Suspicious diagnostic areas are identified based on the residual between the image of the die to be inspected and the rapid reference template.

[0011] Fine-grained diagnosis is performed only for the suspected diagnostic region. A reference candidate set containing spatial neighborhood grains and adaptive partitioned sampling grains is constructed. Based on the image of the suspected diagnostic region and the reference candidate set, a local adaptive reference is dynamically generated for the local region of the grain to be detected. The difference between the image of the suspected diagnostic region and the local adaptive reference is calculated to generate a fine residual image.

[0012] Based on the refined residual image, multi-level feature extraction and classification are performed to confirm the authenticity and category of the defect and output the defect information.

[0013] Preferably, the step of constructing a process gradient field model to characterize the global process drift trend of the wafer under test, and dividing the wafer under test into multiple equivalent process regions based on the process gradient field model, includes:

[0014] The process deviation value is obtained by calculating the difference between the current observed feature value in the image of the wafer to be inspected and the historical reference feature value in the retrieved historical data;

[0015] The discrete process deviation values ​​are fitted into a continuous surface using a polynomial surface fitting method to obtain the process gradient field model.

[0016] The process gradient field response value of the process gradient field model at each grain position on the wafer to be tested is calculated, and a clustering algorithm is applied to group grains with similar process gradient field response values ​​into the same set to form the equivalent process region.

[0017] Preferably, the step of rapidly screening the grains to be inspected on the wafer to be inspected includes:

[0018] Extract all sample grain images contained in the equivalent process region to which the grain to be detected belongs, and perform statistical filtering operation on the sample grain images at the corresponding pixel positions to generate the fast reference template;

[0019] Calculate the absolute difference image between the image of the grain to be detected and the pixel grayscale value at the corresponding position of the fast reference template;

[0020] The global background noise statistic is calculated based on the absolute difference image. When the residual intensity of a local region in the absolute difference image exceeds the threshold set based on the global background noise statistic and the geometric properties meet the preset minimum defect morphology constraint, the local region is marked as the suspected diagnostic region.

[0021] Preferably, the step of performing fine-grained diagnosis only for the suspected diagnostic region and constructing a reference candidate set including spatial neighborhood grains and adaptive partitioned sampling grains includes:

[0022] The grains that are physically adjacent to the grain to be detected are selected as the spatial neighborhood grains;

[0023] Based on the equivalent process area defined, within the entire wafer range, a die that belongs to the same equivalent process area as the die to be detected and is not physically adjacent is selected as the adaptive partition sampling die.

[0024] The corresponding local image patches are extracted from the spatial neighborhood grains and the adaptive partitioned sampling grains to form the reference candidate set.

[0025] Preferably, the step of dynamically generating a local adaptive reference for the local region of the grain to be detected based on the image of the suspected diagnostic region and the reference candidate set further includes the step of constructing a subspace projection model:

[0026] Each two-dimensional image block in the reference candidate set is vectorized into a column vector, and the covariance matrix of the column vector is calculated.

[0027] The covariance matrix is ​​decomposed into eigenvalues, and the first few eigenvectors corresponding to the largest eigenvalues ​​are selected to form an eigenspace matrix. The eigenspace matrix is ​​used to characterize the principal component subspace of normal texture changes.

[0028] The feature subspace matrix and the mean vector of the reference candidate set are used to determine the subspace projection model.

[0029] Preferably, the step of calculating the difference between the image of the suspected diagnostic region and the local adaptive reference to generate a fine residual image includes:

[0030] The image of the suspected diagnostic region is vectorized to obtain the target vector;

[0031] The target vector is projected onto the space defined by the feature subspace matrix and then reconstructed in reverse to obtain the local adaptive reference;

[0032] The absolute difference between the target vector and the reconstructed local adaptive reference is calculated to generate the fine residual image.

[0033] Preferably, the step of performing multi-level feature extraction and classification based on the fine residual image includes the step of performing multi-scale decomposition on the fine residual image:

[0034] The original pixel intensity of the fine residual image is directly mapped, or the high-frequency edges are enhanced using the Laplacian operator as a micro-feature layer.

[0035] The fine residual image is convolved using a Gaussian smoothing kernel, and the residual energy in the local neighborhood is integrated to generate a macroscopic response map, which is then determined as the macroscopic feature layer.

[0036] Preferably, the step of performing multi-level feature extraction and classification based on the fine residual image further includes the step of generating a binarized defect mask using dual-channel threshold logic:

[0037] Preset microscopic and macroscopic detection thresholds;

[0038] For any pixel location, when the intensity of the original residual in the micro-feature layer exceeds the micro-detection threshold, or the intensity of the macro-response in the macro-feature layer exceeds the macro-detection threshold, the pixel location is determined to be a defect pixel, and the binarized defect mask is generated.

[0039] Preferably, the step of performing multi-level feature extraction and classification decision based on the fine residual image further includes:

[0040] Independent defect objects are extracted from the binary defect mask using a connected component labeling algorithm.

[0041] Calculate the geometric descriptor of the defective object, which includes area, perimeter, maximum inscribed circle diameter, aspect ratio of minimum circumscribed rectangle, and compactness index calculated based on area and perimeter;

[0042] The pre-defined classification rule tree is used to classify the defect objects according to the geometric descriptor, and a wafer defect map containing defect coordinates, size and category is generated.

[0043] This invention also provides a chip defect intelligent detection system, comprising:

[0044] The data acquisition module is used to acquire images and process metadata of the wafer to be inspected;

[0045] The modeling and processing module is used to construct a process gradient field model to characterize the global process drift trend of the wafer under test based on the image of the wafer under test and the historical data associated with the process metadata, and to divide the wafer under test into multiple equivalent process regions according to the process gradient field model.

[0046] The rapid screening module is used to rapidly screen the dies to be inspected on the wafer to be inspected, generate a rapid reference template based on the equivalent process area to which the die to be inspected belongs, and identify suspicious diagnostic areas based on the residual between the image of the die to be inspected and the rapid reference template.

[0047] The fine diagnosis module is used to perform fine diagnosis only for the suspected diagnosis region, construct a reference candidate set including spatial neighborhood grains and adaptive partitioned sampling grains, and dynamically generate a local adaptive reference for the local region of the grain to be detected based on the image of the suspected diagnosis region and the reference candidate set, and calculate the difference between the image of the suspected diagnosis region and the local adaptive reference to generate a fine residual image.

[0048] The defect discrimination module is used to perform multi-level feature extraction and classification based on the fine residual image, confirm the authenticity and category of the defect, and output the defect information.

[0049] This invention provides a method and system for intelligent chip defect detection. It offers the following advantages:

[0050] 1. This invention addresses the global process drift phenomenon commonly found in chip wafer manufacturing by constructing a process gradient field model and dividing the wafer into several equivalent process regions. This mechanism can accurately adapt to the non-uniform physical changes of the wafer from the center to the edge, ensuring that the detection of each chip wafer under test is based on a reference template that highly matches the process state of its location. This effectively distinguishes normal process fluctuations from real chip defect signals, significantly reducing the false alarm rate caused by gradual changes in wafer film thickness or etching depth, and ensuring the accuracy of chip yield determination.

[0051] 2. This invention employs a tiered detection strategy combining rapid screening and refined diagnosis. It dynamically generates local adaptive references using a subspace projection model only for suspicious chip regions screened on the wafer. By reconstructing the normal background texture of the chip within the feature subspace, this method can suppress random noise while preserving minor differences in circuit structure. This solves the problem of complex texture regions being easily interfered with, and also ensures high throughput efficiency of the wafer production line by significantly reducing redundant computational load, achieving a balance between detection accuracy and production cycle time.

[0052] 3. This invention performs multi-level feature extraction based on fine residual images and creatively introduces a macroscopic response map as the macroscopic feature layer. By combining high-frequency edge detection at the microscopic layer with the energy integration mechanism at the macroscopic layer, the system can not only accurately identify tiny point defects on the chip surface, but also capture low-contrast macroscopic defects (such as latent speckles) with low intensity per pixel but wide spatial distribution, achieving comprehensive coverage and precise interception of various morphological defects in chips. Attached Figure Description

[0053] Figure 1 This is a flowchart of a chip defect intelligent detection method according to the present invention;

[0054] Figure 2 This is a schematic diagram of an intelligent chip defect detection system according to the present invention;

[0055] Figure 3 This is a schematic diagram illustrating the principle of local adaptive reference generation and fine diagnosis of the present invention.

[0056] The module includes: 10. Data acquisition module; 20. Modeling and processing module; 30. Rapid screening module; 40. Fine diagnosis module; and 50. Defect identification module. Detailed Implementation

[0057] The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0058] See attached document Figure 2 This invention provides an intelligent chip defect detection system, which includes a data acquisition module 10, a modeling and processing module 20, a rapid screening module 30, a fine diagnosis module 40, and a defect discrimination module 50. During chip manufacturing, this system performs a full inspection of all uncut chip dies, thereby achieving chip defect detection. It communicates with external manufacturing execution systems and optical inspection equipment to obtain the necessary data resources.

[0059] The data acquisition module 10 is used to acquire images and process metadata of the wafer to be inspected. As the system's input interface, the data acquisition module 10 connects to the optical inspection equipment and manufacturing execution system, reads a wafer scan image containing all dies, and simultaneously reads process metadata recording the wafer's processing history. The data acquisition module 10 is also responsible for establishing the mapping relationship between the image pixel coordinate system and the wafer physical coordinate system, ensuring that each individual chip die can be accurately located.

[0060] The modeling and processing module 20 is connected to the data acquisition module 10. This module 20 constructs a process gradient field model characterizing the global process drift trend of the wafer under inspection based on historical data associated with the image and process metadata of the wafer under inspection. Based on this process gradient field model, the wafer under inspection is divided into multiple equivalent process regions. The modeling and processing module 20 analyzes image data and retrieves historical data to fit a model describing the distribution of process parameters on the wafer surface, and clusters the grains accordingly.

[0061] The rapid screening module 30 is used to quickly screen the dies on the wafer to be inspected in order to identify suspicious diagnostic areas. The rapid screening module 30 generates a rapid reference template based on the equivalent process area to which the die belongs, and determines whether the die is a suspicious diagnostic area based on the residual between the image of the die and the rapid reference template. This rapid screening module 30 filters out most normal areas with low computational cost.

[0062] The fine diagnostic module 40 is used to perform fine diagnostics only on the suspected diagnostic region to generate a fine residual image. The fine diagnostic module 40 constructs a reference candidate set containing spatial neighborhood grains and adaptively partitioned sampled grains, and dynamically generates a local adaptive reference for the local region of the grain to be detected based on the image of the suspected diagnostic region and the reference candidate set. The fine residual image is calculated from the image of the suspected diagnostic region and the local adaptive reference.

[0063] The defect discrimination module 50 is used to identify and output defect information based on the fine residual image. The defect discrimination module 50 performs multi-scale feature extraction and classification on the fine residual image to confirm the authenticity and category of defects, and generates a final wafer defect map. This marks all defective chip dies on the wafer.

[0064] See attached document Figure 1 This invention provides a chip defect intelligent detection method, which is executed by the aforementioned chip defect intelligent detection system, and specifically includes the following steps:

[0065] Step S100: Obtain the image and process metadata of the wafer to be inspected. The system connects to the optical inspection equipment and manufacturing execution system, reads the wafer scan image containing all the dies, and simultaneously reads the process metadata that records the wafer processing history.

[0066] Step S200: Construct a process gradient field model and divide the wafer into equivalent process regions. Based on historical data associated with the image and process metadata of the wafer to be inspected, a process gradient field model is constructed to characterize the global process drift trend of the wafer, and the wafer to be inspected is divided into multiple equivalent process regions according to the process gradient field model.

[0067] Step S300: Perform rapid screening to identify suspicious diagnostic areas. Rapid screening is performed on the dies to be inspected on the wafer to be inspected to identify suspicious diagnostic areas. Rapid screening includes: generating a rapid reference template based on the equivalent process area to which the die to be inspected belongs, and determining whether the die to be inspected is a suspicious diagnostic area based on the residual between the image of the die to be inspected and the rapid reference template.

[0068] Step S400: Perform fine-grained diagnosis on the suspected diagnostic region. Fine-grained diagnosis is performed only on the suspected diagnostic region to generate a fine residual image. The fine-grained diagnosis includes: constructing a reference candidate set containing spatial neighborhood grains and adaptively partitioned sampled grains, and dynamically generating a local adaptive reference for the local region of the grain to be detected based on the image of the suspected diagnostic region and the reference candidate set. The fine residual image is calculated from the image of the suspected diagnostic region and the local adaptive reference.

[0069] Step S500: Based on the fine residual image, identify and output defect information. The system performs multi-scale feature extraction and classification on the fine residual image to confirm the authenticity and category of defects, and generates the final wafer defect map.

[0070] To further clarify the technical details of the method and system in this embodiment, the specific implementation methods, principles and technical contents of each module and method will be described in detail below.

[0071] See attached document Figure 1 and Figure 2 During step S100, when acquiring the image and process metadata of the wafer to be inspected, the data acquisition module 10 establishes a communication connection with the wafer optical inspection equipment via a high-speed data bus to receive the image of the wafer to be inspected in real time. Specifically, the image of the wafer to be inspected is a wafer scan image covering the wafer surface. This wafer scan image is obtained by the optical inspection equipment using bright-field or dark-field illumination modes, in conjunction with a high-resolution sensor (such as a TDI-CCD), through continuous push-broom imaging of the wafer surface. The image data is typically quantized into an 8-bit, 12-bit, or 16-bit grayscale matrix, or a multi-channel color matrix, with a spatial resolution sufficient to resolve the minimum linewidth features of the process node to be inspected. The specific optical imaging path and photoelectric conversion hardware implementation within the optical inspection equipment are well-known technologies in the field and will not be described further here.

[0072] After receiving an image of the wafer to be inspected, the data acquisition module 10 performs an alignment operation between the image pixel coordinate system and the wafer physical coordinate system. Due to unavoidable mechanical positioning errors during wafer transport and loading, there is a deviation between the die position in the image and the design layout position. The data acquisition module 10 first uses a pre-stored standard template to perform template matching in a specific area of ​​the wafer scan image (such as a wafer dicing track or a dedicated alignment area) to identify the center pixel coordinates of at least two alignment marks. Based on the measured coordinates of the identified alignment marks in the image and their theoretical coordinates in the design layout, the data acquisition module 10 calculates the parameters in the affine transformation model using the least squares method. For any pixel coordinate in the image... Its corresponding wafer physical coordinates The result is obtained through the following formula:

[0073] ;

[0074] in, Indicates the rotation angle; and Indicates the scaling factor; and This represents the translation amount. Through this mapping relationship, the data acquisition module 10 calculates the physical coordinates of the pixel, and further combines it with the pre-stored wafer layout diagram or die size information to discretize the continuous image pixel space and map it to a specific die index. That is, it clarifies the die row and column number to which each pixel in the image belongs, as well as the relative position of the pixel inside the die, thereby achieving precise spatial positioning.

[0075] Simultaneously, the data acquisition module 10 connects to the Manufacturing Execution System (MES) via a standard semiconductor device communication interface (such as the SECS / GEM protocol) to synchronously read and record the process metadata that records the wafer processing history. Process metadata refers to structured information describing the manufacturing background of the wafer currently under inspection; this information determines physical properties such as the film thickness or etching depth of the chip die. The data acquisition module 10 parses and extracts key fields, specifically including: batch identifier, used to associate with other wafers in the same production batch; wafer identifier, used to uniquely identify the current wafer entity; process recipe identifier, used to indicate the set of lithography or etching parameters used in the current layer; and equipment chamber identifier, used to indicate the specific physical processing chamber through which the wafer passed in the previous key process step. The data acquisition module 10 constructs the parsed process metadata into a metadata tag vector and binds it to the image of the wafer under inspection for storage. This metadata tag vector serves as a key index in subsequent steps, used to quickly retrieve historical data with the same process background (such as processing in the same chamber) from the historical database, providing data support for establishing a benchmark model under specific process conditions.

[0076] See attached document Figure 1 and Figure 2 When performing step S200 to construct the process gradient field model and divide the equivalent process region, the modeling processing module 20 first uses the metadata tag vector constructed in step S100 as an index to retrieve historical data matching the wafer to be inspected from the database (a pre-set database storing historical wafer images and corresponding process parameters). The historical data specifically includes historical wafer images and historical process metadata, which record the surface state information of past wafers produced under the same or similar process conditions (such as the same etching chamber).

[0077] The modeling processing module 20 calculates process deviation indices for modeling by analyzing image data and retrieving historical data. Specifically, the modeling processing module 20 performs feature statistics on each grain region in the image of the wafer to be inspected, extracting statistical quantities such as average grayscale, local variance, or texture energy at specific frequencies as the current observed feature value. Simultaneously, the modeling processing module 20 extracts the same statistical quantities at the corresponding grain positions in the retrieved historical wafer images and calculates the statistical mean of multiple historical images as the historical baseline feature value. The modeling processing module 20 subtracts the historical baseline feature value from the current observed feature value to obtain the process deviation value after eliminating pattern background interference. This process deviation value can quantitatively reflect the local process fluctuations of the current wafer to be inspected relative to the standard process baseline, such as film thickness changes caused by uneven chemical mechanical polishing (CMP) grinding rates. This macroscopic change directly leads to differences in background brightness of chip grains at different locations.

[0078] Based on the process deviation values ​​at all grain locations across the entire wafer, the modeling module 20 employs a numerical fitting algorithm to construct a process gradient field model characterizing the global process drift trend of the wafer. This process gradient field model is a continuous mathematical function describing the distribution of process parameters in two-dimensional space on the wafer surface. The modeling module 20 uses a polynomial surface fitting method, based on the least squares criterion, to fit the discrete process deviation values ​​into a continuous, smooth surface, thus obtaining the process gradient field model.

[0079] For any position in the wafer physical coordinate system The corresponding process gradient field response value Calculated using the following formula:

[0080] ;

[0081] in, The order of the polynomial is typically 2 to 5, in order to strike a balance between fitting ability and preventing overfitting. Represents the fitting coefficient; and This represents the physical coordinates of the grain center relative to the wafer center. The mapping relationship determined by the above formula is the process gradient field model.

[0082] Subsequently, the modeling and processing module 20 calculates the process gradient field response value of the process gradient field model at each die location on the wafer under test. Specifically, the system iterates through each die on the wafer under test, substituting its physical coordinates into the above model formula to obtain the corresponding... Numerical values. These values ​​effectively filter out random measurement noise and reveal macroscopic process fingerprints on the wafer surface, such as common concentric circle or saddle-shaped distribution trends.

[0083] Based on the parameter distribution output by the process gradient field model, the modeling processing module 20 divides the wafer under test into multiple equivalent process regions. The modeling processing module 20 does not directly use the physical location of the grains for partitioning; instead, it performs clustering based on the process gradient field response values ​​calculated by the process gradient field model. Specifically, the modeling processing module 20 calculates the process gradient field response value at each grain location on the wafer under test. The K-Means clustering algorithm is then applied to group grains with similar predicted values ​​into the same set, forming an equivalent process region. The number of clusters in the K-Means clustering algorithm... The preset parameters, such as 5 to 10, aim to discretize the continuously changing process field into several representative levels. Grains belonging to the same equivalent process region, even if not physically adjacent (e.g., located at different angular positions on the same radius ring), are considered to have similar process characteristic parameters. In this way, the system decomposes the complex process variations across the entire wafer into several locally uniform sub-regions. For the specific iterative convergence process of the K-Means clustering algorithm, those skilled in the art can refer to relevant algorithm manuals, as it is a well-known technique in the field and will not be elaborated upon here.

[0084] See attached document Figure 1 and Figure 2 When performing step S300 to identify suspicious diagnostic areas, the rapid screening module 30 uses the equivalent process region defined in step S200 as the basis for data screening. The equivalent process region refers to a set of grains with similar response values ​​under the process gradient field model, indicating that the grains within this set have statistically highly consistent background texture and noise levels. The rapid screening module 30 generates a rapid reference template based on the equivalent process region to which the grain to be detected belongs, rather than using a uniform gold template across the entire wafer. The rapid reference template is a statistical benchmark image characterizing the ideal defect-free state within a specific process partition. It is constructed by aggregating the common features of multiple similar chip grains within that partition, aiming to eliminate random noise specific to individual grains.

[0085] Specifically, the rapid screening module 30 identifies the equivalent process region index to which the current grain to be detected belongs. The images of all sample grains contained within the region were extracted. This was done to construct a rapid reference template that could represent the background features of the region. The rapid screening module 30 performs statistical filtering operations on the corresponding pixel positions of these sample crystal images. In one embodiment, a median filtering algorithm is used to generate a template to suppress interference from extreme value noise. For the rapid reference template... arbitrary pixel coordinates Its grayscale value Determined by the following formula:

[0086] ;

[0087] in, Indicates the first A collection of sample grains within an equivalent process region; Indicates the first grain in the sample grain set Images of individual grains at location The pixel grayscale value at that location; This indicates the median operation. The resulting quick reference template... It effectively preserves the normal texture structure (such as circuit patterns) under specific process conditions, while filtering out randomly occurring non-systematic defect signals.

[0088] After acquiring the template, the rapid screening module 30 calculates the residual between the image of the die to be inspected and the rapid reference template. The residual refers to the difference signal between the image to be inspected and the reference template at the pixel level, and its magnitude directly reflects the degree to which the inspected location deviates from the ideal process state. Specifically, to quantify this residual for threshold determination, the rapid screening module 30 calculates the residual between the image of the die to be inspected and the reference template. Pixel grayscale value at the position corresponding to the quick reference template absolute difference image :

[0089] ;

[0090] Subsequently, in order to establish adaptive judgment criteria, the rapid screening module 30 calculates global background noise statistics based on the absolute difference image, specifically including the noise mean. and noise standard deviation Let the height of the image be... Width is The calculation formula is as follows:

[0091] ;

[0092] ;

[0093] Based on the noise statistics calculated above, the rapid screening module 30 identifies suspicious diagnostic regions on the die to be inspected. A suspicious diagnostic region refers to a local spatial area where the residual intensity significantly exceeds the global background statistical noise level, thus being marked by the system as a potential anomaly. The rapid screening module 30 constructs a binary decision mask. The judgment logic is as follows:

[0094] ;

[0095] in, This is a sensitivity adjustment coefficient used to balance the false alarm rate and the missed detection rate (typically ranging from 3 to 6). In this step, the binarization decision mask is used. The set of connected pixels with a median of 1 corresponds to a local region in the absolute difference image where the residual intensity exceeds a threshold set based on global background noise statistics.

[0096] Subsequently, the rapid screening module 30 performs geometric attribute verification on each of the defined local regions. When the geometric attributes (such as area or aspect ratio) of a local region meet the preset minimum defect morphology constraint, the rapid screening module 30 marks the connected region as a suspected diagnostic region. The preset minimum defect morphology constraint is a geometric filtering condition used to distinguish between real defect structures and random noise. Specifically, it includes a minimum connected area threshold (e.g., set to 5 to 10 pixels) and an aspect ratio range limit, aiming to filter out pixel clusters that, although exhibiting abnormal grayscale, are spatially discrete or lack defect morphology characteristics. This screening process serves as a primary filter, aiming to quickly eliminate the vast majority of normal background areas on the wafer with low computational cost, and only passing the location coordinates of suspected diagnostic regions containing significant differences to subsequent fine-tuning diagnostic steps.

[0097] See attached document Figures 1-3 In step S400, when performing fine-grained diagnosis on the suspected diagnostic region, the fine-grained diagnosis module 40 initiates high-precision calculations only on the suspected diagnostic region to generate a fine residual image. The core logic of this step is to abandon a single fixed template and instead reconstruct a reference image that can accurately represent the normal texture features of the current micro-environment through a data-driven approach.

[0098] The fine diagnosis module 40 first acquires local image information of the data to be inspected. Specifically, the fine diagnosis module 40 extracts an image of the suspected diagnostic region from the original image data of the grain to be inspected based on the position coordinates (e.g., bounding box coordinates) of the suspected diagnostic region output in step S300, thereby obtaining an image of the suspected diagnostic region. This image is a local two-dimensional pixel matrix containing the potential defect and its surrounding background texture.

[0099] Subsequently, the fine-tuning diagnostic module 40 constructs a reference candidate set for learning normal texture features. The reference candidate set is a collection of sample images containing multiple images with the same location coordinates and process background as the suspected diagnostic region. To balance local continuity and global process similarity on the wafer surface, the reference candidate set is derived from two sources: spatial neighborhood grains and adaptive partitioned sampling grains.

[0100] Specifically, spatially adjacent grains refer to grains that are physically close to the grain to be detected (e.g., grains within a 3x3 or 5x5 neighborhood). The basis for selecting these grains is that wafer process parameters (such as film thickness and linewidth) have continuity in microscopic space, and neighboring grains often retain the closest optical background. Adaptive partitioned sampling grains refer to selecting other non-neighboring grains belonging to the same equivalent process area as the grain to be detected within the entire wafer, based on the equivalent process area divided in step S200. The basis for introducing these grains is that although grains located in the same equivalent process area may be physically far apart (e.g., located in different sectors with the same radius), their process gradient field response values ​​are similar, thus possessing statistically consistent process fingerprints. The fine diagnostic module 40 extracts corresponding local image patches from these two sources, which together form a reference candidate set. ,in The total number of samples.

[0101] Based on the image of the suspected diagnostic region and the reference candidate set, the fine diagnostic module 40 constructs a subspace projection model using principal component analysis or the Karhunen-Loève transform algorithm, and dynamically generates local adaptive references for the local regions of the grain to be detected. The fine diagnostic module 40 first processes each two-dimensional image patch in the reference candidate set... Vectorize into column vectors and calculate their covariance matrix. :

[0102] ;

[0103] in, This is the mean vector of the reference candidate set. (The sentence is incomplete and requires further context.) Perform eigenvalue decomposition and select the top eigenvalues ​​corresponding to the largest eigenvalue. feature vectors (where The number of principal components to be retained (e.g., values ​​ranging from 5 to 20, or determined based on the number when the cumulative variance contribution rate reaches 90% to 95%) constitutes the eigenspace matrix. eigenspace matrix With mean vector Together, they constitute the subspace projection model. This feature subspace matrix spans a principal component subspace that can best represent normal texture variations under current process conditions.

[0104] Next, the fine diagnosis module 40 performs vectorization processing on the image of the previously acquired suspicious diagnostic region to obtain the target vector. The fine-tuning diagnostic module 40 will use this target vector Projected onto the feature subspace matrix Within the defined space, a reverse reconstruction is performed to obtain a local adaptive reference. The calculation formula is as follows:

[0105] ;

[0106] Local adaptive reference (After being restored to a two-dimensional image format) is the result of mathematically reconstructing the image of the suspected diagnostic region using the statistical commonalities of the reference candidate set. This is due to the feature subspace matrix... Trained solely on normal reference samples, it primarily preserves normal background texture and allowable process variation information, while the target vector... Potential defective signals, because they do not conform to the statistical regularities of normal samples, cannot be effectively represented by the subspace and are therefore filtered out during the reconstruction process. This represents an ideal estimate of the local region under defect-free conditions. For specific numerical calculation methods of eigenvalue decomposition and matrix projection, those skilled in the art can refer to relevant linear algebra algorithm manuals, as these are well-known techniques in the field and will not be elaborated upon here.

[0107] Finally, the fine diagnostic module 40 calculates the fine residual image. The fine residual image is calculated from the image of the suspected diagnostic region and a local adaptive reference, quantifying anomalous components in the image to be detected that cannot be explained by the normal process subspace. The fine diagnostic module 40 calculates the target vector. With the reconstructed local adaptive reference The absolute difference between them generates a fine residual image. :

[0108] ;

[0109] This fine residual image The weak defect signal and the complex background texture interference are effectively separated. As the output of step S400, it is directly transmitted to the subsequent defect discrimination module 50 for multi-scale judgment and classification.

[0110] See attached document Figure 1In step S500, when performing defect information identification based on the fine residual image and outputting defect information, the defect identification module 50 receives the fine residual image output in step S400 as input data. Because defects generated during wafer manufacturing span a vast range of spatial scales, including both high-frequency abrupt signals such as dust and particles, and low-frequency diffuse signals such as lithography defocusing and uneven development, single-scale detection logic cannot adequately address both. Therefore, the system performs multi-level feature extraction and classification judgment on the fine residual image to confirm the authenticity and category of the defects.

[0111] The defect discrimination module 50 first performs multi-scale decomposition on the fine residual image to construct a micro-feature layer and a macro-feature layer. The micro-feature layer aims to preserve high-sharpness pixel-level anomalies, which are directly mapped from the original pixel intensity of the fine residual image, or further enhanced with a Laplacian operator to enhance high-frequency edges. The macro-feature layer aims to capture large-area defects with low contrast, which is generated by performing spatial aggregation operations on the fine residual image.

[0112] Specifically, the system uses a Gaussian smoothing kernel to refine the residual image. Perform convolution operations to generate macroscopic response maps. For coordinates in the image The calculation formula is as follows:

[0113] ;

[0114] in, The standard deviation is The two-dimensional Gaussian kernel function, This refers to the kernel radius parameter. The upper and lower limits of the summation are calculated here. The size of the convolution kernel determines the spatial coverage of the convolution kernel. Pixel. This operation integrates the residual energy within the local neighborhood, thereby enhancing weak signals that were originally not exceeding the threshold in amplitude on a single pixel but were widely distributed in space on a macro scale, thus obtaining a macro response map, which is then determined as the macro feature layer.

[0115] Based on the microscopic and macroscopic feature layers, the defect discrimination module 50 uses dual-channel threshold logic to generate a binary defect mask to confirm the authenticity of the defect. The system presets microscopic detection thresholds respectively. and macroscopic detection threshold .

[0116] The microscopic detection threshold is a strict filtering limit set for high-frequency noise. It is usually set according to the global background noise level of the fine residual image, for example, a value of 6 to 8 times the standard deviation of the background noise, to ensure that only significant sharp defects are detected.

[0117] The macroscopic detection threshold is a sensitive filtering limit set for the smoothed low-frequency signal. Since the smoothing operation has suppressed random noise, this threshold can be set low, for example, 2 to 4 times the standard deviation of the background noise, in order to detect diffuse defects with low contrast but large area.

[0118] For any pixel location, if its original residual intensity exceeds the microscopic detection threshold, or its macroscopic response intensity exceeds the macroscopic detection threshold, then that location is determined to be a defect pixel. The final defect binary mask. The definition is as follows:

[0119] ;

[0120] in, This represents a logical OR operation. This parallel discrimination mechanism ensures that the system can simultaneously detect high-intensity point defects and low-intensity area defects.

[0121] After generating the binarized defect mask, the defect discrimination module 50 performs geometric feature extraction and classification on the connected regions within the mask to determine the defect category. The system uses a connected component labeling algorithm to extract independent defect objects from the binarized defect mask and calculates the geometric descriptor for each defect object, including its area. ,perimeter The diameter of the largest inscribed circle and the aspect ratio of the smallest circumscribed rectangle. .

[0122] Specifically, area It is calculated by counting the total number of pixels within a connected region; perimeter. The maximum inscribed circle diameter is calculated by summing the Euclidean distances between edge pixels of the connected region; the maximum inscribed circle diameter is calculated by performing a distance transformation on the connected region, finding the maximum distance from points within the region to the background boundary, and multiplying it by 2; the minimum bounding rectangle and its aspect ratio are also calculated. The geometric properties are calculated by performing a rotating caliper algorithm on the contour point set of the connected region to determine its principal axis direction. The above-mentioned methods for calculating the geometric properties of connected regions in binary images are all well-known techniques in the field of digital image processing, and those skilled in the art can implement them using existing technologies; therefore, they will not be elaborated further here.

[0123] To quantify the shape complexity of defects, the system calculates a compactness index. :

[0124] ;

[0125] in, Pi is a constant, and its coefficient is... It is a normalization factor introduced based on the isoperimetric inequality.

[0126] Based on the calculated geometric descriptors, the system automatically categorizes defects using a pre-defined classification rule tree. This pre-defined classification rule tree is a hierarchical logical decision structure containing several conditional branch nodes based on geometric attributes. For example, the logic of this rule tree includes: if the defect area is smaller than a pre-defined optical resolution limit (e.g., 3 pixels), it is determined to be "noise" and filtered out; if the aspect ratio... If the ratio is greater than the preset ratio (e.g., 3.0), then proceed to the "Linear Defect" branch; if the tightness index... If the area is close to 1 and the area is moderate, it enters the "particle defect" branch; if the area is huge and the average gray value is low, it enters the "stain defect" branch.

[0127] Finally, the defect discrimination module 50 maps the confirmed defect information back to the full wafer coordinate system, generating the final wafer defect map. This wafer defect map is a structured dataset containing all detected defects, recording the global physical coordinates, geometric dimensions, category code, and confidence score of each defect. The system reads the row and column indices of the die to be detected on the wafer and the stage coordinates during detection, and places the centroid of the defect in the image coordinate system. The data is converted to wafer polar coordinates or Cartesian coordinates. For the specific implementation of coordinate system transformation and data formatting (such as KLARF format), those skilled in the art can refer to semiconductor device communication standards and related geometric transformation algorithms, which are well-known technologies in the field and will not be elaborated upon here. This wafer defect map, as the final output, is directly used for subsequent yield management analysis or navigation and positioning of electron beam re-inspection equipment.

[0128] Although embodiments of the invention have been shown and described, it will be understood by those skilled in the art that various changes, modifications, substitutions and alterations can be made to these embodiments without departing from the principles and spirit of the invention, the scope of which is defined by the appended claims and their equivalents.

Claims

1. A method for intelligent detection of chip defects, characterized in that, Includes the following steps: Acquire images and process metadata of the wafer to be inspected; Based on the image of the wafer to be inspected and the historical data associated with the process metadata, a process gradient field model is constructed to characterize the global process drift trend of the wafer to be inspected, and the wafer to be inspected is divided into multiple equivalent process regions according to the process gradient field model. A rapid screening is performed on the dies to be inspected on the wafer to be inspected. A rapid reference template is generated based on the equivalent process area to which the die to be inspected belongs. Suspicious diagnostic areas are identified based on the residual between the image of the die to be inspected and the rapid reference template. Fine-grained diagnosis is performed only for the suspected diagnostic region. A reference candidate set containing spatial neighborhood grains and adaptive partitioned sampling grains is constructed. Based on the image of the suspected diagnostic region and the reference candidate set, a local adaptive reference is dynamically generated for the local region of the grain to be detected. The difference between the image of the suspected diagnostic region and the local adaptive reference is calculated to generate a fine residual image. Based on the refined residual image, multi-level feature extraction and classification are performed to confirm the authenticity and category of the defect and output the defect information.

2. The intelligent chip defect detection method according to claim 1, characterized in that, The step of constructing a process gradient field model to characterize the global process drift trend of the wafer under test, and dividing the wafer under test into multiple equivalent process regions based on the process gradient field model, includes: The process deviation value is obtained by calculating the difference between the current observed feature value in the image of the wafer to be inspected and the historical reference feature value in the retrieved historical data; The discrete process deviation values ​​are fitted into a continuous surface using a polynomial surface fitting method to obtain the process gradient field model. The process gradient field response value of the process gradient field model at each grain position on the wafer to be tested is calculated, and a clustering algorithm is applied to group grains with similar process gradient field response values ​​into the same set to form the equivalent process region.

3. The intelligent chip defect detection method according to claim 1, characterized in that, The step of rapidly screening the grains to be inspected on the wafer to be inspected includes: Extract all sample grain images contained in the equivalent process region to which the grain to be detected belongs, and perform statistical filtering operation on the sample grain images at the corresponding pixel positions to generate the fast reference template; Calculate the absolute difference image between the image of the grain to be detected and the pixel grayscale value at the corresponding position of the fast reference template; The global background noise statistic is calculated based on the absolute difference image. When the residual intensity of a local region in the absolute difference image exceeds the threshold set based on the global background noise statistic and the geometric properties meet the preset minimum defect morphology constraint, the local region is marked as the suspected diagnostic region.

4. The intelligent chip defect detection method according to claim 1, characterized in that, The step of performing fine-grained diagnosis only for the suspected diagnostic region and constructing a reference candidate set including spatial neighborhood grains and adaptive partitioned sampling grains includes: The grains that are physically adjacent to the grain to be detected are selected as the spatial neighborhood grains; Based on the defined equivalent process area, within the entire wafer range, select the die that belongs to the same equivalent process area as the die to be detected and is not physically adjacent as the adaptive partition sampling die; The corresponding local image patches are extracted from the spatial neighborhood grains and the adaptive partitioned sampling grains to form the reference candidate set.

5. The intelligent chip defect detection method according to claim 1, characterized in that, The step of dynamically generating a local adaptive reference for the local region of the grain to be detected based on the image of the suspected diagnostic region and the reference candidate set, before which a subspace projection model is constructed is also included: Each two-dimensional image block in the reference candidate set is vectorized into a column vector, and the covariance matrix of the column vector is calculated. The covariance matrix is ​​decomposed into eigenvalues, and the first few eigenvectors corresponding to the largest eigenvalues ​​are selected to form an eigenspace matrix. The eigenspace matrix is ​​used to characterize the principal component subspace of normal texture changes. The feature subspace matrix and the mean vector of the reference candidate set are used to determine the subspace projection model.

6. The intelligent chip defect detection method according to claim 5, characterized in that, The step of calculating the difference between the image of the suspected diagnostic region and the local adaptive reference to generate a fine residual image includes: The image of the suspected diagnostic region is vectorized to obtain the target vector; The target vector is projected onto the space defined by the feature subspace matrix and then reconstructed in reverse to obtain the local adaptive reference; The absolute difference between the target vector and the reconstructed local adaptive reference is calculated to generate the fine residual image.

7. The intelligent chip defect detection method according to claim 1, characterized in that, The step of performing multi-level feature extraction and classification based on the fine residual image includes the step of performing multi-scale decomposition on the fine residual image: The original pixel intensity of the fine residual image is directly mapped, or the high-frequency edges are enhanced using the Laplacian operator as a micro-feature layer. The fine residual image is convolved using a Gaussian smoothing kernel, and the residual energy in the local neighborhood is integrated to generate a macroscopic response map, which is then determined as the macroscopic feature layer.

8. The intelligent chip defect detection method according to claim 7, characterized in that, The step of performing multi-level feature extraction and classification based on the fine residual image also includes the step of generating a binary defect mask using dual-channel threshold logic: Preset microscopic and macroscopic detection thresholds; For any pixel location, when the intensity of the original residual in the micro-feature layer exceeds the micro-detection threshold, or the intensity of the macro-response in the macro-feature layer exceeds the macro-detection threshold, the pixel location is determined to be a defect pixel, and the binarized defect mask is generated.

9. The intelligent chip defect detection method according to claim 8, characterized in that, The step of performing multi-level feature extraction and classification decisions based on the fine residual image also includes: Independent defect objects are extracted from the binary defect mask using a connected component labeling algorithm. Calculate the geometric descriptor of the defective object, which includes area, perimeter, maximum inscribed circle diameter, aspect ratio of minimum circumscribed rectangle, and compactness index calculated based on area and perimeter; The pre-defined classification rule tree is used to classify the defect objects according to the geometric descriptor, and a wafer defect map containing defect coordinates, size and category is generated.

10. A chip defect intelligent detection system, applied to the chip defect intelligent detection method as described in any one of claims 1-9, characterized in that, include: The data acquisition module is used to acquire images and process metadata of the wafer to be inspected; The modeling and processing module is used to construct a process gradient field model to characterize the global process drift trend of the wafer under test based on the image of the wafer under test and the historical data associated with the process metadata, and to divide the wafer under test into multiple equivalent process regions according to the process gradient field model. The rapid screening module is used to rapidly screen the dies to be inspected on the wafer to be inspected, generate a rapid reference template based on the equivalent process area to which the die to be inspected belongs, and identify suspicious diagnostic areas based on the residual between the image of the die to be inspected and the rapid reference template. The fine diagnosis module is used to perform fine diagnosis only for the suspected diagnosis region, construct a reference candidate set including spatial neighborhood grains and adaptive partitioned sampling grains, and dynamically generate a local adaptive reference for the local region of the grain to be detected based on the image of the suspected diagnosis region and the reference candidate set, and calculate the difference between the image of the suspected diagnosis region and the local adaptive reference to generate a fine residual image. The defect discrimination module is used to perform multi-level feature extraction and classification based on the fine residual image, confirm the authenticity and category of the defect, and output the defect information.