Semiconductor device

Abstract

The semiconductor device includes a channel layer, a barrier layer on the channel layer and including a material having an energy band gap different from an energy band gap of the channel layer, a gate electrode layer on the barrier layer and extending in a first direction, a gate semiconductor layer disposed between the barrier layer and the gate electrode layer, and a source electrode and a drain electrode connected to the channel layer and spaced apart from the gate electrode layer in a second direction different from the first direction, wherein the gate semiconductor layer includes a gate semiconductor material layer disposed on the barrier layer, and an oxide layer disposed between the gate semiconductor material layer and the gate electrode layer.

Description

Technical Field

[0001] This disclosure relates to semiconductor devices. Background Technology

[0002] In modern society, semiconductor devices are closely related to daily life. In particular, the importance of power semiconductor devices is increasing in various fields such as transportation (e.g., electric vehicles, railways, electric trams), renewable energy systems (e.g., solar power, wind power), and mobile devices. Power semiconductor devices are semiconductor devices used to handle high voltages or high currents and perform functions such as power conversion and control in large power systems or high-output electronic devices. Power semiconductor devices have the ability and durability to handle high power, thus enabling them to handle large currents and withstand high voltages. For example, power semiconductor devices can handle voltages from hundreds to thousands of volts and currents from tens to thousands of amperes. Power semiconductor devices can improve the efficiency of electrical energy by minimizing power losses. Furthermore, power semiconductor devices can be stably driven even in environments such as high temperatures.

[0003] These power semiconductor devices can be categorized based on their materials, with examples including SiC power semiconductor devices and GaN power semiconductor devices. Using SiC or GaN instead of existing silicon (Si) to fabricate power semiconductor devices overcomes the drawbacks of silicon's instability at high temperatures. SiC power semiconductor devices are heat-resistant and have low power loss, making them suitable for electric vehicles, renewable energy systems, and more. GaN power semiconductor devices are more expensive but are highly efficient in terms of speed and suitable for high-speed charging of mobile devices. Summary of the Invention

[0004] One aspect of this disclosure provides a semiconductor device that can improve acceptor activation efficiency while reducing the activation process temperature, by forming an oxide layer on the surface of a gate semiconductor layer to reduce the content of impurities such as oxygen, carbon and hydrogen in the gate semiconductor layer, preventing increased surface roughness, enhancing depletion of the gate semiconductor layer, and suppressing gate leakage current.

[0005] A semiconductor device according to one aspect includes: a channel layer, a barrier layer located on the channel layer and including a material having a band gap different from that of the channel layer, a gate electrode layer located on the barrier layer and extending in a first direction, a gate semiconductor layer disposed between the barrier layer and the gate electrode layer, and a source electrode and a drain electrode connected to the channel layer and spaced apart from the gate electrode layer in a second direction different from the first direction, wherein the gate semiconductor layer includes a gate semiconductor material layer disposed on the barrier layer and an oxide layer disposed between the gate semiconductor material layer and the gate electrode layer.

[0006] According to another aspect, a semiconductor device includes: a channel layer; a barrier layer located on the channel layer and including a material having a band gap different from that of the channel layer; a gate electrode layer located on the barrier layer and extending in a first direction; a gate semiconductor layer disposed between the barrier layer and the gate electrode layer; and a source electrode and a drain electrode connected to the channel layer and spaced apart from the gate electrode layer in a second direction different from the first direction, wherein the gate semiconductor layer has a mass fraction of less than or equal to about 5E17 atoms / cm², as measured by secondary ion mass spectrometry (SIMS). 3 The oxygen concentration.

[0007] According to another aspect, a semiconductor device includes: a channel layer; a barrier layer located on the channel layer and including a material having a band gap different from that of the channel layer; a gate electrode layer located on the barrier layer and extending in a first direction; a gate semiconductor layer disposed between the barrier layer and the gate electrode layer; and a source electrode and a drain electrode connected to the channel layer and spaced apart from the gate electrode layer in a second direction different from the first direction, wherein the gate semiconductor layer includes a gate semiconductor material layer disposed on the barrier layer and an oxide layer disposed between the gate semiconductor material layer and the gate electrode layer, and the gate semiconductor material layer has a mass density of less than or equal to about 5E17 atoms / cm² as measured by secondary ion mass spectrometry (SIMS). 3 The oxygen concentration, and the oxide layer has an oxygen concentration greater than or equal to approximately 1E18 atoms / cm². 3 The oxygen concentration, as measured by secondary ion mass spectrometry.

[0008] The semiconductor device according to the embodiment can increase the activation efficiency of the acceptor while reducing the temperature of the activation process, forming an oxide layer on the surface of the gate semiconductor layer to reduce the content of impurities such as oxygen, carbon and hydrogen in the gate semiconductor layer, preventing the increase of surface roughness, enhancing the depletion of the gate semiconductor layer, and suppressing gate leakage current. Attached Figure Description

[0009] Figure 1 This is a plan view illustrating a semiconductor device according to one embodiment.

[0010] Figure 2 It is along Figure 1 A cross-sectional view taken from line A-A'.

[0011] Figure 3 yes Figure 2 Enlarged cross-sectional view of part P.

[0012] Figure 4 yes Figure 2 An enlarged cross-sectional view of part P shows another embodiment.

[0013] Figure 5 yes Figure 2 An enlarged cross-sectional view of part P shows another embodiment.

[0014] Figure 6 , Figure 7 , Figure 8 , Figure 9 and Figure 10 It is a cross-sectional view showing the manufacturing method of a semiconductor device according to the embodiment, arranged in process order. Detailed Implementation

[0015] In the following, various embodiments of this disclosure will be described in detail with reference to the accompanying drawings, enabling those skilled in the art to readily implement this disclosure. This disclosure can be implemented in many different forms and is not limited to the embodiments set forth herein.

[0016] The accompanying drawings and descriptions are intended to be illustrative rather than restrictive in nature. Throughout the specification, the same reference numerals denote the same elements.

[0017] The dimensions and thicknesses of each constituent element shown in the accompanying drawings are presented randomly for better understanding and ease of description, and this disclosure is not necessarily limited to those shown in the figures. In the drawings, the thicknesses of layers, regions, etc., are exaggerated for clarity. Furthermore, in the drawings, the thicknesses of some layers and regions are exaggerated for better understanding and ease of description.

[0018] It should be understood that when an element such as a layer, film, region, or substrate is referred to as being "on" another element, it can be directly on the other element, or there may be intermediate elements present. Conversely, when an element is referred to as being "directly on" another element, there are no intermediate elements present. The terms "on" or "above" mean placed on or below a part of an object, and do not necessarily mean placed on the upper side of the part of the object based on the direction of gravity.

[0019] Furthermore, unless explicitly stated otherwise, the words “including” and variations such as “comprising” will be understood to imply inclusion of the stated element but not exclusion of any other element.

[0020] Additionally, in this specification, the phrase "on a plane" means the target portion as viewed from above, and the phrase "on a cross section" means the cross section formed by vertically cutting the target portion as viewed from the side.

[0021] Furthermore, throughout the specification, two directions parallel to and intersecting the upper surface of the substrate are defined as the first direction D1 and the second direction D2, respectively, and the direction perpendicular to the upper surface of the substrate is described as the third direction D3. For example, the first direction D1 and the second direction D2 can be perpendicular to each other.

[0022] Figure 1 This is a plan view showing a semiconductor device according to an embodiment. Figure 2 It is along Figure 1 A cross-sectional view taken from line A-A'. Figure 3 yes Figure 2 Enlarged cross-sectional view of part P.

[0023] For clarity and simplicity, Figure 1 The main components depicted are the channel layer 132, the gate electrode layer 155, the source electrode 173, the field dispersion layer 177, and the drain electrode 175.

[0024] Reference Figures 1 to 3 The semiconductor device includes a channel layer 132, a barrier layer 136 on the channel layer 132, a gate electrode layer 155 on the barrier layer 136, a gate semiconductor layer 152 between the barrier layer 136 and the gate electrode layer 155, and a source electrode 173 and a drain electrode 175 located on both sides of the gate electrode layer 155 and connected to the channel layer 132.

[0025] The channel layer 132 is a layer that forms a channel between the source electrode 173 and the drain electrode 175, and a two-dimensional electron gas (2DEG) 134 can be located inside the channel layer 132. The two-dimensional electron gas 134 is a charge transport model used in solid-state physics, and refers to a group of electrons that can move freely in two dimensions (e.g., in the D1-D2 plane direction) but cannot move in another dimension (e.g., in the D3 direction) and are tightly bound within the two dimensions. That is, the two-dimensional electron gas 134 can exist in a two-dimensional paper-like form in three-dimensional space. This two-dimensional electron gas 134 mainly appears in semiconductor heterojunction structures, and in semiconductor devices according to embodiments, it can appear at the interface between the channel layer 132 and the barrier layer 136. For example, the two-dimensional electron gas 134 can be generated in the portion of the channel layer 132 closest to the barrier layer 136.

[0026] The channel layer 132 may include nitrides, including group III-V materials such as Al, Ga, In, B, or combinations thereof. The channel layer 132 may be made of a single layer or multiple layers. As an example, the channel layer 132 may include Al... x In y Ga 1-x-y N (0≤x≤1, 0≤y≤1, x+y≤1). For example, the channel layer 132 may include AlN, GaN, InN, InGaN, AlGaN, AlInN, AlInGaN, or combinations thereof. The channel layer 132 may be a doped layer or an undoped layer. The thickness of the channel layer 132 may be approximately several hundred nm or less.

[0027] The channel layer 132 may be located on the substrate 110, and the seed layer 115 or the buffer layer 120 may be located between the substrate 110 and the channel layer 132. The substrate 110, the seed layer 115, and the buffer layer 120 are necessary layers for forming the channel layer 132, and in some cases, they can be omitted. For example, when using a GaN substrate as the channel layer 132, at least one of the substrate 110, the seed layer 115, and the buffer layer 120 can be omitted. Considering the relatively high cost of GaN substrates, a Si substrate 110 can be used to grow the GaN-containing channel layer 132. In this case, due to the different crystal structures of Si and GaN, it may not be easy to grow the channel layer 132 directly on the substrate 110. Therefore, the seed layer 115 and the buffer layer 120 can be grown first on the substrate 110, and then the channel layer 132 can be grown on the buffer layer 120. Additionally, at least one of the substrate 110, seed layer 115, and buffer layer 120 can be removed from the final structure of the semiconductor device after the manufacturing process.

[0028] Substrate 110 may include semiconductor materials. For example, substrate 110 may include sapphire, Si, SiC, AlN, GaN, diamond, glass, or combinations thereof. Substrate 110 may be a silicon-on-insulator (SOI) substrate. However, the material of substrate 110 is not limited to this, and any commonly used substrate can be used. In some cases, substrate 110 may include an insulating material. For example, several layers including channel layer 132 may be formed on the semiconductor substrate first, and then the semiconductor substrate may be removed and replaced with an insulating substrate.

[0029] The seed layer 115 may be located on the substrate 110. The seed layer 115 may be directly located on the substrate 110. However, it is not limited to this; another predetermined layer may be further located between the substrate 110 and the seed layer 115. The seed layer 115 is a layer that serves as a seed for the growth buffer layer 120 and may be made of a lattice structure that serves as the seed for the buffer layer 120. For example, the seed layer 115 may include AlN, but is not limited to this.

[0030] Buffer layer 120 may be located on seed layer 115. Buffer layer 120 may be directly located on seed layer 115. However, it is not limited to this, and another predetermined layer may be further located between seed layer 115 and buffer layer 120. Buffer layer 120 may be located between seed layer 115 and channel layer 132. Buffer layer 120 may include a nitride, including III-V group materials, such as Al, Ga, In, B, or combinations thereof. Buffer layer 120 may include Al. x In y Ga 1-x-yN (0≤x≤1, 0≤y≤1, x+y≤1). For example, buffer layer 120 may include AlN, GaN, InN, InGaN, AlGaN, AlInN, AlInGaN, or combinations thereof. Buffer layer 120 may be made of a single layer or multiple layers. For example, buffer layer 120 may include a superlattice layer and a high-resistivity layer.

[0031] The superlattice layer reduces the difference in lattice constant and thermal expansion coefficient between the substrate 110 and the channel layer 132, thereby reducing the tensile and compressive stresses generated between the substrate 110 and the channel layer 132.

[0032] The high-resistivity layer can be located on the superlattice layer. For example, the high-resistivity layer can be located directly on the superlattice layer. However, this disclosure is not limited to this, and other layers can be located between the superlattice layer and the high-resistivity layer. The high-resistivity layer can be located between the superlattice layer and the channel layer 132. The high-resistivity layer can prevent semiconductor device degradation by preventing leakage current from flowing through the channel layer 132. The high-resistivity layer can be made of a low-conductivity material to electrically insulate the substrate 110 and the channel layer 132.

[0033] For example, a high-resistivity layer can have a resistance greater than or equal to approximately 1.0 × 10⁻⁶. 6 The resistance value in Ω•cm. For example, the resistance value of a high-resistivity layer can be greater than or equal to approximately 1.0 × 10⁻⁶ Ω·cm. 10 Ω•cm. As another example, the resistance of a high-resistivity layer can be greater than or equal to approximately 1.0 × 10⁻⁶ Ω•cm. 12 Ω•cm. Resistance can be measured by forming a measuring electrode within a high-resistivity layer and allowing current to flow through it.

[0034] The high-resistivity layer may include nitrides, including group III-V materials such as Al, Ga, In, B, or combinations thereof. The high-resistivity layer may include Al. x In y Ga 1-x-y N (0≤x≤1, 0≤y≤1, x+y≤1), and may include, for example, AlN, GaN, InN, InGaN, AlGaN, AlInN, AlInGaN, or combinations thereof. The high-resistivity layer may consist of a single layer or multiple layers.

[0035] A barrier layer 136 may be located on the channel layer 132. The barrier layer 136 may be directly located on the channel layer 132. However, it is not limited to this; another predetermined layer may be further located between the channel layer 132 and the barrier layer 136. The region of the channel layer 132 overlapping with the barrier layer 136 may be a drift region DTR. The drift region DTR may be located between the source electrode 173 and the drain electrode 175. When a potential difference is generated between the source electrode 173 and the drain electrode 175, carriers may move in the drift region DTR. The semiconductor device can be turned on / off depending on whether a voltage is applied to the gate electrode layer 155 and the magnitude of the voltage applied to the gate electrode layer 155. When a voltage greater than a threshold voltage is applied to the gate electrode layer 155 and the semiconductor device is turned on, a channel can be generated in the depletion region DPR. Therefore, carrier movement may occur in the drift region DTR. If a voltage below the threshold voltage is applied to the gate electrode layer 155 or no voltage is applied, the channel path in the depletion region DPR is blocked and no carrier movement occurs.

[0036] Barrier layer 136 may include a nitride, which includes group III-V materials such as Al, Ga, In, B, or combinations thereof. Barrier layer 136 may include Al x In y Ga 1-x-y N (0≤x≤1, 0≤y≤1, x+y≤1). For example, the barrier layer 136 may include AlN, GaN, InN, InGaN, AlGaN, AlInN, AlInGaN, or combinations thereof. The band gap of the barrier layer 136 can be adjusted by the composition ratio of Al or In.

[0037] The barrier layer 136 may comprise a semiconductor material having properties different from those of the channel layer 132. The barrier layer 136 may differ from the channel layer 132 in at least one aspect of polarization characteristics, band gap, and lattice constant. For example, the barrier layer 136 may comprise a material having a different band gap than the channel layer 132. In this case, the barrier layer 136 may have a higher band gap and a higher polarization than the channel layer 132. A two-dimensional electron gas 134 can be induced in the channel layer 132, which has a relatively low polarization, through the barrier layer 136. In this respect, the barrier layer 136 may also be referred to as a channel supply layer or a two-dimensional electron gas supply layer. The two-dimensional electron gas 134 may be formed within a portion of the channel layer 132 below the interface between the channel layer 132 and the barrier layer 136. The two-dimensional electron gas 134 may have a very high electron mobility.

[0038] Gate electrode layer 155 may be located on barrier layer 136. Gate electrode layer 155 may overlap a portion of barrier layer 136 in a third direction D3. Gate electrode layer 155 may overlap a portion of drift region DTR of channel layer 132 in a third direction D3. Gate electrode layer 155 may be located between source electrode 173 and drain electrode 175 in a second direction D2. Gate electrode layer 155 may be spaced apart from source electrode 173 and drain electrode 175 in the second direction D2. Gate electrode layer 155 may extend in a plane along first direction D1. In other words, gate electrode layer 155 may have a long strip shape extending in a plane along first direction D1.

[0039] The gate electrode layer 155 may include a conductive material. For example, the gate electrode layer 155 may include a metal, a metal alloy, a conductive metal nitride, a metal silicide, a doped semiconductor material, a conductive metal oxide, or a conductive metal oxide nitride. For example, the gate electrode layer 155 may be made of titanium nitride (TiN), tantalum carbide (TaC), tantalum nitride (TaN), titanium silicon nitride (TiSiN), tantalum silicon nitride (TaSiN), titanium titanium nitride (TaTiN), titanium aluminum nitride (TiAlN), tantalum aluminum nitride (TaAlN), tungsten nitride (WN), ruthenium (Ru), titanium aluminum (TiAl), titanium aluminum carbonitride (TiAlC-N), titanium aluminum carbide (TiAlC), titanium carbide (TiC), tantalum carbonitride (TaCN), or tungsten (W). It may be made of, but is not limited to, aluminum (Al), copper (Cu), cobalt (Co), titanium (Ti), tantalum (Ta), nickel (Ni), platinum (Pt), nickel-platinum (Ni-Pt), niobium (Nb), niobium nitride (NbN), niobium carbide (NbC), molybdenum (Mo), molybdenum nitride (MoN), molybdenum carbide (MoC), tungsten carbide (WC), rhodium (Rh), palladium (Rh), palladium (Pd), iridium (Ir), osmium (Os), silver (Ag), gold (Au), zinc (Zn), vanadium (V), or combinations thereof. The gate electrode layer 155 may be made of a single layer or multiple layers.

[0040] In some embodiments, a hard mask layer (not shown) may be further included on the gate electrode layer 155. The hard mask layer may be a hard mask used during the patterning of the gate electrode material layer or the gate semiconductor layer in the process of forming the gate electrode layer 155. However, the hard mask layer may be removed depending on the etch conditions during etching of the gate electrode material layer or according to the cleaning conditions after etching. For example, the hard mask layer may include silicon oxide, silicon nitride, silicon oxide nitride, or a combination thereof.

[0041] The gate semiconductor layer 152 is located between the barrier layer 136 and the gate electrode layer 155. That is, the gate semiconductor layer 152 can be located on the barrier layer 136, and the gate electrode layer 155 can be located on the gate semiconductor layer 152. The gate electrode layer 155 can have a Schottky contact with the gate semiconductor layer 152. However, it is not limited to this; in some cases, the gate electrode layer 155 can have an ohmic contact with the gate semiconductor layer 152. The gate semiconductor layer 152 can overlap with the gate electrode layer 155 on a third-direction D3. The upper surface of the gate semiconductor layer 152 can be entirely covered by the gate electrode layer 155.

[0042] The gate semiconductor layer 152 can be located between the source electrode 173 and the drain electrode 175 in the second direction D2. The gate semiconductor layer 152 can be spaced apart from the source electrode 173 and the drain electrode 175 in the second direction D2. The gate semiconductor layer 152 can be located closer to the source electrode 173 than the drain electrode 175. That is, the separation distance between the gate semiconductor layer 152 and the source electrode 173 can be smaller than the separation distance between the gate semiconductor layer 152 and the drain electrode 175.

[0043] The depletion region DPR can be formed in the channel layer 132 through the gate semiconductor layer 152. The depletion region DPR can be located within the drift region DTR and can have a narrower width than the drift region DTR. When the gate semiconductor layer 152, having a different band gap than the barrier layer 136, is located on the barrier layer 136, the energy level of the band in the portion of the barrier layer 136 overlapping with the gate semiconductor layer 152 can be increased. Accordingly, the depletion region DPR can be formed in the region of the channel layer 132 overlapping with the gate semiconductor layer 152. The depletion region DPR can be a region in the channel path of the channel layer 132 where the two-dimensional electron gas 134 is not formed or can have a lower electron concentration than the rest of the region. That is, the depletion region DPR can refer to the region in the drift region DTR where the flow of the two-dimensional electron gas 134 is interrupted. With the generation of the depletion region DPR, current no longer flows between the source electrode 173 and the drain electrode 175, and the channel path can be blocked. Therefore, the semiconductor device can have normally off characteristics.

[0044] In other words, the semiconductor device can be a normally off semiconductor device (HEMT, High Electron Mobility Transistor). Under normal conditions where no voltage is applied to the gate electrode layer 155, a depletion region DPR exists, and the semiconductor device can be in a cutoff state. When a voltage higher than a threshold voltage is applied to the gate electrode layer 155, the depletion region DPR disappears, and the two-dimensional electron gas 134 can remain connected within the drift region DTR without disconnecting. That is, the two-dimensional electron gas 134 can be formed as a channel path spanning between the source electrode 173 and the drain electrode 175, and the semiconductor device can be in a conducting state. In summary, the semiconductor device can include semiconductor layers with different polarization characteristics, and a semiconductor layer with relatively high polarization can induce a two-dimensional electron gas 134 in another semiconductor layer forming a heterojunction with it. This two-dimensional electron gas 134 can be used as a channel between the source electrode 173 and the drain electrode 175, and the continuation or interruption of the flow of the two-dimensional electron gas 134 can be controlled by applying a bias voltage to the gate electrode layer 155. In the gate-off state, the flow of the two-dimensional electron gas 134 is blocked, so current can not flow between the source electrode 173 and the drain electrode 175. In the gate-on state, the two-dimensional electron gas 134 continues to flow, and therefore current can flow between the source electrode 173 and the drain electrode 175.

[0045] Although the case of a normally-off high electron mobility transistor has been described above, this disclosure is not limited thereto. For example, the semiconductor device may be a normally-on high electron mobility transistor. In the case of a normally-on high electron mobility transistor, the gate semiconductor layer 152 may be omitted, and correspondingly, the gate electrode layer 155 may be directly located on the barrier layer 136. That is, the gate electrode layer 155 may contact the barrier layer 136. However, this disclosure is not limited thereto, and a gate dielectric layer may be interposed between the gate electrode layer 155 and the barrier layer 136. In this structure, when no voltage is applied to the gate electrode layer 155, the two-dimensional electron gas 134 can be used as a channel, and current can flow between the source electrode 173 and the drain electrode 175. In addition, when a negative voltage is applied to the gate electrode layer 155, a depletion region DPR in which the flow of the two-dimensional electron gas 134 is cut off can be generated at the bottom of the gate electrode layer 155.

[0046] For example, to fabricate a GaN power semiconductor device with normally off characteristics, an activation process for the gate semiconductor layer 152 is required. For example, a method for activating the gate semiconductor layer 152, which comprises a magnesium-doped p-type GaN, is to apply heat in a nitrogen (N2) atmosphere. However, in this process, due to the high-temperature treatment, changes such as the mixing of impurities (such as oxygen, carbon, and hydrogen) and an increase in surface roughness sometimes occur.

[0047] As described below, by activating the gate semiconductor material layer 152a in an oxygen atmosphere, the activation efficiency of the acceptor can be improved while reducing the activation process temperature. An oxide layer 152b can be formed on the surface of the gate semiconductor material layer 152a, which can reduce the content of impurities such as oxygen, carbon and hydrogen in the gate semiconductor material layer 152a, prevent the increase of surface roughness, enhance depletion in the depletion region DPR below the gate semiconductor layer 152, and suppress gate leakage current.

[0048] Therefore, the gate semiconductor layer 152 may include a gate semiconductor material layer 152a and an oxide layer 152b.

[0049] The gate semiconductor material layer 152a may be located on the barrier layer 136. For example, the gate semiconductor material layer 152a may be located on the barrier layer 136, the oxide layer 152b may be located on the gate semiconductor material layer 152a, and the gate electrode layer 155 may be located on the oxide layer 152b. The upper surface of the gate semiconductor material layer 152a may be completely covered by the oxide layer 152b. The gate semiconductor material layer 152a may overlap with the gate electrode layer 155 on the third direction D3.

[0050] The gate semiconductor material layer 152a may include a nitride, which includes group III-V materials, such as Al, Ga, In, B, or combinations thereof. The gate semiconductor material layer 152a may include Al. x In y Ga 1-x-y N (0≤x≤1, 0≤y≤1, x+y≤1). For example, the gate semiconductor material layer 152a may include AlN, GaN, InN, InGaN, AlGaN, AlInN, AlInGaN, or combinations thereof. The gate semiconductor material layer 152a may include a material having a different band gap than the barrier layer 136. For example, the gate semiconductor material layer 152a may include GaN, and the barrier layer 136 may include AlGaN.

[0051] The gate semiconductor material layer 152a may be doped with a predetermined impurity. In this case, the impurity doped into the gate semiconductor material layer 152a may be a p-type dopant capable of providing holes. For example, the gate semiconductor material layer 152a may include GaN doped with a p-type impurity. That is, the gate semiconductor material layer 152a may be formed of a p-GaN layer. However, it is not limited to this; the gate semiconductor material layer 152a may be a p-AlGaN layer. The impurity doped into the gate semiconductor material layer 152a may be magnesium (Mg). The gate semiconductor material layer 152a may be formed as a single layer or multiple layers.

[0052] The oxide layer 152b may be located on the gate semiconductor material layer 152a. In other words, the oxide layer 152b may be located between the gate semiconductor material layer 152a and the gate electrode layer 155. For example, the oxide layer 152b may be located on the gate semiconductor material layer 152a, and the gate electrode layer 155 may be located on the oxide layer 152b. The upper surface of the gate semiconductor material layer 152a may be completely covered by the oxide layer 152b. The oxide layer 152b may overlap with the gate semiconductor material layer 152a and the gate electrode layer 155 on a third-direction D3. The upper surface of the oxide layer 152b may be completely covered by the gate electrode layer 155.

[0053] Since the oxide layer 152b is formed by activating the gate semiconductor material layer 152a in an oxygen atmosphere, it can contain oxygen.

[0054] For example, oxide layer 152b can have a density greater than or equal to about 1E18 atoms / cm², as measured by secondary ion mass spectrometry. 3 The oxygen concentration, for example, is greater than or equal to about 2E18 atoms / cm³. 3 Greater than or equal to approximately 3E18 atoms / cm 3 Greater than or equal to approximately 4E18 atoms / cm 3 Greater than or equal to approximately 5E18 atoms / cm 3 Greater than or equal to approximately 6E18 atoms / cm 3 Greater than or equal to approximately 7E18 atoms / cm 3 Greater than or equal to approximately 8E18 atoms / cm 3 Or greater than or equal to approximately 9E18 atoms / cm 3 The oxide layer 152b may have a density of less than or equal to about 1E19 atoms / cm², as measured by secondary ion mass spectrometry. 3 The oxygen concentration, for example, is less than or equal to about 9E18 atoms / cm³. 3 Less than or equal to approximately 8E18 atoms / cm 3 Less than or equal to approximately 7E18 atoms / cm 3 Less than or equal to approximately 6E18 atoms / cm 3 Less than or equal to approximately 5E18 atoms / cm 3 Less than or equal to approximately 4E18 atoms / cm 3 Less than or equal to approximately 3E18 atoms / cm 3 Or less than or equal to approximately 2E18 atoms / cm 3 The oxide layer 152b can have a range from approximately 1E18 atoms / cm², as measured by secondary ion mass spectrometry. 3 Approximately 1E19 atoms / cm 3 The oxygen concentration.

[0055] Here, the oxygen concentration of oxide layer 152b can be determined using a secondary ion mass spectrometry (SIMS) method with an oxygen ion source (6 kV) at a certain depth in the thickness direction (i.e., the third direction D3) of oxide layer 152b. The point for measuring the oxygen concentration of oxide layer 152b can be the midpoint in the width direction (i.e., the second direction D2) and the midpoint in the thickness direction (i.e., the third direction D3) of oxide layer 152b. For example, the depth for measuring the oxygen concentration of oxide layer 152b can be a point approximately 5 nm, 4 nm, 3 nm, 2 nm, or 1 nm deep from a surface of oxide layer 152b.

[0056] In addition to oxygen, oxide layer 152b may comprise the same material as gate semiconductor material layer 152a. For example, oxide layer 152b may comprise a nitride comprising group III-V materials and excluding oxygen, such as Al, Ga, In, B, or combinations thereof. Oxide layer 152b may comprise Al x In y Ga 1-x-y N (0≤x≤1, 0≤y≤1, x+y≤1) and the remaining content does not include oxygen, and may include, for example, AlN, GaN, InN, InGaN, AlGaN, AlInN, AlInGaN, or combinations thereof. Additionally, the same material included in the oxide layer 152b as the gate semiconductor material layer 152a may also be doped with predetermined impurities.

[0057] For example, the thickness of oxide layer 152b can be greater than or equal to about 1 nm, and can be, for example, greater than or equal to about 2 nm, greater than or equal to about 3 nm, greater than or equal to about 4 nm, greater than or equal to about 5 nm, greater than or equal to about 6 nm, greater than or equal to about 7 nm, greater than or equal to about 8 nm, or greater than or equal to about 9 nm. The thickness of oxide layer 152b can be less than or equal to about 10 nm, for example, less than or equal to about 9 nm, less than or equal to about 8 nm, less than or equal to about 7 nm, less than or equal to about 6 nm, less than or equal to about 5 nm, less than or equal to about 4 nm, less than or equal to about 3 nm, or less than or equal to about 2 nm. The thickness of oxide layer 152b can be from about 2 nm to about 5 nm.

[0058] Here, the thickness of oxide layer 152b can be the shortest distance in the third direction D3 from the lower surface of oxide layer 152b in contact with gate semiconductor material layer 152a to the upper surface of oxide layer 152b in contact with gate electrode layer 155.

[0059] Since the oxide layer 152b is located on the surface of the gate semiconductor material layer 152a, the content of impurities such as oxygen, carbon and hydrogen in the gate semiconductor material layer 152a can be reduced, and the increase in surface roughness can be prevented.

[0060] Therefore, the oxygen concentration of the oxide layer 152b measured by secondary ion mass spectrometry can be greater than the oxygen concentration of the gate semiconductor material layer 152a measured by secondary ion mass spectrometry.

[0061] For example, the gate semiconductor material layer 152a can have a density of less than or equal to about 5E17 atoms / cm², as measured by secondary ion mass spectrometry. 3 The oxygen concentration, for example, is less than or equal to about 4E17 atoms / cm³. 3 Less than or equal to approximately 3E17 atoms / cm 3 Less than or equal to approximately 2E17 atoms / cm 3 Less than or equal to approximately 1E17 atoms / cm 3 Less than or equal to approximately 9E16 atoms / cm 3 Less than or equal to approximately 8E16 atoms / cm 3 Less than or equal to approximately 7E16 atoms / cm 3 Or less than or equal to approximately 6E16 atoms / cm 3 The gate semiconductor material layer 152a can have a density greater than or equal to 0 atoms / cm², as measured by secondary ion mass spectrometry. 3 The oxygen concentration, for example, is greater than or equal to 1E16 atoms / cm³. 3 Greater than or equal to 2E16 atoms / cm 3 ≥3E16 atoms / cm 3 ≥4E16 atoms / cm 3 5E16 atoms / cm 3 Greater than or equal to 6E16 atoms / cm 3 ≥7E16 atoms / cm 3 Greater than or equal to 8E16 atoms / cm 3 Or greater than or equal to 9E16 atoms / cm 3 The gate semiconductor material layer 152a can have a density of approximately 1E16 atoms / cm², as measured by secondary ion mass spectrometry. 3 Approximately 5E17 atoms / cm 3 Oxygen concentration range.

[0062] Furthermore, the gate semiconductor material layer 152a can have a density of less than approximately 1E18 atoms / cm², as measured by secondary ion mass spectrometry. 3 The carbon concentration, for example, is less than or equal to about 9E17 atoms / cm³.3 Less than or equal to approximately 8E17 atoms / cm 3 Less than or equal to approximately 7E17 atoms / cm 3 Less than or equal to approximately 6E17 atoms / cm 3 Less than or equal to approximately 5E17 atoms / cm 3 Less than or equal to approximately 4E17 atoms / cm 3 Less than or equal to approximately 3E17 atoms / cm 3 Or less than or equal to approximately 2E17 atoms / cm 3 The gate semiconductor material layer 152a can have a density greater than or equal to about 1E17 atoms / cm². 3 The carbon concentration, for example, greater than or equal to about 2E17 atoms / cm³. 3 Greater than or equal to approximately 3E17 atoms / cm 3 Greater than or equal to approximately 4E17 atoms / cm 3 Greater than or equal to approximately 5E17 atoms / cm 3 Greater than or equal to approximately 6E17 atoms / cm 3 Greater than or equal to approximately 7E17 atoms / cm 3 Greater than or equal to approximately 8E17 atoms / cm 3 Or greater than or equal to approximately 9E17 atoms / cm 3 The gate semiconductor material layer 152a can have a density greater than or equal to about 1E¹⁷ atoms / cm², as measured by secondary ion mass spectrometry. 3 And less than approximately 1E18 atoms / cm 3 The carbon concentration.

[0063] Furthermore, the gate semiconductor material layer 152a can have a density of less than approximately 1E18 atoms / cm², as measured by secondary ion mass spectrometry. 3 The hydrogen concentration, for example, is less than or equal to about 9E17 atoms / cm³. 3 Less than or equal to approximately 8E17 atoms / cm 3 Less than or equal to approximately 7E17 atoms / cm 3 Less than or equal to approximately 6E17 atoms / cm 3 Less than or equal to approximately 5E17 atoms / cm 3 Less than or equal to approximately 4E17 atoms / cm 3 Less than or equal to approximately 3E17 atoms / cm 3 Or less than or equal to approximately 2E17 atoms / cm 3 The gate semiconductor material layer 152a can have a density greater than or equal to about 1E¹⁷ atoms / cm², as measured by secondary ion mass spectrometry. 3 The hydrogen concentration, for example, is greater than or equal to about 2E17 atoms / cm³.3 Greater than or equal to approximately 3E17 atoms / cm 3 Greater than or equal to approximately 4E17 atoms / cm 3 Greater than or equal to approximately 5E17 atoms / cm 3 Greater than or equal to approximately 6E17 atoms / cm 3 Greater than or equal to approximately 7E17 atoms / cm 3 Greater than or equal to approximately 8E17 atoms / cm 3 Or greater than or equal to approximately 9E17 atoms / cm 3 The gate semiconductor material layer 152a can have a density greater than or equal to about 1E¹⁷ atoms / cm², as measured by secondary ion mass spectrometry. 3 And less than approximately 1E18 atoms / cm 3 The hydrogen concentration.

[0064] For example, the oxygen, carbon, and hydrogen concentrations of the gate semiconductor material layer 152a can be measured using secondary ion mass spectrometry (SIMS) with an oxygen ion source (6 kV) at a certain depth in the thickness direction (i.e., the third direction D3) of the gate semiconductor material layer 152a. The point for measuring the oxygen, carbon, and hydrogen concentrations of the gate semiconductor material layer 152a can be the midpoint in the width direction (i.e., the second direction D2) and the midpoint in the thickness direction (i.e., the third direction D3) of the gate semiconductor material layer 152a. For example, the depth at which the oxygen concentration, carbon concentration, and hydrogen concentration of the gate semiconductor material layer 152a are measured can be a point approximately 100 nm, 90 nm, 80 nm, 70 nm, 60 nm, 50 nm, 40 nm, 30 nm, 20 nm, 10 nm, 9 nm, 8 nm, 7 nm, 6 nm, 5 nm, 4 nm, 3 nm, 3 nm, 2 nm, or 1 nm deep from a surface of the gate semiconductor material layer 152a.

[0065] The semiconductor device may further include first to third protective layers 140, 150, and 160 located on the barrier layer 136 and the gate electrode layer 155. For example, the semiconductor device may include a first protective layer 140, a second protective layer 150 on the first protective layer 140, and a third protective layer 160 on the second protective layer 150. The first protective layer 140 may cover the upper surface of the barrier layer 136 and the gate electrode layer 155, and may also cover the side surfaces of the gate electrode layer 155 and the gate semiconductor layer 152. The lower surface of the first protective layer 140 may contact the barrier layer 136, the gate electrode layer 155, and the gate semiconductor layer 152. The upper surface of the first protective layer 140 may contact the second protective layer 150. The second protective layer 150 and the third protective layer 160 may be separated from the barrier layer 136, the gate electrode layer 155, and the gate semiconductor layer 152 through the first protective layer 140. Therefore, the second protective layer 150 and the third protective layer 160 may not be in contact with the barrier layer 136, the gate electrode layer 155 and the gate semiconductor layer 152.

[0066] The barrier layer 136 or gate electrode layer 155, etc., can be protected by the first to third protective layers 140, 150, and 160 and can be separated from other components. The first to third protective layers 140, 150, and 160 may include insulating materials. For example, the first to third protective layers 140, 150, and 160 may include oxides such as SiO2 or Al2O3. As another example, the first to third protective layers 140, 150, and 160 may include nitrides such as SiN or oxide oxynitrides such as SiON. The first to third protective layers 140, 150, and 160 may contain the same material or different materials. When the first to third protective layers 140, 150, and 160 are made of the same material, the boundaries between the first to fourth protective layers 156, 140, 150, and 160 may not be visible. The first to third protective layers 140, 150, and 160 may each be formed as a single layer or multiple layers.

[0067] Source electrode 173 and drain electrode 175 may be located on channel layer 132. Source electrode 173 and drain electrode 175 may be spaced apart from each other in the second direction D2, and gate electrode layer 155 and gate semiconductor layer 152 may be located between source electrode 173 and drain electrode 175. Gate electrode layer 155 and gate semiconductor layer 152 are spaced apart from source electrode 173 and drain electrode 175 in the second direction D2. Source electrode 173 may be electrically connected to channel layer 132 on one side of gate electrode layer 155. Drain electrode 175 may be electrically connected to channel layer 132 on the other side of gate electrode layer 155. Source electrode 173 and drain electrode 175 may be located outside the drift region DTR of channel layer 132. The interface between source electrode 173 and channel layer 132 may be one edge of drift region DTR. Similarly, the interface between drain electrode 175 and channel layer 132 may be another edge of drift region DTR. However, this disclosure is not limited to this; the source electrode 173 and drain electrode 175 may not be located outside the drift region DTR of the channel layer 132. In this case, the channel layer 132 may not be recessed, and the source electrode 173 and drain electrode 175 may be located on the upper surface of the channel layer 132. The bottom surfaces of the source electrode 173 and drain electrode 175 may contact the upper surface of the channel layer 132. Additionally, the barrier layer 136 may not be recessed. The source electrode 173 and drain electrode 175 may be located on the upper surface of the barrier layer 136. In other words, the lower surfaces of the source electrode 173 and drain electrode 175 may contact the upper surface of the barrier layer 136. The portion of the channel layer 132 in contact with the source electrode 173 and drain electrode 175 may be highly doped. In this case, charge carriers passing through the two-dimensional electron gas 134 may be transported to the source electrode 173 and drain electrode 175 through the highly doped portion of the channel layer 132, i.e., the upper part of the two-dimensional electron gas 134. The source electrode 173 and the drain electrode 175 do not need to be in direct horizontal contact with the two-dimensional electron gas 134. The horizontal direction can refer to the direction parallel to the upper surface of the channel layer 132 or the barrier layer 136.

[0068] The source electrode 173 and the drain electrode 175 can extend in a plane along a first direction D1. That is, the source electrode 173 and the drain electrode 175 can have a long rod shape extending in a plane along the first direction D1. The source electrode 173 and the drain electrode 175 can extend in a parallel direction. The source electrode 173 and the drain electrode 175 can extend in a direction parallel to the gate electrode layer 155.

[0069] The source electrode 173 and drain electrode 175 may include conductive materials. For example, the source electrode 173 and drain electrode 175 may include metals, metal alloys, conductive metal nitrides, metal silicides, doped semiconductor materials, conductive metal oxides, or conductive metal oxides. For example, the source electrode 173 and drain electrode 175 may be made of titanium nitride (TiN), tantalum carbide (TaC), tantalum nitride (TaN), titanium silicon nitride (TiSiN), tantalum silicon nitride (TaSiN), titanium titanium nitride (TaTiN), titanium aluminum nitride (TiAlN), tantalum aluminum nitride (TaAlN), tungsten nitride (WN), ruthenium (Ru), titanium aluminum (TiAl), titanium aluminum carbonitride (TiAlC-N), titanium aluminum carbide (TiAlC), titanium carbide (TiC), tantalum carbonitride (TaCN), or tungsten. The material may be made of, but is not limited to, molybdenum (Mo), molybdenum nitride (MoN), molybdenum carbide (MoC), tungsten carbide (WC), or combinations thereof, including but not limited to, molybdenum (W), aluminum (Al), copper (Cu), cobalt (Co), titanium (Ti), tantalum (Ta), nickel (Ni), platinum (Pt), nickel-platinum (Ni-Pt), niobium (Nb), niobium nitride (NbN), niobium carbide (NbC), molybdenum (MoMo), molybdenum carbide (MoN), molybdenum carbide (MoC), tungsten carbide (WC), rhodium (Ph), palladium (Rh), palladium (Pd), iridium (Ir), osmium (Os), silver (Ag), gold (Au), zinc (Zn), vanadium (V), or combinations thereof. The source electrode 173 and drain electrode 175 may be made of a single layer or multiple layers. The source electrode 173 and drain electrode 175 may have ohmic contact with the channel layer 132. The region within the channel layer 132 that contacts the source electrode 173 and drain electrode 175 may be doped at a relatively high concentration compared to other regions.

[0070] The source electrode 173 may include a lower source electrode 173a, an intermediate source electrode 173b, and an upper source electrode 173c. The intermediate source electrode 173b may be located on the lower source electrode 173a. The upper source electrode 173c may be located on the intermediate source electrode 173b. The lower source electrode 173a may be in direct contact with the channel layer 132 and may be electrically connected to the channel layer 132. The intermediate source electrode 173b and the upper source electrode 173c may not be in direct contact with the channel layer 132, but may be electrically connected to the channel layer 132 through the lower source electrode 173a.

[0071] The drain electrode 175 may include a lower drain electrode 175a, an intermediate drain electrode 175b, and an upper drain electrode 175c. The intermediate drain electrode 175b may be located on the lower drain electrode 175a. The upper drain electrode 175c may be located on the intermediate drain electrode 175b. The lower drain electrode 175a may be in direct contact with the channel layer 132 and may be electrically connected to the channel layer 132. The intermediate drain electrode 175b and the upper drain electrode 175c may not be in direct contact with the channel layer 132, but may be electrically connected to the channel layer 132 through the lower drain electrode 175a.

[0072] The lower source electrode 173a and the lower drain electrode 175a can be located on the first protective layer 140. The lower source electrode 173a and the lower drain electrode 175a can be located between the first protective layer 140 and the second protective layer 150. The lower source electrode 173a and the lower drain electrode 175a can penetrate the first protective layer 140 and the barrier layer 136, and the trenches recessed on the upper surface of the channel layer 132 can be positioned spaced apart from each other on both sides of the gate electrode layer 155. The lower source electrode 173a and the lower drain electrode 175a can be located in the trenches on both sides of the gate electrode layer 155, respectively. The lower source electrode 173a and the lower drain electrode 175a can be formed to fill the interior of the trenches. Within the trenches, the lower source electrode 173a and the lower drain electrode 175a can contact the channel layer 132 and the barrier layer 136. The channel layer 132 can form the bottom surface and sidewalls of the trenches, and the barrier layer 136 can form the sidewalls of the trenches. Therefore, the lower source electrode 173a and the lower drain electrode 175a can contact the upper surface and side surface of the channel layer 132. Additionally, the lower source electrode 173a and the lower drain electrode 175a can contact the side surface of the barrier layer 136. That is, the lower source electrode 173a and the lower drain electrode 175a can cover the side surfaces of the channel layer 132 and the barrier layer 136. The upper surface of the lower source electrode 173a and the lower drain electrode 175a can protrude further than the upper surface of the first protective layer 140. Furthermore, at least one of the lower source electrode 173a and the lower drain electrode 175a can cover at least a portion of the upper surface of the first protective layer 140. A second protective layer 150 can be located on the lower source electrode 173a and the lower drain electrode 175a. At least a portion of the lower source electrode 173a and the lower drain electrode 175a can be covered by the second protective layer 150.

[0073] The semiconductor device may further include a first field dispersion layer 177a located on the first protective layer 140. The first field dispersion layer 177a may be located between the source electrode 173 and the drain electrode 175. The gate electrode layer 155 may be covered by the first field dispersion layer 177a. The first field dispersion layer 177a may be electrically connected to the source electrode 173. For example, the first field dispersion layer 177a may be connected to the lower source electrode 173a. The first field dispersion layer 177a may include the same material as the lower source electrode 173a and may be located in the same layer as the lower source electrode 173a. The first field dispersion layer 177a may be formed simultaneously with the lower source electrode 173a in the same process. The boundary between the first field dispersion layer 177a and the lower source electrode 173a is unclear, and the first field dispersion layer 177a may be integrally formed with the lower source electrode 173a. However, it is not limited to this; the first field dispersion layer 177a may be a separate component separate from the lower source electrode 173a. Furthermore, the first field dispersion layer 177a can be located in a different layer than the lower source electrode 173a, and can be formed in a different process. In some cases, the first field dispersion layer 177a can be electrically connected to the gate electrode layer 155. For example, an opening can be formed in the first protective layer 140 overlapping the gate electrode layer 155, and the first field dispersion layer 177a can be connected to the gate electrode layer 155 through the opening. In this case, the first field dispersion layer 177a may also not be connected to the source electrode 173.

[0074] The semiconductor device may further include a second field dispersion layer 177b on the second protective layer 150. The second field dispersion layer 177b may form a field dispersion layer together with the first field dispersion layer 177a. The second field dispersion layer 177b may be located between the source electrode 173 and the drain electrode 175. The second field dispersion layer 177b may overlap with the gate electrode layer 155 in a third direction D3. The second field dispersion layer 177b may overlap with the first field dispersion layer 177a in a third direction D3. The gate electrode layer 155 and the first field dispersion layer 177a may be covered by the second field dispersion layer 177b. The second field dispersion layer 177b may be wider than the first field dispersion layer 177a. The second field dispersion layer 177b may completely cover the first field dispersion layer 177a. However, it is not limited to this; the width, positional relationship, etc., of the first field dispersion layer 177a and the second field dispersion layer 177b may be changed in various ways. The second field dispersion layer 177b may be electrically connected to the source electrode 173. For example, the second field dispersion layer 177b can be connected to the intermediate source electrode 173b. The second field dispersion layer 177b can comprise the same material as the intermediate source electrode 173b and can be located in the same layer as the intermediate source electrode 173b. The second field dispersion layer 177b can be formed simultaneously with the intermediate source electrode 173b in the same process. The boundary between the second field dispersion layer 177b and the intermediate source electrode 173b is unclear, and the second field dispersion layer 177b can be integrally formed with the intermediate source electrode 173b. However, it is not limited to this; the second field dispersion layer 177b can be a separate component separate from the intermediate source electrode 173b. Furthermore, the second field dispersion layer 177b can be located in a different layer than the intermediate source electrode 173b and can be formed in a different process.

[0075] The semiconductor device may further include a third field dispersion layer 177c on a third protective layer 160. The third field dispersion layer 177c may form a field dispersion layer together with the first field dispersion layer 177a and the second field dispersion layer 177b. The third field dispersion layer 177c may be located between the source electrode 173 and the drain electrode 175. The third field dispersion layer 177c may overlap with the gate electrode layer 155 in a third direction D3. The third field dispersion layer 177c may overlap with the first field dispersion layer 177a and the second field dispersion layer 177b in a third direction D3. The gate electrode layer 155, the first field dispersion layer 177a, and the second field dispersion layer 177b may be covered by the third field dispersion layer 177c. The third field dispersion layer 177c may be wider than the second field dispersion layer 177b. The third field dispersion layer 177c may completely cover the second field dispersion layer 177b. However, this is not a limitation; the widths, positional relationships, etc., of the first field dispersion layer 177a, the second field dispersion layer 177b, and the third field dispersion layer 177c can be changed in various ways. The third field dispersion layer 177c can be electrically connected to the source electrode 173. For example, the third field dispersion layer 177c can be connected to the upper source electrode 173c. The third field dispersion layer 177c can comprise the same material as the upper source electrode 173c and can be located in the same layer as the upper source electrode 173c. The third field dispersion layer 177c can be formed simultaneously with the upper source electrode 173c in the same process. The boundary between the third field dispersion layer 177c and the upper source electrode 173c is unclear, and the third field dispersion layer 177c can be integrally formed with the upper source electrode 173c. However, this is not a limitation; the third field dispersion layer 177c can be a separate component separate from the upper source electrode 173c. Furthermore, the third field dispersion layer 177c can be located in a different layer than the upper source electrode 173c and can be formed in a different process.

[0076] In some embodiments, at least one of the first field dispersion layer 177a, the second field dispersion layer 177b, or the third field dispersion layer 177c may be omitted. For example, a semiconductor device may include the first field dispersion layer 177a, but may not include the second field dispersion layer 177b or the third field dispersion layer 177c. Alternatively, a semiconductor device may include the second field dispersion layer 177b, but not the first field dispersion layer 177a or the third field dispersion layer 177c. Alternatively, a semiconductor device may include the third field dispersion layer 177c, but not the first field dispersion layer 177a or the second field dispersion layer 177b. Alternatively, a semiconductor device may not include the first field dispersion layer 177a, the second field dispersion layer 177b, and the third field dispersion layer 177c.

[0077] Figure 4 yes Figure 2 An enlarged cross-sectional view of part P shows another embodiment.

[0078] Figure 4The implementation methods shown are the same as Figure 2 The embodiments shown are essentially the same, therefore their description will be omitted, and the differences will be mainly explained. Additionally, the same reference numerals are used for the same components as in the foregoing embodiments.

[0079] Reference Figure 4 The gate semiconductor layer 152 is activated in an oxygen atmosphere, but an oxide layer 152b may not be formed on the surface of the gate semiconductor layer 152.

[0080] The gate semiconductor layer 152 may be located on the barrier layer 136. In other words, the gate semiconductor layer 152 may be located between the barrier layer 136 and the gate electrode layer 155. For example, the gate semiconductor layer 152 may be located on the barrier layer 136, and the gate electrode layer 155 may be located on the gate semiconductor layer 152. The upper surface of the gate semiconductor layer 152 may be entirely covered by the gate electrode layer 155. The gate semiconductor layer 152 may overlap with the gate electrode layer 155 on the third direction D3.

[0081] However, as the gate semiconductor layer 152 is activated in an oxygen atmosphere, the gate semiconductor layer 152 has a low content of impurities such as oxygen, carbon and hydrogen and its surface roughness does not increase.

[0082] For example, the gate semiconductor layer 152 may have a density of less than or equal to about 5E17 atoms / cm², as measured by secondary ion mass spectrometry. 3 The oxygen concentration, for example, is less than or equal to about 4E17 atoms / cm³. 3 Less than or equal to approximately 3E17 atoms / cm 3 Less than or equal to approximately 2E17 atoms / cm 3 Less than or equal to approximately 1E17 atoms / cm 3 Less than or equal to approximately 9E16 atoms / cm 3 Less than or equal to approximately 8E16 atoms / cm 3 Less than or equal to approximately 7E16 atoms / cm 3 Or less than or equal to approximately 6E16 atoms / cm 3 The gate semiconductor layer 152 may have a density greater than or equal to 0 atoms / cm², as measured by secondary ion mass spectrometry. 3 The oxygen concentration, for example, is greater than or equal to about 1E16 atoms / cm³. 3 Greater than or equal to approximately 2E16 atoms / cm 3 Greater than or equal to approximately 3E16 atoms / cm 3 Greater than or equal to approximately 4E16 atoms / cm 3 Greater than or equal to approximately 5E16 atoms / cm 3 Greater than or equal to approximately 6E16 atoms / cm 3Greater than or equal to approximately 7E16 atoms / cm 3 Greater than or equal to approximately 8E16 atoms / cm 3 Or greater than or equal to approximately 9E16 atoms / cm 3 The gate semiconductor layer 152 can have a range from about 1E16 atoms / cm², as measured by secondary ion mass spectrometry. 3 Approximately 5E17 atoms / cm 3 The oxygen concentration.

[0083] Furthermore, the gate semiconductor layer 152 can have a density of less than about 1E18 atoms / cm², as measured by secondary ion mass spectrometry. 3 The carbon concentration, for example, is less than or equal to about 9E17 atoms / cm³. 3 Less than or equal to approximately 8E17 atoms / cm 3 Less than or equal to approximately 7E17 atoms / cm 3 Less than or equal to approximately 6E17 atoms / cm 3 Less than or equal to approximately 5E17 atoms / cm 3 Less than or equal to approximately 4E17 atoms / cm 3 Less than or equal to approximately 3E17 atoms / cm 3 Or less than or equal to approximately 2E17 atoms / cm 3 The gate semiconductor layer 152 may have a density greater than or equal to about 1E17 atoms / cm², as measured by secondary ion mass spectrometry. 3 The carbon concentration, for example, greater than or equal to about 2E17 atoms / cm³. 3 Greater than or equal to approximately 3E17 atoms / cm 3 Greater than or equal to approximately 4E17 atoms / cm 3 Greater than or equal to approximately 5E17 atoms / cm 3 Greater than or equal to approximately 6E17 atoms / cm 3 Greater than or equal to approximately 7E17 atoms / cm 3 Greater than or equal to approximately 8E17 atoms / cm 3 Or greater than or equal to approximately 9E17 atoms / cm 3 The gate semiconductor layer 152 may have a density greater than or equal to about 1E17 atoms / cm², as measured by secondary ion mass spectrometry. 3 And less than approximately 1E18 atoms / cm 3 The carbon concentration.

[0084] Furthermore, the gate semiconductor layer 152 can have a density of less than about 1E18 atoms / cm², as measured by secondary ion mass spectrometry. 3 The hydrogen concentration, for example, is less than or equal to about 9E17 atoms / cm³. 3Less than or equal to approximately 8E17 atoms / cm 3 Less than or equal to approximately 7E17 atoms / cm 3 Less than or equal to approximately 6E17 atoms / cm 3 Less than or equal to approximately 5E17 atoms / cm 3 Less than or equal to approximately 4E17 atoms / cm 3 Less than or equal to approximately 3E17 atoms / cm 3 Or less than or equal to approximately 2E17 atoms / cm 3 The gate semiconductor layer 152 may have a density greater than or equal to about 1E17 atoms / cm², as measured by secondary ion mass spectrometry. 3 The hydrogen concentration, for example, is greater than or equal to about 2E17 atoms / cm³. 3 Greater than or equal to approximately 3E17 atoms / cm 3 Greater than or equal to approximately 4E17 atoms / cm 3 Greater than or equal to approximately 5E17 atoms / cm 3 Greater than or equal to approximately 6E17 atoms / cm 3 Greater than or equal to approximately 7E17 atoms / cm 3 Greater than or equal to approximately 8E17 atoms / cm 3 Or greater than or equal to approximately 9E17 atoms / cm 3 The gate semiconductor layer 152 may have a density greater than or equal to about 1E17 atoms / cm², as measured by secondary ion mass spectrometry. 3 And less than approximately 1E18 atoms / cm 3 The hydrogen concentration.

[0085] For example, the oxygen, carbon, and hydrogen concentrations of the gate semiconductor layer 152 can be measured at a certain depth in the thickness direction (i.e., the third direction D3) of the gate semiconductor layer 152 using secondary ion mass spectrometry (SIMS) with an oxygen ion source (6 kV). The point for measuring the oxygen, carbon, and hydrogen concentrations of the gate semiconductor layer 152 can be the midpoint in the width direction (i.e., the second direction D2) and the midpoint in the thickness direction (i.e., the third direction D3) of the gate semiconductor layer 152. For example, the depth at which the oxygen concentration, carbon concentration, and hydrogen concentration of the gate semiconductor layer 152 are measured can be a point approximately 100 nm, 90 nm, 80 nm, 70 nm, 60 nm, 50 nm, 40 nm, 30 nm, 20 nm, 10 nm, 9 nm, 8 nm, 7 nm, 6 nm, 5 nm, 4 nm, 3 nm, 3 nm, 2 nm, or 1 nm deep from a surface of the gate semiconductor layer 152.

[0086] Figure 5yes Figure 2 An enlarged cross-sectional view of part P shows another embodiment.

[0087] Figure 5 The implementation methods shown are the same as Figure 2 The embodiments shown are essentially the same, therefore their description will be omitted, and the differences will be mainly explained. Additionally, the same reference numerals are used for the same components as in the foregoing embodiments.

[0088] Reference Figure 5 The oxide layer 152b may include a first layer 152b1 on the gate semiconductor material layer 152a, and a second layer 152b2 between the first layer 152b1 and the gate electrode layer 155.

[0089] The first layer 152b1 and the second layer 152b2 of the oxide layer 152b may include oxygen and may include the same material as the gate semiconductor material layer 152a, and the remaining content does not include oxygen. The boundary between the first layer 152b1 and the second layer 152b2 may not be clearly visible.

[0090] For example, the first layer 152b1 can be a native oxide layer, and the second layer 152b2 can be an oxide layer formed by activating the gate semiconductor material layer 152a in an oxygen atmosphere. In other words, the first layer 152b1 can be formed not by activating the gate semiconductor material layer 152a in an oxygen atmosphere as the second layer 152b2 is, but by exposing the gate semiconductor material layer 152a to air.

[0091] For example, the thickness of the second layer 152b2 can be greater than the thickness of the first layer 152b1. The first layer 152b1 is a natural oxide layer, and since the second layer 152b2 is formed by activating the gate semiconductor material layer 152a in an oxygen atmosphere, the thickness of the second layer 152b2 is relatively thicker than that of the first layer 152b1, and therefore the second layer 152b2 can enhance the depletion of the gate semiconductor layer 152 and suppress gate leakage current.

[0092] For example, the thickness of the first layer 152b1 can be greater than 0 nm, for example, greater than or equal to about 0.1 nm, greater than or equal to about 0.2 nm, greater than or equal to about 0.3 nm, greater than or equal to about 0.4 nm, greater than or equal to about 0.5 nm, greater than or equal to about 0.6 nm, greater than or equal to about 0.7 nm, greater than or equal to about 0.8 nm, greater than or equal to about 0.9 nm, greater than or equal to about 1.0 nm, greater than or equal to about 1.1 nm, greater than or equal to about 1.2 nm, greater than or equal to about 1.3 nm, greater than or equal to about 1.4 nm, greater than or equal to about 1.5 nm, greater than or equal to about 1.6 nm, greater than or equal to about 1.7 nm, greater than or equal to about 1.8 nm, or greater than or equal to about 1.9 nm. The thickness of the first layer 152b1 can be less than about 2.0 nm, for example, less than or equal to about 1.9 nm, less than or equal to about 1.8 nm, less than or equal to about 1.7 nm, less than or equal to about 1.6 nm, less than or equal to about 1.5 nm, less than or equal to about 1.4 nm, less than or equal to about 1.3 nm, less than or equal to about 1.2 nm, less than or equal to about 1.1 nm, or less than or equal to about 0.9 nm, less than or equal to about 0.8 nm, less than or equal to about 0.7 nm, less than or equal to about 0.6 nm, less than or equal to about 0.5 nm, less than or equal to about 0.4 nm, less than or equal to about 0.3 nm, or less than or equal to about 0.2 nm. The thickness of the first layer 152b1 can be greater than 0 nm and less than about 2 nm.

[0093] Furthermore, the thickness of the second layer 152b2 can be greater than or equal to about 2 nm, for example, greater than or equal to about 3 nm, greater than or equal to about 4 nm, greater than or equal to about 5 nm, greater than or equal to about 6 nm, greater than or equal to about 7 nm, greater than or equal to about 8 nm, or greater than or equal to about 9 nm. The thickness of the second layer 152b2 can be less than or equal to about 10 nm, for example, less than or equal to about 9 nm, less than or equal to about 8 nm, less than or equal to about 7 nm, less than or equal to about 6 nm, less than or equal to about 5 nm, less than or equal to about 4 nm, or less than or equal to about 3 nm. The thickness of the second layer 152b2 can be from about 2 nm to about 10 nm.

[0094] Here, the thickness of the first layer 152b1 can be the shortest distance in the third direction D3 from the lower surface of the first layer 152b1 in contact with the gate semiconductor material layer 152a to the upper surface of the first layer 152b1 in contact with the second layer 152b2. Similarly, the thickness of the second layer 152b2 can be the shortest distance in the third direction D3 from the lower surface of the second layer 152b2 in contact with the first layer 152b1 to the upper surface of the second layer 152b2 in contact with the gate electrode layer 155.

[0095] Furthermore, since the first layer 152b1 is a natural oxide layer and the second layer 152b2 is formed by activating the gate semiconductor material layer 152a in an oxygen atmosphere, the oxygen concentration of the second layer 152b2 as measured by secondary ion mass spectrometry can be greater than the oxygen concentration of the first layer 152b1 as measured by secondary ion mass spectrometry.

[0096] For example, the first layer 152b1 can have a density of less than about 1E18 atoms / cm, as measured by secondary ion mass spectrometry. 3 The oxygen concentration, for example, is less than or equal to approximately 9E17 atoms / cm³. 3 Less than or equal to approximately 8E17 atoms / cm 3 Less than or equal to approximately 7E17 atoms / cm 3 Less than or equal to approximately 6E17 atoms / cm 3 Less than or equal to approximately 5E17 atoms / cm 3 Less than or equal to approximately 4E17 atoms / cm 3 Less than or equal to approximately 3E17 atoms / cm 3 Or less than or equal to approximately 2E17 atoms / cm 3 The first layer, 152b1, can have a concentration greater than or equal to approximately 1E17 atoms / cm², as measured by secondary ion mass spectrometry. 3 The oxygen concentration, for example, is greater than or equal to approximately 2E17 atoms / cm³. 3 Greater than or equal to approximately 3E17 atoms / cm 3 Greater than or equal to approximately 4E17 atoms / cm 3 Greater than or equal to approximately 5E17 atoms / cm 3 Greater than or equal to approximately 6E17 atoms / cm 3 Greater than or equal to approximately 7E17 atoms / cm 3 Greater than or equal to approximately 8E17 atoms / cm 3 Or greater than or equal to approximately 9E17 atoms / cm 3 The first layer, 152b1, can have a concentration greater than or equal to approximately 1E17 atoms / cm², as measured by secondary ion mass spectrometry. 3 And less than approximately 1E18 atoms / cm 3 The oxygen concentration.

[0097] Furthermore, the second layer 152b2 can have a mass density greater than or equal to approximately 1E18 atoms / cm², as measured by secondary ion mass spectrometry. 3 The oxygen concentration, for example, is greater than or equal to about 2E18 atoms / cm³. 3 Greater than or equal to approximately 3E18 atoms / cm 3 Greater than or equal to approximately 4E18 atoms / cm3 Greater than or equal to approximately 5E18 atoms / cm 3 Greater than or equal to approximately 6E18 atoms / cm 3 Greater than or equal to approximately 7E18 atoms / cm 3 Greater than or equal to approximately 8E18 atoms / cm 3 Or greater than or equal to approximately 9E18 atoms / cm 3 The second layer, 152b2, can have a concentration of less than or equal to approximately 1E19 atoms / cm², as measured by secondary ion mass spectrometry. 3 The oxygen concentration, for example, 9E18 atoms / cm³ 3 Less than or equal to approximately 8E18 atoms / cm 3 Less than or equal to approximately 7E18 atoms / cm 3 Less than or equal to approximately 6E18 atoms / cm 3 Less than or equal to approximately 5E18 atoms / cm 3 Less than or equal to approximately 4E18 atoms / cm 3 Less than or equal to approximately 3E18 atoms / cm 3 Or less than or equal to approximately 2E18 atoms / cm 3 The second layer, 152b2, can have a range from approximately 1E18 atoms / cm², as measured by secondary ion mass spectrometry. 3 Approximately 1E19 atoms / cm 3 The oxygen concentration.

[0098] Next, refer to Figures 6 to 10 A method for manufacturing a semiconductor device according to an embodiment is described. Furthermore, reference may be made to the above. Figures 1 to 3 .

[0099] Figures 6 to 10 It is a cross-sectional view showing the semiconductor device manufacturing process in sequence.

[0100] refer to Figure 6 Seed layer 115, buffer layer 120, channel layer 132 and barrier layer 136 can be sequentially formed on substrate 110. In addition, a preliminary gate semiconductor material layer 152aL can be formed on barrier layer 136.

[0101] For example, a seed layer 115, a buffer layer 120, a channel layer 132, a barrier layer 136, and a preliminary gate semiconductor material layer 152aL can be sequentially formed using an epitaxial growth method. The seed layer 115 can be formed first on the substrate 110, and the buffer layer 120 can be formed on the seed layer 115. The buffer layer 120 may include a superlattice layer and a high-resistivity layer. The channel layer 132 can be formed on the buffer layer 120, the barrier layer 136 can be formed on the channel layer 132, and the preliminary gate semiconductor material layer 152aL can be formed on the barrier layer 136.

[0102] For example, the equipment used to grow the seed layer 115, buffer layer 120, channel layer 132, barrier layer 136 and preliminary gate semiconductor material layer 152aL can use metal-organic chemical vapor deposition (MOCVD), hydride vapor phase epitaxy (HVPE) or molecular beam epitaxy (MBE).

[0103] The seed layer 115, buffer layer 120, channel layer 132, barrier layer 136, and preliminary gate semiconductor material layer 152aL can be made of the same semiconductor material. However, the material composition ratio of each layer is different depending on the function of each layer and the performance required by the semiconductor device.

[0104] For example, substrate 110 may include Si, seed layer 115 may include AlN, and the superlattice layer of buffer layer 120 may have a structure in which layers made of AlGaN and layers made of GaN are repeatedly stacked. The high-resistivity layer of buffer layer 120 may include GaN, channel layer 132 may include GaN, and barrier layer 136 may include AlGaN. Channel layer 132 and barrier layer 136 may be doped with impurities or may not be doped. The initial gate semiconductor material layer 152aL may include GaN and may be doped with impurities. The initial gate semiconductor material layer 152aL may be doped with p-type impurities, such as magnesium (Mg).

[0105] Because the crystal structures of Si and GaN are different, it may not be easy to directly grow the channel layer 132 made of GaN on the substrate 110 made of Si. Therefore, by first forming a seed layer 115 or a buffer layer 120 on the substrate 110 and then forming the channel layer 132, the crystal structure of the channel layer 132 can be stably formed.

[0106] refer to Figure 7 Activate the initial gate semiconductor material layer 152aL.

[0107] For example, to fabricate a GaN power semiconductor device with normally off characteristics, an activation process for the initial gate semiconductor material layer 152aL is required. For instance, activating the initial gate semiconductor material layer 152aL, which comprises magnesium (Mg)-doped p-type GaN, involves applying heat in a nitrogen (N2) atmosphere. However, in this process, due to the high-temperature treatment, changes such as the mixing of impurities (e.g., oxygen, carbon, and hydrogen) and an increase in surface roughness occur.

[0108] By activating the preliminary gate semiconductor material layer 152aL in an oxygen atmosphere, the activation efficiency of the acceptor can be improved while reducing the activation process temperature. Furthermore, a preliminary oxide layer 152bL can be formed on the surface of the preliminary gate semiconductor material layer 152aL to reduce the content of impurities such as oxygen, carbon, and hydrogen in the preliminary gate semiconductor material layer 152aL, prevent the surface roughness from increasing, enhance the depletion of the preliminary gate semiconductor material layer 152aL, and suppress gate leakage current.

[0109] Since the activation of the initial gate semiconductor material layer 152aL is carried out in an oxygen atmosphere, the temperature of the activation process can be reduced, and for example, it can be carried out at temperatures less than or equal to about 1000°C, less than or equal to about 900°C, less than or equal to about 850°C, less than or equal to about 800°C, less than or equal to about 700°C, less than or equal to about 750°C, less than or equal to about 600°C, less than or equal to about 550°C, less than or equal to about 500°C, less than or equal to about 450°C, or less than or equal to about 400°C, and greater than or equal to about 100°C, greater than or equal to about 150°C, greater than or equal to about 200°C, greater than or equal to about 250°C, greater than or equal to about 300°C, greater than or equal to about 350°C, greater than or equal to about 400°C, greater than or equal to about 450°C, greater than or equal to about 500°C, or greater than or equal to about 550°C, and can be carried out at about 350°C to about 600°C.

[0110] The oxygen atmosphere may have an oxygen concentration in the range of about 1 vol% to about 100 vol%, or it may be the atmospheric oxygen concentration (i.e., about 21 vol%) to about 100 vol%. In this case, the oxygen atmosphere may further include an inert gas other than oxygen, and the inert gas may be, for example, nitrogen (N2) or argon (Ar).

[0111] The activation of the initial gate semiconductor material layer 152aL can be performed through both in-situ activation and out-of-situ activation. In-situ activation is performed in the same chamber in which the initial gate semiconductor material layer 152aL is grown, while out-of-situ activation is performed in different chambers. When the activation of the initial gate semiconductor material layer 152aL is performed out-of-situ, a native oxide layer can be formed on the surface of the initial gate semiconductor material layer 152aL, and as described above... Figure 5 As described above, the oxide layer 152b formed thereafter may include a first layer 152b1 on the gate semiconductor material layer 152a, and a second layer 152b2 between the first layer 152b1 and the gate electrode layer 155.

[0112] In some embodiments, activation may be performed in an inert gas atmosphere while simultaneously being activated in an oxygen atmosphere.

[0113] For example, the initial gate semiconductor material layer 152aL can be grown, activated in an inert gas atmosphere, and then activated in an oxygen atmosphere. Alternatively, the initial gate semiconductor material layer 152aL can be grown, activated in an oxygen atmosphere, and then activated in an inert gas atmosphere. In this case, the activation in the oxygen atmosphere and the activation in the inert gas atmosphere can each be performed multiple times, and the activation in the oxygen atmosphere and the activation in the inert gas atmosphere can be performed alternately.

[0114] In an inert gas atmosphere, activation can be carried out at temperatures, for example, greater than or equal to about 800°C, such as greater than or equal to about 850°C, greater than or equal to about 900°C, greater than or equal to about 950°C, or greater than or equal to about 1000°C, and less than or equal to about 1500°C, less than or equal to about 1400°C, less than or equal to about 1300°C, less than or equal to about 1200°C, less than or equal to about 1100°C, less than or equal to about 1000°C, or less than or equal to about 900°C.

[0115] An inert gas atmosphere may include inert gases such as nitrogen (N2) or argon (Ar).

[0116] refer to Figure 8 The gate electrode material layer 155L can be formed on the preliminary gate semiconductor material layer 152aL, and a preliminary oxide layer 152bL is formed on the preliminary gate semiconductor material layer 152aL.

[0117] For example, the gate electrode material layer 155L can be formed using a deposition process. For example, the gate electrode material layer 155L can be formed using, but is not limited to, electron beam evaporation, sputtering, physical vapor deposition (PVD), thermal chemical vapor deposition (thermal CVD), low-pressure chemical vapor deposition (LP-CVD), plasma-enhanced chemical vapor deposition (PE-CVD), or atomic layer deposition (ALD).

[0118] Reference Figure 9 The preliminary gate semiconductor material layer 152aL, the preliminary oxide layer 152bL, and the gate electrode material layer 155L are etched to form the gate semiconductor material layer 152a, the oxide layer 152b, and the gate electrode layer 155, respectively.

[0119] For example, a hard mask layer (not shown) can be formed on the gate electrode material layer 155L, and the hard mask layer can be used as an etching mask to pattern the preliminary gate semiconductor material layer 152aL, the preliminary oxide layer 152bL and the gate electrode material layer 155L, thereby forming the gate semiconductor material layer 152a, the oxide layer 152b and the gate electrode layer 155, respectively.

[0120] For example, the hard mask layer can be a spin-coated hard mask layer (SOH). The spin-coated hard mask layer can be formed on the gate electrode material layer 155L by a spin coating process. The hard mask layer can include silicon oxide, silicon nitride, silicon oxide nitride, or a combination thereof.

[0121] For example, the etching of the preliminary gate semiconductor material layer 152aL, the preliminary oxide layer 152bL, and the gate electrode material layer 155L can be performed by dry etching using an etching gas. The etching gas may contain a fluoride gas or a chloride gas. For example, the fluoride gas may include, for example, CHF3, CF4, or mixtures thereof, and the chloride gas may include, for example, Cl2, BCl3, or mixtures thereof.

[0122] In some embodiments, after etching the preliminary gate semiconductor material layer 152aL, the preliminary oxide layer 152bL, and the gate electrode material layer 155L, processes for removing byproducts and cleaning the substrate 110 can be performed. For example, byproduct removal can be accomplished by an ashing or stripping process. The ashing and stripping processes can be performed sequentially. For example, the ashing process can be performed first by an oxygen (O2) plasma treatment process or an ozone (O3) treatment process, followed by the stripping process. Separately from the ashing or stripping process, processes for cleaning the substrate 110 can be performed. For example, the cleaning process may include a dry cleaning process using, for example, NH3 gas, NF3 gas, or NF3 plasma, or a wet cleaning process using HF or BOE. Subsequently, a cleaning solution such as ammonia (NH4OH) can be used to clean the substrate 110.

[0123] Reference Figure 10A first protective layer 140 can be formed on the barrier layer 136, the gate semiconductor layer 152, and the gate electrode layer 155. The first protective layer 140 can be formed using a deposition process. The first protective layer 140 may include an insulating material. For example, the first protective layer 140 may include materials such as SiO2, SiN, SiON, or Al2O3. The first protective layer 140 is depicted as a single layer, but in some cases it can be formed from multiple layers. In this case, different materials can be deposited sequentially to form the first protective layer 140. Alternatively, by using the same materials and changing the deposition conditions, a first protective layer 140 composed of multiple layers with different properties can be formed. In particular, the portion of the first protective layer 140 adjacent to the barrier layer 136 can be made of an insulating material of much higher quality than other portions. This is to prevent electrons forming a channel from being trapped within the channel layer 132 below the barrier layer 136. The portion of the first protective layer 140 in contact with the barrier layer 136 can be made of SiO2.

[0124] Next, the first protective layer 140 can be patterned to form a trench, and a lower source electrode 173a and a lower drain electrode 175a can be formed within the trench. During the trench formation process, not only the first protective layer 140, but also a portion of the barrier layer 136 and the channel layer 132 can be patterned together. Additionally, the first field dispersion layer 177a can be formed together with the lower source electrode 173a and the lower drain electrode 175a during the formation process.

[0125] The lower source electrode 173a and the lower drain electrode 175a can make ohmic contact with the channel layer 132. Compared with other regions, the regions within the channel layer 132 that contact the lower source electrode 173a and the lower drain electrode 175a can be doped at a relatively high concentration. For example, the channel layer 132 can be doped by ion implantation, annealing, etc. However, it is not limited to this, and the doping process of the channel layer 132 can be performed by various other processes. The doping process of the channel layer 132 can be performed before the formation of the lower source electrode 173a and the lower drain electrode 175a. In some cases, the channel layer 132 may not be doped.

[0126] Refer again Figures 1 to 3 A second protective layer 150 can be formed on the first protective layer 140, the lower source electrode 173a, the lower drain electrode 175a and the first field dispersion layer 177a. The second protective layer 150 can be patterned to form trenches. An intermediate source electrode 173b and an intermediate drain electrode 175b can be formed in the trenches, and the second field dispersion layer 177b can be formed together.

[0127] Furthermore, a third protective layer 160 can be formed on the second protective layer 150, the intermediate source electrode 173b, the intermediate drain electrode 175b, and the second field dispersion layer 177b. The third protective layer 160 can be patterned to form trenches, and the upper source electrode 173c and the upper drain electrode 175c can be formed in the trenches, and the third field dispersion layer 177c can be formed together.

[0128] While this disclosure has been described in conjunction with embodiments that are now considered practical, it should be understood that this disclosure is not limited to the disclosed embodiments, but rather is intended to cover various modifications and equivalent arrangements included within the spirit and scope of the appended claims.

[0129] Cross-reference to related applications

[0130] This application claims priority and benefit to Korean Patent Application No. 10-2024-0162428, filed on November 14, 2024, with the Korean Intellectual Property Office, the entire contents of which are incorporated herein by reference.

Claims

1. A semiconductor device, comprising: Channel layer, A barrier layer, located on the channel layer and comprising a material having a band gap different from that of the channel layer. A gate electrode layer is located on the barrier layer and extends in a first direction. A gate semiconductor layer is disposed between the barrier layer and the gate electrode layer, and The source electrode and drain electrode are connected to the channel layer and spaced apart from the gate electrode layer in a second direction different from the first direction. The gate semiconductor layer includes a gate semiconductor material layer disposed on the barrier layer and an oxide layer disposed between the gate semiconductor material layer and the gate electrode layer.

2. The semiconductor device according to claim 1, wherein, The oxide layer has a density greater than or equal to 1E18 atoms / cm², as measured by secondary ion mass spectrometry (SIMS). 3 The oxygen concentration.

3. The semiconductor device according to claim 2, wherein, The oxide layer has a density of 1E18 atoms / cm² as measured by secondary ion mass spectrometry. 3 Up to 1E19 atoms / cm 3 Oxygen concentration range.

4. The semiconductor device according to claim 1, wherein, The oxide layer has a thickness ranging from 1 nm to 10 nm.

5. The semiconductor device according to claim 1, wherein, The oxide layer has a thickness ranging from 2 nm to 5 nm.

6. The semiconductor device according to claim 1, wherein, The oxide layer comprises: A first layer disposed on the gate semiconductor material layer; and A second layer is disposed between the first layer and the gate electrode layer.

7. The semiconductor device according to claim 6, wherein, The thickness of the second layer of the oxide layer is greater than the thickness of the first layer.

8. The semiconductor device according to claim 6, wherein, The thickness of the second layer of the oxide layer is in the range of 2 nm to 10 nm, and The thickness of the first layer of the oxide layer is greater than 0 nm and less than 2 nm.

9. The semiconductor device according to claim 6, wherein, The oxygen concentration of the second layer of the oxide layer, as measured by secondary ion mass spectrometry, is greater than the oxygen concentration of the first layer of the oxide layer, as measured by secondary ion mass spectrometry.

10. The semiconductor device according to claim 1, wherein, The gate semiconductor material layer includes a nitride, which includes Al, Ga, In, B, or a combination thereof.

11. The semiconductor device according to claim 1, wherein, The oxygen concentration of the oxide layer, measured by secondary ion mass spectrometry, is greater than the oxygen concentration of the gate semiconductor material layer, measured by secondary ion mass spectrometry.

12. The semiconductor device according to claim 1, wherein, The gate semiconductor material layer has a density of less than or equal to 5E17 atoms / cm², as measured by secondary ion mass spectrometry. 3 The oxygen concentration.

13. The semiconductor device according to claim 1, wherein, The gate semiconductor material layer has a density of less than or equal to 1E18 atoms / cm², as measured by secondary ion mass spectrometry. 3 The carbon concentration.

14. The semiconductor device according to claim 1, wherein, The gate semiconductor material layer has a density of less than or equal to 1E18 atoms / cm², as measured by secondary ion mass spectrometry. 3 The hydrogen concentration.

15. A semiconductor device, comprising: Channel layer, A barrier layer, located on the channel layer and comprising a material having a band gap different from that of the channel layer. A gate electrode layer is located on the barrier layer and extends in a first direction. A gate semiconductor layer is disposed between the barrier layer and the gate electrode layer, and The source electrode and drain electrode are connected to the channel layer and spaced apart from the gate electrode layer in a second direction different from the first direction. The gate semiconductor layer has a density of less than or equal to 5E17 atoms / cm² as measured by secondary ion mass spectrometry (SIMS). 3 The oxygen concentration.

16. The semiconductor device according to claim 15, wherein, The gate semiconductor layer has a density of less than or equal to 1E18 atoms / cm², as measured by secondary ion mass spectrometry. 3 The carbon concentration.

17. The semiconductor device according to claim 15, wherein, The gate semiconductor layer has a density of less than or equal to 1E18 atoms / cm², as measured by secondary ion mass spectrometry. 3 The hydrogen concentration.

18. A semiconductor device, comprising: Channel layer, A barrier layer, located on the channel layer and comprising a material having a band gap different from that of the channel layer. A gate electrode layer is located on the barrier layer and extends in a first direction. A gate semiconductor layer is disposed between the barrier layer and the gate electrode layer, and The source electrode and drain electrode are connected to the channel layer and spaced apart from the gate electrode layer in a second direction different from the first direction. The gate semiconductor layer includes a gate semiconductor material layer disposed on the barrier layer, and an oxide layer disposed between the gate semiconductor material layer and the gate electrode layer. The gate semiconductor material layer has a density of less than or equal to 5E17 atoms / cm², as measured by secondary ion mass spectrometry (SIMS). 3 oxygen concentration, and The oxide layer has a density of 1E18 atoms / cm² as measured by secondary ion mass spectrometry. 3 Up to 1E19 atoms / cm 3 Oxygen concentration range.

19. The semiconductor device according to claim 18, wherein, The gate semiconductor material layer has a density of less than or equal to 1E18 atoms / cm², as measured by secondary ion mass spectrometry. 3 The carbon concentration.

20. The semiconductor device according to claim 18, wherein, The gate semiconductor material layer has a density of less than or equal to 1E18 atoms / cm², as measured by secondary ion mass spectrometry. 3 The hydrogen concentration.

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