Pulse waveform control method, control device and high-voltage pulse power supply

Abstract

The invention discloses a waveform control method, a control device and a high-voltage pulse power supply, and the method comprises the steps: obtaining a preset time parameter of an output voltage waveform, and enabling a time axis to sequentially comprise a first time, a second time, a third time and a fourth time which are circularly repeated; generating a switch driving time sequence and time, wherein the switch tube drives of the same bridge arm are complementary in a waveform period and have dead time; at the first time, each first diagonal switching tube is driven at a first level; at a third time, each second diagonal switching tube is driven at a first level; meanwhile, the time of driving the switching tubes at the same position in the first diagonal switching tubes to be the first level extends forwards from the first time to the starting moment of the adjacent fourth time along the time axis; and the time when the switching tube at the other same position is driven to be the first level extends backwards from the first time to the end moment of the adjacent second time along the time axis. The problem of minimum pulse width limitation can be solved, and pulse output trailing is eliminated.

Description

Technical Field

[0001] This application relates to the field of pulse technology, and in particular to a pulse waveform control method, control device and high voltage pulse power supply. Background Technology

[0002] High-voltage pulsed ablation (HPA) technology, as a non-thermal ablation technique, is increasingly gaining attention in clinical applications. HPA technology generates a high-voltage pulsed electric field with a pulse width in the millisecond, microsecond, or even nanosecond range, releasing extremely high energy in a short time. This energy causes numerous irreversible micropores to form on the cell membrane and even within intracellular organelles such as the endoplasmic reticulum, mitochondria, and nucleus, leading to apoptosis of diseased cells and achieving the desired therapeutic effect. Furthermore, studies have found that as the pulse duration (pulse width) decreases, the pulse spectrum increases, the force of the pulsed electric field at the cell membrane level decreases, while the force on intracellular structures such as mitochondria, the nucleus, and the endoplasmic reticulum membrane increases. When the field strength of the high-voltage pulsed electric field with a nanosecond pulse width applied to cells is sufficiently high, it will stimulate calcium ion mobilization, cell membrane swelling and bubbling, actin unloading, and activation of the phosphatidylinositol signaling pathway, leading to apoptosis or autophagy.

[0003] The working principle of a high-voltage pulse power supply is to store energy using energy storage elements, and to discharge high-instantaneous-power energy pulses to the load through the instantaneous action of switching elements. However, the driving of these switching elements presents the following two problems: (1) Generally, an isolation transformer driving scheme is adopted. Due to the limitation of the driving scheme, there is a minimum conduction time for the pulse width, which limits the further reduction of the pulse width. If an excessively high amplitude, a large pulse width, or a unipolar pulse is applied to the patient, it will cause the muscles and nerves to generate action potentials, which will lead to muscle contraction. This will increase the patient's pain in clinical treatment and easily cause the electrode needle to shift, resulting in the ablation area not being accurately controlled. (2) Under capacitive load or light load conditions, since there is no way to release the high voltage energy at the output end, it cannot be released in time, resulting in a pulse output tailing problem. That is, the pulse slowly drops to zero. The pulse waveform tailing effect will cause the ablation degree to deviate from the set rational value, affecting the accuracy of pulse ablation.

[0004] Therefore, it is necessary to propose a pulse circuit control scheme to achieve bipolar narrow pulse output and eliminate pulse tailing. Summary of the Invention

[0005] In view of this, the technical problem to be solved by the present invention is to provide a pulse waveform control method, control device and high voltage pulse power supply, which at least to some extent solves one of the technical problems existing in the prior art.

[0006] As a first aspect of the present invention, the technical solution of the provided pulse waveform control method is as follows: A waveform control method is applied to a high-voltage pulse power supply, the high-voltage pulse power supply including a transformer and at least two secondary output units; each secondary output unit includes a rectifier-filter circuit and a pulse generation unit; each rectifier-filter circuit is connected to one secondary winding of the transformer; each pulse generation unit includes a first bridge arm, an energy storage capacitor, and a second bridge arm connected in parallel, the high-potential terminals of all three are connected to the positive output terminal of the corresponding rectifier-filter circuit, and the low-potential terminals are connected to the negative output terminal of the corresponding rectifier-filter circuit; each rectifier-filter circuit is directly charged in parallel with the corresponding energy storage capacitor; the midpoint of the second bridge arm is the first output of the pulse generation unit. The first bridge arm's midpoint is the second output terminal of the pulse generation unit; the first output terminal of the first pulse generation unit is the first output terminal of the high-voltage pulse power supply; the second output terminal of the preceding pulse generation unit is connected to the first output terminal of the following pulse generation unit; and the second output terminal of the last pulse generation unit is the second output terminal of the high-voltage pulse power supply. In each pulse generation unit, the high-potential terminal switch of the first bridge arm and the low-potential terminal switch of the second bridge arm are first diagonal switches, and the low-potential terminal switch of the first bridge arm and the high-potential terminal switch of the second bridge arm are second diagonal switches. The waveform control method includes: The time parameter acquisition step involves acquiring the time parameters of the preset output voltage waveform of the high-voltage pulse power supply. The time parameters include, in sequence on the time axis, a first time, a second time, a third time, and a fourth time that are repeated cyclically. The driver generation step generates the corresponding switching drive timing and switching drive time for each switching transistor in each bridge arm of each pulse generation unit, including: The drives of the switching transistors in the same bridge arm are complementary within a waveform cycle and have a dead time. The voltage level controlling the switch to turn on is the first voltage level, and the voltage level controlling the switch to turn off is the second voltage level. At the first moment, the dead time of each of the first diagonal switching transistors is removed and the driving of each of the second diagonal switching transistors is at the second level. Each energy storage capacitor discharges in series and the high-voltage pulse power supply outputs a positive pulse. In the third time, the dead time of each second diagonal switch is removed and the drive of each first diagonal switch is at the first level, the drive of each first diagonal switch is at the second level, the energy storage capacitors are discharged in series, and the high voltage pulse power supply outputs a negative pulse. Meanwhile, the time during which the switch transistors located at the same position in each of the first diagonal switches are driven at the first level extends forward along the time axis from the first time to the start time of the adjacent fourth time, and the time during which the switch transistors located at the other same position are driven at the first level extends backward along the time axis from the first time to the end time of the adjacent second time.

[0007] Preferably, the driving time of the high-potential terminal switch transistor of each first bridge arm is the sum of the fourth time and the first time minus the dead time, and the driving time of the second level is the sum of the second time and the third time plus the dead time; the driving time of the low-potential terminal switch transistor of each first bridge arm is the sum of the second time and the third time minus the dead time, and the driving time of the second level is the sum of the fourth time and the first time plus the dead time; the driving time of the high-potential terminal switch transistor of each second bridge arm is the sum of the third time and the fourth time minus the dead time, and the driving time of the second level is the sum of the first time and the second time plus the dead time; the driving time of the low-potential terminal switch transistor of each second bridge arm is the sum of the first time and the second time minus the dead time, and the driving time of the second level is the sum of the third time and the fourth time plus the dead time.

[0008] Preferably, the driving time of the high-potential terminal switch transistor of each first bridge arm is the sum of the first time and the second time minus the dead time, and the driving time of the second level is the sum of the third time and the fourth time plus the dead time; the driving time of the low-potential terminal switch transistor of each first bridge arm is the sum of the third time and the fourth time minus the dead time, and the driving time of the second level is the sum of the first time and the second time plus the dead time; the driving time of the high-potential terminal switch transistor of each second bridge arm is the sum of the second time and the third time minus the dead time, and the driving time of the second level is the sum of the first time and the fourth time plus the dead time; the driving time of the low-potential terminal switch transistor of each second bridge arm is the sum of the first time and the fourth time minus the dead time, and the driving time of the second level is the sum of the second time and the third time plus the dead time.

[0009] Preferably, the dead time is on the order of nanoseconds.

[0010] Preferably, the first time, the second time, the third time, and the fourth time are set to be equal.

[0011] Preferably, in the time parameter acquisition step, the time parameters of the preset output voltage waveform of the high-voltage pulse power supply are directly acquired, or the first time, the second time, the third time, and the fourth time are derived by reversing relevant parameters.

[0012] Preferably, the relevant parameters include frequency, positive pulse width, negative pulse width, and pause time.

[0013] Furthermore, before the high-voltage pulse power supply generates a pulse, two high-potential terminal switches or two low-potential terminal switches of each bridge arm are simultaneously turned on to sample the voltage on each energy storage capacitor and predict the output voltage of the high-voltage pulse power supply. Only when the predicted value approaches the target value is the high-voltage pulse power supply controlled to generate a pulse.

[0014] As a second aspect of the present invention, the technical solution of the provided pulse waveform control device is as follows: A waveform control device is applied to a high-voltage pulse power supply. The high-voltage pulse power supply includes a transformer and at least two secondary output units. Each secondary output unit includes a rectifier and filter circuit and a pulse generation unit. Each rectifier and filter circuit is connected to one secondary winding of the transformer. Each pulse generation unit includes a first bridge arm, an energy storage capacitor, and a second bridge arm connected in parallel. The high-potential terminals of all three are connected to the positive output terminal of the corresponding rectifier and filter circuit, and the low-potential terminals are connected to the negative output terminal of the corresponding rectifier and filter circuit. Each rectifier and filter circuit is directly charged in parallel with the corresponding energy storage capacitor. The midpoint of the second bridge arm is the first output of the pulse generation unit. The first bridge arm's midpoint is the second output terminal of the pulse generation unit; the first output terminal of the first pulse generation unit is the first output terminal of the high-voltage pulse power supply; the second output terminal of the preceding pulse generation unit is connected to the first output terminal of the following pulse generation unit; and the second output terminal of the last pulse generation unit is the second output terminal of the high-voltage pulse power supply. In each pulse generation unit, the high-potential terminal switch of the first bridge arm and the low-potential terminal switch of the second bridge arm are first diagonal switches, and the low-potential terminal switch of the first bridge arm and the high-potential terminal switch of the second bridge arm are second diagonal switches. The waveform control device includes: The time parameter acquisition unit is used to acquire the time parameters of the preset output voltage waveform of the high voltage pulse power supply. The time parameters include, in sequence on the time axis, a first time, a second time, a third time, and a fourth time that are repeated cyclically. The drive generation unit is used to generate the corresponding switching drive timing and switching drive time for each switching transistor in each bridge arm of each pulse generation unit: The drives of the switching transistors in the same bridge arm are complementary within a waveform cycle and have a dead time. The voltage level controlling the switch to turn on is the first voltage level, and the voltage level controlling the switch to turn off is the second voltage level. At the first moment, the dead time of each of the first diagonal switching transistors is removed and the driving of each of the second diagonal switching transistors is at the second level. Each energy storage capacitor discharges in series and the high-voltage pulse power supply outputs a positive pulse. In the third time, the dead time of each second diagonal switch is removed and the drive of each first diagonal switch is at the first level, the drive of each first diagonal switch is at the second level, the energy storage capacitors are discharged in series, and the high voltage pulse power supply outputs a negative pulse. Meanwhile, the time during which the switch transistors located at the same position in each of the first diagonal switches are driven at the first level extends forward along the time axis from the first time to the start time of the adjacent fourth time, and the time during which the switch transistors located at the other same position are driven at the first level extends backward along the time axis from the first time to the end time of the adjacent second time.

[0015] As a third aspect of the present invention, the technical solution of the provided high-voltage pulse power supply embodiment is as follows: A high-voltage pulse power supply includes a transformer and at least two secondary output units. Each secondary output unit includes a rectifier-filter circuit and a pulse generation unit. Each rectifier-filter circuit is connected to one secondary winding of the transformer. Each pulse generation unit includes a first bridge arm, an energy storage capacitor, and a second bridge arm connected in parallel. The high-potential terminals of all three are connected to the positive output terminal of the corresponding rectifier-filter circuit, and the low-potential terminals are connected to the negative output terminal of the corresponding rectifier-filter circuit. Each rectifier-filter circuit is directly connected in parallel with the corresponding energy storage capacitor for charging. The midpoint of the second bridge arm is the first output terminal of the pulse generation unit, and the midpoint of the first bridge arm is the pulse generation terminal. The second output terminal of the pulse generation unit, the first output terminal of the first pulse generation unit is the first output terminal of the high-voltage pulse power supply, the second output terminal of the previous pulse generation unit is connected to the first output terminal of the next pulse generation unit, and the second output terminal of the last pulse generation unit is the second output terminal of the high-voltage pulse power supply; in each pulse generation unit, the high-potential terminal switch of the first bridge arm and the low-potential terminal switch of the second bridge arm are the first diagonal switch, and the low-potential terminal switch of the first bridge arm and the high-potential terminal switch of the second bridge arm are the second diagonal switch; wherein: the high-voltage pulse power supply also includes the waveform control device described in the second aspect above.

[0016] Compared with the prior art, this application has the following beneficial effects: (1) The pulse waveform control method and control device of the present invention, under the premise of achieving the control pulse width of each energy storage capacitor series discharge without changing the common time of each diagonal switch, cleverly extends the time when the drive of the switch in the same position of each first diagonal switch is at the first level along the time axis from the first time forward to the start time of the adjacent fourth time, and the time when the drive of the switch in the other same position is at the first level along the time axis from the first time backward to the end time of the adjacent second time, thereby realizing the generation of a narrower (ns) pulse output with a larger drive pulse width, solving the problem of the minimum pulse width limitation of the traditional pulse transformer drive scheme, and effectively enhancing the accuracy of cell ablation; (2) In the pulse waveform control method and control device of the present invention, since the driving time of the two switching tubes in each first diagonal switching tube is at the first level, the time is extended in opposite directions along the time axis to the adjacent time, and the driving of the switching tubes of the same bridge arm is complementary in one waveform cycle, in the second and fourth time, each pulse generating unit either turns on the two high potential end switching tubes of each bridge arm at the same time or turns on the two low potential end switching tubes of each bridge arm at the same time, so that the first output terminal and the second output terminal of the high voltage pulse unit are short-circuited at the end of the first and third time, and the output voltage of the high voltage pulse power supply is forced to be pulled to zero, thus solving the phenomenon of tailing of positive and negative pulse voltage output by the high voltage pulse power supply; (3) The pulse waveform control method and control device of the present invention extract time parameters according to the user preset voltage waveform, generate corresponding switch drive timing and switch drive time, the pulse width and pause time between adjacent pulses can be adjusted at will, and the control scheme is simple. It only needs to extend the time when the drive of the two switches in each first diagonal switch is at the first level along the time axis to the adjacent time respectively, so as to obtain a stable and repetitive bipolar high voltage pulse, which has a very wide range of applications. Attached Figure Description

[0017] Figure 1 This is a schematic diagram of the high-voltage pulse power supply circuit structure of the present invention; Figure 2 This is a schematic diagram of a preset output voltage waveform of the high-voltage pulse power supply of the present invention; Figure 3 This is a schematic diagram of a first waveform according to the first embodiment of the present invention; Figure 4 This is a schematic diagram of the second waveform according to the first embodiment of the present invention; Figure 5 This is a schematic diagram illustrating the control of the output voltage of the present invention; Figure 6 This is a schematic diagram of the driving waveform in Embodiment 2 of this application. Detailed Implementation

[0018] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this application.

[0019] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this application are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be used interchangeably where appropriate for the purposes of describing embodiments of this application herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0020] Furthermore, unless otherwise specified, the embodiments and features described in this application may be combined with each other.

[0021] It should be understood that in the specification, claims, and drawings, when a step is described as continuing into another step, the step may directly continue into that other step or be continued into that other step through a third step; when an element / unit is described as "continuing" into another element / unit, the element / unit may be "directly connected" to that other element / unit or "connected" to that other element / unit through a third element / unit.

[0022] Furthermore, the accompanying drawings are merely illustrative of this disclosure and are not necessarily drawn to scale. The same reference numerals in the drawings denote the same or similar parts, and therefore repeated descriptions thereof will be omitted. Some block diagrams shown in the drawings are functional entities and do not necessarily correspond to physically or logically independent entities. These functional entities can be implemented in software, in one or more hardware modules or integrated circuits, or in different network and / or processor devices and / or microcontroller devices.

[0023] Figure 1 This is a schematic diagram of the high-voltage pulse power supply circuit structure to which this invention applies, including a transformer ( Figure 1 (Not shown in the diagram) At least two secondary output units; each secondary output unit includes a rectifier and filter circuit and a pulse generation unit; each rectifier and filter circuit is connected to one secondary winding of the transformer. Figure 1Each rectifier and filter circuit and its connected secondary winding are combined into a power supply unit n. Each pulse generation unit n includes a first bridge arm, an energy storage capacitor, and a second bridge arm connected in parallel. The high-potential ends of all three are connected to the positive output terminal of the corresponding rectifier and filter circuit, and the low-potential ends are connected to the negative output terminal of the corresponding rectifier and filter circuit. Each rectifier and filter circuit is directly charged in parallel with the corresponding energy storage capacitor. The midpoint of the second bridge arm is the first output terminal of the pulse generation unit, and the midpoint of the first bridge arm is the second output terminal of the pulse generation unit. The first output terminal of the first pulse generation unit is the first output terminal of the high-voltage pulse power supply. The second output terminal of the previous pulse generation unit is connected to the first output terminal of the next pulse generation unit, and the second output terminal of the last pulse generation unit is the second output terminal of the high-voltage pulse power supply. In each pulse generation unit, the high-potential switch transistor SAn of the first bridge arm and the low-potential switch transistor SDn of the second bridge arm are the first diagonal switches, and the low-potential switch transistor SBn of the first bridge arm and the high-potential switch transistor SCn of the second bridge arm are the second diagonal switches.

[0024] It should be noted that the high-voltage pulse power supply of the present invention can be unipolar or bipolar, that is, the first output terminal can output both positive and negative voltage relative to the second output terminal.

[0025] The primary winding of the transformer in the aforementioned high-voltage pulse power supply is connected to an AC power source. This AC power source can be directly supplied by the mains power or obtained by converting a DC power source through an inverter circuit. If it is obtained by converting a DC power source through an inverter circuit, the topology used by the inverter circuit is not required by this invention. Those skilled in the art can choose according to their needs, for example, a half-bridge LLC inverter circuit can be selected.

[0026] The present invention does not require the above-mentioned rectifier circuit to be used, as long as it can rectify the AC power output from the secondary winding into DC power to charge the output capacitor. Those skilled in the art can make the selection as needed. For example, a full-bridge rectifier circuit can be selected. In addition, since each rectifier and filter circuit is directly connected in parallel with the corresponding energy storage capacitor for charging, if it is necessary to control each energy storage capacitor to stop charging, it is necessary to control each rectifier and filter circuit to stop outputting energy.

[0027] It should be noted that, in the specific application of the above-mentioned high-voltage pulse power supply, the operator needs to set the working parameters on the PC host computer first, and then start to control the pulse generation unit of the high-voltage power supply to work and output the required positive and negative pulses according to the set working parameters. In this invention, "controlling the pulse generation unit of the high-voltage power supply to work and output the required positive and negative pulses according to the set working parameters" is referred to as "pulse generation".

[0028] The operator needs to set the working parameters on the PC first, which may include: Pulse mode, which specifies the number of positive and negative pulses output, can be selected from 1 to 100. Figure 3 The medium- and high-voltage pulse power supply outputs positive pulses during period T1 and negative pulses during period T3. Positive pulse width, such as Figure 3 The duration of time T1; Negative pulse width, such as Figure 3 The duration of time T3; The pause time is the time interval between two adjacent pulses. Figure 3 The pause time T2 between adjacent positive and negative pulses and the pause time T4 between adjacent negative and positive pulses are included along the time axis to the right.

[0029] First Embodiment This embodiment provides a waveform control method applied to the aforementioned high-voltage pulse power supply. The waveform control method of this embodiment includes: The steps for obtaining time parameters involve acquiring the preset time parameters of the output voltage waveform of the high-voltage pulse power supply. Figure 2 This is a schematic diagram of a preset output voltage waveform of the high-voltage pulse power supply of the present invention, as shown below. Figure 2 As shown, the time parameters on the time axis include the first time T1, the second time T2, the third time T3, and the fourth time T4, which are repeated cyclically. The driver generation step generates the corresponding switching drive timing and switching drive time for each switching transistor in each bridge arm of each pulse generation unit, including: The drives of the switching transistors in the same bridge arm are complementary within a waveform cycle and have a dead time. The voltage level controlling the switch to turn on is the first voltage level, and the voltage level controlling the switch to turn off is the second voltage level. At the first moment, the driving level of each first diagonal switch is the first level, the driving level of each second diagonal switch is the second level, each energy storage capacitor discharges in series, and the high-voltage pulse power supply outputs a positive pulse. At the third time, the driving level of each second diagonal switch is the first level, the driving level of each first diagonal switch is the second level, each energy storage capacitor discharges in series, and the high-voltage pulse power supply outputs a negative pulse. Meanwhile, the time during which the switch transistors located at the same position in each of the first diagonal switches are driven at the first level extends forward along the time axis from the first time to the start time of the adjacent fourth time, and the time during which the switch transistors located at the other same position are driven at the first level extends backward along the time axis from the first time to the end time of the adjacent second time.

[0030] The dead time can be set, and is generally set to the nanosecond level.

[0031] The first, second, third, and fourth times can be set arbitrarily; for example, the first, second, third, and fourth times can be set to be equal.

[0032] In the time parameter acquisition step, the time parameters of the preset output voltage waveform of the high-voltage pulse power supply can be directly obtained, or the first time, the second time, the third time, and the fourth time can be deduced by using relevant parameters. For example, the first time, the second time, the third time, and the fourth time can be deduced by using frequency, positive pulse width, negative pulse width, and pause time.

[0033] Figure 3 This is a schematic diagram of a first waveform according to the first embodiment of the present invention, applied to... Figure 1 The high-voltage pulse power supply shown is as follows: Vo is the output voltage waveform. The acquired time parameters on the time axis include the first time T1, the second time T2, the third time T3, and the fourth time T4, which are repeated cyclically. The first time T1 is the positive pulse width, the second time T2 is the pause time after the positive pulse width, the third time T3 is the negative pulse width, and the fourth time T4 is the pause time after the negative pulse width. Based on the time parameters T1 to T4, combined with the reserved dead time Td, to prevent the switching transistors of the same bridge arm from generating a large current and burning out, the different driving level times of each switching transistor in the pulse generation unit in a complete cycle are obtained.

[0034] It should be noted that the first time interval T1, the second time interval T2, the third time interval T3, and the fourth time interval T4 can be set independently or interrelatedly. For example, T1 can be set to always be equal to T3, T2 can be set to always be equal to T4, and so on. That is, the time intervals can be equal, unequal, or partially equal. Furthermore, the time parameters of the preset output voltage waveform can be obtained not only directly but also by simple calculations based on other relevant parameters. For example, the frequency of the output voltage waveform can be set to f, the positive pulse width to Tx, and the negative pulse width to Ty. When the pause times T2 and T4 are equal, T2 and T4 can be calculated as follows:

[0035] Please continue reading Figure 3 Wherein: SAn drives the high-potential switches SA1 to SAn of the first bridge arm in each pulse generation unit; SBn drives the low-potential switches SB1 to SBn of the first bridge arm in each pulse generation unit; SCn drives the high-potential switches SC1 to SCn of the second bridge arm in each pulse generation unit; and SDn drives the low-potential switches SD1 to SDn of the second bridge arm in each pulse generation unit. Figure 1When each switching transistor in a high-voltage pulse power supply is an NMOS switching transistor, the level controlling the switching transistor to turn on is a high level (i.e., the first level is a high level), and the level controlling the switching transistor to turn off is a low level (i.e., the second level is a low level). Figure 3 The switching drive timing and switching drive time of each switching transistor are as follows: At the first moment, the drive of each first diagonal switch (SAn, SDn) is high after the dead time is removed, and the drive of each second diagonal switch (SBn, SCn) is low. Each energy storage capacitor Cn discharges in series. The current path of the series discharge is: first output terminal of pulse generation unit 1 → load → second output terminal of pulse generation unit n → switch SAn → capacitor Cn → switch SDn → first output terminal of pulse generation unit n → ... → second output terminal of pulse generation unit 2 → switch SA2 → capacitor C2 → switch SD2 → first output terminal of pulse generation unit 2 → second output terminal of pulse generation unit 1 → switch SA1 → capacitor C1 → switch SD1 → first output terminal of pulse generation unit 1. The high voltage pulse power supply outputs a positive pulse. At the third time, the drive of each second diagonal switch (SBn, SCn) is high after the dead time is removed, and the drive of each first diagonal switch (SAn, SDn) is low. Each energy storage capacitor discharges in series. The current path of the series discharge is: the second output terminal of pulse generation unit n → load → the first output terminal of pulse generation unit 1 → switch SC1 → capacitor C1 → switch SB1 → the second output terminal of pulse generation unit 1 → the first output terminal of pulse generation unit 2 → switch SC2 → capacitor C2 → switch SB2 → the second output terminal of pulse generation unit 2 → ... → the first output terminal of pulse generation unit n → switch SCn → capacitor Cn → switch SBn → the second output terminal of pulse generation unit n. The high-voltage pulse power supply outputs a negative pulse. Meanwhile, the high-level drive of the upper left switch SAn in each of the first diagonal switches extends forward along the time axis from the first time to the start of the adjacent fourth time, and the high-level drive of the lower right switch SD extends backward along the time axis from the first time to the end of the adjacent second time. The drives of the switches in the same bridge arm are complementary within a waveform cycle and have a dead time, thereby realizing a narrower (ns) pulse output with a larger drive pulse width. This solves the problem of minimum pulse width limitation in traditional pulse transformer drive schemes and effectively enhances the accuracy of cell ablation.

[0036] In specific medical applications, the output pulse energy of a high-voltage pulse power supply is very high (e.g., 50J), and the output voltage is usually around 10kV. Therefore, the energy storage capacitor is usually large. After the operator sets the working parameters on the PC, if each energy storage capacitor is pre-charged to a certain level, it can ensure that the high-voltage pulse power supply outputs the ideal pulse according to the set pulse mode without interruption when generating pulses. Therefore, as a specific embodiment, before the high-voltage pulse power supply generates pulses, two high-potential terminal switches or two low-potential terminal switches of each bridge arm are turned on simultaneously to sample the voltage on each energy storage capacitor and predict the output voltage of the high-voltage pulse power supply. Only when the predicted value approaches the target value is the high-voltage pulse power supply controlled to generate pulses.

[0037] It should be noted that, for the sake of brevity, the following text will refer to the high-potential switches SA1 to SAn of each first bridge arm as each switch SAn, the low-potential switches SB1 to SBn of each first bridge arm as each switch SAn, the high-potential switches SC1 to SCn of each second bridge arm as each switch SCn, the low-potential switches SD1 to SDn of each second bridge arm as each switch SDn, the energy storage capacitors C1 to Cn as each energy storage capacitor Cn, and the sampling circuits 1 to n as each sampling circuit n.

[0038] Figure 3 The switching drive timing and time of each switching transistor can also be viewed as follows: the driving of each switching transistor SAn is complementary to that of each switching transistor SBn; the driving of each switching transistor SCn is complementary to that of each switching transistor SDN; the driving of each switching transistor SAn leads the driving of each switching transistor SDN by a fourth time T4, or the driving of each switching transistor SBn leads the driving of each switching transistor SCn by a second time T2. Specifically: The driving time of the high-potential terminal switch SAn of each first bridge arm is the sum of the fourth time T4 and the first time T1 minus the dead time Td; the driving time of the low level is the sum of the second time T2 and the third time T3 plus the dead time Td. The driving time of the low-potential terminal switch SBn of each first bridge arm is the sum of the second time T2 and the third time T3 minus the dead time Td, and the driving time of the low level is the sum of the fourth time T4 and the first time T1 plus the dead time Td. The driving time of the high-potential terminal switch SCn of each second bridge arm is the sum of the third time T3 and the fourth time T4 minus the dead time Td, and the driving time of the low level is the sum of the first time T1 and the second time T2 plus the dead time Td. The driving time of the low-potential terminal switch SDn of each second bridge arm is the sum of the first time T1 and the second time T2 minus the dead time Td, and the driving time of the low level is the sum of the third time T3 and the fourth time T4 plus the dead time Td.

[0039] The aforementioned advance of the SAn drive of each switching transistor by the fourth time T4 of the SDN drive can be understood as follows: The original simultaneous high-level drives of SAn and SDN are changed to SAn drive being high first, and then SDN drive being high only after the fourth time T4. This is equivalent to shifting the SDN drive backward by the fourth time T4. (See [reference]). Figure 3 As can be seen, at time t0, the switch SAn drive is high first, and then at time t1 after the fourth time T4, the switch SDN drive is high again. The SBn drive of each switch precedes the SCn drive of each switch by the second time T2. This can be understood as changing the SBn drive and SCn drive, which were originally high at the same time, to the SBn drive being high first, and then the SCn drive being high after the second time T2.

[0040] refer to Figure 1 and Figure 3 By adjusting the lead time, the common time of each switch SAn and each switch SDN, or each switch SBn and each switch SCn, can be controlled, thereby indirectly adjusting the pulse output time. In other words, a narrower output pulse is achieved with a larger drive pulse width.

[0041] It is important to note that the dead time Td affects the pulse width. For example, during the dead time from the turn-off of each switch SAn to the turn-on of each switch SBn, although each switch SAn is turned off, there is no current charging its parasitic Coss, and the voltage across its terminals remains zero (the dead time is short, especially under capacitive or light loads). It can be assumed that each switch SAn is still conducting, resulting in a wider pulse width. Therefore, the dead time is usually set to be small, below 100 ns. After the dead time, each switch SBn turns on, and simultaneously each switch SDn also turns on, short-circuiting the first and second output terminals of the high-voltage pulse power supply. The output voltage of the high-voltage pulse power supply is forced to zero, resolving the pulse tailing phenomenon. Similarly, after the dead time from the turn-off of each switch SBn to the turn-on of each switch SAn, each switch SAn and each switch SCn turn on together, short-circuiting the output terminals and forcing the output voltage to zero, resolving the pulse tailing phenomenon.

[0042] Figure 4 This is a schematic diagram of the first waveform of the first embodiment of the present invention. Figure 3 The difference is that the time when the drive of the upper left switch SAn in each of the first diagonal switches is high extends along the time axis from the first time to the end of the adjacent second time, and the time when the drive of the lower right switch SD is high extends along the time axis from the first time to the beginning of the adjacent fourth time.

[0043] Figure 4 The switching drive timing and time of each switching transistor can also be viewed as follows: the driving of each switching transistor SAn lags behind the driving of each switching transistor SDN by the fourth time T4, or the driving of each switching transistor SBn lags behind the driving of each switching transistor SCn by the second time T2. Specifically: The driving time of the high-potential terminal switch SAn of each first bridge arm is the sum of the first time T1 and the second time T4 minus the dead time Td, and the driving time of the low level is the sum of the third time T3 and the fourth time T4 plus the dead time Td. The driving time of the low-potential terminal switch SBn of each first bridge arm is the sum of the third time T3 and the fourth time T4 minus the dead time Td, and the driving time of the low level is the sum of the first time T1 and the second time T2 plus the dead time Td. The driving time of the high-potential terminal switch SCn of each second bridge arm is the sum of the second time T2 and the third time T3 minus the dead time Td, and the driving time of the low level is the sum of the first time T1 and the fourth time T4 plus the dead time Td. The driving time of the low-potential terminal switch SDn of each second bridge arm is the sum of the first time T1 and the fourth time T4 minus the dead time Td, and the driving time of the low level is the sum of the second time T2 and the third time T3 plus the dead time Td.

[0044] With the above Figure 3 Similarly, the SAn drive of each switch lags behind the SDN drive of each switch by a fourth time interval T4. This can be understood as changing the original simultaneous high-level drives of SAn and SDN to a situation where the SDN drive is high first, and then the SAn drive goes high after the fourth time interval T4. This is equivalent to shifting the SAn drive of each switch backward by four time intervals T4. See [link / reference]. Figure 4 As can be seen, at time t3, the SDN drive of each switch is high first, and then at time t4 after the fourth time T4, the SAN drive of each switch is high again; the SBn drive of each switch lags behind the SCn drive of each switch at the second time T2. This can be understood as changing the original SBn drive and SCn drive of each switch at the same time to the SCn drive being high first, and then the SBn drive of each switch being high after the second time T2.

[0045] refer to Figure 1 and Figure 4Similarly, by adjusting the lag time, the common time of each switch SAn and each switch SDN, or each switch SBn and each switch SCn, can be controlled to achieve a narrower pulse output. Furthermore, by having each switch SBn and each switch SDN, or each switch SAn and each switch SCn, the first and second output terminals of the high-voltage pulse circuit are short-circuited at the third and fourth times, forcing the output voltage to zero and resolving pulse tailing.

[0046] It should be noted that, under the condition that the driving of each switch SAn and each switch SBn is complementary, and the driving of each switch SCn and each switch SDN is complementary: according to Figure 3 After the high and low level driving times are turned on, when the driving of each switch SAn leads the driving of each switch SDN at the fourth time T4, the driving of each switch SBn must lead the driving of each switch SCn at the second time T2: according to Figure 4 After the high and low level driving time is turned on, when the driving of each switch group SBn lags behind the driving of each switch SCn for the second time T2, the driving of each switch SAn must lag behind the driving of each switch SDn for the fourth time T4. The two are mutually valid.

[0047] Furthermore, in this embodiment, before pulse generation (i.e. before the start of the first and third time periods), the two lower switching transistors (each switching transistor SBn and each switching transistor SDn) of each pulse generation unit are turned on, or the two upper switching transistors (each switching transistor SAn and each switching transistor SCn) of each pulse generation unit are turned on, short-circuiting the output terminals. This forces the output voltage to zero, ensuring that there is no energization phenomenon at the load terminals due to parasitic parameters before pulse generation, thus avoiding a slow output voltage rise slope and a plateau phenomenon.

[0048] The power supply unit of the high-voltage pulse circuit applicable to this embodiment is a multi-winding power supply. Generally, only the output voltage of one power supply is fed back to achieve the desired value of the total output voltage of the pulse power supply in a closed loop. Due to the different coupling and parasitic parameters between the secondary windings, the output voltage of multiple power supply units will be inconsistent, resulting in inconsistent voltage on each energy storage capacitor Cn. This causes the initial value of the output voltage of the high-voltage pulse power supply to have an error when the pulse is finally generated, resulting in low output accuracy.

[0049] In this embodiment, before charging the energy storage capacitor to the pulse generation stage, the two lower switching transistors (each switching transistor SBn and each switching transistor SDn) of each pulse generation unit are turned on, or the two upper switching transistors (each switching transistor SAn and each switching transistor SCn) of each pulse generation unit are turned on. Figure 5This is a schematic diagram illustrating the output voltage control of the present invention. In this diagram, the two lower switching transistors (SBn and SDn) of each pulse generation unit are configured to ensure that the low-potential terminals of each energy storage capacitor Cn are grounded. At this time, the voltage across the corresponding energy storage capacitor can be sampled by each sampling circuit n to predict the output voltage of the high-voltage pulse power supply. The current time is controlled to end only when the predicted value approaches the target value, achieving high-precision output. It should be noted that when a pulse is generated, there will be a high voltage at the sampling point of the upper energy storage capacitor; therefore, the voltage division coefficient must be carefully set during sampling. Furthermore, if the two upper switching transistors (SAn and SCn) of each pulse generation unit are turned on before charging the energy storage capacitors to the point of pulse generation, the high-potential terminals of each energy storage capacitor Cn are connected together. Connecting the high-potential terminals of each energy storage capacitor Cn to the reference ground also allows sampling of the voltage across each energy storage capacitor Cn. The sampling point is the low-potential terminal of each energy storage capacitor Cn. The sampled voltage is negative and needs to be converted to positive voltage for calculation and comparison control.

[0050] Specifically, when a waveform with equal positive and negative pulse widths and equal pause times is required, this can be achieved by setting any two of the following parameters: frequency, pulse width, and pause time. In this case, the drive waveform for the switching transistors in the same bridge arm is a square wave with a duty cycle D of 50%. Similarly, the drives of each switching transistor SAn and SBn are complementary, the drives of each switching transistor SCn and SDn are complementary, and the drive of each switching transistor SAn leads or lags the pause time of the drive of each switching transistor SDN, or the drive of each switching transistor SBn leads or lags the pause time of the drive of each switching transistor SCn. For example... Figure 6 The diagram shows the waveforms of the SAn drive leading the SDN drive pause time of each switch group, or the SBn drive leading the SCn drive pause time of each switch group. By controlling the corresponding lead or lag time, not only is the pulse output width adjusted, but pulse tailing is also avoided.

[0051] The control method in this embodiment allows for adjustable lead or lag times, enabling adaptive adjustments to the pulse width and pause time between adjacent pulses based on time parameters extracted from the user-preset voltage waveform. Furthermore, the control scheme is simple, requiring only adjustment of the lead or lag time to obtain stable and repetitive bipolar high-voltage pulses, thus having a very wide range of applications.

[0052] Second Embodiment This embodiment provides a waveform control device applied to a high-voltage pulse power supply. The high-voltage pulse power supply includes a transformer and at least two secondary output units. Each secondary output unit includes a rectifier-filter circuit and a pulse generation unit. Each rectifier-filter circuit is connected to one secondary winding of the transformer. Each pulse generation unit includes a first bridge arm, an energy storage capacitor, and a second bridge arm connected in parallel. The high-potential terminals of all three are connected to the positive output terminal of the corresponding rectifier-filter circuit, and the low-potential terminals are connected to the negative output terminal of the corresponding rectifier-filter circuit. Each rectifier-filter circuit is directly connected in parallel with the corresponding energy storage capacitor for charging. The midpoint of the second bridge arm is the pulse generation unit. The first output terminal, the midpoint of the first bridge arm is the second output terminal of the pulse generating unit, the first output terminal of the first pulse generating unit is the first output terminal of the high-voltage pulse power supply, the second output terminal of the preceding pulse generating unit is connected to the first output terminal of the following pulse generating unit, and the second output terminal of the last pulse generating unit is the second output terminal of the high-voltage pulse power supply; in each pulse generating unit, the high-potential terminal switch of the first bridge arm and the low-potential terminal switch of the second bridge arm are the first diagonal switches, and the low-potential terminal switch of the first bridge arm and the high-potential terminal switch of the second bridge arm are the second diagonal switches; wherein, the waveform control device includes: The time parameter acquisition unit is used to acquire the time parameters of the preset output voltage waveform of the high voltage pulse power supply. The time parameters include, in sequence on the time axis, a first time, a second time, a third time, and a fourth time that are repeated cyclically. The drive generation unit is used to generate the corresponding switching drive timing and switching drive time for each switching transistor in each bridge arm of each pulse generation unit: The voltage level controlling the switch to turn on is the first voltage level, and the voltage level controlling the switch to turn off is the second voltage level. At the first moment, the driving level of each first diagonal switch is the first level, the driving level of each second diagonal switch is the second level, each energy storage capacitor discharges in series, and the high-voltage pulse power supply outputs a positive pulse. At the third time, the driving level of each second diagonal switch is the first level, the driving level of each first diagonal switch is the second level, each energy storage capacitor discharges in series, and the high-voltage pulse power supply outputs a negative pulse. Meanwhile, the time when the drive of the switch in the same position of each of the first diagonal switches is at the first level extends forward along the time axis from the first time to the start of the adjacent fourth time, and the time when the drive of the switch in the other position is at the first level extends backward along the time axis from the first time to the end of the adjacent second time. The drives of the switches in the same bridge arm are complementary in one waveform period and there is a dead time. Each energy storage capacitor is charged in parallel with the corresponding rectifier and filter circuit in the second and fourth times.

[0053] The technical means adopted by the control device in this embodiment are consistent with the control method in the first embodiment, and the beneficial effects are the same, so they will not be described in detail. In addition, the preferred technical means or further improved means of each step in the control method of the first embodiment can be extended to the corresponding unit in this embodiment, and will not be described in detail in this embodiment.

[0054] Third Embodiment This embodiment provides a high-voltage pulse power supply, which includes a transformer and at least two secondary output units. Each secondary output unit includes a rectifier and filter circuit and a pulse generation unit. Each rectifier and filter circuit is connected to one secondary winding of the transformer. Each pulse generation unit includes a first bridge arm, an energy storage capacitor, and a second bridge arm connected in parallel. The high-potential terminals of all three are connected to the positive output terminal of the corresponding rectifier and filter circuit, and the low-potential terminals are connected to the negative output terminal of the corresponding rectifier and filter circuit. Each rectifier and filter circuit is directly connected in parallel with the corresponding energy storage capacitor for charging. The midpoint of the second bridge arm is the first output terminal of the pulse generation unit, and the midpoint of the first bridge arm is... The second output terminal of the pulse generating unit is the first output terminal of the high-voltage pulse power supply. The second output terminal of the preceding pulse generating unit is connected to the first output terminal of the following pulse generating unit. The second output terminal of the last pulse generating unit is the second output terminal of the high-voltage pulse power supply. In each pulse generating unit, the high-potential terminal switch of the first bridge arm and the low-potential terminal switch of the second bridge arm are the first diagonal switches, and the low-potential terminal switch of the first bridge arm and the high-potential terminal switch of the second bridge arm are the second diagonal switches. The high-voltage pulse power supply also includes any waveform control device in the second embodiment.

[0055] The high-voltage pulse power supply in this embodiment, by including any waveform control device in the second embodiment, achieves a narrower (ns) pulse output with a larger drive pulse width, solving the problem of minimum pulse width limitation in traditional pulse transformer drive schemes, and eliminating pulse output tailing phenomenon through drive timing. The high-voltage pulse power supply in this embodiment allows for arbitrary adjustment of pulse width and pause time between adjacent pulses, has a simple structure, can obtain stable and repetitive bipolar high-voltage pulses, and can effectively control the electric field strength during pulse generation, effectively enhancing the accuracy of cell ablation.

[0056] It should be noted that those skilled in the art will understand that when describing "removing dead time" in this invention, it only needs to be removed if the relevant switching transistor has a dead time; otherwise, this requirement does not need to be considered. For example, for Figure 3 and Figure 6At time T1, among the first diagonal switches SAn and SDn, only switch SAn has a dead time; therefore, only switch SAn needs to have this dead time removed. At time T3, among the second diagonal switches SBn and SCn, only switch SBn has a dead time; therefore, only switch SBn needs to have this dead time removed. For example, for... Figure 4 At the first time T1, among the first diagonal switches SAn and SDn, only switch SDN has a dead time, so only switch SDN needs to have this dead time removed; at the third time T3, among the second diagonal switches SBn and SCn, only switch SCn has a dead time, so only switch SCn needs to have this dead time removed.

[0057] The above are merely preferred embodiments of this application. It should be noted that the above preferred embodiments should not be regarded as a limitation of this application. For those skilled in the art, several improvements and modifications can be made without departing from the spirit and scope of this application. These improvements and modifications should also be regarded as the protection scope of this application. Here, the embodiments will not be repeated. The protection scope of this application should be determined by the scope defined by the claims.

Claims

1. A waveform control method applied to a high-voltage pulse power supply, wherein the high-voltage pulse power supply includes a transformer and at least two secondary output units; each secondary output unit includes a rectifier filter circuit and a pulse generation unit; Each rectifier and filter circuit is connected to a secondary winding of the transformer; each pulse generating unit includes a first bridge arm, an energy storage capacitor, and a second bridge arm connected in parallel. The high-potential terminals of all three are connected to the positive output terminal of the corresponding rectifier and filter circuit, and the low-potential terminals are connected to the negative output terminal of the corresponding rectifier and filter circuit. Each rectifier and filter circuit is directly connected in parallel with the corresponding energy storage capacitor for charging. The midpoint of the second bridge arm is the first output terminal of the pulse generating unit, and the midpoint of the first bridge arm is the second output terminal of the pulse generating unit. The first output terminal of the first pulse generating unit is the first output terminal of the high-voltage pulse power supply. The second output terminal of the preceding pulse generating unit is connected to the first output terminal of the following pulse generating unit, and the second output terminal of the last pulse generating unit is the second output terminal of the high-voltage pulse power supply. In each pulse generating unit, the high-potential terminal switch of the first bridge arm and the low-potential terminal switch of the second bridge arm are first diagonal switches, and the low-potential terminal switch of the first bridge arm and the high-potential terminal switch of the second bridge arm are second diagonal switches. Its characteristic is that… The waveform control method includes: The time parameter acquisition step involves acquiring the time parameters of the preset output voltage waveform of the high-voltage pulse power supply. The time parameters include, in sequence on the time axis, a first time, a second time, a third time, and a fourth time that are repeated cyclically. The driver generation step generates the corresponding switching drive timing and switching drive time for each switching transistor in each bridge arm of each pulse generation unit, including: The drives of the switching transistors in the same bridge arm are complementary within a waveform cycle and have a dead time. The voltage level controlling the switch to turn on is the first voltage level, and the voltage level controlling the switch to turn off is the second voltage level. At the first moment, the dead time of each of the first diagonal switching transistors is removed and the driving of each of the second diagonal switching transistors is at the second level. Each energy storage capacitor discharges in series and the high-voltage pulse power supply outputs a positive pulse. In the third time, the dead time of each second diagonal switch is removed and the drive of each first diagonal switch is at the first level, the drive of each first diagonal switch is at the second level, the energy storage capacitors are discharged in series, and the high voltage pulse power supply outputs a negative pulse. Meanwhile, the time during which the switch transistors located at the same position in each of the first diagonal switches are driven at the first level extends forward along the time axis from the first time to the start time of the adjacent fourth time, and the time during which the switch transistors located at the other same position are driven at the first level extends backward along the time axis from the first time to the end time of the adjacent second time.

2. The waveform control method according to claim 1, characterized in that: The driving time of the high-potential terminal switch transistor of each first bridge arm is the sum of the fourth time and the first time minus the dead time, and the driving time of the second level is the sum of the second time and the third time plus the dead time. The time for driving the low-potential terminal switching transistor of each first bridge arm to the first level is the sum of the second and third times minus the dead time; the time to the second level is the sum of the fourth and first times plus the dead time. The time for driving the high-potential terminal switching transistors of each second bridge arm to the first level is the sum of the third and fourth times minus the dead time; the time to the second level is the sum of the first and second times plus the dead time. The time for driving the low-potential terminal switching transistors of each second bridge arm to the first level is the sum of the first time and the second time minus the dead time; the time to the second level is the sum of the third time and the fourth time plus the dead time.

3. The waveform control method according to claim 1, characterized in that: The time for driving the high-potential terminal switch transistor of each first bridge arm to the first level is the sum of the first time and the second time minus the dead time; the time to the second level is the sum of the third time and the fourth time plus the dead time. The time for driving the low-potential terminal switching transistor of each first bridge arm to the first level is the sum of the third and fourth times minus the dead time, and the time to the second level is the sum of the first and second times plus the dead time. The time for driving the high-potential terminal switching transistor of each second bridge arm to the first level is the sum of the second and third times minus the dead time; the time to the second level is the sum of the first and fourth times plus the dead time. The time for driving the low-potential terminal switching transistors of each second bridge arm to the first level is the sum of the first time and the fourth time minus the dead time; the time to the second level is the sum of the second time and the third time plus the dead time.

4. The waveform control method according to claim 1, characterized in that: The dead time is in the nanosecond range.

5. The waveform control method according to claim 1, characterized in that: The first time, the second time, the third time, and the fourth time are set to be equal.

6. The waveform control method according to claim 1, characterized in that: In the time parameter acquisition step, the time parameters of the preset output voltage waveform of the high-voltage pulse power supply are directly obtained, or the first time, the second time, the third time, and the fourth time are derived by reversing the relevant parameters.

7. The waveform control method according to claim 6, characterized in that: The relevant parameters include frequency, positive pulse width, negative pulse width, and pause time.

8. The waveform control method according to claim 1, characterized in that: Before the high-voltage pulse power supply generates a pulse, two high-potential terminal switches or two low-potential terminal switches of each bridge arm are simultaneously turned on to sample the voltage on each energy storage capacitor and predict the output voltage of the high-voltage pulse power supply. Only when the predicted value approaches the target value is the high-voltage pulse power supply controlled to generate a pulse.

9. A waveform control device applied to a high-voltage pulse power supply, the high-voltage pulse power supply comprising a transformer and at least two secondary output units; each secondary output unit comprising a rectifier filter circuit and a pulse generation unit; Each rectifier and filter circuit is connected to a secondary winding of the transformer; each pulse generating unit includes a first bridge arm, an energy storage capacitor, and a second bridge arm connected in parallel. The high-potential terminals of all three are connected to the positive output terminal of the corresponding rectifier and filter circuit, and the low-potential terminals are connected to the negative output terminal of the corresponding rectifier and filter circuit. Each rectifier and filter circuit is directly connected in parallel with the corresponding energy storage capacitor for charging. The midpoint of the second bridge arm is the first output terminal of the pulse generating unit, and the midpoint of the first bridge arm is the second output terminal of the pulse generating unit. The first output terminal of the first pulse generating unit is the first output terminal of the high-voltage pulse power supply. The second output terminal of the preceding pulse generating unit is connected to the first output terminal of the following pulse generating unit, and the second output terminal of the last pulse generating unit is the second output terminal of the high-voltage pulse power supply. In each pulse generating unit, the high-potential terminal switch of the first bridge arm and the low-potential terminal switch of the second bridge arm are first diagonal switches, and the low-potential terminal switch of the first bridge arm and the high-potential terminal switch of the second bridge arm are second diagonal switches. Its characteristic is that… The waveform control device includes: The time parameter acquisition unit is used to acquire the time parameters of the preset output voltage waveform of the high voltage pulse power supply. The time parameters include, in sequence on the time axis, a first time, a second time, a third time, and a fourth time that are repeated cyclically. The drive generation unit is used to generate the corresponding switching drive timing and switching drive time for each switching transistor in each bridge arm of each pulse generation unit: The drives of the switching transistors in the same bridge arm are complementary within a waveform cycle and have a dead time. The voltage level controlling the switch to turn on is the first voltage level, and the voltage level controlling the switch to turn off is the second voltage level. At the first moment, the dead time of each of the first diagonal switching transistors is removed and the driving of each of the second diagonal switching transistors is at the second level. Each energy storage capacitor discharges in series and the high-voltage pulse power supply outputs a positive pulse. In the third time, the dead time of each second diagonal switch is removed and the drive of each first diagonal switch is at the first level, the drive of each first diagonal switch is at the second level, the energy storage capacitors are discharged in series, and the high voltage pulse power supply outputs a negative pulse. Meanwhile, the time during which the switch transistors located at the same position in each of the first diagonal switches are driven at the first level extends forward along the time axis from the first time to the start time of the adjacent fourth time, and the time during which the switch transistors located at the other same position are driven at the first level extends backward along the time axis from the first time to the end time of the adjacent second time.

10. A high-voltage pulse power supply, the high-voltage pulse power supply comprising a transformer and at least two secondary output units; each secondary output unit comprising a rectifier-filter circuit and a pulse generating unit; each rectifier-filter circuit being connected to a secondary winding of the transformer; each pulse generating unit comprising a first bridge arm, an energy storage capacitor, and a second bridge arm connected in parallel, wherein the high-potential terminals of all three are connected to the positive output terminal of the corresponding rectifier-filter circuit, and the low-potential terminals of all three are connected to the negative output terminal of the corresponding rectifier-filter circuit; each rectifier-filter circuit is directly connected in parallel with the corresponding energy storage capacitor for charging; and the midpoint of the second bridge arm is the first output of the pulse generating unit. The midpoint of the first bridge arm is the second output terminal of the pulse generating unit; the first output terminal of the first pulse generating unit is the first output terminal of the high-voltage pulse power supply; the second output terminal of the preceding pulse generating unit is connected to the first output terminal of the following pulse generating unit; and the second output terminal of the last pulse generating unit is the second output terminal of the high-voltage pulse power supply. In each pulse generating unit, the high-potential terminal switch of the first bridge arm and the low-potential terminal switch of the second bridge arm are first diagonal switches, and the low-potential terminal switch of the first bridge arm and the high-potential terminal switch of the second bridge arm are second diagonal switches. Its characteristic is that: The high-voltage pulse power supply also includes the waveform control device as described in claim 9.

Images