Substrate processing method and substrate processing apparatus

Abstract

The invention provides a substrate processing method and a substrate processing apparatus capable of manufacturing a transistor with good characteristics. A substrate processing method according to one embodiment of the present invention comprises: a step for forming an oxide film; and a step of forming a gate insulating film. In the step of forming the oxide film, the surface of the silicon forming the channel region of the transistor is treated with an oxidizing aqueous solution containing an aqueous hydrogen peroxide solution and an alkaline liquid, and the oxide film is formed on the surface of the silicon. In the step of forming the gate insulating film, the gate insulating film of the transistor is formed on the surface of the oxide film.

Description

Technical Field

[0001] The embodiments of the present invention relate to a substrate processing method and a substrate processing apparatus. Background Technology

[0002] In recent years, the development of semiconductor devices with transistors having so-called nanosheet structures has been underway. In the manufacturing technology of such transistors, for example, a silicon oxide film is formed as an intermediate layer between the silicon that forms the channel region and the gate insulating film (see Patent Document 1).

[0003] Existing technical documents

[0004] Patent documents

[0005] Patent Document 1: Japanese Patent Application Publication No. 2004-111737 Summary of the Invention

[0006] The technical problem that the invention aims to solve

[0007] This invention provides a technique for manufacturing transistors with excellent properties.

[0008] Means for solving technical problems

[0009] One aspect of the substrate processing method of the present invention includes: a step of forming an oxide film; and a step of forming a gate insulating film. In the step of forming the oxide film, an oxidizing aqueous solution comprising an aqueous solution of hydrogen peroxide and an alkaline liquid is used to treat the surface of silicon, which forms the channel region of a transistor, to form an oxide film on the surface of the silicon. In the step of forming the gate insulating film, a gate insulating film of a transistor is formed on the surface of the oxide film.

[0010] Invention Effects

[0011] Using this invention, transistors with excellent characteristics can be manufactured. Furthermore, the effects are not necessarily limited to those described herein, and any of the effects described in this invention may also be applicable. Attached Figure Description

[0012] Figure 1 This is a schematic diagram showing the general structure of the substrate processing system in the implementation method.

[0013] Figure 2 This is a schematic diagram illustrating an example of the specific structure of the processing unit in an implementation method.

[0014] Figure 3 This is a perspective view showing an example of the structure of a transistor in an implementation method.

[0015] Figure 4 yes Figure 3 The cross-sectional view of line AA shown.

[0016] Figure 5 This is a flowchart illustrating the manufacturing steps of a transistor in an embodiment.

[0017] Figure 6 This is a diagram illustrating the manufacturing process of the transistor in the embodiment.

[0018] Figure 7 This is a graph showing an example of the XPS energy spectrum of the oxide film in the embodiment.

[0019] Figure 8 This indicates the thickness of the oxide film in the embodiments and reference examples relative to Si. 4+ A diagram showing the proportional relationships.

[0020] Figure 9 This indicates the thickness of the oxide film in the embodiments and reference examples relative to Si. 4+ A diagram showing the proportional relationships.

[0021] Explanation of reference numerals in the attached figures

[0022] W: Wafer (an example of a substrate), 1: Substrate processing system (an example of a substrate processing apparatus), 18: Control unit, 31: Holding unit, 40: Liquid supply unit, 105a: Silicon, 105b: Gate insulating film, 105c: Oxide film, T: Film thickness, Tr: Transistor. Detailed Implementation

[0023] The embodiments of the substrate processing method and substrate processing apparatus disclosed in this application will now be described in detail with reference to the accompanying drawings. However, the present invention is not limited to the embodiments shown below. It should also be noted that the drawings are schematic and may differ from reality in terms of the dimensional relationships and proportions of the elements. Furthermore, there may be instances where the drawings include portions with different dimensional relationships or proportions.

[0024] In recent years, the development of semiconductor devices with so-called nanosheet structures has been underway. In the fabrication techniques of such transistors, for example, a silicon oxide film is formed as an intermediate layer between the silicon that forms the channel region and the gate insulating film.

[0025] On the other hand, when the intermediate layer is formed using the aforementioned existing technology, it is difficult to form a high-quality and thin oxide film, which may degrade the various characteristics of the manufactured transistor.

[0026] Therefore, there is a desire to develop a technology that can overcome the aforementioned problems and manufacture transistors with excellent characteristics.

[0027] <Overview of Substrate Processing System>

[0028] First, refer to Figure 1 The general structure of the substrate processing system 1 in the embodiment will be described. Figure 1 This is a schematic diagram showing the general structure of the substrate processing system 1 according to the embodiment. Hereinafter, in order to clarify the positional relationships, the X-axis, Y-axis and Z-axis are defined as being orthogonal to each other, and the positive direction of the Z-axis is defined as the vertically upward direction.

[0029] Substrate processing system 1 is an example of a substrate processing apparatus. For example... Figure 1 As shown, the substrate processing system 1 includes an infeed / outfeed station 2 and a processing station 3. The infeed / outfeed station 2 and the processing station 3 are arranged adjacent to each other.

[0030] The infeed / outfeed station 2 includes a carrier placement section 11 and a transport section 12. Multiple carriers C can be placed in the carrier placement section 11, and the carriers C can hold multiple substrates, or in this embodiment, semiconductor wafers W (hereinafter referred to as wafers W), in a horizontal state.

[0031] The transport section 12 is disposed adjacent to the carrier placement section 11, and a substrate transport device 13 and a transfer section 14 are provided inside the transport section 12. The substrate transport device 13 includes a wafer holding mechanism capable of holding the wafer W. In addition, the substrate transport device 13 is capable of horizontal and vertical movement and rotation about the vertical axis, and the wafer holding mechanism can be used to transport the wafer W between the carrier C and the transfer section 14.

[0032] The processing station 3 is arranged adjacent to the conveying section 12. The processing station 3 includes a conveying section 15 and a plurality of processing units 16. The plurality of processing units 16 are arranged on both sides of the conveying section 15.

[0033] The transport unit 15 internally includes a substrate transport device 17. The substrate transport device 17 includes a wafer holding mechanism capable of holding the wafer W. In addition, the substrate transport device 17 is capable of horizontal and vertical movement and rotation about the vertical axis, and can transport the wafer W between the transfer unit 14 and the processing unit 16 using the wafer holding mechanism.

[0034] The processing unit 16 is capable of performing prescribed substrate processing on the wafer W transported by the substrate transport device 17.

[0035] Additionally, the substrate processing system 1 includes a control device 4. The control device 4 is, for example, a computer, including a control unit 18 and a storage unit 19. The storage unit 19 can store programs for controlling various processes executed in the substrate processing system 1. The control unit 18 can control the operation of the substrate processing system 1 by reading and executing the programs stored in the storage unit 19.

[0036] Alternatively, the program can be recorded on a computer-readable storage medium and installed from that storage medium into the storage unit 19 of the control device 4. Examples of computer-readable storage media include hard disks (HD), floppy disks (FD), optical disks (CD), magneto-optical disks (MO), and memory cards.

[0037] In the substrate processing system 1 configured as described above, firstly, the substrate transport device 13 of the delivery station 2 removes the wafer W from the carrier C placed in the carrier placement section 11 and places the removed wafer W in the transfer section 14. The wafer W placed in the transfer section 14 is then removed from the transfer section 14 by the substrate transport device 17 of the processing station 3 and sent to the processing unit 16.

[0038] The wafer W, which is fed into the processing unit 16, is processed by the processing unit 16 and then sent out from the processing unit 16 by the substrate transport device 17 and placed in the transfer section 14. Then, the processed wafer W, which is placed in the transfer section 14, is returned to the carrier C of the carrier placement section 11 by the substrate transport device 13.

[0039] <Structure of the processing unit>

[0040] Next, refer to Figure 2 The structure of the processing unit 16 will be described. Figure 2 This is a schematic diagram illustrating an example of the specific structure of the processing unit 16 in the implementation method. For example... Figure 2 As shown, the processing unit 16 includes a chamber 20, a substrate processing section 30, a liquid supply section 40, and a recovery cup 50.

[0041] The chamber 20 can accommodate the substrate processing unit 30, the liquid supply unit 40, and the recovery cup 50. An FFU (Fan Filter Unit) 21 is provided at the top of the chamber 20. The FFU 21 can form a downward flow within the chamber 20.

[0042] The substrate processing unit 30 includes a holding part 31, a support part 32, and a driving part 33, and is capable of performing liquid processing on the placed wafer W. The holding part 31 is capable of holding the wafer W horizontally. The support part 32 is a member extending in the vertical direction, and its base end is supported by the driving part 33 in a rotatable manner, so that the holding part 31 can be horizontally supported at the front end of the support part 32. The driving part 33 is capable of rotating the support part 32 about a vertical axis.

[0043] The substrate processing unit 30 can rotate the holding part 31 supported by the support part 32 by rotating the support part 32 through the drive part 33, thereby rotating the wafer W held in the holding part 31.

[0044] On the upper surface of the holding portion 31 of the substrate processing unit 30, a holding member 31a is provided, which is capable of holding the wafer W from the side. The wafer W can be held horizontally by the holding member 31a with a slight gap between it and the upper surface of the holding portion 31. Furthermore, the wafer W is held in the holding portion 31 with the surface to be processed facing upward.

[0045] The liquid supply unit 40 is capable of supplying processing fluid to the wafer W. The liquid supply unit 40 includes: nozzles 41a and 41b; arms 42a and 42b that are capable of horizontally supporting the nozzles 41a and 41b respectively; and rotary lifting mechanisms 43a and 43b that are capable of rotating and lifting the arms 42a and 42b respectively.

[0046] Nozzle 41a is connected to mixing unit 46 via flow regulator 47. Mixing unit 46 is connected to first supply source 45a via flow regulator 44a. Additionally, mixing unit 46 is connected to second supply source 45b via flow regulator 44b. Furthermore, mixing unit 46 is connected to third supply source 45c via flow regulator 44c.

[0047] The first supply source 45a is, for example, a tank for storing an aqueous hydrogen peroxide solution. The flow regulator 44a is capable of regulating the flow rate of the aqueous hydrogen peroxide solution supplied to the mixing section 46. The flow regulator 44a includes an on / off valve, a flow control valve, and a flow meter, etc.

[0048] The second supply source 45b is, for example, a tank for storing an alkaline liquid (hereinafter also simply referred to as "alkaline liquid"). The alkaline liquid in this embodiment is, for example, an ammonia solution or a choline solution. The flow regulator 44b is capable of regulating the flow rate of the alkaline liquid supplied to the mixing section 46. The flow regulator 44b includes an on / off valve, a flow control valve, and a flow meter, etc.

[0049] The third supply source 45c is, for example, a tank for storing DIW (Deionized Water). The flow regulator 44c is capable of regulating the flow rate of the DIW supplied to the mixing section 46. The flow regulator 44c includes an on / off valve, a flow control valve, and a flow meter, etc.

[0050] The mixing unit 46 can mix the hydrogen peroxide aqueous solution supplied from the first supply source 45a, the alkaline liquid supplied from the second supply source 45b, and the DIW supplied from the third supply source 45c to generate an oxidizing aqueous solution having a specified concentration of hydrogen peroxide aqueous solution and a specified concentration of alkaline liquid.

[0051] The flow regulator 47 is capable of regulating the flow rate of the oxidizing aqueous solution supplied from the mixing section 46 to the nozzle 41a. The flow regulator 47 includes an on / off valve, a flow control valve, and a flow meter.

[0052] Nozzle 41b is connected to a fourth supply source 45d via a flow regulator 44d. The fourth supply source 45d is, for example, a tank for storing flushing fluid. The flushing fluid in this embodiment is, for example, DIW. However, the flushing fluid in this embodiment is not limited to DIW.

[0053] The flow regulator 44d is capable of regulating the flow rate of the flushing fluid supplied to the nozzle 41b. The flow regulator 44d includes an on / off valve, a flow control valve, and a flow meter.

[0054] The oxidizing aqueous solution supplied from the mixing section 46 can be released from nozzle 41a. The rinsing liquid supplied from the fourth supply source 45d can be released from nozzle 41b.

[0055] The recovery cup 50 is arranged to surround the holding portion 31, and is capable of collecting the processing liquid that splashes off the wafer W due to the rotation of the holding portion 31. A drain port 51 is formed at the bottom of the recovery cup 50, through which the processing liquid collected by the recovery cup 50 can be discharged to the outside of the processing unit 16. In addition, an exhaust port 52 is formed at the bottom of the recovery cup 50, which allows the gas supplied from the FFU 21 to be discharged to the outside of the processing unit 16.

[0056] <Structure of Semiconductor Devices>

[0057] Next, refer to Figure 3 and Figure 4 An example of the structure of a semiconductor device in which a part of the manufacturing process is performed in the substrate processing system 1 of the embodiment will be described. Figure 3 This is a perspective view showing an example of the structure of the transistor Tr in an implementation method. Figure 4 yes Figure 3 The cross-sectional view of line AA shown.

[0058] like Figure 3 and Figure 4 As shown, the transistor Tr of the embodiment has a so-called nanosheet structure. The transistor Tr of the embodiment includes a semiconductor substrate 101, an insulating film 102, a gate electrode 103, a sidewall insulating film 104, a plurality of nanosheets 105, and an insulating film 106.

[0059] Semiconductor substrate 101 is, for example, a silicon substrate. An insulating film 102 is located on the surface of semiconductor substrate 101 and electrically insulates it from adjacent transistors Tr (not shown). The insulating film 102 can be a device separation film or can be formed using an STI (Shallow Trench Isolation) structure composed of an oxide film.

[0060] The gate electrode 103 is, for example, wall-shaped and erected on the surface of the semiconductor substrate 101 and the insulating film 102. The gate electrode 103 extends, for example, along one direction (the X-axis direction in the figure).

[0061] The gate electrode 103 is made of, for example, tungsten (W), titanium (Ti), titanium nitride (TiN), hafnium (Hf), hafnium silicide (HfSi), ruthenium (Ru), iridium (Ir), cobalt (Co).

[0062] The sidewall insulating film 104 is provided in such a way as to cover the sidewall of the gate electrode 103. The sidewall insulating film 104 is made of, for example, silicon oxide film (SiO2) or silicon nitride film (SiN).

[0063] The nanosheet 105 is, for example, strip-shaped and disposed substantially parallel to the surface of the semiconductor substrate 101. The nanosheet 105 extends, for example, along a direction orthogonal to the direction in which the gate electrode 103 extends (the Y-axis direction in the figure) and penetrates the gate electrode 103.

[0064] In addition, Figure 3 and Figure 4 In the example, the number of stacked nanosheets 105 is 3, but it is not limited to this.

[0065] like Figure 4 As shown, the nanosheet 105 has silicon 105a and a gate insulating film 105b. Silicon 105a forms the channel region of transistor Tr inside the gate electrode 103. The gate insulating film 105b is disposed at least inside the gate electrode 103 in a manner that covers the surface of silicon 105a.

[0066] Furthermore, in the nanosheet 105, the source region of the transistor Tr and the drain region of the transistor Tr are respectively provided on both sides separated by the gate electrode 103.

[0067] The gate insulating film 105b is, for example, composed of a high-k dielectric film with a thickness of several nm. The gate insulating film 105b is, for example, composed of hafnium oxide (HfO2), hafnium oxide silicide (HfSiO), tantalum oxide (Ta2O5), or aluminum hafnium oxide (HfAlO). x It consists of , etc.

[0068] Furthermore, in the transistor Tr of the embodiment, an oxide film 105c is provided between the silicon 105a and the gate insulating film 105b (see reference). Figure 6 Details about the 105c oxide film will be provided later.

[0069] An insulating film 106 is disposed in such a way that it covers the area around the gate electrode 103 and the plurality of nanosheets 105, providing electrical insulation between it and the adjacent transistor Tr.

[0070] <Detailed information on substrate processing>

[0071] Next, refer to Figures 5-9 This section will explain the details of the substrate processing of the wafer W in the processing unit 16. Figure 5 This is a flowchart illustrating the manufacturing steps of the transistor Tr in an embodiment. Figure 6 This is a diagram illustrating the manufacturing process of the transistor Tr in the embodiment.

[0072] like Figure 5 As shown, in the substrate processing of this embodiment, a preparation process is first performed (step S101). In this preparation process, substrates are prepared as follows: Figure 6 As shown in (a), a transistor Tr is formed on the surface (refer to). Figure 4 The silicon 105a wafer W in the channel region of the ) (refer to) Figure 1 ).

[0073] In the substrate processing of the embodiment, an oxide film formation process is then performed (step S102). In this oxide film formation process, the control unit 18 (see reference 18)... Figure 1 ) in the holding part 31 (refer to Figure 2 After holding the chip W, control the liquid supply unit 40 (refer to...). Figure 2 ) etc., from nozzle 41a (refer to Figure 2 An oxidizing aqueous solution is supplied to the rotating wafer W.

[0074] Therefore, as Figure 6 As shown in (b), an oxide film 105c is formed on the surface of silicon 105a. Furthermore, after supplying the oxidizing aqueous solution to the wafer W, the control unit 18 stops the supply of the oxidizing aqueous solution at a predetermined time and supplies rinsing liquid from the nozzle 41b. Thus, the oxidizing aqueous solution is removed from the surface of the wafer W, and the oxide film formation process is completed.

[0075] Furthermore, the control unit 18 stops discharging from nozzle 41b (see reference). Figure 2 A rinsing solution is supplied, and the wafer W is rotated at high speed to remove the rinsing solution. This process dries the wafer W.

[0076] In the substrate processing of this embodiment, a gate insulating film formation process (step S103) is then performed. In this gate insulating film formation process, the wafer W with the oxide film 105c formed is ejected from the substrate processing system 1 and fed into a film deposition apparatus (not shown). Then, in this film deposition apparatus, as... Figure 6 As shown in (c), a gate insulating film 105b of a specified thickness is formed on the surface of the oxide film 105c.

[0077] In the substrate processing of this embodiment, a gate electrode formation process is then performed (step S104). In this gate electrode formation process, in a film deposition apparatus (not shown), such as... Figure 6 As shown in (d), a gate electrode 103 is formed on the surface of the gate insulating film 105b. Thus, the substrate processing of the embodiment is completed.

[0078] In this embodiment, during the oxide film formation process (step S102), an oxidizing aqueous solution containing an aqueous solution of hydrogen peroxide and an alkaline liquid is used to process the surface of silicon 105a, which becomes the channel region of transistor Tr, thereby forming a high-quality and thin oxide film 105c.

[0079] Furthermore, by forming a high-quality oxide film 105c between silicon 105a and gate insulating film 105b, the leakage current of transistor Tr can be reduced.

[0080] In addition, by forming a thin oxide film 105c between silicon 105a and gate insulating film 105b, the volume of silicon 105a, which forms the channel region, can be adequately ensured even when the transistor Tr is miniaturized.

[0081] As described above, in the substrate processing of the embodiment, a high-quality and thin oxide film 105c can be formed, thus enabling the manufacture of transistors Tr with excellent characteristics.

[0082] Next, refer to Figures 7-9 The specific characteristics of the oxide film 105c formed by the oxide film formation process of the embodiment will be described. Figure 7 This is a graph showing an example of the XPS energy spectrum of the oxide film 105c of the embodiment.

[0083] like Figure 7 As shown, in an oxide film containing silicon and oxygen at 105c (refer to...) Figure 6 In the study, XPS (X-ray Photoelectron Spectroscopy) analysis yielded an energy spectrum with multiple peaks in the binding energy range of 98 eV to 107 eV.

[0084] For example, such as Figure 7 As shown, Si2p can be observed near the binding energy of 99 eV. 3 / 2 The peak of Si2p can be observed near the binding energy of 100 eV. 1 / 2 The peak. Additionally, compared to Si2p... 1 / 2 The peak is located near the high-energy side, allowing observation of Si. + peak, Si 2 + peak, Si 3+peaks and Si 4+ The peak.

[0085] In these peaks, Si + The peak is generated by Si2O in the oxide film 105c. 2+ The peak is generated by SiO in the 105c oxide film. 3+ The peak is generated by Si2O3 in the oxide film 105c. 4+ The peak is generated by SiO2 in the oxide film 105c.

[0086] Moreover, the Si shown in the following formula (1) 4+ The higher the proportion, the higher the proportion of SiO2 in the oxide film 105c, and it can be regarded as a high-quality oxide film 105c.

[0087] Si 4+ Ratio = Si 4+ / (Si) + +Si 2+ +Si 3+ +Si 4+ )·· (1)

[0088] In equation (1) above, "Si" + "Si" 2+ "Si" 3+ "Si" 4+ "refers to such as Figure 7 Si obtained by peak separation from XPS energy dispersive spectroscopy as shown + Si 2+ Si 3+ Si 4+ The area of ​​each peak.

[0089] In addition, by performing angle decomposition XPS analysis, the film thickness T of the oxide film 105c can be calculated from the XPS energy spectrum based on the following equation (2).

[0090]

[0091] In equation (2) above, λ is a specified constant (3.3 in the case of XPS analysis), and θ is the angle between the sample surface and the detector (Take-Off Angle). Additionally, "I Si+ “I” Si2+ “I” Si3+ “I” Si4+ "refers to such as Figure 7 Si obtained by peak separation from XPS energy dispersive spectroscopy as shown + Si 2+ Si3+ Si 4+ The intensity of each peak. Additionally, "I" Si2p "refers to such as Figure 7 Si2p obtained by peak separation from XPS energy dispersive spectroscopy as shown 3 / 2 The intensity of the peak.

[0092] Furthermore, the Si oxide film 105c formed using the oxidizing aqueous solution of the embodiment and various processing solutions of the reference example... 4+ The relationship between the ratio and film thickness T is shown in Figure 8 and Figure 9 . Figure 8 and Figure 9 This represents the film thickness T of the oxide film 105c in the embodiments and reference examples, and its relationship with Si. 4+ A diagram showing the proportional relationships.

[0093] like Figure 8 As shown, compared with the sample that formed the oxide film 105c using only an aqueous hydrogen peroxide solution, the sample that formed the oxide film 105c using an oxidizing aqueous solution containing ammonia as an alkaline liquid in an aqueous hydrogen peroxide solution was able to obtain Si. 4+ A high proportion of oxide film at 105°C. Furthermore... Figure 8 and Figure 9 The concentrations of all components in the medicinal solution recorded in the explanatory notes are all converted to mass % (wt%).

[0094] And, as Figure 8 As shown, in the oxide film 105c formed using the oxidizing aqueous solution of the embodiment, Si 4+ The proportions of all components are 50% or more. That is, in the oxide film 105c formed using the oxidizing aqueous solution of the embodiment, among SiO2, Si2O, SiO, and Si2O3, SiO2 has the highest content.

[0095] The main reason for obtaining a high-quality oxide film 105c due to the highest SiO2 content, as mentioned above, can be speculated as follows: Inside the hydrogen peroxide aqueous solution, the oxide species HO2 can be generated through the chemical reaction shown in the following formula (3). - .

[0096] OH - +H₂O₂→HO₂ - +H2O·· (3)

[0097] Then, from this oxidant HO2 - The silicon on the surface of silicon 105a is oxidized, thereby forming an oxide film 105c on the surface of silicon 105a.

[0098] In this embodiment, by adding a trace amount of alkaline liquid (e.g., ammonia) to the hydrogen peroxide aqueous solution, hydroxide ions (OH-) can be generated through the ionization reaction shown in the following formula (4). - .

[0099] NH4OH→NH4 + +OH - ·· (4)

[0100] Then, hydroxide ions OH - It is supplied to the interior of the hydrogen peroxide aqueous solution, thereby promoting the chemical reaction shown in the above formula (3), and thus, a high-quality oxide film 105c can be formed.

[0101] Furthermore, while the above example illustrates the use of ammonia as an alkaline liquid, the same phenomenon can occur when other alkaline liquids (such as choline solution) are added.

[0102] like Figure 9 As shown, in this embodiment, the concentration of ammonia in the oxidizing aqueous solution can be 0.0005 wt% to 0.4 wt%. Additionally, in this embodiment, the concentration of hydrogen peroxide in the oxidizing aqueous solution can be 0.005 wt% to 2.0 wt%.

[0103] Therefore, it is possible to enable Si 4+ The ratio is above the specified threshold Rth (>50%), and the film thickness T of the oxide film 105c is 1.0 nm or less. That is, in the embodiment, a higher quality and thinner oxide film 105c can be formed.

[0104] Therefore, according to the implementation method, it is possible to manufacture transistors Tr with better characteristics.

[0105] In addition, Figure 9 In the example, data on an oxide film 105c formed using 30 ppm of ozone water (referred to as "O3-DIW") is also recorded. However, it is known that when using the oxidizing aqueous solution of the embodiment, an oxide film 105c thinner than that of the example is formed.

[0106] In addition, in the embodiments, the film thickness T of the oxide film 105c can be 0.6 nm to 1.0 nm.

[0107] By making the thickness T of the oxide film 105c 0.6 nm or more, the leakage current of the transistor Tr can be reduced. In addition, by making the thickness T of the oxide film 105c 105c 1.0 nm or less, even when the transistor Tr is miniaturized, the volume of the silicon 105a that forms the channel region can be sufficiently ensured.

[0108] In addition, in the embodiment, the temperature of the oxidizing aqueous solution in the oxide film formation process (step S102) can be 20°C to 70°C.

[0109] By maintaining the temperature of the oxidizing aqueous solution above 20°C, an oxide film 105c can be generated efficiently. Furthermore, by maintaining the temperature of the oxidizing aqueous solution below 70°C, excessive oxidation reaction can be suppressed, thus enabling the stable generation of an oxide film 105c with a thin film thickness T.

[0110] Furthermore, the gate insulating film 105b formed on the surface of the oxide film 105c in the embodiment can be mainly composed of hafnium oxide. This further reduces the leakage current of the transistor Tr.

[0111] The substrate processing method of this embodiment includes a step of forming an oxide film 105c (step S102) and a step of forming a gate insulating film 105b (step S103). In the step of forming the oxide film 105c (step S102), the surface of silicon 105a, which forms the channel region of transistor Tr, is processed using an oxidizing aqueous solution containing an aqueous solution of hydrogen peroxide and an alkaline liquid, thereby forming an oxide film 105c on the surface of silicon 105a. In the step of forming the gate insulating film 105b (step S103), the gate insulating film 105b of transistor Tr is formed on the surface of the oxide film 105c. This allows for the fabrication of a transistor Tr with excellent characteristics.

[0112] Furthermore, in the substrate processing method of this embodiment, the oxidizing aqueous solution includes an aqueous solution of hydrogen peroxide and ammonia. This enables the fabrication of a transistor Tr with excellent characteristics.

[0113] Furthermore, in the substrate processing method of this embodiment, the concentration of ammonia in the oxidizing aqueous solution is 0.0005 wt% to 0.4 wt%. This allows for the fabrication of transistors with better characteristics.

[0114] Furthermore, in the substrate processing method of this embodiment, the concentration of the hydrogen peroxide aqueous solution contained in the oxidizing aqueous solution is 0.005 wt% to 2.0 wt%. This allows for the fabrication of transistors with better characteristics.

[0115] Furthermore, in the substrate processing method of this embodiment, the temperature of the oxidizing aqueous solution is 20°C to 70°C. This allows for the efficient formation of an oxide film 105c, and also enables the stable formation of an oxide film 105c with a thin film thickness T.

[0116] Furthermore, in the substrate processing method of the embodiment, the oxide film 105c contains at least one of SiO2, Si2O, SiO, and Si2O3, with SiO2 having the highest content in the oxide film 105c. Therefore, it is possible to manufacture a transistor Tr with excellent characteristics.

[0117] Furthermore, in the substrate processing method of this embodiment, the film thickness T of the oxide film 105c is 0.6 nm to 1.0 nm. This reduces the leakage current of the transistor Tr, and even when the transistor Tr is miniaturized, the volume of the silicon 105a forming the channel region can be sufficiently ensured.

[0118] Furthermore, in the substrate processing method of this embodiment, the gate insulating film 105b is mainly composed of hafnium oxide. This further reduces the leakage current of the transistor Tr.

[0119] Furthermore, the substrate processing apparatus (substrate processing system 1) of the embodiment includes a holding section 31, a liquid supply section 40, and a control section 18. The holding section 31 is capable of holding and rotating a silicon substrate (wafer W) on which a channel region for a transistor Tr is formed. The liquid supply section 40 is capable of supplying an oxidizing aqueous solution containing an aqueous solution of hydrogen peroxide and an alkaline liquid to the substrate (wafer W) held in the holding section 31. The control section 18 is capable of controlling each section. In addition, the control section 18 can control the surface of the silicon 105a formed on the substrate (wafer W) to be treated with the oxidizing aqueous solution before forming the gate insulating film 105b of the transistor Tr, thereby forming an oxide film 105c on the surface of the silicon 105a. As a result, a transistor Tr with good characteristics can be manufactured.

[0120] The embodiments of the present invention have been described above, but the present invention is not limited to the above embodiments, and various modifications can be made without departing from the spirit of the present invention. For example, in the above embodiments, an example of applying the technology of the present invention to a transistor Tr with a nanosheet structure is given, but the present invention is not limited to this example.

[0121] For example, the technology of the present invention can also be applied to transistors of various types, such as planar structures, FinFET structures, or nanowire structures. Thus, a good and thin oxide film 105c can be formed between silicon 105a and the gate insulating film 105b, thereby enabling the fabrication of transistors with excellent characteristics.

[0122] The embodiments disclosed herein should be considered illustrative rather than limiting in all respects. In fact, the above embodiments can be implemented in various ways. Furthermore, the above embodiments can be omitted, substituted, or modified in various ways without departing from the appended claims and their spirit.

Claims

1. A substrate processing method, characterized in that, include: The step of treating the surface of silicon, which forms the channel region of a transistor, with an oxidizing aqueous solution containing an aqueous solution of hydrogen peroxide and an alkaline liquid to form an oxide film on the surface of the silicon; and The step of forming the gate insulating film of the transistor on the surface of the oxide film.

2. The substrate processing method according to claim 1, characterized in that: The oxidizing aqueous solution contains an aqueous solution of hydrogen peroxide and ammonia.

3. The substrate processing method according to claim 2, characterized in that: The concentration of ammonia in the oxidizing aqueous solution is 0.0005 wt% to 0.4 wt%.

4. The substrate processing method according to any one of claims 1 to 3, characterized in that: The concentration of hydrogen peroxide aqueous solution contained in the oxidizing aqueous solution is 0.005 wt% to 2.0 wt%.

5. The substrate processing method according to any one of claims 1 to 3, characterized in that: The temperature of the oxidizing aqueous solution is 20℃~70℃.

6. The substrate processing method according to any one of claims 1 to 3, characterized in that: The oxide film contains at least one of SiO2, Si2O, SiO, and Si2O3. In the oxide film, SiO2 has the highest content.

7. The substrate processing method according to any one of claims 1 to 3, characterized in that: The thickness of the oxide film is 0.6 nm to 1.0 nm.

8. The substrate processing method according to any one of claims 1 to 3, characterized in that: The gate insulating film is mainly composed of hafnium oxide.

9. A substrate processing apparatus, characterized in that, include: A holding section that can hold and rotate the substrate, on which silicon is formed to form a channel region for transistors; A liquid supply unit is capable of supplying an oxidizing aqueous solution, comprising an aqueous hydrogen peroxide solution and an alkaline liquid, to the substrate held in the holding unit. and The control unit is responsible for controlling all other units. The control unit is capable of controlling the process such that, prior to forming the gate insulating film of the transistor, the surface of the silicon formed on the substrate is treated with the oxidizing aqueous solution to form an oxide film on the surface of the silicon.

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