A method for fabricating an on-chip gain waveguide and the gain waveguide
By forming doped regions in optical thin film layers and transferring them layer by layer through a bonding-polishing process, the problems of high cost and lattice damage caused by high-energy ion implantation are solved, and on-chip gain waveguides with deep doping and high-efficiency optical performance at low energy are fabricated.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- XIAN INST OF OPTICS & PRECISION MECHANICS CHINESE ACAD OF SCI
- Filing Date
- 2026-03-30
- Publication Date
- 2026-05-26
AI Technical Summary
Existing technologies for fabricating on-chip gain waveguides involve expensive high-energy ion implantation equipment that causes severe lattice damage, making it difficult to achieve deep doping and high-efficiency optical performance.
A multi-step ion implantation process is used to form doped regions in the optical thin film layer. The doped thin film layers are then transferred layer by layer through a bonding-polishing cycle process to form a multi-layer stacked structure. Combined with low-energy ion implantation and annealing processes, deep doping and lattice repair are achieved.
It reduces equipment costs, avoids lattice damage caused by high-energy injection, achieves effective overlap of high-depth rare-earth ion distribution and optical field modes, and improves device gain efficiency and integration performance.
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Figure CN122085451A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of integrated optical technology, and in particular to a method for fabricating an on-chip gain waveguide and the gain waveguide itself. Background Technology
[0002] Currently, next-generation information technologies, represented by artificial intelligence (AI), big data, the Internet of Things (IoT), data centers, and autonomous driving, face massive data transmission and processing demands. Optical communication networks, as the "main artery" of information infrastructure, are undergoing a historic transformation from traditional backbone networks to comprehensive and in-depth development of access networks, data center internal structures, and even inter-chip optical interconnects. However, traditional systems based on erbium-doped fiber amplifiers are limited by their large size, high power consumption, and high manual assembly costs, making them difficult to directly apply in integrated and miniaturized photonic integrated circuits. This has become one of the key bottlenecks restricting all-optical integration and leaps in computing power. Technological iteration has always followed a three-stage leap: "breaking through physical bottlenecks, upgrading system integration, and revolutionizing cost efficiency." Drawing on the development path of electronic technology, on-chip optical amplifiers are the inevitable path for optical amplifiers.
[0003] Rare-earth-doped on-chip optical amplifiers embed rare-earth ions into planar waveguide structures, combining the low-noise advantages of rare-earth ions with the compact integration capabilities of waveguides, exhibiting a unique gain mechanism and integration potential. As a key path for realizing on-chip gain devices, ion implantation is a crucial process for fabricating rare-earth-doped waveguide amplifiers, offering advantages such as precise doping, low-temperature processing, and compatibility with semiconductor processes. However, to achieve effective waveguide confinement and effective overlap of ion and optical field modes, rare-earth ions must be implanted to a sufficiently deep region, necessitating high-energy ion implantation. This presents a dual challenge: on the one hand, high-energy implantation equipment is expensive and complex to maintain; on the other hand, high-energy ions can induce severe lattice damage, generating numerous defects that are difficult to completely repair, thus affecting the device's optical performance and luminous efficiency. For example, in a 2022 study published in *Science*, an implantation energy as high as 2 MeV was required to achieve an erbium ion implantation depth of approximately 700 nanometers in a silicon nitride waveguide. Therefore, developing a new process that can achieve deep doping at lower energies and control lattice damage has become a core technological bottleneck driving the large-scale integration and application of on-chip optical amplifiers. Summary of the Invention
[0004] This application provides a method for fabricating an on-chip gain waveguide and the gain waveguide itself, which can solve the defects of deep doping requirements and high cost, long cycle time and severe lattice damage caused by high-energy implantation when fabricating on-chip gain devices using ion implantation process.
[0005] To achieve the above objectives, this application adopts the following technical solution: In a first aspect, this application provides a method for fabricating an on-chip gain waveguide, the method comprising: Step S1: Provide at least two donor wafers, each donor wafer comprising a substrate, a buried oxide layer formed on the substrate, and an optical thin film layer formed on the buried oxide layer; Step S2: Rare earth ions are implanted into the optical thin film layer of each donor wafer to form a doped region in the optical thin film layer, thus forming a doped thin film layer. Step S3: Through a bonding-polishing cycle process, the doped thin film layer of each donor wafer is transferred and stacked onto a target substrate to form a multilayer stacked doped optical thin film with a preset thickness and a preset ion implantation depth; wherein, the bonding-polishing cycle process includes: bonding the doped thin film layers of two donor wafers face to face, and then removing the substrate and buried oxide layer of one of the donor wafers to achieve the transfer and stacking of the doped thin film layer of one donor wafer onto a target substrate; Step S4: Fabricate the target waveguide structure on a multilayer stacked doped optical thin film.
[0006] In one embodiment, step S2 involves rare-earth ion implantation into the optical thin film layer of each donor wafer, including: A multi-step ion implantation process is employed to implant rare earth ions into the optical thin film layer of each donor wafer. This multi-step ion implantation process uses industrial-grade ion implantation equipment.
[0007] In one embodiment, in step S2, the thickness of the optical thin film layer is determined based on the material of the optical thin film layer, the type of rare earth ions to be implanted, and the implantation energy of the ion implantation.
[0008] In one embodiment, step S3, the bonding-polishing cycle process includes: Step S31: Bond the first donor wafer and the second donor wafer so that the doped thin film layer of the first donor wafer is in contact with the doped thin film layer of the second donor wafer. Step S32: Polish the second donor wafer to remove the substrate and buried oxide layer, and then form a composite film consisting of two stacked doped optical thin films on the first donor wafer to obtain a composite structure. Step S33: Using the composite structure as a new first donor wafer, repeat steps S31 and S32 with the third donor wafer until the number of stacked doped optical thin film layers reaches the preset condition.
[0009] In one embodiment, step S3, prior to the bonding process, further includes: Polishing is performed on the surface of the doped thin film layer after ion implantation to adjust the surface flatness of the doped thin film layer or to control the ion concentration distribution in the near-surface region.
[0010] In one embodiment, the bonding in step S3 includes: room temperature bonding and high temperature bonding, wherein the bonding temperature for room temperature bonding is 20~200℃ and the bonding temperature for high temperature bonding is 800~1200℃. If the bonding in step S3 is room temperature bonding, then before step S4, the method further includes: Annealing is performed on the multilayer stacked doped optical thin films formed on the target substrate.
[0011] In one embodiment, the polishing in S3 includes at least one of mechanical grinding, chemical mechanical polishing, or wet etching.
[0012] In one embodiment, step S4 fabricates a waveguide structure on a multilayer stacked doped optical thin film, including: Waveguide structures were fabricated on multilayer stacked doped optical thin films using photolithography and etching processes. After removing the residual mask layer in the waveguide structure through stripping and cleaning processes, a capping layer is deposited on the waveguide structure to obtain the target waveguide structure.
[0013] In one embodiment, a pre-waveguide structure is fabricated on a multilayer stacked doped optical thin film using photolithography and etching processes, including: The photolithography process is performed to transfer the design information of the waveguide structure and stress relief structure from the mask to the thin film that has been implanted with rare earth ions. After performing an etching process to complete the fabrication of the designed waveguide structure and stress relief structure, the waveguide structure is obtained.
[0014] In a second aspect of this application, a gain waveguide is provided, which is fabricated using the on-chip gain waveguide fabrication method of the first aspect of this application.
[0015] The beneficial effects of the technical solutions provided in this application include at least the following: This application provides a method for fabricating an on-chip gain waveguide, which involves providing at least two donor wafers, each of which includes a substrate, a buried oxide layer formed on the substrate, and an optical thin film layer formed on the buried oxide layer. Rare-earth ion implantation is performed on the optical thin film layer of each donor wafer to form a doped region, thus forming a doped thin film layer. Through a bonding-polishing cycle process, the doped thin film layer of each donor wafer is transferred and stacked onto a target substrate to form a multilayer stacked doped optical thin film with a preset thickness and a preset ion implantation depth. The bonding-polishing cycle process includes: bonding the doped thin film layers of the two donor wafers face-to-face, removing the substrate and buried oxide layer of one of the donor wafers, thereby transferring and stacking the doped thin film layer of one donor wafer onto a target substrate; and fabricating a target waveguide structure on the multilayer stacked doped optical thin film.
[0016] The on-chip gain waveguide fabrication method provided in this application creatively proposes a "one-time implantation, multi-layer transfer" technical concept, which stacks multiple conventionally ion-implanted thin optical films layer by layer through a bonding-polishing cycle. This method completely bypasses the inherent physical bottleneck between ion implantation depth and implantation energy, achieving micron-level deep doping that would otherwise require high-energy (>1MeV) implantation using only conventional low-energy (≤500keV) ion implantation equipment. Using this invention, the doped layer thickness is doubled through two stacking operations, while effectively avoiding dependence on high-energy implantation equipment, significantly reducing equipment investment and process barriers.
[0017] Furthermore, because this application employs low-energy ion implantation, collision damage between incident ions and target atoms is effectively suppressed, resulting in a significantly lower degree of lattice damage compared to high-energy implantation processes. The bonding and polishing processes do not introduce new lattice defects, allowing subsequent annealing processes to more thoroughly repair implantation damage. Attached Figure Description
[0018] Figure 1 A flowchart illustrating a method for fabricating an on-chip gain waveguide, as provided in an embodiment of this application; Figure 2 A schematic diagram of an ion implantation-bonding-polishing process provided for an embodiment of this application; Figure 3 A schematic diagram illustrating the fabrication process of a 200nm thick waveguide structure provided in this application embodiment; Figure 4 This is a schematic diagram illustrating the erbium ion concentration distribution in a 200nm thick waveguide structure provided in an embodiment of this application. Figure 5 A schematic diagram illustrating the optical field distribution of the fundamental transverse magnetic mode of a 200nm thick waveguide structure provided in this application embodiment; Figure 6 A schematic diagram illustrating the fabrication process of a 400nm thick waveguide structure provided in this application embodiment; Figure 7 This is a schematic diagram illustrating the erbium ion concentration distribution in a 400nm thick waveguide structure provided in an embodiment of this application. Figure 8 A schematic diagram illustrating the optical field distribution of the fundamental transverse magnetic mode of a 400nm thick waveguide structure provided in this application embodiment; Figure 9 A schematic diagram illustrating the fabrication process of a 350nm thick waveguide structure provided in this application embodiment; Figure 10 This is a schematic diagram illustrating the erbium ion concentration distribution in a 350nm thick waveguide structure provided in an embodiment of this application. Figure 11 This is a schematic diagram showing the optical field distribution of the fundamental transverse magnetic mode of a 350nm thick waveguide structure provided in an embodiment of this application. Detailed Implementation
[0019] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of this application.
[0020] Hereinafter, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of embodiments of this disclosure, unless otherwise stated, "a plurality of" means two or more.
[0021] In addition, the use of “based on” or “according to” implies openness and inclusivity, because processes, steps, calculations or other actions “based on” or “according to” one or more conditions or values can in practice be based on additional conditions or values beyond those conditions.
[0022] Currently, next-generation information technologies, represented by artificial intelligence (AI), big data, the Internet of Things (IoT), data centers, and autonomous driving, face massive data transmission and processing demands. Optical communication networks, as the "main artery" of information infrastructure, are undergoing a historic transformation from traditional backbone networks to comprehensive and in-depth development of access networks, data center internal structures, and even inter-chip optical interconnects. However, traditional systems based on erbium-doped fiber amplifiers are limited by their large size, high power consumption, and high manual assembly costs, making them difficult to directly apply in integrated and miniaturized photonic integrated circuits. This has become one of the key bottlenecks restricting all-optical integration and leaps in computing power. Technological iteration has always followed a three-stage leap: "breaking through physical bottlenecks, upgrading system integration, and revolutionizing cost efficiency." Drawing on the development path of electronic technology, on-chip optical amplifiers are the inevitable path for optical amplifiers.
[0023] Rare-earth-doped on-chip optical amplifiers embed rare-earth ions into planar waveguide structures, combining the low-noise advantages of rare-earth ions with the compact integration capabilities of waveguides, exhibiting a unique gain mechanism and integration potential. As a key path for realizing on-chip gain devices, ion implantation is a crucial process for fabricating rare-earth-doped waveguide amplifiers, offering advantages such as precise doping, low-temperature processing, and compatibility with semiconductor processes.
[0024] Ion implantation, as an important doping method, offers advantages such as precise control of doping concentration and distribution, material compatibility and flexibility, requiring only room temperature and low temperature environments, high spatial resolution, and compatibility with semiconductor processes. However, due to the large atomic mass of rare-earth ions, they collide violently with substrate atoms during implantation, resulting in rapid energy decay. This limits the implantation depth at conventional energies (e.g., 500 keV), with ions primarily distributed near the surface. This leads to a severe mismatch between the rare-earth ion distribution and the optical field mode in the depth direction, significantly reducing their overlap factor and thus limiting the device's gain efficiency. Therefore, to achieve effective deep doping, high-energy (>1 MeV) ion implantation equipment is currently necessary, but this introduces multiple problems such as cost, lattice damage, and process complexity. Taking erbium ion implantation in silicon nitride thin films as an example, at ~4... 10 15 / cm 2 Under the required implantation dose, an implantation energy of 2 MeV requires nearly 18 hours, while an implantation energy of 500 keV only requires 1 hour. However, the former can achieve an implantation depth of 700 nm, while the latter can only achieve an implantation depth of 200 nm. Therefore, this inherent contradiction between the "deep doping requirement" and the "conventional implantation capability" has become a key technical bottleneck restricting the development of high-performance, low-cost on-chip gain devices.
[0025] To address the aforementioned problems, this application provides a method for fabricating an on-chip gain waveguide, such as... Figure 1As shown, the method includes the following steps: Step S1: Provide at least two donor wafers, each of which includes a substrate, a buried oxide layer formed on the substrate, and an optical thin film layer formed on the buried oxide layer.
[0026] Optionally, the substrate serves as the mechanical support layer for the entire donor wafer, providing structural strength during ion implantation and bonding. This substrate can be silicon, quartz, glass, or a compound substrate, etc. The buried oxide layer can be silicon dioxide. The material selection of the optical thin film layer directly affects the waveguide's transmission loss, refractive index contrast, and final gain effect. The material of this optical thin film layer can be silicon nitride, aluminum nitride, silicon oxynitride, aluminum oxide, etc. Furthermore, the "donor wafer" in this application can also be referred to as an "optical thin film wafer."
[0027] Optionally, during the fabrication of the donor wafer, the substrate needs to be cleaned to remove organic matter and metal contamination.
[0028] Step S2: Rare earth ion implantation is performed on the optical thin film layer of each donor wafer to form a doped region in the optical thin film layer, thus forming a doped thin film layer.
[0029] Ion implantation can be performed by using an industrial-grade or conventional ion implanter to implant ions into a newly grown optical thin film wafer that has already grown an optical thin film of a predetermined thickness, resulting in an optical thin film wafer with n implanted ions. The current ion implantation energy of industrial-grade or conventional ion implantation equipment is usually less than one million electron volts.
[0030] Optionally, ion implantation in the optical thin film layer can employ a multi-step ion implantation process to precisely control the concentration distribution and morphology of the implanted rare-earth ions. The thickness of the optical waveguide material thin film is determined based on the material of the optical thin film, the ions to be implanted, and the current ion implantation energy.
[0031] Step S3: Through a bonding-polishing cycle process, the doped thin film layer of each donor wafer is transferred and stacked onto a target substrate to form a multilayer stacked doped optical thin film with a preset thickness and a preset ion implantation depth; wherein, the bonding-polishing cycle process includes: bonding the doped thin film layers of two donor wafers face to face, and then removing the substrate and buried oxide layer of one of the donor wafers to achieve the transfer and stacking of the doped thin film layer of one donor wafer onto a target substrate.
[0032] Optionally, the optical thin film layer after ion implantation can be finely polished before bonding.
[0033] Step S4: Fabricate the target waveguide structure on a multilayer stacked doped optical thin film.
[0034] This application provides a method for fabricating on-chip gain waveguides, employing a "one-time implantation, multi-layer transfer" strategy. First, rare-earth ion implantation is performed in a single optical thin film layer. Then, through a cyclic "bonding and precision stripping" process, the implanted functional layers are transferred and stacked layer by layer onto the target substrate, much like "copying." Specifically, a schematic diagram of the ion implantation-bonding-polishing process is shown below. Figure 2 As shown, this "layer replication" thickening method bypasses the inherent physical limitations of ion implantation depth and uniformity, enabling the flexible and precise construction of three-dimensional integrated gain media with specific thickness and uniform rare earth ion distribution in the vertical dimension, providing a breakthrough process path for the on-demand design and fabrication of high-performance photonic devices.
[0035] Optionally, in step S2, rare-earth ion implantation is performed on the optical thin film layer of each donor wafer, including: A multi-step ion implantation process is employed to implant rare earth ions into the optical thin film layer of each donor wafer. This multi-step ion implantation process uses industrial-grade ion implantation equipment.
[0036] Optionally, in step S2, the thickness of the optical thin film layer is determined based on the material of the optical thin film layer, the type of rare earth ions to be implanted, and the implantation energy of the ion implantation.
[0037] Optionally, in step S3, the bonding-polishing cycle process includes: Step S31: Bond the first donor wafer and the second donor wafer so that the doped thin film layer of the first donor wafer is in contact with the doped thin film layer of the second donor wafer. Step S32: Polish the second donor wafer to remove the substrate and buried oxide layer, and then form a composite film consisting of two stacked doped optical thin films on the first donor wafer to obtain a composite structure. Step S33: Using the composite structure as a new first donor wafer, repeat steps S31 and S32 with the third donor wafer until the number of stacked doped optical thin film layers reaches the preset condition.
[0038] Optionally, in step S3, before performing the bonding process, the method further includes: Polishing is performed on the surface of the doped thin film layer after ion implantation to adjust the surface flatness of the doped thin film layer or to control the ion concentration distribution in the near-surface region.
[0039] Optionally, the bonding in step S3 includes: room temperature bonding and high temperature bonding, wherein the bonding temperature for room temperature bonding is 20~200℃ and the bonding temperature for high temperature bonding is 800~1200℃. If the bonding in step S3 is room temperature bonding, then before step S4, the method further includes: Annealing is performed on the multilayer stacked doped optical thin films formed on the target substrate.
[0040] Optionally, the polishing in S3 includes at least one of mechanical grinding, chemical mechanical polishing, or wet etching.
[0041] It is understandable that, such as Figure 2 As shown, two ion-implanted optical thin film wafers, 1 and 2, are bonded using a bonding process. If necessary (e.g., insufficient surface roughness), the ion-implanted optical thin film layers can be finely polished before bonding. A grinding and polishing process is used to peel off the substrate and buried oxide layer of optical wafer 2, achieving the transfer of the rare-earth ion-implanted optical thin film layer. The bonding and grinding / polishing processes can be repeated multiple times to achieve multiple transfers of the rare-earth ion-implanted optical thin film layer, thus completing the fabrication of an optical thin film wafer with an implantation thickness of nh. Furthermore, during the bonding process, high-temperature annealing can be used to strengthen the bonding, forming stable covalent bonds, and to repair lattice defects caused by ion implantation, activating the rare-earth ions. In the grinding and polishing process, mechanical grinding, chemical mechanical polishing, and wet etching can be used to remove the substrate and buried oxide layer of the donor wafer.
[0042] Optionally, step S4 involves fabricating a waveguide structure on a multilayer stacked doped optical thin film, including: Waveguide structures were fabricated on multilayer stacked doped optical thin films using photolithography and etching processes. After removing the residual mask layer in the waveguide structure through stripping and cleaning processes, a capping layer is deposited on the waveguide structure to obtain the target waveguide structure.
[0043] Optionally, a pre-waveguide structure is fabricated on a multilayer stacked doped optical thin film using photolithography and etching processes, including: The photolithography process is performed to transfer the design information of the waveguide structure and stress relief structure from the mask to the thin film that has been implanted with rare earth ions. After performing an etching process to complete the fabrication of the designed waveguide structure and stress relief structure, the waveguide structure is obtained.
[0044] The on-chip gain waveguide fabrication method provided in this application first involves multi-step rare-earth ion implantation on a grown optical thin film layer, precisely controlling the ion concentration and spatial distribution. Then, two implanted wafers are bonded together using a bonding process. Polishing can be performed before bonding to optimize film flatness and ion distribution. Next, a grinding and polishing process is used to peel off the substrate and buried oxide layer of one wafer, achieving the transfer of the rare-earth ion implantation layer. By repeating the bonding and grinding / polishing steps, optical gain films with the required thickness and ion implantation depth can be stacked layer by layer. This method allows for flexible control of the film material, thickness, and rare-earth ion profile morphology, making it suitable for fabricating high-performance on-chip integrated gain waveguides and lasers.
[0045] Based on the above-mentioned method for fabricating on-chip gain waveguides, this application selects a silicon wafer with high-quality silicon dioxide as the substrate, silicon nitride as the optical waveguide material, erbium ions as the ions to be implanted, and the implantation energy of the ion implanter is 400 keV to fabricate the waveguide structure. The specific process is as follows.
[0046] Example 1: Step 1: Grow a buried oxide layer (silicon dioxide) on a cleaned and polished substrate (silicon wafer), and then grow an optical thin film layer (silicon nitride thin film) on the buried oxide layer. The thickness of the optical thin film is approximately 200 nm. Step 2: Erbium ions are implanted into the silicon nitride thin film using an ion implanter with an implantation energy of 400 keV. The distribution of erbium ion concentration in the silicon nitride thin film can be precisely controlled by a multi-step ion implantation process. Step 3: The wafer is annealed in nitrogen at 1000°C for 1 hour to activate the implanted erbium ions and repair lattice defects caused by erbium ion implantation; Step 4: Perform photolithography to transfer the designed waveguide structure and stress relief structure from the photomask onto the wafer coated with photoresist. Step 5: Use a developing machine to develop the exposed wafer to remove (or retain) the photoresist that has undergone a photochemical reaction after exposure; Step 6: Perform an etching process to etch away the silicon nitride material that needs to be removed, thus completing the fabrication of the silicon nitride waveguide structure and stress relief structure; Step 7: Perform a stripping and cleaning process to remove residual photoresist and other impurities; Step 8: Deposit a silicon dioxide capping layer on the prepared erbium-doped silicon nitride waveguide structure to protect the erbium-doped silicon nitride waveguide structure.
[0047] Figure 3 This is a schematic diagram of the process of preparing the 200nm thick waveguide structure in Example 1. Figure 4 The erbium ion concentration distribution in the 200 nm thick waveguide structure prepared in Example 1. Figure 5 This is a schematic diagram showing the optical field distribution of the fundamental transverse magnetic mode of the 200nm thick waveguide structure prepared in Example 1. Although Example 1 optimized the multi-step ion implantation process parameters in the traditional fabrication process, achieving an overlap factor of 0.474 between the optical field mode and the erbium ion concentration distribution, the limited waveguide thickness meant that the energy of the fundamental transverse magnetic mode within the waveguide accounted for only 37.8%. Consequently, the optical field energy could not be contained within the waveguide and leaked into the surrounding material, leading to significant energy loss.
[0048] To further illustrate the advantages and features of the on-chip gain waveguide fabrication method proposed in this application, Example 2 is provided. Example 2 uses the same wafer parameters and ion implantation process parameters as Example 1. Example 2 is detailed below: Step 1: Provide multiple donor wafers. The fabrication process of one donor wafer is as follows: grow a buried oxide layer (silicon dioxide) on a cleaned and polished substrate (silicon wafer), and grow an optical thin film layer (silicon nitride thin film) on the buried oxide layer. The thickness of the optical thin film of one donor wafer is about 200nm. Step 2: Erbium ions are implanted into the silicon nitride thin film using an ion implanter with an implantation energy of 400 keV. The distribution of erbium ion concentration in the silicon nitride thin film can be precisely controlled by a multi-step ion implantation process. Step 3: Bond the first donor wafer and the second donor wafer so that the doped thin film layer of the first donor wafer is in contact with the doped thin film layer of the second donor wafer; Step 4: Polish the second donor wafer to remove the substrate and buried oxide layer. Then, form a stack of two doped optical thin films on the first donor wafer. The stacked doped optical thin film has a thickness of 400 nm. Step 5: Anneal at 1000°C for 1 hour under nitrogen to activate the implanted erbium ions and repair lattice defects caused by erbium ion implantation; Step 6: Perform photolithography to transfer the designed waveguide structure and stress relief structure from the photomask onto the wafer coated with photoresist. Step 7: Use a developing machine to develop the exposed wafer to remove (or retain) the photoresist that has undergone a photochemical reaction after exposure; Step 8: Perform an etching process to etch away the silicon nitride material that needs to be removed, thus completing the fabrication of the silicon nitride waveguide structure and stress relief structure; Step 9: Perform a stripping and cleaning process to remove residual photoresist and other impurities; Step 10: Deposit a silicon dioxide capping layer on the prepared erbium-doped silicon nitride waveguide structure to protect the erbium-doped silicon nitride waveguide structure.
[0049] Figure 6 This is a schematic diagram of the process of preparing the 400nm thick waveguide structure in Example 2. Figure 7 The erbium ion concentration distribution in a 400nm thick silicon nitride waveguide. Figure 8This is a schematic diagram of the optical field distribution of the fundamental transverse magnetic mode (TM00 mode) of a 400nm thick silicon nitride waveguide. Using the fabrication method of Example 2, the waveguide thickness can be doubled from 200nm to 400nm, increasing the energy proportion of the transverse magnetic mode within the waveguide to 72.0%, and achieving an overlap factor of 0.507 between the optical field mode and the erbium ion concentration distribution. Employing the novel ion implantation-bonding-polishing process proposed in this application, both implantation depth and implantation quality can be improved.
[0050] Example 3: Example 3 is a further improvement on Example 2. Compared to Example 2, Example 3 involves fine polishing of the optical thin film after rare-earth ion implantation before bonding. This improves wafer flatness and allows for some adjustment of the rare-earth ion concentration distribution. The fabrication process of the 350nm thick waveguide structure in Example 3 is as follows: Figure 9 As shown, in Example 3, after the optical thin film with rare earth ion implantation was finely polished to 25 nm, the thickness of the rare earth doped silicon nitride thin film was 175 nm. After bonding, polishing, annealing, photolithography, etching, cleaning and optical protective layer deposition, a silicon nitride waveguide with a thickness of 350 nm can be prepared. Figure 10 The erbium ion concentration distribution in a 350 nm thick silicon nitride waveguide. Figure 11 This is a schematic diagram of the optical field distribution of the fundamental transverse magnetic mode (TM00 mode) of a 350nm thick silicon nitride waveguide. From... Figure 10 and Figure 11 It can be seen that although the energy ratio of the transverse magnetic mode in the waveguide is reduced to 66.0% due to the reduction in waveguide thickness, the erbium ion doping concentration distribution is flatter, and the overlap factor between the optical field mode and the erbium ion concentration distribution can reach 0.572.
[0051] Based on the above process steps, waveguides on erbium-doped wafers can be fabricated using conventional ion implanters (implantation energy ≤ 500 keV) and other equipment.
[0052] According to the on-chip gain waveguide fabrication method and process flow provided in this application, on the one hand, conventional ion implantation equipment can be used to achieve high-depth implantation of rare earth ions, effectively overcoming the dependence of rare earth ion implantation on high-energy (MeV) ion implantation equipment, reducing the requirements and costs of fabrication equipment. On the other hand, by incorporating a fine polishing process before bonding, the spatial distribution of rare earth ions can be actively controlled, thereby achieving precise design of the performance of the gain medium, significantly improving the customization capability and process flexibility of device fabrication.
[0053] Of course, the implementation methods of this application are not limited to the above examples and can be adjusted and improved according to actual conditions. For example, in terms of ion implantation, in addition to rare earth ions (such as erbium ions, ytterbium ions, thulium ions, etc.), other element ions with large atomic masses can also be implanted. In terms of thin film material selection, other materials with lower transmission loss can also be selected, such as aluminum nitride, silicon oxynitride, etc. The bonding-polishing process can be cyclically operated to further increase the thickness of the doped waveguide. The thickness of fine polishing can be specifically set according to application requirements (such as bonding planarization requirements, spatial distribution requirements of rare earth ions). If the bonding process includes a high-temperature annealing process, the annealing process before photolithography can be omitted, further simplifying the process and saving time and preparation costs.
[0054] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.
[0055] The above embodiments merely illustrate several implementation methods of this application, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the invention patent. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this patent application should be determined by the appended claims.
Claims
1. A method for fabricating an on-chip gain waveguide, characterized in that, The methods include: Step S1: Provide at least two donor wafers, each donor wafer comprising a substrate, a buried oxide layer formed on the substrate, and an optical thin film layer formed on the buried oxide layer; Step S2: Rare earth ions are implanted into the optical thin film layer of each donor wafer to form a doped region in the optical thin film layer, thus forming a doped thin film layer. Step S3: Through a bonding-polishing cycle process, the doped thin film layer of each donor wafer is transferred and stacked onto a target substrate to form a multilayer stacked doped optical thin film with a preset thickness and a preset ion implantation depth; wherein, the bonding-polishing cycle process includes: bonding the doped thin film layers of two donor wafers face to face, and then removing the substrate and buried oxide layer of one of the donor wafers to achieve the transfer and stacking of the doped thin film layer of one donor wafer onto a target substrate; Step S4: Fabricate the target waveguide structure on a multilayer stacked doped optical thin film.
2. The method according to claim 1, characterized in that, In step S2, rare-earth ion implantation is performed on the optical thin film layer of each donor wafer, including: A multi-step ion implantation process is employed to implant rare earth ions into the optical thin film layer of each donor wafer. This multi-step ion implantation process uses industrial-grade ion implantation equipment.
3. The method according to claim 1, characterized in that, In step S2, the thickness of the optical thin film layer is determined based on the material of the optical thin film layer, the type of rare earth ions to be implanted, and the implantation energy of the ion implantation.
4. The method according to claim 1, characterized in that, In step S3, the bonding-grinding and polishing cycle process includes: Step S31: Bond the first donor wafer and the second donor wafer so that the doped thin film layer of the first donor wafer is in contact with the doped thin film layer of the second donor wafer. Step S32: Polish the second donor wafer to remove the substrate and buried oxide layer, and then form a composite film consisting of two stacked doped optical thin films on the first donor wafer to obtain a composite structure. Step S33: Using the composite structure as a new first donor wafer, repeat steps S31 and S32 with the third donor wafer until the number of stacked doped optical thin film layers reaches the preset condition.
5. The method according to claim 1, characterized in that, In step S3, before performing the bonding process, the method further includes: Polishing is performed on the surface of the doped thin film layer after ion implantation to adjust the surface flatness of the doped thin film layer or to control the ion concentration distribution in the near-surface region.
6. The method according to claim 1 or 4, characterized in that, The bonding in step S3 includes: room temperature bonding and high temperature bonding. The bonding temperature for room temperature bonding is 20~200℃, and the bonding temperature for high temperature bonding is 800~1200℃. If the bonding in step S3 is room temperature bonding, then before step S4, the method further includes: Annealing is performed on the multilayer stacked doped optical thin films formed on the target substrate.
7. The method according to claim 1 or 4, characterized in that, The polishing in S3 includes at least one of mechanical grinding, chemical mechanical polishing, or wet etching.
8. The method according to claim 1, characterized in that, Step S4 involves fabricating a waveguide structure on a multilayer stacked doped optical thin film, including: Waveguide structures were fabricated on multilayer stacked doped optical thin films using photolithography and etching processes. After removing the residual mask layer in the waveguide structure through stripping and cleaning processes, a capping layer is deposited on the waveguide structure to obtain the target waveguide structure.
9. The method according to claim 8, characterized in that, Pre-waveguide structures are fabricated on multilayer stacked doped optical thin films using photolithography and etching processes, including: The photolithography process is performed to transfer the design information of the waveguide structure and stress relief structure from the mask to the thin film that has been implanted with rare earth ions. After performing an etching process to complete the fabrication of the designed waveguide structure and stress relief structure, the waveguide structure is obtained.
10. A gain waveguide, characterized in that, It is prepared by the fabrication method of any one of claims 1-9 for on-chip gain waveguide.