Embedded substrate for electronic components

Abstract

This disclosure provides an embedded substrate for electronic components, comprising: a glass layer; a blind cavity penetrating a portion of the glass layer and having a bottom surface defined by another portion of the glass layer; an electronic component at least partially disposed within the blind cavity; and an insulating material covering at least a portion of each of the glass layer and the electronic component and filling at least a portion of the blind cavity. The blind cavity includes a plurality of corner regions, and in a cross-sectional view cut along a direction perpendicular to the thickness direction of the glass layer, each corner region protrudes outward beyond the wall surface of the blind cavity. This structure reduces the risk of cracking during manufacturing and improves yield and reliability.

Description

[0001] This application claims the benefit of priority to Korean Patent Application No. 10-2024-0170795, filed on November 26, 2024, with the Korean Intellectual Property Office, the entire disclosure of which is incorporated herein by reference. Technical Field

[0002] This disclosure relates to an embedded substrate for electronic components. Background Technology

[0003] To meet the demands of high-performance and miniaturization strategies in the semiconductor industry, printed circuit boards (PCBs) require increasingly higher levels of miniaturization and density. For example, manufacturing high-end products such as server boards necessitates a high number of layers and large bodies. However, as the number of wiring layers and the size of the bodies increase, the boards may become prone to warping. To prevent this problem, the use of glass cores is being considered. Furthermore, the greatest risk associated with using glass cores is the risk of cracking. Specifically, the risk of cracking can be very high when machining cavities within the glass core for embedding electronic components and then housing those components. Summary of the Invention

[0004] One aspect of this disclosure is to provide an electronic component embedded substrate that reduces the risk of cracking even when a blind cavity is fabricated in a glass layer and the electronic component is disposed in the blind cavity, thereby improving yield and reducing cost.

[0005] According to one aspect of this disclosure, when a blind cavity for housing electronic components is formed in a glass layer, cracking problems caused by contact between the glass layer and the electronic components can be prevented by further processing multiple corner areas of the blind cavity.

[0006] According to one aspect of this disclosure, an embedded substrate for electronic components includes: a glass layer; a blind cavity penetrating a portion of the glass layer and having a bottom surface defined by another portion of the glass layer; an electronic component at least partially disposed within the blind cavity; and an insulating material covering at least a portion of each of the glass layer and the electronic component and filling at least a portion of the blind cavity. The blind cavity includes a plurality of corner regions, and in a cross-sectional view cut along a direction perpendicular to the thickness direction of the glass layer, each of the plurality of corner regions has a protruding shape that extends (or protrudes) further outward than the wall surface of the blind cavity.

[0007] According to another aspect of this disclosure, an embedded substrate for electronic components includes: a glass layer; a blind cavity penetrating a portion of the glass layer along its thickness direction from its upper surface; an electronic component at least partially disposed within the blind cavity; and an insulating material covering at least a portion of each of the glass layer and the electronic component and filling at least a portion of the blind cavity. The blind cavity includes a plurality of corner regions, and in a cross-sectional view cut along a direction perpendicular to the thickness direction of the glass layer, each of the plurality of corner regions extends at least partially away from the center of the blind cavity.

[0008] According to another aspect of this disclosure, an embedded substrate for electronic components includes: a glass layer; a blind cavity penetrating a portion of the glass layer along its thickness direction from the upper surface of the glass layer; an electronic component at least partially disposed within the blind cavity; an insulating material covering at least a portion of each of the glass layer and the electronic component and filling at least a portion of the blind cavity; and a stacked layer disposed on the upper and / or lower side of the glass layer. The stacked layer includes: a stacked insulating layer disposed on the insulating material and covering at least a portion of a wiring layer disposed on the insulating material; a stacked wiring layer disposed on the stacked insulating layer; and a stacked via layer disposed within the stacked insulating layer and connecting the wiring layer and the stacked wiring layer. Attached Figure Description

[0009] The above and other aspects, features and advantages of this disclosure will become clearer from the following detailed embodiments, taken in conjunction with the accompanying drawings, in which: Figure 1 It is a block diagram that schematically illustrates an example of an electronic device system; Figure 2 This is a schematic cross-sectional view illustrating an example of an embedded substrate for electronic components; Figure 3 yes Figure 2 A cross-sectional view of the embedded substrate of the electronic component along line A-A'; Figure 4 This is a schematic diagram illustrating a process for forming a blind cavity with multiple protruding and / or extending corner regions in a glass layer; and Figure 5 This is a schematic image of a blind cavity with multiple protruding and / or extending corner regions located in a glass layer, captured using an electron microscope. Detailed Implementation

[0010] In the following description, this disclosure will be made with reference to the accompanying drawings. For clarity, the shapes and sizes of the elements in the drawings may be exaggerated or reduced.

[0011] Figure 1This is a block diagram that schematically illustrates an example of an electronic device system.

[0012] Reference Figure 1 The electronic device 1000 may house a motherboard 1010. Chip-related components 1020, network-related components 1030, and other components 1040 may be physically and / or electrically connected to the motherboard 1010. These components may be connected to other electronic components described below via various signal lines 1090.

[0013] Chip-related components 1020 may include: memory chips, such as volatile memory (e.g., dynamic random access memory (DRAM)), non-volatile memory (e.g., read-only memory (ROM), flash memory), etc.; application processor chips, such as central processing units (e.g., central processing units (CPU)), graphics processing units (e.g., graphics processing units (GPUs)), digital signal processors, encryption processors, microprocessors, microcontrollers, etc.; and logic chips, such as analog-to-digital converters (ADCs), application-specific integrated circuits (ASICs), etc. However, chip-related components 1020 are not limited to these, and may also include other types of chip-related components. Furthermore, chip-related components 1020 may be combined with each other. Chip-related components 1020 may be in the form of a package including the aforementioned chips and / or electronic components.

[0014] Network-related components 1030 may include components compatible with or operating according to protocols such as: Wi-Fi (IEEE 802.11 series, etc.), WiMAX (IEEE 802.16 series, etc.), IEEE 802.20, LTE, Ev-DO, HSPA+, HSDPA+, HSUPA+, GSM+, EDGE+, GPS, GPRS, CDMA, TDMA, DECT, Bluetooth, LAN, 3G, 4G, and 5G protocols, as well as any other wireless and wired protocols specified after the aforementioned protocols. However, the network-related component 1030 is not limited to this, but may also include components that are compatible with or operate according to various other wireless or wired standards or protocols. Furthermore, the network-related component 1030 may be combined with the aforementioned chip-related component 1020.

[0015] Other components 1040 may include high-frequency inductors, ferrite inductors, power inductors, ferrite beads, low-temperature co-fired ceramic (LTCC) components, electromagnetic interference (EMI) filters, multilayer ceramic capacitors (MLCCs), etc. However, other components 1040 are not limited to these, and may also include passive components in the form of chip modules for various other purposes. Furthermore, other components 1040 may be combined with chip-related components 1020 and / or network-related components 1030.

[0016] Depending on the type of electronic device 1000, it may include other electronic components that are physically and / or electrically connected to the motherboard 1010 or not physically and / or electrically connected to the motherboard 1010. These other electronic components may include, for example, a camera 1050, an antenna 1060, a display 1070, a battery 1080, etc., but are not limited thereto. These other electronic components may include audio codecs, video codecs, power amplifiers, compasses, accelerometers, gyroscopes, speakers, mass storage units (e.g., hard disk drives), optical disc (CD) drives, digital versatile disc (DVD) drives, etc. Additionally, depending on the type of electronic device 1000, it may also include other electronic components for various purposes.

[0017] Electronic device 1000 can be a smartphone, personal digital assistant (PDA), digital video camera, digital camera, network system, computer, monitor, tablet PC, laptop PC, netbook PC, television, video game console, smartwatch, automotive component, server, etc. However, electronic device 1000 is not limited to these, but can be any other electronic device capable of processing data.

[0018] Figure 2 This is a schematic cross-sectional view illustrating an example of an embedded substrate for electronic components.

[0019] Figure 3 yes Figure 2 A cross-sectional view of the embedded substrate of the electronic component along line A-A'.

[0020] Reference Figure 2 and Figure 3An example of an embedded electronic component substrate 100 may include: a glass layer 111; a blind cavity C penetrating a portion of the glass layer 111 and having a bottom surface defined by another portion of the glass layer 111; an electronic component 120 at least partially disposed within the blind cavity C; and an insulating material 112 covering at least a portion of each of the glass layer 111 and the electronic component 120 and filling at least a portion of the blind cavity C. The blind cavity C may penetrate a surface of the glass layer 111, for example, penetrating a portion of the glass layer 111 in the thickness direction from its upper surface. The blind cavity may include a plurality of corner regions cr. The plurality of corner regions cr may be, for example, four corner regions, but is not limited thereto, and may be some of four corner regions. In a plane, the plurality of corner regions cr may each have a shape projecting outward from the wall surface of the blind cavity C. In a plane, the plurality of corner regions cr may each extend at least partially in a direction away from the center of the blind cavity C. For example, "plane" here may refer to a plan view viewed from above the glass layer 111 or a cross-sectional view cut through the blind cavity C along a direction perpendicular to the thickness direction of the glass layer 111 (i.e., the vertical direction) (i.e., the horizontal direction). Figure 3 (The cross-sectional view shown in the figure).

[0021] In this manner, the example electronic component embedded substrate 100 may have a blind cavity C formed in a glass layer 111, in which the electronic component 120 is embedded. The blind cavity C may include multiple corner regions cr that, as described above, protrude outwards in a plane and / or extend away from the center. Therefore, when the electronic component 120 is disposed in the blind cavity C, cracks in the glass layer 111 due to contact between the glass layer 111 and the electronic component 120 at the corners can be reduced. This improves product manufacturing yield, reduces the number of damaged components, and lowers manufacturing costs.

[0022] Furthermore, at least a portion of the projecting shape of each of the plurality of corner regions cr in the plane may be substantially circular or substantially elliptical. Additionally, in the plane, at least a portion of each of the plurality of corner regions cr may extend in a direction away from the center in a substantially circular or substantially elliptical shape. For example, in the process described below, the plurality of corner regions cr can be formed by further irradiating the respective corners of the blind cavity C with a laser in a substantially circular and / or substantially elliptical shape, and then removing them by etching. Therefore, in the case of such a shape, the plurality of corner regions cr can be formed more easily. Furthermore, such a shape can enhance the crack reduction effect described above. Moreover, the substantially circular or substantially elliptical shape may refer not only to a perfectly circular or perfectly elliptical shape, but also to a shape that is approximately circular or approximately elliptical, and may include a portion of a circle or a portion of an ellipse. For example, the projecting shape of each of the plurality of corner regions cr in the plane may have a substantially curved shape.

[0023] Furthermore, the bottom surface of each of the multiple corner regions cr of the blind cavity C can be positioned at substantially the same height as the bottom surface of the central region of the blind cavity C. For example, in cross-section, the blind cavity C can have a generally rectangular shape. For example, "cross-section" here can refer to a cross-sectional view cut along the thickness direction of the glass layer 111 through the blind cavity C. More specifically, the blind cavity C can have a generally rectangular shape not only in the cross-section where the multiple corner regions cr are not cut, but also in the cross-section where the multiple corner regions cr are cut. Furthermore, even if the blind cavity C has a generally rectangular shape in cross-section, the portion where the bottom surface and wall surface of the central region and / or each of the multiple corner regions cr of the blind cavity C connect with each other can also have a generally rounded shape. For example, in the process described below, the blind cavity C can be formed by first irradiating the glass layer 111 with a laser while aiming at the central region of the glass layer 111, and then additionally irradiating the glass layer 111 with a laser while aiming at the multiple corner regions cr of the glass layer 111, and then removing the laser-irradiated areas together by etching. Therefore, the central region and multiple corner regions cr of the blind cavity C can be formed at substantially the same depth. In this case, it is easier to form multiple corner regions cr, and the crack reduction effect described above can be enhanced.

[0024] Furthermore, the electronic component 120 can be attached to the bottom surface of the blind cavity C with its face facing upwards. For example, the electronic component 120 may include a connecting member P for electrical connection, and the connecting member P may be disposed on the front surface of the electronic component 120. Alternatively, the electronic component 120 may be attached to the bottom surface of the blind cavity C on its back surface, in which case a known adhesive film such as a die-attach film (DAF) can be used. In this case, the electronic component 120 may include a plurality of corner portions (e.g., four corner portions), and at least some of these corner portions may be respectively disposed in a plurality of corner regions cr (e.g., four corner regions cr). With such an arrangement, the crack reduction effect described above can be enhanced.

[0025] Reference Figure 2 and Figure 3 The example electronic component embedded substrate 100 may further include: a metal via 131 formed in a glass layer 111; a wiring layer 141 disposed on an insulating material 112; and a via layer 142 penetrating the insulating material 112. The metal via 131 may fill at least a portion of a through-hole formed in the glass layer 111. The through-hole may penetrate the glass layer 111. For example, the through-hole may penetrate between the upper and lower surfaces of the glass layer 111 along its thickness direction. For example, the through-hole may be a through-glass via (TGV). The via layer 142 may include a first connection via connecting the wiring layer 141 to the metal via 131 and a second connection via connecting the wiring layer 141 to the electronic component 120. The first connection via may be connected to the upper side of the metal via 131. The second connection via may be connected to a connection member P of the electronic component 120. If desired, a first metal pad 132 and a second metal pad 133 may also be provided on the glass layer 111. The first metal pad 132 and the second metal pad 133 may respectively contact the metal via 131, and both may be at least partially covered by the insulating material 112. In this case, the first connection via can be connected to the metal via 131 through the first metal pad 132. However, this disclosure is not limited thereto, and the first metal pad 132 and the second metal pad 133 may be omitted. In this case, the first connection via can be directly connected to the metal via 131.

[0026] In this manner, a wiring layer 141, a via layer 142, and metal vias 131 can be formed in the example electronic component embedded substrate 100. Furthermore, first metal pads 132 and second metal pads 133 can be formed as needed. Therefore, various wiring designs can be implemented, and furthermore, various electrical connection paths can be provided.

[0027] Reference Figure 2 and Figure 3The example electronic component embedded substrate 100 may further include a frame 105 and a through cavity H penetrating the frame 105. The through cavity H may, for example, penetrate between the upper and lower surfaces of the frame 105 along the thickness direction. At least a portion of the glass layer 111 may be disposed within the through cavity H. An insulating material 112 may cover at least a portion of the frame 105 and fill at least a portion of the through cavity H. If desired, at least a portion of the through cavity H may be filled using a separate filler. The frame 105 may comprise various materials having excellent rigidity.

[0028] In this manner, the example electronic component embedded substrate 100 may also include a frame 105. During the process, the frame 105 can be used as a fixture, thus enabling panel-level processing via the frame 105 and facilitating easy control of process warpage. Furthermore, the frame 105 can be retained in the final unit after the monolithic process, further enhancing control over the warpage of the final unit.

[0029] Reference Figure 2 The example electronic component embedded substrate 100 may further include: a stacked insulating layer 113 disposed on an insulating material 112 and covering at least a portion of the wiring layer 141; a stacked wiring layer 151 disposed on the stacked insulating layer 113; and a stacked via layer 152 disposed within the stacked insulating layer 113 and connecting the wiring layer 141 and the stacked wiring layer 151 to each other. The stacked insulating layer 113, the stacked wiring layer 151, and the stacked via layer 152 may constitute a stacked layer, and if desired, the stacked layer may be formed in multiple layers. Additionally, if desired, the stacked layer may be formed not only on the upper side of the glass layer 111 but also on the lower side of the glass layer 111. If desired, a first passivation layer 161 and a second passivation layer 162 may also be disposed on the uppermost and lowermost sides of the electronic component embedded substrate 100, respectively.

[0030] In this manner, the example electronic component embedded substrate 100 may include a glass layer 111 as a core layer, and stacked layers, etc., may be formed on at least one side of the core layer. Therefore, the electronic component embedded substrate can be readily used as a packaging substrate, an interposer substrate, etc. For example, the example electronic component embedded substrate 100 can be readily applied to various types of printed circuit boards and / or various forms of printed circuit boards.

[0031] The components of the electronic component embedded substrate 100 according to the example will now be described in more detail with reference to the accompanying drawings.

[0032] Frame 105 may include an organic insulating material. The organic insulating material may include thermosetting resins (such as epoxy resins), thermoplastic resins (such as polyimide), or materials prepared by impregnating inorganic fillers, organic fillers, and / or glass fibers (e.g., glass fabric, such as glass cloth) in the aforementioned resins. For example, the organic insulating material may include, but is not limited to, copper-clad laminates (CCLs) or bare CCLs, and may also include other organic or inorganic insulating materials with excellent rigidity. The through-cavity H may penetrate between the upper and lower surfaces of frame 105 along the thickness direction. The through-cavity H may continuously surround the side surface of glass layer 111.

[0033] Glass layer 111 may comprise glass, which is an amorphous solid. The glass may include, for example, pure silica (approximately 100% SiO2), soda-lime glass, borosilicate glass, aluminosilicate glass, etc. However, this disclosure is not limited thereto, and alternative glass materials such as fluorine glass, phosphate glass, chalcogenide glass, etc., may also be used as materials for glass layer 111. Additionally, other additives may be included to form a glass with specific physical properties. These additives include magnesium, calcium, manganese, aluminum, lead, boron, iron, chromium, potassium, sulfur, antimony, and carbonates (such as calcium carbonate (e.g., limestone) and sodium carbonate (e.g., soda ash)) and / or oxides of these elements and other elements. Furthermore, the material of glass layer 111 may be distinguished from organic insulating materials (e.g., copper-clad laminates (CCL), prepregs (PPG), etc.) that include glass fibers (e.g., glass fabrics, such as glass cloth). Glass layer 111 may be in the form of, for example, a glass plate. The blind cavity C and the multiple corner regions cr included therein can penetrate a portion of the glass layer 111 from the upper surface of the glass layer 111 along the thickness direction. The blind cavity C and the multiple corner regions cr included therein can continuously surround the side surface of the electronic component 120.

[0034] Both insulating material 112 and stacked insulating layer 113 may comprise organic insulating materials. Organic insulating materials may include thermosetting resins (such as epoxy resins), thermoplastic resins (such as polyimide), or materials prepared by impregnating inorganic fillers, organic fillers, and / or glass fibers (e.g., glass fabric, such as glass cloth) in a resin. For example, organic insulating materials may include, but are not limited to, prepreg (PPG), Ajinomoto laminate (ABF), photosensitive dielectric (PID), etc. Both insulating material 112 and stacked insulating layer 113 may comprise multiple layers. The respective multiple layers may be integral without boundaries, or the boundaries between the multiple layers may be distinguishable. The multiple layers may comprise substantially the same insulating material, or may comprise different insulating materials.

[0035] Electronic component 120 may include various types of electronic components. For example, electronic component 120 may include various types of active and / or passive components. For example, electronic component 120 may include, but is not limited to, at least one of an integrated circuit device (ICD) and an embedded passive integrated component (EPIC). Electronic component 120 may include a connection member P for electrical connection. Connection member P may include a conductive material (e.g., a metal). The metal may include copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), and / or alloys thereof. Connection member P may include electrodes or pads, and may also include bumps or pillars disposed on the electrodes or pads.

[0036] The metal via 131, the first metal pad 132, and the second metal pad 133 may all comprise metal. The metal may include copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), and / or alloys thereof. For example, the metal via 131, the first metal pad 132, and the second metal pad 133 may each comprise a titanium layer and a copper layer (e.g., a sputtered titanium layer and a sputtered copper layer) formed by sputtering as seed layers, and may include an electrolytically plated copper layer formed based on the seed layers by electrolytic plating as a patterned plating layer. The metal via 131, the first metal pad 132, and the second metal pad 133 may each perform various functions according to the design. For example, the metal via 131 may include a through-via for signal transmission, a through-via for power transmission, a through-via for grounding, etc. Additionally, both the first metal pad 132 and the second metal pad 133 may include pads for signal transmission, pads for power transmission, pads for grounding, etc. The metal via 131 may be a filled via having a via hole filled with metal, but if desired, it may also be a conformal via in which metal is disposed along the wall surface of the via hole. The metal via 131 may have a generally hourglass shape, but is not limited thereto, and may have, for example, a generally cylindrical shape. There may be multiple metal vias 131, as well as multiple first metal pads 132 and multiple second metal pads 133.

[0037] Wiring layer 141, stacked wiring layer 151, via layer 142, and stacked via layer 152 may all comprise metals. Metals may include copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), and / or alloys thereof. For example, wiring layer 141, stacked wiring layer 151, via layer 142, and stacked via layer 152 may each include a chemically plated copper layer formed by electroless plating as a seed layer, and may include an electrolytically plated copper layer formed by electrolytic plating based on the seed layer as a pattern plating layer. Wiring layer 141, stacked wiring layer 151, via layer 142, and stacked via layer 152 may each perform various functions according to the design. For example, wiring layer 141 and stacked wiring layer 151 may each include signal patterns, power patterns, ground patterns, etc. These patterns may each have various shapes, such as lines, traces, surfaces, pads, solder pads, etc. Additionally, via layer 142 and via stack layer 152 may respectively include connection vias for signal transmission, connection vias for power transmission, and connection vias for grounding. These connection vias may be filled vias in which the via is filled with metal, or they may be conformal vias in which metal is disposed along the wall surface of the via. Both via layer 142 and via stack layer 152 may include multiple connection vias. The connection vias included in each of via layer 142 and via stack layer 152 may have a tapered shape in the same direction.

[0038] Both the first passivation layer 161 and the second passivation layer 162 may comprise an organic insulating material. The organic insulating material may include thermosetting resins (such as epoxy resins), thermoplastic resins (such as polyimide), or materials prepared by impregnating inorganic fillers and / or organic fillers in a resin. For example, the organic insulating material may be an ajinomoto film (ABF), a photosensitive dielectric (PID), a solder resist (SR), etc., but is not limited thereto. Both the first passivation layer 161 and the second passivation layer 162 may comprise multiple layers. Both the first passivation layer 161 and the second passivation layer 162 may have multiple openings, and the patterns exposed through each opening may be solder mask defined (SMD) type and / or non-solder mask defined (NSMD) type, but are not limited thereto.

[0039] Figure 4 This is a schematic diagram illustrating the process of forming a blind cavity with multiple protruding and / or extending corner regions in a glass layer.

[0040] Reference Figure 4First, a glass layer 111 can be prepared. The glass layer 111 can be a glass plate as described above, but is not limited thereto. Next, a laser can be irradiated to form a central region of a blind cavity in the glass layer 111. For example, the laser can be irradiated in an approximately quadrilateral shape. Next, the laser can be additionally irradiated to each of the corners of the portion irradiated by the laser used to form the central region of the blind cavity, for example, the four corners of a quadrilateral shape. For example, the laser can be additionally irradiated in an approximately circular and / or elliptical shape. Next, a portion of the glass layer 111 in the region irradiated by the laser can be removed by etching. As a result, a blind cavity C comprising multiple corner regions cr, as described above, can be formed. These technical contents can be applied to an electronic component embedded substrate 100 according to the above example.

[0041] Figure 5 This is a schematic image of a blind cavity located in a glass layer with multiple protruding and / or extended corner regions, taken by an electron microscope.

[0042] Reference Figure 5 The above-described process can be used to form a blind cavity comprising multiple corner regions in the glass layer, where each of the multiple corner regions may have an approximately circular and / or elliptical aperture shape. Furthermore, at least a portion of the area where the wall surface and bottom surface of the blind cavity connect to each other may have a generally rounded shape. However, this disclosure is not limited thereto. These technical contents can be applied to the electronic component embedded substrate 100 according to the above example.

[0043] As described above, as an effect of this disclosure, an electronic component embedded substrate can be provided such that the risk of cracking can be reduced even when blind cavities are processed in the glass layer and electronic components are placed in the blind cavities, resulting in improved yield and reduced cost.

[0044] In this disclosure, the term "cover" can refer not only to complete coverage but also to partial coverage, and can refer to both direct and indirect coverage. Furthermore, the term "fill" can include partial filling, complete filling, and substantial filling. For example, it can include situations where gaps or voids exist. Additionally, the term "surround" can refer not only to complete enclosure but also to partial or substantial enclosure. Furthermore, the term "expose" can refer not only to complete exposure but also to partial exposure, and the term "expose" can indicate that one component is exposed from another component that buries it.

[0045] In this disclosure, "located in a blind cavity or through cavity" can include not only the case where the object is completely located in the blind cavity or through cavity, but also the case where the object partially extends upward or downward in the cross-section. For example, it can be interpreted more broadly if the object is located in a blind cavity or through cavity on a plane.

[0046] In this disclosure, "substantially / approximately" can be defined as including process errors, positional deviations, measurement errors, etc., that occur during the manufacturing process. For example, "set at substantially the same height" can include not only cases where the materials are set at exactly the same height, but also cases where the materials are set at approximately the same height. Furthermore, "having a substantially specific shape" can include not only cases where the materials have exactly that shape, but also cases where the materials have approximately that shape. Additionally, "substantially the same insulating material" can include not only cases where the insulating material is exactly the same, but also cases where the materials contain the same type of insulating material. Therefore, the composition of the insulating material can be substantially the same, but its specific composition ratio can be slightly different.

[0047] In this disclosure, "shape in cross-section" can mean the cross-sectional shape when the object is cut vertically, or the shape when the object is viewed from a side view. "Shape in plane" can mean the shape when the object is cut horizontally, or the planar shape when the object is viewed from a top or bottom view.

[0048] In this disclosure, for convenience, the term "lower" in terms such as "lower side," "lower part," and "lower surface" is used to indicate a downward direction based on the cross-section in the accompanying drawings, and the term "upper side," "upper part," and "upper surface" is used to indicate the opposite direction. However, these directions are defined for ease of description, and the scope of the claims is not particularly limited by the description of these directions; of course, the concepts of "upper" and "lower" may be changed at any time.

[0049] In this disclosure, the term "connection" includes not only direct connections but also indirect connections such as those via adhesive layers. Furthermore, the term "electrical connection" encompasses both physical connections and non-physical connections. Additionally, expressions such as "first," "second," etc., are used to distinguish one component from another and do not limit the order and / or importance of the components. In some cases, "first component" and "second component" may be interchanged without departing from the scope of this disclosure.

[0050] In this disclosure, thickness, width, length, depth, linewidth, spacing, pitch, separation distance, surface roughness, etc., can be measured using a scanning microscope, optical microscope, or the like, based on a polished or cut section obtained by polishing or cutting an embedded substrate of an electronic component. The polished or cut section can be a vertical or horizontal section, and each value can be measured based on the desired polished or cut section. For example, the width of the upper end and / or the lower end of the via can be measured on a cut section cut along the central axis of the via. If this value is not constant, it can be determined as the average of values ​​measured at five random points.

[0051] The term "example" as used in this disclosure does not refer to the same embodiment and is provided to emphasize and describe different unique characteristics. However, the examples presented above do not preclude implementations in combination with features of other examples. For example, even if an item described in a particular example is not described in another example, it may be understood as a description related to the other example unless there is a description contrary to or contradictory to the item in another example.

[0052] The terminology used in this disclosure is for illustrative purposes only and is not intended to limit the disclosure. In this disclosure, singular expressions include plural expressions unless the context clearly indicates otherwise.

[0053] While exemplary embodiments have been shown and described above, those skilled in the art will understand that modifications and variations may be made without departing from the scope of this disclosure as defined by the appended claims.

Claims

1. An electronic component embedded substrate, comprising: a glass layer; a blind cavity penetrating a portion of the glass layer and having a bottom surface defined by another portion of the glass layer; an electronic component disposed at least partially within the blind cavity; and an insulating material covering at least a portion of each of the glass layer and the electronic component and filling at least a portion of the blind cavity, wherein the blind cavity includes a plurality of corner regions, and each of the plurality of corner regions has a protruding shape extending further outward than a wall surface of the blind cavity in a cross-sectional view taken through the blind cavity along a direction perpendicular to a thickness direction of the glass layer. at least a portion of the protruding shape of each of the plurality of corner regions in the cross-sectional view is substantially circular or substantially elliptical.

2. The electronic component embedded substrate according to claim 1, wherein, a bottom surface of each of the plurality of corner regions of the blind cavity is disposed at substantially the same height as a bottom surface of a central region of the blind cavity.

3. The electronic component embedded substrate according to claim 1, wherein, the blind cavity has a substantially rectangular shape in a cross-sectional view taken through the blind cavity along the thickness direction of the glass layer.

4. The electronic component embedded substrate according to claim 3, wherein, the plurality of corner regions includes four corner regions spaced apart from each other.

5. The electronic component embedded substrate according to claim 1, wherein, the electronic component is attached to the bottom surface in an upside-down orientation.

6. The electronic component embedded substrate according to claim 1, wherein, the electronic component has a plurality of corner portions, and at least some of the plurality of corner portions are respectively disposed in the plurality of corner regions.

7. The electronic component embedded substrate according to claim 1, wherein, the electronic component includes at least one of an integrated circuit device and an embedded passive integrated component.

8. The electronic component embedded substrate according to claim 1, wherein, 9. The electronic component embedded substrate according to claim 1, further comprising: a metal via filling at least a portion of a through-hole penetrating the glass layer; a wiring layer disposed on the insulating material; and a via layer penetrating the insulating material and including a first connection via connecting the wiring layer to the metal via and a second connection via connecting the wiring layer to the electronic component.

10. The electronic component embedded substrate according to claim 9, further comprising a metal pad disposed on the glass layer, in contact with the metal via, and at least partially covered by the insulating material, the first connection via is connected to the metal via through the metal pad.

11. The electronic component embedded substrate according to claim 9, further comprising: wherein, a frame; and a through-cavity penetrating the frame, wherein the glass layer is at least partially disposed within the through-cavity, and the insulating material covers at least a portion of the frame and fills at least a portion of the through-cavity.

12. The electronic component embedded substrate according to any one of claims 9 to 11, further comprising: a build-up insulating layer disposed on the insulating material and covering at least a portion of the wiring layer; a build-up wiring layer disposed on the build-up insulating layer; and a build-up via layer disposed within the build-up insulating layer and connecting the wiring layer to the build-up wiring layer.

13. An electronic component embedded substrate, comprising: a glass layer; ​ ​ ​ ​ A blind cavity that penetrates a portion of the glass layer along its thickness direction from the upper surface of the glass layer. Electronic components are disposed, at least partially, within the blind cavity; as well as An insulating material covers at least a portion of the glass layer and each of the electronic components and fills at least a portion of the blind cavity. The blind cavity includes multiple corner regions, and In a cross-sectional view cut through the blind cavity along a direction perpendicular to the thickness direction of the glass layer, each of the plurality of corner regions extends at least partially away from the center of the blind cavity.

14. The electronic component embedded substrate according to claim 13, wherein, In the cross-sectional view, at least a portion of each of the plurality of corner regions extends into a generally circular or generally elliptical shape.

15. The electronic component embedded substrate according to claim 13, wherein, The multiple corner areas include four corner areas spaced apart from each other.

16. The electronic component embedded substrate according to claim 13, wherein, At least a portion of the area where the wall surface and the bottom surface of the blind cavity connect to each other has a generally circular shape.

17. An embedded substrate for electronic components, comprising: Glass layer; A blind cavity that penetrates a portion of the glass layer along its thickness direction from the upper surface of the glass layer. Electronic components are disposed, at least partially, within the blind cavity; An insulating material covers at least a portion of the glass layer and each of the electronic components and fills at least a portion of the blind cavity; A deposited layer is disposed on the upper and / or lower side of the glass layer, the deposited layer comprising: An insulating layer is deposited on the insulating material and covers at least a portion of the wiring layer disposed on the insulating material; Stacked wiring layers are disposed on stacked insulating layers; and A via layer is stacked within the stacked insulating layer and connects the wiring layer and the stacked wiring layer.

18. The electronic component embedded substrate according to claim 17, wherein, The deposited layer is disposed on both the upper and lower sides of the glass layer.

19. The electronic component embedded substrate according to claim 17, wherein, The stacked insulating layer includes an organic insulating material, which includes a thermosetting resin, a thermoplastic resin, or a material prepared by impregnating at least one of an inorganic filler, an organic filler, and glass fiber in a resin.

Images