Master-slave control system, slave address configuration method and device

Abstract

The disclosure provides a master-slave control system, a slave address configuration method and equipment. The master-slave control system comprises: a master, the master comprising a control signal output end, N drive circuits, each drive circuit comprising a bus signal end, a control signal end, a signal identification circuit and a logic circuit, N being greater than or equal to 2, M voltage division circuits, the voltage division capacity of different voltage division circuits being different, M being less than or equal to N; wherein, for M drive circuits in the N drive circuits, the control signal output end of the master is connected with the control signal end of the M drive circuits one by one through the M voltage division circuits; the signal identification circuit is used for identifying the received control signal and transmitting the identification signal to the logic circuit; and the logic circuit is used for configuring the slave address. According to the scheme, the slave address configuration of the drive circuit can be realized by multiplexing the existing control signal end in the drive circuit, and the separately reserved address configuration end on the drive circuit can be saved.

Description

Technical Field

[0001] This disclosure relates to the field of electronic technology, specifically to a master-slave control system, a slave address configuration method, and a device. Background Technology

[0002] As electronic devices become more functional, multiple identical integrated circuit (IC) devices may be used in a single electronic device. In this case, in order to distinguish between multiple identical IC devices connected to the host, the slave address selection function of the IC device is required.

[0003] In related technologies, slave address selection of IC devices can be achieved through the reserved address (ADDR) pins in the IC device. However, due to the limited number of pins in IC design, some IC devices may not have reserved ADDR pins. Therefore, how to implement slave address configuration of IC devices has become a problem that needs to be solved. Summary of the Invention

[0004] The purpose of this disclosure is to provide a drive circuit, a master-slave control system, a slave address configuration method and device. By reusing the existing control signal terminal in the drive circuit, the slave address configuration of the drive circuit is realized through the control signal received by the control signal terminal, which can eliminate the need for a separate address configuration terminal reserved on the drive circuit for address configuration.

[0005] To achieve the above objectives, in a first aspect, this disclosure provides a master-slave control system, comprising: The host computer includes a control signal output terminal; There are N driving circuits, each of which includes a bus signal terminal, a control signal terminal, a signal recognition circuit, and a logic circuit, where N is greater than or equal to 2. There are M voltage divider circuits, each with a different voltage dividing capability, where M is less than or equal to N. Specifically, for M of the N driving circuits, the control signal output terminal of the host is connected to the control signal terminal of the M driving circuits through the M voltage divider circuits. The signal recognition circuit is used to recognize the received control signal and transmit the recognized signal to the logic circuit. The logic circuit is used to configure the slave address.

[0006] The driving circuit in this disclosure can be packaged as an IC device or chip, and thus, the terminals in the driving circuit can be understood as pins in the IC device or chip. For example, when the driving circuit is packaged as a backlight IC, the bus signal terminals may include the SDA (Serial Data Line) pin and the SCL (Serial Clock Line) pin, and the control signal terminals may be the EN (Enable) pin or the CS (Chip Select) pin.

[0007] In this embodiment, by setting M voltage divider circuits with different voltage divider capabilities, and for M of the N driving circuits, the control signal output terminal of the host is connected to the control signal terminal of the M driving circuits through the M voltage divider circuits. In this way, the control voltage received by the driving circuit is different, thereby making the identification signal output by the signal identification circuit different, which makes it easier for the logic circuit to configure the slave address of the driving circuit according to the identification signal.

[0008] Optionally, the bus signal terminal and the bus signal output terminal of the host are connected via any one of I2C (Inter-Integrated Circuit), SPI (Serial Peripheral Interface), PMBus (Power Management Bus), and SMBus (System Management Bus).

[0009] Optionally, the logic circuit is further configured to execute control logic before configuring the slave address.

[0010] Optionally, the logic circuit is used to execute the control logic of the identification signal and determine the address of the identification signal as the slave address of the driving circuit from a plurality of preset addresses.

[0011] Optionally, the logic circuit is used for: If the identification signal satisfies the first control logic condition and the first address setting condition, the first control logic is executed and the first address among the plurality of preset addresses is determined as the slave address; If the identification signal satisfies the first control logic condition and the second address setting condition, the first control logic is executed and the second address among the plurality of preset addresses is determined as the slave address.

[0012] In this embodiment, the drive circuit can implement different slave address configurations while implementing the same control logic, thus reducing the need to modify the control logic.

[0013] Optionally, the signal recognition circuit is used to identify the voltage magnitude of the control signal; The first control logic condition is that the voltage of the control signal is greater than or equal to a first threshold, and the first threshold is greater than or equal to the minimum voltage value for executing the first control logic; The first address setting condition is that the voltage of the control signal is greater than the first threshold and less than the second threshold, and the second threshold is less than the maximum voltage value for executing the first control logic; The second address setting condition is that the voltage of the control signal is greater than the second threshold.

[0014] Here, the four values ​​of the maximum voltage value for executing the first control logic, the second threshold, the first threshold, and the minimum voltage value for executing the first control logic are in a decreasing order.

[0015] In this embodiment, by setting voltage thresholds corresponding to the first control logic condition, the first address setting condition, and the second address setting condition, control signals of different voltage magnitudes can correspond to different control logics and different slave addresses. This allows the logic circuit to determine whether the first logic control condition, the first address setting condition, and the second address setting condition are met based on the voltage magnitude of the control signal after processing by the signal recognition circuit, thus enabling slave address configuration while executing the control logic.

[0016] Furthermore, by setting the first control logic condition to be that the voltage of the control signal is greater than or equal to a first threshold, and the first threshold is greater than or equal to the minimum voltage value for executing the first control logic, the logic circuit can execute the first control logic when the voltage of the control signal is greater than or equal to the first threshold. This ensures that the logic circuit can correctly execute the first control logic according to the voltage of the control signal, while also improving the flexibility of setting the first threshold.

[0017] Furthermore, the first address setting condition is that the voltage of the control signal is greater than or equal to a first threshold and less than a second threshold. The second address setting condition is that the voltage of the control signal is greater than or equal to a second threshold, and the second threshold is less than the maximum voltage value for executing the first control logic. This allows the logic circuit to implement different address settings while normally executing the first control logic. It also makes the configuration of the slave address more consistent with the actual changes in the voltage of the control signal received at the control signal terminal. As a result, the logic circuit can achieve the switching function between different addresses without changing the control logic.

[0018] In addition, in order for the logic circuit to execute the first control logic normally, a second threshold is set to be less than the maximum voltage value for executing the first control logic. The maximum voltage value for executing the first control logic is less than or equal to the maximum voltage value of the logic high level output by the host.

[0019] In some implementations, other thresholds may be set between the first threshold and the second threshold, or other thresholds may be set between the second threshold and the maximum voltage value for executing the first control logic. This allows for more detailed settings of the slave address to accommodate scenarios where more drive circuits are set on the same set of communication buses.

[0020] Optionally, the signal recognition circuit includes: A comparator circuit is used to compare the voltage of the control signal with multiple voltage thresholds to obtain a comparison result signal; The logic circuit is used to determine the slave address from the plurality of preset addresses according to the pre-set correspondence between the comparison result signal and the address, and to execute the control logic corresponding to the comparison result signal according to the pre-set correspondence between the comparison result signal and the control logic.

[0021] In this embodiment, a specific structure of a signal recognition circuit is proposed, namely, the signal recognition circuit may include a comparator circuit, so that the selection of the signal recognition circuit can be more diversified.

[0022] Optionally, the comparison result signal includes a low level, an intermediate state, and a high level; The comparator circuit is configured to output a low level when the voltage of the control signal is less than a first threshold, output an intermediate state when the voltage of the control signal is greater than or equal to the first threshold and less than a second threshold, and output a high level when the voltage of the control signal is greater than or equal to the second threshold. The logic circuit is configured to disable the driving circuit and not set a slave address for the driving circuit when the comparison result signal is low; enable the driving circuit and set the slave address of the driving circuit to a first address when the comparison result signal is in the intermediate state; and enable the driving circuit and set the slave address of the driving circuit to a second address when the comparison result signal is high.

[0023] Optionally, the signal recognition circuit includes: An analog-to-digital converter is used to sample and obtain the voltage value of the control signal; The logic circuit is used to determine the slave address from the plurality of preset addresses according to the preset correspondence between voltage values ​​and addresses, and to execute control logic corresponding to the voltage value according to the preset correspondence between voltage values ​​and control logic.

[0024] In this embodiment, a specific structure of a signal recognition circuit is proposed. The signal recognition circuit may include an analog-to-digital converter. By setting the analog-to-digital converter, the voltage value of the control signal is sampled. This makes it more flexible and convenient to pre-set the correspondence between voltage value and address, as well as the correspondence between voltage value and control logic, thereby facilitating the configuration of more slave addresses in the driver circuit.

[0025] Optionally, the logic circuit executing control logic corresponding to the identification signal includes: Based on the identification signal, determine whether to enable the drive circuit; or, Based on the identification signal shown, determine whether the drive circuit is selected by the host. In this embodiment, a variety of control logics that can be executed by logic circuits are proposed, which makes the selection of logic circuits more diversified.

[0026] Secondly, this disclosure provides a driving circuit, including: Bus signal terminals, control signal terminals, signal recognition circuits, and logic circuits; The bus signal terminal is used to connect to the bus signal output terminal of the host. The control signal terminal is used to be coupled to the control signal output terminal of the host and to transmit the received control signal to the signal recognition circuit. The signal recognition circuit is used to recognize the control signal and transmit the recognized signal to the logic circuit; The logic circuit is used to execute control logic corresponding to the identification signal, and to determine the address corresponding to the identification signal as the slave address of the driving circuit from a plurality of preset addresses.

[0027] Optionally, the logic circuit is used for: If the identification signal satisfies the first control logic condition and the first address setting condition, the first control logic is executed and the first address among the plurality of preset addresses is determined as the slave address; If the identification signal satisfies the first control logic condition and the second address setting condition, the first control logic is executed and the second address among the plurality of preset addresses is determined as the slave address.

[0028] Optionally, the signal recognition circuit is used to identify the voltage magnitude of the control signal; The first control logic condition is that the voltage of the control signal is greater than or equal to a first threshold, and the first threshold is greater than or equal to the minimum voltage value for executing the first control logic; The first address setting condition is that the voltage of the control signal is greater than the first threshold and less than the second threshold, and the second threshold is less than the maximum voltage value for executing the first control logic; The second address setting condition is that the voltage of the control signal is greater than the second threshold.

[0029] Optionally, the signal recognition circuit includes: A comparator circuit is used to compare the voltage of the control signal with multiple voltage thresholds to obtain a comparison result signal; The logic circuit is used to determine the slave address from the plurality of preset addresses according to the pre-set correspondence between the comparison result signal and the address, and to execute the control logic corresponding to the comparison result signal according to the pre-set correspondence between the comparison result signal and the control logic.

[0030] Optionally, the signal recognition circuit includes: An analog-to-digital converter is used to sample and obtain the voltage value of the control signal; The logic circuit is used to determine the slave address from the plurality of preset addresses according to the preset correspondence between voltage values ​​and addresses, and to execute control logic corresponding to the voltage value according to the preset correspondence between voltage values ​​and control logic.

[0031] Optionally, the logic circuit executing control logic corresponding to the identification signal includes: Based on the identification signal, determine whether to enable the drive circuit; or, Based on the identification signal shown, determine whether the drive circuit is selected by the host.

[0032] Thirdly, this disclosure also provides a slave address configuration method, applied to the master-slave control system described in any one of the first aspects, the slave address configuration method comprising: Receive control signals through the control signal terminal; The control signal is identified by the signal recognition circuit to obtain an identification signal; The logic circuit executes the control logic corresponding to the identification signal, and determines the address corresponding to the identification signal from multiple preset addresses as the slave address of the driving circuit as the slave device.

[0033] Fourthly, this disclosure also provides an electronic device, the electronic device including a master-slave control system as described in any of the first aspects of this disclosure, the master-slave control system being used to determine the slave address of the drive circuit in the electronic device as a slave.

[0034] For the technical effects that can be achieved in the second to fourth aspects mentioned above, please refer to the description of the technical effects that can be achieved by the corresponding possible design schemes in the first aspect mentioned above. This disclosure will not repeat them here. Attached Figure Description

[0035] The accompanying drawings are provided to further illustrate the present disclosure and form part of the specification. They are used together with the following detailed description to explain the present disclosure, but do not constitute a limitation thereof. In the drawings: Figure 1 A schematic diagram of the structure of an electronic device provided as an exemplary embodiment of this disclosure. Figure 2 This is a schematic diagram of a backlight control system in related technologies.

[0036] Figure 3 This is a schematic diagram of a backlight control system provided as an exemplary embodiment of the present disclosure.

[0037] Figure 4 This is a schematic diagram of the operation of a backlight IC provided for an exemplary embodiment of the present disclosure.

[0038] Figure 5 This is a schematic diagram of a backlight control system provided as another exemplary embodiment of the present disclosure.

[0039] Figure 6 This is a schematic diagram of a backlight control system provided as another exemplary embodiment of the present disclosure.

[0040] Figure 7 This is a schematic diagram of a backlight control system provided as another exemplary embodiment of the present disclosure.

[0041] Figure 8 This is a flowchart illustrating a slave address configuration method provided as an exemplary embodiment of the present disclosure. Detailed Implementation

[0042] The technical solutions of the embodiments of this disclosure will be clearly and completely described below with reference to the accompanying drawings. In the description of the embodiments of this disclosure, unless otherwise stated, " / " means "or," for example, A / B can mean A or B; the word "and / or" in the text is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, and B existing alone. Furthermore, in the description of the embodiments of this disclosure, "multiple" refers to two or more.

[0043] It should be understood that the terms "first," "second," etc., in the specification, claims, and drawings of this disclosure are used to distinguish different objects, not to describe a specific order. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion. For example, a process, method, system, product, or apparatus that includes a series of steps or units is not limited to the listed steps or units, but may optionally include steps or units not listed, or may optionally include other steps or units inherent to these processes, methods, products, or apparatuses.

[0044] In this disclosure, the reference to "embodiment" means that a particular feature, structure, or characteristic described in connection with an embodiment may be included in at least one embodiment of this disclosure. The appearance of this phrase in various places throughout the specification does not necessarily refer to the same embodiment, nor is it a separate or alternative embodiment mutually exclusive with other embodiments. It will be explicitly and implicitly understood by those skilled in the art that the embodiments described in this disclosure can be combined with other embodiments.

[0045] This disclosure provides an electronic device, which may include at least one of the following: mobile phone, foldable electronic device, tablet computer, desktop computer, laptop computer, handheld computer, notebook computer, ultra-mobile personal computer (UMPC), netbook, cellular phone, personal digital assistant (PDA), augmented reality (AR) device, virtual reality (VR) device, artificial intelligence (AI) device, wearable device, in-vehicle device, smart home device, or smart city device. The embodiments of this application do not impose any special limitation on the specific type of this electronic device.

[0046] See Figure 1 , Figure 1 The diagram shown is a structural schematic of an electronic device 1000 provided in this application. It should be understood that... Figure 1 The electronic device 1000 shown is merely an example of an electronic device; the electronic device 1000 may have more or fewer components than those shown in the figure, or may have different component configurations. Figure 1 As shown, the electronic device 1000 includes a display screen 110, a mid-frame 120, a back cover 130, a receiving cavity 140, a mounting hole 150, a button module 160, a circuit board 170, a controller 1701, a backlight IC 1702, and a battery 180.

[0047] The middle frame 120 forms a receiving cavity 140, in which the circuit board 170 and the battery 180 are installed. The back cover 130 and the display screen 110 are respectively installed on both sides of the middle frame 120 to close the receiving cavity 140 and protect the circuit board 170 and the battery 180. The middle frame 120 is also provided with mounting holes 150, in which a button module 160 can be installed.

[0048] The circuit board 170 is equipped with a controller 1701 and two backlight ICs 1702, and the controller 1701 is connected to the two backlight ICs 1702 respectively.

[0049] The display screen 110 is used to display images, videos, etc. The display screen 110 includes a display panel. The display panel can be a liquid crystal display (LCD), an organic light-emitting diode (OLED), an LED (Light Emitting Diode), etc.

[0050] Display technologies can include backlit display technology and self-emissive display technology. Backlit display technology refers to a technology where the display screen itself does not emit light, but instead uses a backlight source to illuminate the pixels, enabling the display to show images. The backlight source can be controlled by a backlight IC. Examples of displays using backlit display technology include LCD displays, LED displays, and Mini LED displays. Self-emissive display technology, on the other hand, refers to a technology where the pixels in the display screen can emit light independently, without requiring an external backlight source. Examples of displays using self-emissive display technology include OLED displays.

[0051] The application scenarios of this disclosure are described below.

[0052] For electronic devices employing backlight display technology, in addition to the display screen and the light source illuminating the display screen, a backlight control system may also be included. The backlight control system may include a controller and a backlight IC. When it is necessary to control the brightness of the display screen, the controller can send signal data including PWM (pulse width modulation) duty cycle information to the backlight IC through a communication interface (such as I2C / SPI). Then, the backlight IC can further control the light source according to the signal data to achieve brightness control of the display screen.

[0053] Backlight ICs can be categorized into LCD backlight ICs, LED backlight ICs, and Mini LED backlight ICs, depending on the display panel. The controller can be a System-on-a-Chip (SoC) or a Display Driver Integration Chip (DDIC).

[0054] Typically, one backlight IC can control six groups of LEDs in a display screen. However, as electronic device displays become larger or the number of displays increases, the number of LEDs required also increases. Therefore, for displays that need to control more than six LEDs, two or more backlight ICs are required.

[0055] In scenarios where electronic devices require two or more backlight ICs, to ensure the controller accurately sends signal data to the designated backlight IC for precise control of the light source and ultimately accurate brightness control of the electronic device's display, each backlight IC needs a unique identifier, which can be understood as the backlight IC's device address. Here, the controller sending signal data to the backlight IC can be called the master, and the backlight IC controlled by the master can be called the slave. Therefore, the slave address of the backlight IC refers to the device address of the backlight IC when it acts as a slave communicating with the master. The I2C slave address of the backlight IC refers to the device address of the backlight IC when it is connected to the master via an I2C bus.

[0056] Please refer to Figure 2 , Figure 2 This is a schematic diagram of a backlight control system in related technologies, such as... Figure 2As shown, the bus signal output terminal of the host 210 (i.e., the SDA and SCL pins in the host) is connected to the bus signal terminal of the backlight IC 221 (i.e., the SDA and SCL pins of the backlight IC 221) and the bus signal terminal of the backlight IC 222 (i.e., the SDA and SCL pins of the backlight IC 222) through the same set of I2C buses (a set of I2C buses includes a serial data line SDA and a serial clock line SCL). The control signal output terminal of the host (i.e., the EN pin in the host) is also connected to the control signal terminal of the backlight IC 221 (i.e., the EN pin in the backlight IC 221) and the control signal terminal of the backlight IC 222 (i.e., the EN pin in the backlight IC 222) through the enable signal transmission line (EN). The address setting terminal of the backlight IC 221 (i.e., the ADDR pin in the backlight IC 221) is connected to the pull-up circuit 230, and the address setting terminal of the backlight IC 222 (the ADDR pin in the backlight IC 222) is grounded.

[0057] Furthermore, the backlight IC221 and backlight IC222 are pre-configured with a mapping between the I2C slave address and the voltage levels of the ADDR pin. For example, the configured mapping could be: a high voltage level on the ADDR pin corresponds to slave address 1, and a low voltage level on the ADDR pin corresponds to slave address 2. This mapping can be represented by the following truth table:

[0058] Thus, when the external voltage of the ADDR pin in the backlight IC221 is pulled high, the ADDR pin in the backlight IC221 is at a high level, and the I2C slave address of the backlight IC221 is the slave address corresponding to the high level, i.e., address 1. Since the backlight IC222 is grounded, the ADDR pin in the backlight IC222 is at a low level, and the I2C slave address of the backlight IC222 is the slave address corresponding to the low level, i.e., address 2.

[0059] As can be seen, in related technologies, after obtaining the actual level state of the ADDR pin, the I2C slave address corresponding to the actual level state of the ADDR pin can be determined according to the pre-configured correspondence between the I2C slave address and the level state of the ADDR pin, thereby realizing the configuration function of the I2C slave address of the backlight IC. If the selected backlight IC itself does not reserve an ADDR pin, it is impossible to realize the configuration of the I2C slave address of the backlight IC through the correspondence between the I2C slave address and the level state of the ADDR pin.

[0060] If the selected backlight IC does not have a reserved ADDR pin, and if the host is still required to accurately send signal data including PWM duty cycle information to the specified backlight IC, and then accurately control the lamp source through the PWM duty cycle information, thereby accurately controlling the brightness of the electronic device's display screen, then different backlight ICs must be connected through different groups of I2C buses. However, this method results in a certain waste of the I2C bus.

[0061] To address the aforementioned problems, this disclosure provides a backlight control system, such as... Figure 3 As shown, the backlight control system may include a host 310 and two backlight ICs, namely backlight IC321 and backlight IC322. The EN (Enable) pin of backlight IC322 is connected to the control signal output terminal 311 of the host 310 through a voltage divider circuit 330. The EN pin of backlight IC321 is directly connected to the control signal output terminal 311 of the host 310. In addition, the host 310 is also connected to backlight IC321 and backlight IC322 through an I2C communication bus (SDA line and SCL line).

[0062] exist Figure 3 Based on the circuit structure shown, the following logic configuration is performed in backlight IC321 and backlight IC322: When the voltage of the control signal received at the EN pin is greater than or equal to a first threshold, the backlight IC is enabled; when the voltage of the control signal received at the EN pin is greater than or equal to the first threshold and less than a second threshold, a first slave address is set for the backlight IC; when the voltage of the control signal received at the EN pin is greater than or equal to the second threshold, a second slave address is set for the backlight IC. Here, to ensure that the backlight IC can be enabled normally, the first threshold needs to be set to be greater than or equal to the minimum voltage value for enabling the backlight IC, and the second threshold needs to be less than the maximum voltage value for enabling the backlight IC.

[0063] Based on the above settings, in one example, if the control signal output terminal 311 of the host 310 outputs a high level, and the voltage corresponding to the high level is greater than or equal to the second threshold, since the EN pin of the backlight IC 321 is not externally connected to the voltage divider circuit 330, the voltage of the control signal received by the EN pin of the backlight IC 321 is equal to the voltage output by the control signal output terminal 311 of the host 310. Therefore, the voltage of the control signal received by the EN pin of the backlight IC 321 is greater than or equal to the second threshold, thus enabling the backlight IC 322 and setting the slave address to the first slave address. If the ratio of the two resistors R5 and R6 in the voltage divider circuit 330 is configured so that after the action of the voltage divider circuit 330, the voltage of the control signal received by the EN pin of the backlight IC 322 is greater than or equal to the first threshold and less than the second threshold, then enabling the backlight IC 321 and setting the slave address to the second slave address are also possible.

[0064] In some implementations, since the host 310 is also connected to the backlight IC 321 and backlight IC 322 via an I2C communication bus, therefore, as Figure 3 As shown, the backlight control system also includes a pull-up circuit 340. The function of the pull-up circuit 340 in the I2C communication bus can be found in existing technology and will not be described in detail here. As an example, the pull-up circuit 340 assists in the data transmission process between the host 310 and the backlight ICs 321 and 322.

[0065] In some implementations, the control signal output terminal 311 of the host 310 may be a GPIO (General Purpose Input / Output) pin.

[0066] By multiplexing the control signals received by the EN pin through the above technical solution, the backlight IC can be enabled or disabled based on the control signals received by the EN pin, and a slave address can also be configured based on the control signals received by the EN pin. Thus, even when there is no separate reserved ADDR pin in the backlight IC, different slave addresses can be set for different backlight ICs.

[0067] Below, in conjunction with Figure 4 The flowchart shown is used to illustrate... Figure 3 The workflow of any backlight IC in the diagram is illustrated, such as... Figure 4 As shown: S41, Backlight IC powered on.

[0068] The backlight IC here can be Figure 3 The backlight IC321 or backlight IC322 is used.

[0069] S42. Determine whether the voltage of the control signal received by the EN pin is greater than or equal to the first threshold. If yes, proceed to step S43; otherwise, proceed to step S47.

[0070] Here, the first threshold can be understood as the voltage threshold for enabling the backlight IC and the threshold for setting the first address among multiple preset addresses as the slave address. When the voltage of the control signal is greater than or equal to the first threshold, the backlight IC is enabled. In addition, the first address among multiple preset addresses can also be set as the slave address.

[0071] Here, it is determined whether the voltage of the control signal received by the EN pin is greater than or equal to the first threshold. If it is greater than or equal to the first threshold, the backlight IC is enabled. In addition, the slave address of the backlight IC can be set to the first address. If it is less than the first threshold, the backlight IC is disabled.

[0072] S43, Backlight IC Enable.

[0073] S44. Set the slave address to the first address.

[0074] Here, the setting range of the first threshold can be determined by the enable voltage of the backlight IC itself, and the enable voltage of the backlight IC can be determined according to the type of electronic device to which the backlight IC belongs.

[0075] S45. Determine whether the voltage of the control signal received by the EN pin is greater than or equal to the second threshold. If yes, proceed to step S46; otherwise, return to step S42.

[0076] Here, the second threshold can be understood as the threshold for setting the second address among multiple preset addresses as the slave address. When the voltage of the control signal is greater than or equal to the second threshold, the second address among multiple preset addresses can be set as the slave address.

[0077] Here, it is determined whether the voltage of the control signal received by the EN pin is greater than or equal to the second threshold. If it is greater than or equal to the second threshold, the backlight IC is kept enabled, and the slave address of the backlight IC is set to the second address. If it is less than the second threshold, it continues to return to the step of determining whether the voltage of the control signal received by the EN pin is greater than or equal to the first threshold. At this time, the backlight IC is kept enabled, and the slave address is kept set to the first address.

[0078] S46. Set the slave address to the second address.

[0079] Here, after setting the slave address of the backlight IC to the second address, the process can be terminated.

[0080] S47. Disable backlight IC.

[0081] It should be noted that the above embodiment uses the voltage received by the EN pin as a multiplexed signal as an example. It is known that the backlight IC also includes control pins such as the CS pin. Therefore, in other embodiments, the control pins such as the CS pin in the backlight IC can also be used as multiplexed pins according to actual needs.

[0082] Unlike the EN pin, the CS pin is used to determine whether the backlight IC is selected by the host. When the CS pin is used as a multiplexed pin, if the result of step S42 is yes, the backlight IC can determine that it is selected by the host; if the result of step S42 is no, the backlight IC can determine that it is not selected by the host. That is, the first threshold is changed to the voltage threshold for determining that the backlight IC is selected by the host and the threshold for setting the first address among multiple preset addresses as the slave address.

[0083] It should be noted that, in Figure 4 In the illustrated process, the voltage of the control signal received by the EN pin is first compared with a first threshold. If the voltage of the control signal received by the EN pin is greater than or equal to the first threshold, it is then compared with a second threshold. In other embodiments, the voltage of the control signal received by the EN pin may be compared with the second threshold first. If the voltage of the control signal received by the EN pin is greater than or equal to the second threshold, the backlight IC is enabled and the slave address is set to the second address. If the voltage of the control signal received by the EN pin is less than the second threshold, it is then compared with the first threshold. If it is greater than or equal to the first threshold, the backlight IC is enabled and the slave address is set to the first address. If it is less than the first threshold, the backlight IC is disabled.

[0084] Figure 5 This is a schematic diagram of a backlight control system provided as another exemplary embodiment of this disclosure. (See diagram below.) Figure 5 As shown, in Figure 3 In addition to the above, the backlight IC 322 also includes a signal recognition circuit 301 and a logic circuit 302. The EN pin is used to transmit the received control signal to the signal recognition circuit 301. The signal recognition circuit 301 identifies the voltage magnitude of the control signal and transmits the identified signal to the logic circuit 302. The logic circuit 302 executes the above-mentioned functions based on the received identified signal. Figure 4 The process is shown below.

[0085] It should be noted that the backlight IC321 and backlight IC322 have the same structure, both including the signal recognition circuit 301 and the logic circuit 302. Figure 5 Not shown in the image.

[0086] It should be noted that when the backlight IC includes logic circuitry, the above... Figure 4The workflow shown can be specifically executed by logic circuits.

[0087] Figure 6 This is a schematic diagram of a backlight control system provided as another exemplary embodiment of this disclosure. (See diagram below.) Figure 6 As shown, in Figure 5 Based on this, the signal recognition circuit 301 in the backlight IC 322 is a comparator circuit 3011. The comparator circuit 3011 is used to compare the voltage of the control signal with a first threshold and a second threshold to obtain a comparison result signal. The logic circuit 302 is used to determine the slave address of the backlight IC from the first address and the second address according to the pre-set correspondence between the comparison result signal and the first address and the second address, and to control the backlight IC to enable or disable the backlight IC according to the pre-set correspondence between the comparison result signal and the enable control logic. Here, the enable control logic can include both enabling and disabling the backlight IC.

[0088] In this embodiment, the comparator circuit 3011 can identify the control signal and output a comparison result signal. The logic circuit can then determine the relationship between the voltage of the control signal and the first and second thresholds based on the received comparison result signal. Furthermore, by pre-configuring the correspondence between the comparison result signal and the first and second addresses, as well as the correspondence between the comparison result signal and the enable control logic, the logic circuit 302, after receiving the comparison signal result output by the comparator circuit 3011, can determine the corresponding slave address and the corresponding enable control logic based on the correspondence.

[0089] In some implementations, the comparator result signal can be represented by a signal state. For example, depending on the actual needs, the signal state may include one or more different signal states such as low level, intermediate state, and high level.

[0090] Below, taking the comparison signal results including three signal states—low level (the result output by comparator circuit 3011 when the voltage is less than the first threshold), intermediate state (the result output by comparator circuit 3011 when the voltage is greater than or equal to the first threshold and less than the second threshold), and high level (the result output by comparator circuit 3011 when the voltage is greater than or equal to the second threshold)—as an example, an exemplary truth table is shown in the table below:

[0091] Figure 7 This is a schematic diagram of a backlight control system provided as another exemplary embodiment of this disclosure. (See diagram below.) Figure 7 As shown, in Figure 5 Based on this, the signal recognition circuit 301 in the backlight IC 322 may include an analog-to-digital converter 3012 for sampling the voltage value of the control signal. That is, the recognition signal can also be represented by a voltage value to indicate the specific voltage value. The logic circuit 302 is used to compare the voltage value of the recognition signal with a first threshold and a second threshold, thereby determining the slave address from the first address or the second address according to the comparison result, and controlling the backlight IC to enable or disable the backlight IC according to the comparison result.

[0092] It should be noted that the foregoing embodiments all illustrate the example of two backlight ICs connected to a single I2C bus. As can be seen from the foregoing, in some scenarios, N backlight ICs are connected to a single I2C bus, where N is greater than 2. In this case, the backlight control system also includes M voltage divider circuits, where M is less than or equal to N. For the M backlight ICs out of the N backlight ICs, the host's control signal output is connected one-to-one with the EN pins of the M backlight ICs through the M voltage divider circuits. The voltage divider circuits have different voltage division capabilities. Accordingly, multiple voltage thresholds can be set in this case.

[0093] In this embodiment, the host's control signal output terminal is connected to the EN pins of M backlight ICs one-to-one via M voltage divider circuits, with different voltage divider circuits having different voltage division capabilities. This ensures that when the host outputs the same control signal, the EN pins of the M backlight ICs receive different control signals. Consequently, after the control signal is recognized by the signal recognition circuits of each of the M backlight ICs, the output recognition signals are all different. Combined with the pre-configured correspondence between the recognition signals and the enable control logic, and the correspondence between the recognition signals and the slave addresses, it is possible to enable the control logic while simultaneously configuring different slave addresses for the M backlight ICs. Here, configuring the slave address of the backlight IC can be understood as setting a slave address for the backlight IC.

[0094] In some implementations, M can be equal to N, meaning that each backlight IC is connected to the control signal output terminal of the host through a corresponding voltage divider circuit. In this case, the control signals received by the EN pins of the M backlight ICs are all different, thus enabling different slave address configurations for these N backlight ICs.

[0095] In some implementations, M can be equal to N-1, meaning that N-1 backlight ICs are all connected to the control signal output terminal of the host through corresponding voltage divider circuits. In this case, due to the effect of the voltage divider circuits, the control signals received by the N-1 backlight ICs with voltage divider circuits are different from the control signals output by the host. Meanwhile, the control signals received by the backlight ICs without voltage divider circuits are the same as the control signals output by the host. Thus, the control signals received by the EN pins of these N backlight ICs are also different, and different slave address configurations can be achieved for these N backlight ICs.

[0096] In some implementations, where some backlight ICs are already configured with a unique slave address, assuming there are X backlight ICs without a unique slave address, where X is less than N (the total number of backlight ICs), then M (the number of voltage divider circuits) can be equal to X or X-1. In this case, for M backlight ICs out of the X backlight ICs without a unique slave address, the host's control signal output can be connected to the EN pin of each of the M backlight ICs without a unique slave address through the M voltage divider circuits. This allows for different slave address configurations for the backlight ICs in the master-slave control system.

[0097] Furthermore, the above embodiments are illustrated using a backlight IC in an electronic device and communication between a master and slave device via an I2C communication bus. In other embodiments, this also applies to cases where two or more identical IC devices are connected on the same communication bus, such as power management ICs or touchscreen controller ICs. Therefore, this disclosure will not elaborate on cases where the IC device is a power management IC or touchscreen controller IC. Similarly, this disclosure also applies to cases where the communication bus is an SPI bus, PMBus, or SMBus. Therefore, this disclosure will not elaborate on cases where the communication bus is an SPI bus, PMBus, or SMBus.

[0098] Figure 8 This is a flowchart illustrating a slave address configuration method provided in an exemplary embodiment of the present disclosure. This slave address configuration method can be applied to... Figure 3 , Figures 5-7 Any backlight control system shown in the figure, such as Figure 8 As shown, the slave address configuration method includes the following steps: S801 receives control signals via the EN pin.

[0099] In this embodiment, the host can send a control signal through the control signal output terminal, so that the backlight IC can receive the control signal through the EN pin coupled to the control signal output terminal.

[0100] S802. The control signal is identified by the signal recognition circuit to obtain the identification signal.

[0101] In this embodiment, after the EN pin receives the control signal, it can transmit the control signal to the signal recognition circuit. Thus, the signal recognition circuit can recognize the control signal and obtain the recognition signal.

[0102] The identification signal can be represented in various ways. Optionally, depending on the signal identification circuit, the identification signal can be represented by a signal state or by a voltage value.

[0103] S803 executes the enable control logic of the corresponding identification signal through the logic circuit, and determines the slave address of the backlight IC from multiple preset addresses.

[0104] In this embodiment, the signal recognition circuit transmits the recognition signal to the logic circuit. Then, the logic circuit can control the backlight IC to enable or disable the backlight IC according to the recognition signal, and determine the slave address of the backlight IC from multiple preset addresses.

[0105] In some implementations, when the signal recognition circuit in the backlight IC includes a comparator circuit, the correspondence between the comparison result signal and the address, as well as the correspondence between the comparison result signal and the control logic, can be preset in the logic circuit. In this way, after the logic circuit receives the recognition signal (comparison result signal) transmitted by the comparator circuit, it can determine the slave address from multiple preset addresses according to the preset correspondence between the comparison result signal and the address, and control the backlight IC to enable or disable the backlight IC according to the recognition signal.

[0106] In some implementations, when the signal identification circuit in the backlight IC includes an analog-to-digital converter, a correspondence between voltage values ​​and addresses, as well as a correspondence between voltage values ​​and control logic, can be preset in the logic circuit. In this way, after the logic circuit receives the identification signal (voltage value of the control signal) transmitted by the analog-to-digital converter, it can determine the slave address from multiple preset addresses according to the preset correspondence between voltage values ​​and addresses, and control the backlight IC to enable or disable the backlight IC according to the identification signal.

[0107] Regarding the slave address configuration method in the above embodiments, the specific manner in which each step is performed has been described in detail in the embodiments related to the backlight IC, and will not be elaborated here.

[0108] This disclosure also provides an electronic device including a backlight control system as provided in this disclosure, the backlight control system being used to determine the slave address of a backlight IC in the electronic device.

[0109] This disclosure also provides an electronic device including a master-slave control system as provided in this disclosure, the master-slave control system being used to determine the slave address of a drive circuit in the electronic device.

[0110] The preferred embodiments of this disclosure have been described in detail above with reference to the accompanying drawings. However, this disclosure is not limited to the specific details of the above embodiments. Within the scope of the technical concept of this disclosure, various simple modifications can be made to the technical solutions of this disclosure, and these simple modifications all fall within the protection scope of this disclosure.

[0111] It should also be noted that the various specific technical features described in the above embodiments can be combined in any suitable manner without contradiction. To avoid unnecessary repetition, this disclosure will not describe the various possible combinations separately.

[0112] Furthermore, various different embodiments of this disclosure can be combined in any way, as long as they do not violate the spirit of this disclosure, they should also be regarded as the content disclosed in this disclosure.

Claims

1. A master-slave control system, characterized in that, include: The host computer includes a control signal output terminal; There are N driving circuits, each of which includes a bus signal terminal, a control signal terminal, a signal recognition circuit, and a logic circuit, where N is greater than or equal to 2. There are M voltage divider circuits, each with a different voltage dividing capability, where M is less than or equal to N. Specifically, for M of the N driving circuits, the control signal output terminal of the host is connected to the control signal terminal of the M driving circuits through the M voltage divider circuits. The signal recognition circuit is used to recognize the received control signal and transmit the recognized signal to the logic circuit. The logic circuit is used to configure the slave address.

2. The master-slave control system according to claim 1, characterized in that, The logic circuit is also used to execute control logic before configuring the slave address.

3. The master-slave control system according to claim 1, characterized in that, The logic circuit is used to execute the control logic of the identification signal, and determine the address of the identification signal as the slave address of the driving circuit from a plurality of preset addresses.

4. The master-slave control system according to claim 1, characterized in that, The logic circuit is used for: When the identification signal satisfies the first control logic condition and the first address setting condition, the first control logic is executed and the first address among multiple preset addresses is determined as the slave address; If the identification signal satisfies the first control logic condition and the second address setting condition, the first control logic is executed and the second address among the plurality of preset addresses is determined as the slave address.

5. The master-slave control system according to claim 4, characterized in that, The signal recognition circuit is used to identify the voltage magnitude of the control signal; The first control logic condition is that the voltage of the control signal is greater than or equal to a first threshold, and the first threshold is greater than or equal to the minimum voltage value for executing the first control logic; The first address setting condition is that the voltage of the control signal is greater than the first threshold and less than the second threshold, and the second threshold is less than the maximum voltage value for executing the first control logic; The second address setting condition is that the voltage of the control signal is greater than the second threshold.

6. The master-slave control system according to claim 1, characterized in that, The signal recognition circuit includes: A comparator circuit is used to compare the voltage of the control signal with multiple voltage thresholds to obtain a comparison result signal; The logic circuit is used to determine the slave address from the plurality of preset addresses according to the pre-set correspondence between the comparison result signal and the address, and to execute the control logic corresponding to the comparison result signal according to the pre-set correspondence between the comparison result signal and the control logic.

7. The master-slave control system according to claim 6, characterized in that, The comparison result signal includes low level, intermediate state, and high level; The comparator circuit is configured to output a low level when the voltage of the control signal is less than a first threshold, output an intermediate state when the voltage of the control signal is greater than or equal to the first threshold and less than a second threshold, and output a high level when the voltage of the control signal is greater than or equal to the second threshold. The logic circuit is configured to disable the driving circuit and not set a slave address for the driving circuit when the comparison result signal is low; enable the driving circuit and set the slave address of the driving circuit to a first address when the comparison result signal is in the intermediate state; and enable the driving circuit and set the slave address of the driving circuit to a second address when the comparison result signal is high.

8. The master-slave control system according to claim 1, characterized in that, The signal recognition circuit includes: An analog-to-digital converter is used to sample and obtain the voltage value of the control signal; The logic circuit is used to determine the slave address from a plurality of preset addresses according to a preset correspondence between voltage values ​​and addresses, and to execute control logic corresponding to the voltage value according to a preset correspondence between voltage values ​​and control logic.

9. The master-slave control system according to any one of claims 1-8, characterized in that, The logic circuit executes control logic corresponding to the identification signal, including: Based on the identification signal, determine whether to enable the drive circuit; or, Based on the identification signal shown, determine whether the drive circuit is selected by the host.

10. A slave address configuration method, characterized in that, The master-slave control system applied to any one of claims 1-9 includes: Receive control signals through the control signal terminal; The control signal is identified by the signal recognition circuit to obtain an identification signal; The logic circuit executes the control logic corresponding to the identification signal, and determines the address corresponding to the identification signal from multiple preset addresses as the slave address of the driving circuit as the slave device.

11. An electronic device, characterized in that, The electronic device includes a master-slave control system as described in any one of claims 1-9, wherein the master-slave control system is used to determine the slave address of the drive circuit in the electronic device as a slave.

Images