An asymmetric low noise MLCC design and fabrication method
By using an asymmetric low-noise MLCC design and fabrication method, the internal electrodes are oriented away from the PCB board and combined with soft-end vibration absorption, which solves the problems of high vibration noise and high cost of traditional MLCCs, and achieves a low-cost and easy-to-process noise reduction effect.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- SHENZHEN EYANG TECH DEV
- Filing Date
- 2026-04-15
- Publication Date
- 2026-05-29
AI Technical Summary
Traditional MLCCs suffer from significant vibration and noise due to the piezoelectric effect, and existing noise reduction methods are complex and costly.
The asymmetric low-noise MLCC design uses an asymmetric edge design to orient the inner electrode away from the PCB board. Combined with soft end vibration absorption and full-process direction control, the MARK point is marked during the greening stage using magnet flipping and CCD recognition technology to ensure that the inner electrode is perpendicular to the PCB board.
Significantly reduces MLCC operating noise, simplifies the process flow, reduces costs, and achieves easy processing and efficient noise reduction.
Smart Images

Figure CN122117646A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of chip multilayer ceramic capacitor technology, and in particular to an asymmetric low-noise MLCC design and fabrication method. Background Technology
[0002] MLCCs (Multi-layer Ceramic Chip Capacitors) and other ceramic components are basically composed of upper and lower ceramic protective layers, internal electrodes (nickel or copper metal), and dielectric layers (ceramic) stacked alternately. With the increasing demand for high-end mobile terminal products such as mobile phones and wireless headphones, the requirements for vibration and noise caused by the piezoelectric effect of MLCCs are becoming increasingly stringent. Traditional high-capacity MLCCs have strong ferroelectricity, and their piezoelectric effect is also strong. MLCC devices generate significant vibrations after being powered on, causing noise in the terminal products.
[0003] Due to their symmetrical structure, the distance between the internal electrodes and the PCB board during surface mount assembly of symmetrical MLCCs is random and not fixed. When the internal electrodes are parallel to the PCB board, the vibration direction generated by the piezoelectric effect is perpendicular to the PCB board, directly transmitting the vibration and resulting in significant noise. Hard metal cannot absorb or buffer the mechanical vibration generated by the piezoelectric effect of the internal ceramic body; the vibration is directly transmitted to the PCB board through the terminal electrodes, amplifying the noise. MLCC manufacturers have attempted to reduce noise caused by MLCC vibration by using lead plates, spacers, and increasing the thickness of the cover plate. However, these methods are complex to manufacture and costly. Summary of the Invention
[0004] To overcome the shortcomings of existing technologies, the purpose of this invention is to provide an asymmetric low-noise MLCC design and fabrication method. By using an asymmetric edge design to orient the internal electrodes away from the PCB board, and combining soft-end vibration absorption and full-process directional control, the operating noise of MLCCs is significantly reduced, the process is simplified, and the cost is reduced.
[0005] To achieve the above objectives, the present invention provides the following solution: a method for designing and fabricating asymmetric low-noise MLCCs, comprising: Based on the printing screen information of traditional symmetrical MLCC, an asymmetric printing screen is designed and prepared, and then the internal electrode is printed using the asymmetric printing screen to obtain an MLCC dielectric film including asymmetric internal electrode and marker points. The MLCC dielectric film is staggered and laminated to form a stacked MLCC green block. Then, the stacked MLCC green block is laminated and cut to obtain a single cuboid green chip. Laser marking is performed on the single cuboid green chip to obtain a chip semi-finished product with circular MARK dots. The chip semi-finished product is then subjected to de-bonding, sintering, chamfering, and end sealing and burning operations to obtain a chip with a soft end. The terminal chip is electroplated, tested, and selected to obtain a finished chip. The finished chip is then packaged into tape and reel to obtain an asymmetric low-noise MLCC chip.
[0006] Optionally, based on the printing screen information of traditional symmetrical MLCCs, an asymmetric printing screen is designed and prepared, and then the internal electrodes are printed using the asymmetric printing screen to obtain an MLCC dielectric film including asymmetric internal electrodes and marker points, including: Based on the printing screen information of traditional symmetrical MLCC, a first blank margin area with a first width is set on one side of the blank margin of the screen, and a second blank margin area with a second width is set on the other side, forming an asymmetrical margin structure, and a marking point is added at the center of the second blank margin area; wherein, the first width is greater than the second width; An asymmetric printing screen with an asymmetric edge structure is installed on a dedicated screen printing machine. The required internal electrode paste is laid on it. Under the pressure of the printing machine's squeegee and the screen, the internal electrode paste is extruded from the screen with the designed pattern onto a blank ceramic film. Then, the internal electrode paste is cured on the surface of the ceramic film by baking at a high temperature of 50°C to 100°C, forming an MLCC dielectric film including asymmetric internal electrodes and marking points.
[0007] Optionally, the marker point is set as a square with rounded corners, the side length of the marker point is between one-third and one-half of the second width, and the arc of the marker point is 10% of the side length and greater than 10 micrometers.
[0008] Optionally, the MLCC dielectric film is staggered and laminated to form a stacked MLCC green block, and then the stacked MLCC green block is laminated and cut to obtain a single cuboid green chip, including: The MLCC dielectric film and additional blank ceramic film are loaded into a special laminator, and the staggered arrangement is set. The layers are neatly stacked layer by layer under a temperature of 50°C to 100°C and a pressure of 100 tons to 700 tons to make the internal electrodes asymmetrically distributed, forming a laminated MLCC green block. The lamination process begins by applying a pressure of 50 MPa to 300 MPa to the water at a constant temperature of 60°C to 90°C. This pressure is used to uniformly transfer the water pressure to the laminated MLCC green block and tightly bond each independent membrane layer of the laminated MLCC green block, resulting in a laminated green block. The laminated green block is cut using a dedicated cutting machine at a temperature of 50°C to 100°C. During the cutting process, cross-cutting and longitudinal cutting are performed by identifying marked points to form a single cuboid green chip. The marked points are located at the ends of the single cuboid green chip.
[0009] Optionally, the single rectangular green chip is laser-marked to obtain a chip semi-finished product with circular MARK dots. The chip semi-finished product is then subjected to desizing, sintering, chamfering, and end-sealing and burning operations to obtain an end chip with a soft end, including: Using a laser marking device with CCD recognition markers, the single rectangular green chip is placed in the device funnel, transported by vibration to an upper track with magnets, and then transported by the track to the bottom of the laser marking machine for laser marking of the single rectangular green chip, resulting in a chip semi-finished product with circular MARK dots. For the chip semi-finished product, the following processes are performed in sequence: debinding, sintering, and chamfering, to obtain a ceramic chip. A layer of copper electrode conductive paste is coated on both ends of the ceramic chip, and the end is sealed. A copper soft terminal or silver soft terminal with a thickness of 10 to 50 micrometers is coated on the outer layer of the copper electrode conductive paste. The soft terminal is cured to form a flexible soft end. The soft end is then sintered and cured to obtain a terminal chip.
[0010] Optionally, the maximum size of the circular MARK point is less than half the size of the chip semi-finished product, but greater than 10 micrometers.
[0011] Optionally, the terminal chip is subjected to electroplating, testing, and external selection operations to obtain a finished chip. The finished chip is then subjected to tape-and-reel packaging to obtain an asymmetric low-noise MLCC chip, including: For the terminal chip, electroplating, electrical performance testing and appearance sorting operations are performed to obtain qualified finished chips. Then, the finished chips are taped and reeled, and magnets and charge coupling devices are added to the taping and reeling equipment. During the tape-and-reel process, a magnet is used to flip the chip, and then a charge-coupled device is used to identify the circular MARK point on the chip surface and determine whether the circular MARK point is facing upward. If not, the chip is excluded, and the tape-and-reel packaging operation is completed to obtain an asymmetric low-noise MLCC chip.
[0012] This invention discloses the following technical effects by providing a method for designing and fabricating asymmetric low-noise MLCCs: This invention designs asymmetrical margins and visually identifiable marking points in the screen printing stencil, combined with specially customized magnet flipping, CCD recognition, and laser marking equipment, to permanently mark specific sides of the chip during the preform stage. Through subsequent full-process manufacturing, an asymmetric low-noise MLCC product with directional marking points is ultimately formed. During end-customer placement, the MLCC is positioned so that the wider margin side (i.e., the side with the furthest internal electrode) is close to the PCB board, based on the orientation of the marking points (facing upwards). Utilizing the piezoelectric effect's directionality (perpendicular to the internal electrode surface), the internal electrode is perpendicular to the PCB board (vibration direction parallel to the PCB board), and the greater distance between the internal electrode and the PCB board makes vibration energy transmission more difficult. Combined with a flexible resin soft-end design, vibration is further eliminated, ultimately achieving a significant noise reduction function for low-cost, easy-to-process, and high-efficiency MLCCs, effectively overcoming the shortcomings of existing technologies such as high noise, high cost, and complex processes.
[0013] The technical solution of the present invention will be further described in detail below with reference to the accompanying drawings and embodiments. Attached Figure Description
[0014] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0015] Figure 1 This is a schematic diagram of the method flow provided in an embodiment of the present invention; Figure 2 This is a schematic diagram of an asymmetric low-noise MLCC structure provided in an embodiment of the present invention; Figure 3 A top view of an asymmetric low-noise design printing screen provided in an embodiment of the present invention; Figure 4 This is a schematic diagram of the screen printing and layering process provided in an embodiment of the present invention; Figure 5 This is a schematic diagram of chip cutting produced by screen printing according to an embodiment of the present invention; Figure 6 This is a schematic diagram of asymmetric low-noise MLCC laser dotting provided in an embodiment of the present invention; Figure 7 A schematic diagram of the finished asymmetric low-noise MLCC chip provided in an embodiment of the present invention; Explanation of reference numerals in the attached diagram: 1. Inner electrode; 2. Marker point; 3. First blank margin area; 4. Second blank margin area. Detailed Implementation
[0016] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.
[0017] To make the above-mentioned objects, features and advantages of the present invention more apparent and understandable, the present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments.
[0018] like Figure 1 As shown, this invention provides a method for designing and fabricating asymmetric low-noise MLCCs, comprising: Step 1, as follows Figure 2 , Figure 3 As shown, based on the printing screen information of a traditional symmetrical MLCC, an asymmetric printing screen is designed and prepared. Then, the internal electrode 1 is printed using the asymmetric printing screen to obtain an MLCC dielectric film including the asymmetric internal electrode and marker points 2. Step 1 includes: 1.1 Based on the printing screen information of traditional symmetrical MLCC, a first blank margin area 3 with a first width is set on one side of the blank margin of the screen, and a second blank margin area 4 with a second width is set on the other side to form an asymmetrical margin structure, and a mark point 2 is added at the center of the second blank margin area 4; wherein, the first width is greater than the second width.
[0019] For example: 01005 dimensions: Width margin 80~150um, Narrow margin 15~50um; 0201 dimensions: Wide margin 100~300um, narrow margin 20~60um; 0402 dimensions: Wide margin 150~350um, narrow margin 20~80um; 0603 dimensions: Wide margin 200~500um, narrow margin 30~100um; 0805 dimensions: Width margin 300~800um, Narrow margin 50~180um; 1206 and above: Wide margin 500~1000um, narrow margin 80~250um; Generally, the ratio of wide margin to narrow margin is 7:3.
[0020] The marker point 2 is set as a square with rounded corners. The side length of the marker point 2 is between one-third and one-half of the second width, and the arc of the marker point 2 is 10% of the side length and greater than 10 micrometers.
[0021] 1.2 The asymmetric printing screen with an asymmetric edge structure is installed on a special screen printing machine. The required internal electrode paste is laid on it. Under the pressure of the printing machine squeegee and the screen, the internal electrode paste is extruded from the screen with the designed pattern onto the blank ceramic film. Then, the internal electrode paste is cured on the surface of the ceramic film by baking at a high temperature of 50°C to 100°C to form an MLCC dielectric film including the asymmetric internal electrode and the marker point 2.
[0022] Step 2, as follows Figure 4 , Figure 5 As shown, the MLCC dielectric film is staggered and laminated to form a stacked MLCC green block. Then, the stacked MLCC green block is laminated and cut to obtain a single cuboid green chip. Step 2 includes: 2.1 The MLCC dielectric film and the additional blank ceramic film are loaded into a special laminator, and the staggered arrangement is set. The layers are stacked neatly layer by layer under the pressure of 50°C to 100°C and 100 tons to 700 tons to make the internal electrodes asymmetrically distributed and form a laminated MLCC green block. 2.2 The lamination process begins by applying a pressure of 50 MPa to 300 MPa to the water at a constant temperature of 60°C to 90°C. This pressure is used to uniformly transfer the water pressure to the laminated MLCC green block and tightly bond each independent membrane layer of the laminated MLCC green block, resulting in a laminated green block. 2.3 For the laminated green block, a special cutting machine is used to cut it at a temperature of 50°C to 100°C. During the cutting, the cross-section and longitudinal section are made by identifying the mark point 2 to form a single cuboid green chip; wherein, the mark point 2 is located at the end of the single cuboid green chip.
[0023] Step 3, as follows Figure 6 As shown, the single rectangular green chip is laser-marked to obtain a chip semi-finished product with circular MARK dots. The chip semi-finished product is then subjected to desizing, sintering, chamfering, and end-sealing and sintering operations to obtain a chip with a soft end; Step 3 includes: 3.1 Using a laser marking device with CCD recognition mark points 2, the single rectangular green chip is placed in the device funnel, transported by vibration to the upper track with magnets, and then transported by the track to the bottom of the laser marking machine to perform laser marking on the single rectangular green chip, resulting in a chip semi-finished product with circular MARK points; the maximum size of the circular MARK points is less than half of the chip semi-finished product and greater than 10 micrometers.
[0024] Specifically, marking the MARK points: After the chip is cut, an asymmetrical MLCC chip semi-finished product with marking points 2 is formed. Using a special laser marking device with CCD recognition marking points 2, the chip is placed in the funnel of the device. The MLCC in the funnel is transported to the track with magnets above by vibration. Due to the different magnetism on the two sides, the side with the MARK point with stronger magnetism will flip upward. After the magnetic flip, the chip is transported with the track to the bottom of the laser marking machine. The laser machine marks the MARK points on the chip surface. The MARK points are generally circular, but can also be designed as square or other shapes. However, the maximum size should be less than 1 / 2 of the chip width and greater than 10um to facilitate subsequent CCD recognition during tape-and-reeling, while minimizing damage to the chip surface.
[0025] 3.2 For the chip semi-finished product, the adhesive removal, sintering and chamfering processes are performed in sequence to obtain a ceramic chip. A layer of copper electrode conductive paste is coated on both ends of the ceramic chip, and the end is sealed. A copper soft terminal or silver soft terminal with a thickness of 10 micrometers to 50 micrometers is coated on the outer layer of the copper electrode conductive paste. The soft terminal is cured to form a flexible soft end. The soft end is then sintered and cured to obtain a terminal chip.
[0026] Specifically: Glue removal, sintering, and chamfering: After marking, the asymmetric MLCC chip undergoes processes such as glue removal, sintering, and chamfering to sinter the green ceramic body into a ceramic form. Glue removal occurs at 200-500℃, where organic matter in the chip is gradually decomposed and removed at a certain heating rate to prevent rapid volatilization of organic matter during sintering, which could cause product delamination and cracking. Sintering is a high-temperature treatment at around 1200℃ to transform the chip into a ceramic body with high mechanical properties and excellent electrical properties. Chamfering involves grinding the sintered chip with 0.5-3mm alumina ball milling media to round the edges of the ceramic chip, while simultaneously exposing the internal electrode 1. End sealing and sintering: Coat both ends of the chamfered chip with a 10-50µm copper electrode conductive paste, dry and sinter under a certain temperature to form a tight connection between the end electrode and the ceramic body and inner electrode 1. Then coat the outer layer of the copper electrode with a 10-50µm thick copper or silver soft terminal, and cure it at a certain temperature to form a soft end. Electroplating: Through electrochemical methods, nickel and tin are electroplated onto the external electrode tips of the chip in a dedicated electroplating equipment, ultimately forming an asymmetric low-noise MLCC chip with MARK dots. At this time, the red marker 2 added during the screen design is wrapped in the electrode tips, and the MLCC chip is not exposed, so it does not affect the product performance and reliability. In addition, the laser MARK dot process is carried out in the green body stage and does not add additional stress to the ceramic body.
[0027] Step 4, as follows Figure 7As shown, the terminal chip undergoes electroplating, testing, and external selection to obtain a finished chip. The finished chip is then packaged into tape and reel to obtain an asymmetric low-noise MLCC chip. This includes: 4.1 For the terminal chip, electroplating, electrical performance testing and appearance sorting operations are performed to obtain qualified finished chips. Then, the finished chips are taped and reeled, and magnets and charge coupling devices are added to the taping and reeling equipment.
[0028] 4.2 During the tape-and-reel process, a magnet is used to flip the chip, and then a charge-coupled device is used to identify the circular MARK point on the chip surface and determine whether the circular MARK point is facing upward. If not, the chip is excluded, and the tape-and-reel packaging operation is completed to obtain an asymmetric low-noise MLCC chip.
[0029] When end customers are mounting the MLCC, the MARK point can be identified and placed with the MARK point facing upwards. This way, the wider side of the MLCC is close to the PCB board. Due to the piezoelectric effect, it has directionality (perpendicular to the inner electrode surface of the MLCC). By utilizing the inner electrode perpendicular to the PCB board (vibration direction parallel to the PCB) and at the same time farther away from the PCB board, the goal of low-noise MLCC design can be achieved.
[0030] Therefore, this invention provides an asymmetric low-noise MLCC design and fabrication method. By using an asymmetric edge design to orient the internal electrodes away from the PCB board, and combining soft-end vibration absorption and full-process directional control, the operating noise of MLCCs is significantly reduced, the process is simplified, and the cost is reduced.
[0031] The various embodiments in this specification are described in a progressive manner, with each embodiment focusing on the differences from other embodiments. The same or similar parts between the various embodiments can be referred to each other.
[0032] This document uses specific examples to illustrate the principles and implementation methods of the present invention. The descriptions of the above embodiments are only for the purpose of helping to understand the method and core ideas of the present invention. Furthermore, those skilled in the art will recognize that, based on the ideas of the present invention, there will be changes in the specific implementation methods and application scope. Therefore, the content of this specification should not be construed as a limitation of the present invention.
Claims
1. A method for designing and fabricating asymmetric low-noise MLCCs, characterized in that, include: Based on the printing screen information of traditional symmetrical MLCC, an asymmetric printing screen is designed and prepared, and then the internal electrode is printed using the asymmetric printing screen to obtain an MLCC dielectric film including asymmetric internal electrode and marker points. The MLCC dielectric film is staggered and laminated to form a stacked MLCC green block. Then, the stacked MLCC green block is laminated and cut to obtain a single cuboid green chip. Laser marking is performed on the single cuboid green chip to obtain a chip semi-finished product with circular MARK dots. The chip semi-finished product is then subjected to de-bonding, sintering, chamfering, and end sealing and burning operations to obtain a chip with a soft end. The terminal chip is electroplated, tested, and selected to obtain a finished chip. The finished chip is then packaged into tape and reel to obtain an asymmetric low-noise MLCC chip.
2. The method for designing and fabricating asymmetric low-noise MLCCs according to claim 1, characterized in that, Based on the printing screen information of traditional symmetrical MLCCs, an asymmetric printing screen is designed and fabricated. Then, the internal electrodes are printed using the asymmetric printing screen, resulting in an MLCC dielectric film including asymmetric internal electrodes and marker points, comprising: Based on the printing screen information of traditional symmetrical MLCC, a first blank margin area with a first width is set on one side of the blank margin of the screen, and a second blank margin area with a second width is set on the other side, forming an asymmetrical margin structure, and a marking point is added at the center of the second blank margin area; wherein, the first width is greater than the second width; An asymmetric printing screen with an asymmetric edge structure is installed on a dedicated screen printing machine. The required internal electrode paste is laid on it. Under the pressure of the printing machine's squeegee and the screen, the internal electrode paste is extruded from the screen with the designed pattern onto a blank ceramic film. Then, the internal electrode paste is cured on the surface of the ceramic film by baking at a high temperature of 50°C to 100°C, forming an MLCC dielectric film including asymmetric internal electrodes and marking points.
3. The method for designing and fabricating asymmetric low-noise MLCCs according to claim 2, characterized in that, The marker point is set as a square with rounded corners, the side length of the marker point is between one-third and one-half of the second width, and the arc of the marker point is 10% of the side length and greater than 10 micrometers.
4. The method for designing and fabricating asymmetric low-noise MLCCs according to claim 3, characterized in that, The MLCC dielectric films are staggered and laminated to form a stacked MLCC green block. The stacked MLCC green block is then laminated and cut to obtain a single cuboid green chip, comprising: The MLCC dielectric film and additional blank ceramic film are loaded into a special laminator, and the staggered arrangement is set. The layers are neatly stacked layer by layer under a temperature of 50°C to 100°C and a pressure of 100 tons to 700 tons to make the internal electrodes asymmetrically distributed, forming a laminated MLCC green block. The lamination process begins by applying a pressure of 50 MPa to 300 MPa to the water at a constant temperature of 60°C to 90°C. This pressure is used to uniformly transfer the water pressure to the laminated MLCC green block and tightly bond each independent membrane layer of the laminated MLCC green block, resulting in a laminated green block. The laminated green block is cut using a dedicated cutting machine at a temperature of 50°C to 100°C. During the cutting process, cross-cutting and longitudinal cutting are performed by identifying marked points to form a single cuboid green chip. The marked points are located at the ends of the single cuboid green chip.
5. The method for designing and fabricating asymmetric low-noise MLCCs according to claim 4, characterized in that, Laser marking is performed on the single cuboid green chip to obtain a chip semi-finished product with circular MARK dots. The chip semi-finished product undergoes debinding, sintering, chamfering, and end-sealing and burning operations to obtain an end-capped chip with a soft end, including: Using a laser marking device with CCD recognition markers, the single rectangular green chip is placed in the device funnel, transported by vibration to an upper track with magnets, and then transported by the track to the bottom of the laser marking machine for laser marking of the single rectangular green chip, resulting in a chip semi-finished product with circular MARK dots. For the chip semi-finished product, the following processes are performed in sequence: debinding, sintering, and chamfering, to obtain a ceramic chip. A layer of copper electrode conductive paste is coated on both ends of the ceramic chip, and the end is sealed. A copper soft terminal or silver soft terminal with a thickness of 10 to 50 micrometers is coated on the outer layer of the copper electrode conductive paste. The soft terminal is cured to form a flexible soft end. The soft end is then sintered and cured to obtain a terminal chip.
6. The method for designing and fabricating asymmetric low-noise MLCCs according to claim 5, characterized in that, The maximum size of the circular MARK point is less than half that of the chip semi-finished product, but greater than 10 micrometers.
7. The method for designing and fabricating asymmetric low-noise MLCCs according to claim 6, characterized in that, The terminal chip undergoes electroplating, testing, and external selection to obtain a finished chip. The finished chip is then packaged into tape and reel to obtain an asymmetric low-noise MLCC chip, comprising: For the terminal chip, electroplating, electrical performance testing and appearance sorting operations are performed to obtain qualified finished chips. Then, the finished chips are taped and reeled, and magnets and charge coupling devices are added to the taping and reeling equipment. During the tape-and-reel process, a magnet is used to flip the chip, and then a charge-coupled device is used to identify the circular MARK point on the chip surface and determine whether the circular MARK point is facing upward. If not, the chip is excluded, and the tape-and-reel packaging operation is completed to obtain an asymmetric low-noise MLCC chip.