Package substrate and method of manufacturing the same

By setting a sacrificial layer with lower brittleness and fracture toughness than the dielectric layer on the surface of the dielectric layer for grooving and cutting, the damage problem of glass substrate during the cutting process is solved, and the fracture resistance and reliability of the encapsulation substrate are improved.

CN122121706APending Publication Date: 2026-05-29INST OF MICROELECTRONICS CHINESE ACAD OF SCI LTD

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
INST OF MICROELECTRONICS CHINESE ACAD OF SCI LTD
Filing Date
2026-01-15
Publication Date
2026-05-29

AI Technical Summary

Technical Problem

When slotting the glass core board at the cutting path, existing technology cannot effectively avoid damage to the glass substrate, resulting in reduced strength of the glass substrate, increased risk of breakage, and consequently affecting the mechanical properties and reliability of the packaging substrate.

Method used

A first sacrificial layer and a second sacrificial layer, both with lower brittleness and fracture toughness than the dielectric layer, are set on both surfaces of the dielectric layer. Grooving is performed through these layers to avoid direct contact with the dielectric layer, absorb and dissipate energy, reduce stress transmission, and enhance the fracture resistance of the dielectric layer.

Benefits of technology

This effectively avoids damage to the dielectric layer, reduces the risk of delamination and cracking, and improves the reliability and fracture resistance of the packaging substrate.

✦ Generated by Eureka AI based on patent content.

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Abstract

The application belongs to the field of semiconductors and provides a packaging substrate and a preparation method thereof. The packaging substrate comprises: a dielectric layer, the dielectric layer having a first surface and a second surface oppositely arranged in the extension direction of the dielectric layer; a first sacrificial layer, the first sacrificial layer being located on the first surface; and a second sacrificial layer, the second sacrificial layer being located on the second surface; the brittleness of the first sacrificial layer and the second sacrificial layer is not lower than the brittleness of the dielectric layer, and the fracture toughness of the first sacrificial layer and the second sacrificial layer is not higher than the fracture toughness of the dielectric layer. The packaging substrate provided by the application has excellent anti-fracture performance.
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Description

Technical Field

[0001] This application relates to the field of semiconductor technology, and in particular to a packaging substrate and its preparation method. Background Technology

[0002] After the glass substrate is fabricated, the cut path contains an ABF dielectric layer and a glass core. Since ABF and glass have significantly different hardness, different cutting methods (laser or rotary cutting, with rotary cutting wheels of different materials) are required for step-by-step cutting. First, laser ablation is used to create grooves in the upper and lower ABF layers at the cut path, ensuring complete removal of the ABF layer. Then, rotary cutting or laser cutting is used to cut the glass substrate, achieving the separation of the substrates.

[0003] However, during the grooving process of ABF at the cutting path, damage to the surface and upper wall of the glass core board is inevitable, increasing the risk and possibility of glass substrate breakage, thereby reducing the strength of the glass substrate, causing slight changes in the internal structure of the glass substrate, and thus reducing the mechanical properties of the glass substrate, creating hidden dangers for subsequent crack generation and propagation.

[0004] It should be noted that the above content is not necessarily prior art, nor is it intended to limit the scope of patent sacrifice in this application. Summary of the Invention

[0005] This application provides a packaging substrate and a method for preparing the same, in order to solve or alleviate one or more of the technical problems mentioned above.

[0006] A first aspect of this application provides a packaging substrate, comprising: a dielectric layer having a first surface and a second surface disposed opposite to each other in the extending direction of the dielectric layer; a first sacrificial layer located on the first surface; and a second sacrificial layer located on the second surface; wherein the brittleness of the first sacrificial layer and the second sacrificial layer is not lower than that of the dielectric layer, and the fracture toughness of the first sacrificial layer and the second sacrificial layer is not higher than that of the dielectric layer.

[0007] The packaging substrate of this application embodiment has excellent fracture resistance. Specifically, the dielectric layer serves as the core functional layer. A first sacrificial layer is disposed on a first surface opposite to the dielectric layer in its extension direction, and a second sacrificial layer is disposed on a second surface. The first and second sacrificial layers are configured such that, when subjected to stress that leads to fracture, they fracture before the dielectric layer; the brittleness of the first and second sacrificial layers is not lower than that of the dielectric layer, i.e., they exhibit a more brittle effect than the dielectric layer; and the fracture toughness of the first and second sacrificial layers is not higher than that of the dielectric layer, i.e., they exhibit better toughness than the dielectric layer. Thus, when separating the packaging substrate, only the first and second sacrificial layers are slotted, avoiding contact between the cutting wheel or laser and the dielectric layer, thereby effectively preventing damage to the dielectric layer during the cutting process and reducing the risk of dielectric layer delamination and cracking. During the slotting process, the first and second sacrificial layers absorb and dissipate energy, reducing or even eliminating stress transmitted to the dielectric layer, thereby essentially eliminating the phenomenon of cracks forming in the dielectric layer. In addition, for the packaging substrate, the first sacrificial layer and the second sacrificial layer can also buffer and redistribute stress on the dielectric layer, which can effectively improve the fracture strength of the dielectric layer, enhance the fracture resistance of the dielectric layer, reduce the risk of delamination and bursting during subsequent transportation and assembly of the dielectric layer, and thus improve the reliability of the packaging substrate.

[0008] According to an embodiment of this application, a first buffer layer is further provided between the first sacrificial layer and the dielectric layer, and the first buffer layer is used to buffer the stress transmitted from the first sacrificial layer to the dielectric layer; A second buffer layer is further provided between the second sacrificial layer and the dielectric layer, the second buffer layer being used to buffer the stress transmitted from the second sacrificial layer to the dielectric layer.

[0009] According to an embodiment of this application, the dielectric layer includes one of a glass substrate, a silicon substrate, and a ceramic substrate; the first sacrificial layer and the second sacrificial layer each independently include at least one of an organic material and glass; the first buffer layer and the second buffer layer each independently include a resin.

[0010] According to embodiments of this application, a third sacrificial layer and a fourth sacrificial layer are also included, wherein the first sacrificial layer, the second sacrificial layer, the third sacrificial layer and the fourth sacrificial layer constitute a frame structure surrounding the dielectric layer.

[0011] A second aspect of this application provides a method for preparing a packaging substrate, comprising the following steps: providing a dielectric layer, wherein the dielectric layer has a first surface and a second surface disposed opposite to each other in the extension direction of the dielectric layer; forming a first sacrificial layer on the first surface and forming a second sacrificial layer on the second surface, wherein the brittleness of the first sacrificial layer and the second sacrificial layer is not lower than the brittleness of the dielectric layer, and the fracture toughness of the first sacrificial layer and the second sacrificial layer is not higher than the fracture toughness of the dielectric layer.

[0012] The method described in this application is simple to operate, highly feasible, and compatible with subsequent layer-addition structures. In the extension direction of the dielectric layer, the dielectric layer has a first surface and a second surface disposed opposite to each other. A first sacrificial layer is formed on the first surface, and a second sacrificial layer is formed on the second surface. The brittleness of the first and second sacrificial layers is controlled to be no less than that of the dielectric layer, and the fracture toughness of the first and second sacrificial layers is no greater than that of the dielectric layer. As a core functional layer, the dielectric layer has a first sacrificial layer on its first surface and a second sacrificial layer on its second surface in the extension direction. The brittleness of the first and second sacrificial layers is no less than that of the dielectric layer, meaning they exhibit a more brittle effect than the dielectric layer; the fracture toughness of the first and second sacrificial layers is no greater than that of the dielectric layer, meaning they exhibit better toughness than the dielectric layer. Thus, when separating the packaging substrate, only the first and second sacrificial layers are slotted and cut, avoiding contact between the cutting wheel or laser and the dielectric layer (such as a glass substrate), thereby effectively avoiding damage to the dielectric layer during the cutting process and reducing the risk of dielectric layer delamination and cracking.

[0013] According to an embodiment of this application, step (2) includes: providing a frame structure, the frame structure being a cavity formed by the first sacrificial layer, the second sacrificial layer, the third sacrificial layer and the fourth sacrificial layer; The medium layer is placed inside the cavity, and the first sacrificial layer is placed close to the first surface and the second sacrificial layer is placed close to the second surface. The first sacrificial layer and the second sacrificial layer are disposed opposite to each other, and the first sacrificial layer corresponds to the first cutting path and the second sacrificial layer corresponds to the second cutting path.

[0014] According to an embodiment of this application, after the dielectric layer is disposed in the cavity, the method further includes: providing a resin layer and covering at least one side of the dielectric layer in the thickness direction; The intermediate component with a resin layer is press-fitted to allow the resin layer to flow and fill the gap between the medium layer and the first sacrificial layer to form a first buffer layer, and to fill the gap between the medium layer and the second sacrificial layer to form a second buffer layer.

[0015] According to an embodiment of this application, the method further includes: embedding a first resin buffer layer between the first sacrificial layer and the dielectric layer, wherein the first buffer layer is used to buffer stress transmission from the first sacrificial layer to the dielectric layer; A second resin buffer layer is embedded between the second sacrificial layer and the dielectric layer, the second buffer layer being used to buffer stress transmission from the second sacrificial layer to the dielectric layer.

[0016] According to an embodiment of this application, the method further includes: the dielectric layer having a third surface and a fourth surface disposed opposite to each other in its thickness direction, forming a first layer structure on the third surface, and forming a second layer structure on the fourth surface.

[0017] According to an embodiment of this application, the method further includes: sequentially cutting the first add-in structure and the first sacrificial layer along the first cutting path; and sequentially cutting the second add-in structure and the second sacrificial layer along the second cutting path. Attached Figure Description

[0018] In the accompanying drawings, unless otherwise specified, the same reference numerals throughout the various drawings denote the same or similar parts or elements. These drawings are not necessarily drawn to scale. It should be understood that these drawings depict only some embodiments disclosed in this application and should not be construed as limiting the scope of this application.

[0019] Figure 1 These are schematic diagrams of the packaging substrate in some embodiments; Figure 2 These are schematic diagrams of the framework structure of some embodiments; Figure 3 These are schematic diagrams of the dielectric layer structure in some embodiments; Figure 4 This is a structural diagram illustrating the framework structure of some other embodiments; Figure 5 These are schematic diagrams of the structure of a middleware having a frame structure and a dielectric layer in some embodiments; Figure 6 These are schematic diagrams of the packaging substrate in other embodiments; Figure 7 These are schematic diagrams of the cutting process in some embodiments.

[0020] Explanation of reference numerals in the attached figures: 1: Dielectric layer; 2: First sacrificial layer; 3: Second sacrificial layer; 4: First buffer layer; 5: Second buffer layer; 6: Third sacrificial layer; 7: Fourth sacrificial layer; 8: Frame structure; 9: First add-on structure; 91: First redistribution layer; 92: First barrier layer; 10: Second add-on structure; 101: Second redistribution layer; 102: Second barrier layer; 11: Through-hole; 12: Square core; 13: Circular core; 14: Frame board. Detailed Implementation

[0021] The embodiments of this application are described in detail below, examples of which are illustrated in the accompanying drawings. In the drawings, for clarity, the dimensions of layers, regions, and elements, as well as their relative dimensions, may be exaggerated. Throughout, the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain this application, and should not be construed as limiting this application. It should be noted that, unless otherwise specified, the embodiments and features in the embodiments of this application can be combined with each other.

[0022] It should be understood that when an element or layer is referred to as "on," "adjacent to," "connected to," or "coupled to" other elements or layers, it may be directly on, adjacent to, connected to, or coupled to other elements or layers, or there may be intervening elements or layers. Conversely, when an element is referred to as "directly on," "directly adjacent to," "directly connected to," or "directly coupled to" other elements or layers, there are no intervening elements or layers. It should be understood that although the terms first, second, third, etc., may be used to describe various elements, components, areas, layers, and / or portions, these elements, components, areas, layers, and / or portions should not be limited by these terms. These terms are only used to distinguish one element, component, area, layer, or portion from another element, component, area, layer, or portion. Therefore, without departing from the teachings of this application, the first element, component, area, layer, or portion discussed below may be referred to as a second element, component, area, layer, or portion. And the discussion of a second element, component, area, layer, or portion does not imply that the first element, component, area, layer, or portion necessarily exists in this application.

[0023] In this application, unless otherwise expressly specified and limited, the term "connection" and other such terms should be interpreted broadly. For example, it can refer to a fixed connection, a detachable connection, or an integral connection; it can refer to a mechanical connection or an electrical connection; it can refer to a direct connection or an indirect connection through an intermediate medium; it can refer to the internal communication of two components or the interaction between two components, unless otherwise expressly limited. Those skilled in the art can understand the specific meaning of the above terms in this application based on the specific circumstances.

[0024] It should be noted that the terms "first," "second," etc., used in this application are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such terms can be used interchangeably where appropriate so that the embodiments of this application described herein can be implemented, for example, in orders other than those illustrated or described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0025] In this application, when numerical intervals (i.e., numerical ranges) are involved, unless otherwise specified, the distribution of selectable numerical values ​​within the numerical interval is considered continuous, and includes the two endpoints of the numerical interval (i.e., the minimum and maximum values), as well as every numerical value between these two endpoints. Unless otherwise specified, when a numerical interval refers only to integers within that numerical interval, it includes the two endpoint integers of the numerical range, as well as every integer between the two endpoints, which is equivalent to directly listing every integer. When multiple numerical ranges are provided to describe features or characteristics, these numerical ranges can be merged. In other words, unless otherwise specified, the numerical ranges disclosed in this application should be understood to include any and all subranges included therein. The "numerical value" in the numerical interval can be any quantitative value, such as a number, percentage, ratio, etc. The term "numerical interval" can be broadly included to include percentage intervals, ratio intervals, proportion intervals, etc.

[0026] Advances in high-density packaging substrate manufacturing technology play a crucial role in improving chip performance and achieving miniaturization and multifunctionality. Glass substrates, as a key material, directly impact the quality of the entire packaging system through their performance and reliability. However, in actual production, glass substrates face numerous severe challenges. Among these, the layer-addition process and dicing process have become major risk factors leading to failure, significantly hindering industry development. From the perspective of material property differences, ABF (Alternating Layer Fabrication) material, a commonly used packaging material, has a coefficient of thermal expansion (CTE) of approximately 20 ppm / ℃, while the CTE of glass substrates is only about 3 ppm / ℃. This significant difference in thermal properties leads to substantial thermal stress accumulation during double-sided lamination, high-temperature pressing (temperatures greater than 200℃), and curing. As the number of ABF layers in the packaging structure increases, the residual thermal stress within the substrate also increases. For example, in some high-end chip packages, the number of ABF layers increases to achieve more functional integration, making the resulting thermal stress problem increasingly prominent and severely affecting the structural stability of the glass substrate.

[0027] The inherent brittleness of glass materials is also a major challenge, as their surfaces naturally contain micron-sized defects, such as Griffith cracks. During the dicing process, the mechanical impact generated when high-speed cutting wheels rotate at speeds exceeding 35,000 rpm triggers stress release, causing cracks to propagate randomly at approximately 300 m / s. Once the cracks extend into the effective circuit area, the yield of the substrate cells drops significantly, and the probability of failure increases dramatically in subsequent reliability tests, such as RH damp heat cycling at 85°C / 85% humidity. According to relevant statistics, without optimized dicing processes, the failure rate of glass substrates due to crack propagation can reach as high as 30%-40%, greatly increasing production and time costs and severely hindering the efficient development of the high-density packaging substrate manufacturing industry. Therefore, solving the failure problems of glass substrates in these stages is urgent and crucial to driving the industry towards higher levels of efficiency.

[0028] In the manufacturing process of high-density packaging substrates, the significant difference in thermal properties between ABF material and glass substrate becomes the root cause of thermal stress accumulation. The coefficient of thermal expansion (CTE) of ABF material is approximately 20 ppm / ℃, while that of the glass substrate is only 3 ppm / ℃. During double-sided lamination, due to the close bonding of the two materials, their different thermal expansion trends cause them to interact and generate internal stress during subsequent temperature changes. In the high-temperature lamination stage, where the temperature exceeds 200℃, the thermal expansion of ABF material is much greater than that of the glass substrate. This difference in expansion induces significant thermal stress at the interface between the two. As the temperature further increases and the curing process begins, the internal structure of the material gradually stabilizes, but the previously accumulated thermal stress is "locked" inside the substrate. Moreover, the problem becomes increasingly severe as the number of ABF layers increases. Each additional layer of ABF material is equivalent to adding a thermal stress source inside the substrate. Taking a high-end server chip packaging substrate as an example, when the number of ABF layers increases from 3 to 5, finite element simulation analysis shows that the maximum residual thermal stress inside the substrate increases by approximately 30%. Excessive ABF layers make the thermal stress distribution more complex. In some critical areas, such as the connection area between the chip and the substrate, the thermal stress concentration phenomenon is particularly obvious, which seriously threatens the structural integrity of the glass substrate and creates hidden dangers for subsequent failures.

[0029] The inherent brittleness of glass is a fundamental characteristic, resulting in the natural presence of micron-sized defects on the surface of glass substrates, with Griffith cracks being the most common. These microcracks are relatively stable under normal conditions, but this balance is disrupted during the dicing process by the intervention of a high-speed dicing wheel. The dicing wheel rotates at speeds exceeding 35,000 rpm, generating a strong mechanical impact upon instantaneous contact with the substrate surface during cutting. This impact energy is rapidly transferred into the glass substrate, triggering a stress release mechanism. The previously stable Griffith cracks are activated under stress and begin to propagate randomly at a speed of approximately 300 m / s. Because the direction of crack propagation is unpredictable, once they extend into the effective circuit area, they sever circuit connections, causing electrical performance failure of the substrate unit and significantly reducing substrate yield. In subsequent reliability tests, such as RH damp heat cycling tests at 85°C / 85% humidity, the failure probability of glass substrates that have undergone dicing crack propagation increases significantly. In humid and hot environments, water molecules can penetrate into the cracks, further reducing the mechanical properties of the glass material, accelerating the secondary propagation of the cracks, and ultimately leading to serious failures such as substrate delamination and cracking, which greatly reduces the reliability and service life of the product.

[0030] Currently, the mainstream implementation paths of the aforementioned technical solutions are mainly divided into two categories: First, a highly elastic coating is formed on the surface of the glass substrate using a coating process. The elastic deformation capability of this coating absorbs the mechanical energy generated during crack propagation, thus inhibiting further crack extension. Second, a multilayer composite material structure is designed and fabricated. Through the stress redistribution effect at the interfaces between different material layers, the penetration ability of the crack is weakened, thereby preventing the crack from penetrating the entire glass substrate. The technical characteristic of these traditional methods lies in constructing an "energy dissipation zone" along the crack propagation path by controlling the differences in mechanical property parameters at the interfaces of different materials, without significantly altering the inherent properties of the glass substrate matrix material. This ultimately achieves the technical effect of improving the fracture resistance of the glass substrate component and preventing its explosion. Although existing designs can slow down the propagation of surface or near-surface cracks to some extent and play a positive role in improving the explosion resistance of the glass substrate, there are still significant bottlenecks and shortcomings. Existing technologies cannot fundamentally prevent the generation of cracks. In the manufacturing process of high-density packaging substrates, factors such as the accumulation of thermal stress and mechanical impact during the dicing process make it difficult to avoid the generation of cracks. Existing technologies can only suppress the propagation of cracks after they have formed, but cannot eliminate the root cause of crack formation.

[0031] Accordingly, a first aspect of the embodiments of this application provides a packaging substrate. (See reference...) Figure 1The encapsulation substrate includes: a dielectric layer 1, which has a first surface and a second surface disposed opposite to each other in the extending direction of the dielectric layer 1; a first sacrificial layer 2 located on the first surface; and a second sacrificial layer 3 located on the second surface; wherein the brittleness of the first sacrificial layer 2 and the second sacrificial layer 3 is not less than that of the dielectric layer 1, and the fracture toughness of the first sacrificial layer 2 and the second sacrificial layer 3 is not greater than that of the dielectric layer 1.

[0032] The packaging substrate of this application embodiment has excellent fracture resistance. Specifically, the dielectric layer serves as the core functional layer. A first sacrificial layer is formed on a first surface opposite to the dielectric layer in its extension direction, and a second sacrificial layer is formed on a second surface. Both the first and second sacrificial layers are configured such that, when subjected to stress that leads to fracture, they fracture before the dielectric layer. The brittleness of the first and second sacrificial layers is not lower than that of the dielectric layer, i.e., they exhibit a more brittle effect than the dielectric layer. The fracture toughness of the first and second sacrificial layers is not higher than that of the dielectric layer, i.e., they exhibit better toughness than the dielectric layer. Thus, when separating the packaging substrate, only the first and second sacrificial layers are slotted and cut, avoiding contact between the cutting wheel or laser and the dielectric layer, thereby effectively avoiding damage to the dielectric layer during the cutting process and reducing the risk of dielectric layer delamination and cracking. During the slotting process, the first and second sacrificial layers also absorb and dissipate energy, reducing or even eliminating stress transmitted to the dielectric layer, thereby essentially eliminating the phenomenon of cracks in the dielectric layer. In addition, for the packaging substrate, the first sacrificial layer and the second sacrificial layer can also buffer and redistribute stress on the dielectric layer, which can effectively improve the fracture strength of the dielectric layer, enhance the fracture resistance of the dielectric layer, reduce the risk of dielectric layer delamination and cracking during the transportation and assembly of the packaging substrate, and thus improve the reliability of the packaging substrate.

[0033] In some embodiments, reference Figure 1 A first buffer layer 4 is further disposed between the first sacrificial layer 2 and the dielectric layer 1. The first buffer layer 4 is used to buffer the stress transmitted from the first sacrificial layer 2 to the dielectric layer 1. A second buffer layer 5 is further disposed between the second sacrificial layer 3 and the dielectric layer 1. The second buffer layer 5 is used to buffer the stress transmitted from the second sacrificial layer 3 to the dielectric layer 1. The design of the first and second buffer layers serves two purposes: firstly, the first buffer layer is used to bond the first sacrificial layer and the dielectric layer, and the second buffer layer is used to bond the second sacrificial layer and the dielectric layer; secondly, the first and second buffer layers can also be used to buffer stress, further reducing the stress transmitted to the dielectric layer.

[0034] Furthermore, the dielectric layer is a layer that has been processed to form a vertical electrical interconnection structure inside, and the dielectric layer includes one of a glass substrate, a silicon substrate, and a ceramic substrate.

[0035] Furthermore, the first sacrificial layer and the second sacrificial layer each independently comprise at least one of organic materials and glass.

[0036] The organic materials include brittle polymer materials such as polyimide, benzocyclobutene, epoxy resin or photoresist; the glass may include silicate glass, borosilicate glass or phosphosilicate glass.

[0037] Furthermore, the first buffer layer and the second buffer layer each independently comprise a resin. The resin includes polyurethane, epoxy resin, etc.

[0038] In some embodiments, such as Figure 2 As shown, the packaging substrate further includes a third sacrificial layer and a fourth sacrificial layer, and the first sacrificial layer 2, the second sacrificial layer 3, the third sacrificial layer 6, and the fourth sacrificial layer 7 form a frame structure 8 surrounding the dielectric layer. This frame structure surrounds and protects the dielectric layer, which can effectively improve the fracture strength of the dielectric layer, thereby enhancing the fracture resistance of the dielectric layer and making the reliability of the packaging substrate more stable.

[0039] Furthermore, the third sacrificial layer and the fourth sacrificial layer each independently comprise at least one of an organic material and glass. The organic material includes polyimide, benzocyclobutene, epoxy resin, or photoresist; the glass may include silicate glass, borosilicate glass, or phosphosilicate glass.

[0040] In other embodiments, reference is made to Figure 1 The medium layer has a third surface and a fourth surface disposed opposite to each other in the thickness direction. A first layering structure 9 is disposed on the third surface, and a second layering structure 10 is disposed on the fourth surface.

[0041] Furthermore, the first layer addition structure 9 includes at least one first redistribution layer 91 and a first barrier layer 92 stacked together; the second layer addition structure 10 includes at least one second redistribution layer 101 and a second barrier layer 102 stacked together; a through-hole 11 is provided on the dielectric layer 1, and the through-hole 11 is used to electrically connect the first redistribution layer 91 and the second redistribution layer 101.

[0042] It is understood that in some other examples, the first add-on structure may include multiple stacked first redistribution layers; the multiple first redistribution layers are electrically connected to each other through electronic circuits and pads; the second add-on structure may include multiple stacked second redistribution layers, the second redistribution layers being electrically connected to each other through electronic circuits and pads.

[0043] Furthermore, the first barrier layer is used to protect the first redistribution layer; the second barrier layer is used to protect the second redistribution layer.

[0044] A second aspect of this application provides a method for preparing a packaging substrate, comprising the following steps: (1) A dielectric layer is provided, wherein the dielectric layer has a first surface and a second surface disposed opposite to each other in the extending direction of the dielectric layer; (2) A first sacrificial layer is formed on the first surface, and a second sacrificial layer is formed on the second surface. Wherein, the brittleness of the first sacrificial layer and the second sacrificial layer is not less than that of the dielectric layer, and the fracture toughness of the first sacrificial layer and the second sacrificial layer is not greater than that of the dielectric layer.

[0045] The method described in this application is simple to operate, highly feasible, and compatible with subsequent layer-addition structures. In the extension direction of the dielectric layer, the dielectric layer has a first surface and a second surface disposed opposite to each other. A first sacrificial layer is formed on the first surface, and a second sacrificial layer is formed on the second surface. The brittleness of the first and second sacrificial layers is controlled to be no less than that of the dielectric layer, and the fracture toughness of the first and second sacrificial layers is no greater than that of the dielectric layer. As a core functional layer, the dielectric layer has a first sacrificial layer on its first surface and a second sacrificial layer on its second surface in the extension direction. The brittleness of the first and second sacrificial layers is no less than that of the dielectric layer, meaning they exhibit a more brittle effect than the dielectric layer; the fracture toughness of the first and second sacrificial layers is no greater than that of the dielectric layer, meaning they exhibit better toughness than the dielectric layer. Thus, when separating the packaging substrate, only the first and second sacrificial layers are slotted and cut, avoiding contact between the cutting wheel or laser and the dielectric layer (such as a glass substrate), thereby effectively avoiding damage to the dielectric layer during the cutting process and reducing the risk of dielectric layer delamination and cracking.

[0046] According to an embodiment of this application, step (1) provides a dielectric layer having a first surface and a second surface disposed opposite to each other in the extending direction of the dielectric layer. The dielectric layer is a layer that has been processed to form a vertical electrical interconnect structure internally.

[0047] In some embodiments, a through-hole is provided on the dielectric layer. The through-hole is formed by a drilling process, wherein laser drilling is selected during the drilling process to obtain the through-hole. Optionally, the laser drilling uses a picosecond laser with a pulse width of ~10. - A laser pulse with a pulse energy of 20μJ-100μJ is used for 1² seconds. By controlling the repetition frequency of 8kHz-3MHz, a through-hole with an aperture of 1μm-50μm is formed.

[0048] In some embodiments, the dielectric layer includes one of a glass substrate, a silicon substrate, and a ceramic substrate. The vias described above can be formed by drilling holes in the core plate; alternatively, the vias can be formed by drilling holes in a glass core plate, a silicon plate, a ceramic plate, or the like.

[0049] As a specific example, through-holes are formed in a glass core board through a drilling process to obtain a glass substrate, which serves as the dielectric layer. Laser drilling is used in the drilling process to create the through-holes. Optionally, a picosecond laser with a pulse width not exceeding 10 is used for laser drilling. -12 A laser pulse with a pulse energy of 20μJ-100μJ is used to form a through-hole with a diameter of 1μm-50μm by controlling the repetition frequency of 8kHz-3MHz.

[0050] In some embodiments, the through-holes are electroplated to fill them with plating metal, enabling vertical electrical connections. After electroplating, the plating metal, including copper or titanium, can be removed from the surface using double-sided CMP.

[0051] Furthermore, the thickness of the coating inside the through-hole is 0.3μm-3μm. Optionally, the thickness of the titanium layer is 300nm-600nm, and the thickness of the copper layer is 1μm-3μm.

[0052] In some embodiments, reference Figure 3 This allows for the formation of an array of dielectric layers, which can then be segmented to form individual dielectric layers. Figure 3 In the example, 'a' refers to forming a through hole 11 on the square core 12. After electroplating the through hole, a dielectric layer with multiple array structures is obtained. Figure 3 b in the figure refers to forming through holes 11 on the circular core 13. These through holes are all holes after electroplating treatment, resulting in a circular dielectric layer. Figure 3 In this context, 'c' represents the segmentation of the dielectric layer in the array structure or the dielectric layer in the circular structure to form a single dielectric layer 1.

[0053] According to this application, step (2) involves forming a first sacrificial layer on the first surface and a second sacrificial layer on the second surface.

[0054] In some embodiments, forming the first sacrificial layer and the second sacrificial layer includes providing a frame structure, the frame structure being a cavity enclosed by the first sacrificial layer, the second sacrificial layer, the third sacrificial layer and the fourth sacrificial layer; placing the medium layer within the cavity, and placing the first sacrificial layer close to the first surface and the second sacrificial layer close to the second surface, wherein the first sacrificial layer and the second sacrificial layer are disposed opposite to each other, and the first sacrificial layer corresponds to a first cutting path and the second sacrificial layer corresponds to a second cutting path.

[0055] Further, refer to Figure 4 The formation process of the frame structure includes: providing a frame plate 14, and drilling holes in the frame plate according to the size of the dielectric layer to form a frame structure 8 surrounding the dielectric layer, consisting of a first sacrificial layer, a second sacrificial layer, a third sacrificial layer, and a fourth sacrificial layer. Specifically, Figure 4 In this context, 'a' represents the frame plate. Figure 4 In this diagram, 'b' represents the array structure after perforation. The dielectric layer is embedded within the frame structure. The frame panels are made of at least one of organic materials or glass.

[0056] In some embodiments, reference Figure 5 After the dielectric layer 1 is disposed within the cavity of the frame structure 8, the method further includes: providing a resin layer and covering at least one side of the dielectric layer in the thickness direction; performing a pressing process on the intermediate piece having the resin layer, causing the resin layer to flow and fill the gap between the dielectric layer and the first sacrificial layer to form a first buffer layer, and filling the gap between the dielectric layer 1 and the second sacrificial layer to form a second buffer layer 5, thereby obtaining the following... Figure 5 The intermediate component is shown in Figure b. This method allows for the simultaneous formation of the first and second buffer layers, as well as the simultaneous formation of the third sacrificial layer and the dielectric layer, and the fourth buffer layer between the fourth sacrificial layer and the dielectric layer. This creates a surrounding ring around the dielectric layer, further enhancing the fracture resistance of the packaging structure. Furthermore, during the formation of the first and second buffer layers, a structural layer is simultaneously formed on the surface along the thickness direction of the dielectric layer. This structural layer can be used to form a build-up structure through processes such as drilling. This build-up structure includes either the first or second build-up structure. This approach allows the fabrication of the first and second buffer layers to be compatible with the fabrication of the build-up structure simultaneously, significantly improving the production efficiency of the packaging substrate.

[0057] In other embodiments, the method of forming the packaging substrate further includes: forming a first buffer layer between the first sacrificial layer and the dielectric layer, the first buffer layer being used to buffer stress transmission from the first sacrificial layer to the dielectric layer; and forming a second buffer layer between the second sacrificial layer and the dielectric layer, the second buffer layer being used to buffer stress transmission from the second sacrificial layer to the dielectric layer. The design of the first and second buffer layers serves two purposes: firstly, the first buffer layer is used to bond the first sacrificial layer and the dielectric layer, and the second buffer layer is used to bond the second sacrificial layer and the dielectric layer; secondly, the first and second buffer layers can also be used to buffer stress, further reducing the stress transmitted to the dielectric layer.

[0058] Furthermore, the method of forming the first buffer layer includes: embedding resin between the first sacrificial layer and the dielectric layer to form the first buffer layer; the method of forming the second buffer layer includes: embedding resin between the second sacrificial layer and the dielectric layer to form the second buffer layer. Embedding the resin into the gap between the dielectric layer and the frame structure further promotes the stability of the dielectric layer and the frame structure.

[0059] Further, refer to Figure 6 The method of forming a packaging substrate further includes: the dielectric layer having a third surface and a fourth surface disposed opposite to each other in its thickness direction, forming a first layering structure 9 on the third surface, and forming a second layering structure 10 on the fourth surface.

[0060] Further, the first add-in structure includes at least one first redistribution layer 91 and a first barrier layer 92 stacked together; the second add-in structure includes at least one second redistribution layer 101 and a second barrier layer 102 stacked together. The first and second redistribution layers each independently include a plurality of conductive lines and an ABF film filled between adjacent conductive lines to insulate the conductive lines from each other. The first and second redistribution layers can be formed using a semi-additive or subtractive method.

[0061] In some embodiments, reference Figure 7The method for preparing the packaging substrate further includes: sequentially cutting the first add-on structure and the first sacrificial layer along the first cutting path; and sequentially cutting the second add-on structure and the second sacrificial layer along the second cutting path. The board separation process is performed using mechanical dicing A or laser dicing B (A or B in the attached diagram are schematic representations, not indicating that multiple processes must be used simultaneously; theoretically, both mechanical dicing and laser dicing can complete the board separation process). This way, during the cutting process, only the add-on structure and the sacrificial layer are cut, without cutting the dielectric layer, effectively reducing problems such as dielectric layer cracking caused by laser beams or blades cutting the dielectric layer. After cutting, the dielectric layer is protected by a frame structure, thus significantly increasing the dielectric layer's fracture resistance.

[0062] It should be noted that the terms "thickness," "above," and "inner," etc., are used only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the elements referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as limitations on this application. The directional term "inner" refers to inside or outside relative to the outline of the component itself. For example, if the device in the drawings is inverted, a device described as "above" or "on top of" other devices or structures will later be positioned as "below" or "under" other devices or structures. Thus, the exemplary term "above" can include both "above" and "below." The device may also be positioned in other different ways (rotated 90 degrees or in other orientations), and the spatial relative descriptions used herein are interpreted accordingly.

[0063] It should also be noted that the terms "some embodiments," "other embodiments," and "embodiments" used in this application refer to specific features, structures, or characteristics described in connection with those embodiments, which are included in at least one embodiment described in the general description of this application. The appearance of the same expression in multiple places in the specification does not necessarily refer to the same embodiment. Furthermore, when a specific feature, structure, or characteristic is described in connection with any embodiment, the intention is to suggest that implementing such a feature, structure, or characteristic in conjunction with other embodiments also falls within the scope of this application.

[0064] In the above embodiments, the descriptions of each embodiment have different focuses. For parts not described in detail in a certain embodiment, please refer to the relevant descriptions in other embodiments.

[0065] It should also be noted that the above are merely preferred embodiments of this application and do not limit the scope of the patent sacrifice of this application. Any equivalent structural or procedural changes made using the content of the specification and drawings of this application, or direct or indirect applications in other related technical fields, are similarly included in the scope of the patent sacrifice of this application.

Claims

1. A packaging substrate, characterized in that, include: A dielectric layer having a first surface and a second surface disposed opposite to each other in the extending direction of the dielectric layer; A first sacrificial layer is located on the first surface; A second sacrificial layer is located on the second surface; The brittleness of the first sacrificial layer and the second sacrificial layer is not less than that of the dielectric layer, and the fracture toughness of the first sacrificial layer and the second sacrificial layer is not greater than that of the dielectric layer.

2. The packaging substrate according to claim 1, characterized in that, A first buffer layer is also provided between the first sacrificial layer and the dielectric layer. The first buffer layer is used to buffer the stress transmitted from the first sacrificial layer to the dielectric layer. A second buffer layer is further provided between the second sacrificial layer and the dielectric layer, the second buffer layer being used to buffer the stress transmitted from the second sacrificial layer to the dielectric layer.

3. The packaging substrate according to claim 2, characterized in that, The dielectric layer includes one of a glass substrate, a silicon substrate, and a ceramic substrate; The first sacrificial layer and the second sacrificial layer each independently comprise at least one of organic materials and glass; The first buffer layer and the second buffer layer each independently comprise resin.

4. The packaging substrate according to any one of claims 1-3, characterized in that, It also includes the third and fourth sacrificial layers. The first sacrificial layer, the second sacrificial layer, the third sacrificial layer, and the fourth sacrificial layer form a frame structure surrounding the medium layer.

5. A method for preparing a packaging substrate, characterized in that, Includes the following steps: A dielectric layer is provided, wherein the dielectric layer has a first surface and a second surface disposed opposite to each other in the extending direction of the dielectric layer; A first sacrificial layer is formed on the first surface, and a second sacrificial layer is formed on the second surface. Wherein, the brittleness of the first sacrificial layer and the second sacrificial layer is not less than that of the dielectric layer, and the fracture toughness of the first sacrificial layer and the second sacrificial layer is not greater than that of the dielectric layer.

6. The preparation method according to claim 5, characterized in that, Step (2) includes: A frame structure is provided, the frame structure being a cavity enclosed by a first sacrificial layer, a second sacrificial layer, a third sacrificial layer, and a fourth sacrificial layer; The dielectric layer is positioned within the cavity, with the first sacrificial layer close to the first surface and the second sacrificial layer close to the second surface. The first sacrificial layer and the second sacrificial layer are positioned opposite each other, with the first sacrificial layer corresponding to the first cutting path and the second sacrificial layer corresponding to the second cutting path.

7. The preparation method according to claim 6, characterized in that, After the dielectric layer is disposed within the cavity, the method further includes: A resin layer is provided and covers at least one side of the dielectric layer in the thickness direction; The intermediate component with a resin layer is press-fitted to allow the resin layer to flow and fill the gap between the medium layer and the first sacrificial layer to form a first buffer layer, and to fill the gap between the medium layer and the second sacrificial layer to form a second buffer layer.

8. The preparation method according to claim 5, characterized in that, Also includes: A resin first buffer layer is embedded between the first sacrificial layer and the dielectric layer, the first buffer layer being used to buffer stress transmission from the first sacrificial layer to the dielectric layer; A second resin buffer layer is embedded between the second sacrificial layer and the dielectric layer, the second buffer layer being used to buffer stress transmission from the second sacrificial layer to the dielectric layer.

9. The method according to claim 8, characterized in that, Also includes: The dielectric layer also has a third surface and a fourth surface disposed opposite to each other in its thickness direction, a first layering structure is formed on the third surface, and a second layering structure is formed on the fourth surface.

10. The method according to claim 9, characterized in that, Also includes: The first added-layer structure and the first sacrificial layer are cut sequentially along the first cutting path; The second layered structure and the second sacrificial layer are cut sequentially along the second cutting path.