Semiconductor process composition and method for manufacturing a semiconductor device

Abstract

Embodiments provide a semiconductor process composition including a fluorine-containing compound. The semiconductor process composition exhibits a first water contact angle increment of more than 20°, includes a fluorine-containing ketone compound, and is capable of adsorbing onto a metal nitride film or a metal film, thereby performing a deposition inhibition function.

Description

Technical Field

[0001] The embodiments relate to a composition for semiconductor processes and a method for manufacturing a semiconductor device. Background Technology

[0002] As the integration density and aspect ratio of various electronic devices, including semiconductor devices, increase, various limitations and problems may arise in conventional top-down lithography and etching processes that proceed from the top to the bottom of the structure. For example, with the high integration of memory devices, the aspect ratio and number of stacked layers of 3D vertical NAND (i.e., VNAND) devices are constantly increasing, while the layer size is constantly decreasing in the vertical direction.

[0003] Therefore, when using conventional top-down photolithography / etching processes to form cells containing information storage films, especially charge trapping layers, non-uniformity between cells and the resulting interference problems may occur.

[0004] Therefore, technological development and related research are needed to overcome the limitations of conventional top-down cell manufacturing and expand the degrees of freedom of atomic-scale patterning methods within 3D structures. To develop next-generation NAND flash memory devices and further increase the number of stacked layers, research and development are underway on ultra-high precision patterning methods applicable to the interior of 3D NAND cells to overcome scaling limitations.

[0005] Specifically, in semiconductor manufacturing processes, thin film deposition refers to the process of forming conductive, insulating, or semiconductor materials on a wafer. Thin film deposition methods can include atomic layer deposition (ALD) and chemical vapor deposition (CVD). Atomic layer deposition is a process that deposits atoms one layer at a time and can be used in applications requiring miniaturization.

[0006] In this regard, the relevant process is described in Korean Patent Publication No. 2017-0016748 and others. Summary of the Invention

[0007] Technical issues The embodiments aim to provide a composition for semiconductor processes and a method for manufacturing a semiconductor device, which achieves enhanced selectivity in a process of regionally selectively depositing a target film.

[0008] Technical solution The semiconductor process composition according to the embodiment includes a fluorinated compound, and the first increment of the water contact angle measured by the following measurement method 1 exceeds 20°.

[0009] [Measurement Method 1] 1) The surface of the semiconductor substrate containing the titanium nitride film is treated with hydrogen fluoride.

[0010] 2) At a temperature of 150°C and a process pressure of 1 Torr, a semiconductor process composition is deposited on a surface-treated titanium nitride film for up to 30 seconds.

[0011] 3) The first water contact angle of the titanium nitride film treated with hydrogen fluoride was measured at room temperature.

[0012] 4) The second water contact angle of the surface on which the semiconductor process composition is deposited is measured at room temperature.

[0013] 5) The first increment of the water contact angle is the value obtained by subtracting the first water contact angle from the second water contact angle.

[0014] In one embodiment, the second increment of the water contact angle measured by the following measurement method 2 can exceed 20°.

[0015] [Measurement Method 2] 1) The surface of a semiconductor substrate containing a tungsten layer is treated with hydrogen fluoride.

[0016] 2) At a temperature of 150°C and a process pressure of 1 Torr, a semiconductor process composition is deposited on a surface-treated tungsten layer for up to 30 seconds.

[0017] 3) The third water contact angle of the tungsten layer, which has been surface-treated with hydrogen fluoride, was measured at room temperature.

[0018] 4) The fourth water contact angle of the surface on which the semiconductor process composition is deposited is measured at room temperature.

[0019] 5) The second increment of the water contact angle is the value obtained by subtracting the third water contact angle from the fourth water contact angle.

[0020] In one embodiment, the fluorinated compound may include ketone compounds.

[0021] In one embodiment, the fluorinated compound may be represented by the following chemical formula 1.

[0022] [Chemical Formula 1] .

[0023] In the chemical formula 1, R1 is an alkyl group substituted with fluorine and containing 1 to 3 carbon atoms, and R2 is an alkenyl group substituted with fluorine and containing 1 to 6 carbon atoms.

[0024] In one embodiment, the fluorinated compound may be represented by the following chemical formula 2.

[0025] [Chemical Formula 2] .

[0026] In the chemical formula, R1 is an alkyl group substituted with fluorine and containing 1 to 3 carbon atoms, R3 is an alkyl group substituted with fluorine and containing 1 to 3 carbon atoms, R4 is at least one group selected from hydrogen, fluorine, or an alkyl group substituted with fluorine and containing 1 to 3 carbon atoms, and R5 contains a hydroxyl group.

[0027] In one embodiment, the fluorinated compound may contain hexafluoroacetylacetone.

[0028] In one embodiment, the fluorinated compound may have a molecular weight of about 100 g / mol to about 500 g / mol.

[0029] In one embodiment, the boiling point of the semiconductor process composition at atmospheric pressure can be from 60°C to 100°C.

[0030] In one embodiment, the eighth water contact angle measured by the following measurement method 3 can be between 20° and 50°.

[0031] [Measurement Method 3] 1) The surface of a semiconductor substrate containing a silicon oxide film is treated with hydrogen fluoride.

[0032] 2) At a temperature of 150°C and a process pressure of 1 Torr, a semiconductor process composition is deposited on a surface-treated silicon oxide film for up to 30 seconds.

[0033] 3) The eighth water contact angle was measured at room temperature on a silicon oxide film surface on which a semiconductor process composition was deposited.

[0034] A method for manufacturing a semiconductor device according to an embodiment includes the following steps: preparing a semiconductor substrate comprising a deposition target region and a deposition exclusion region; a first adsorption step, wherein the first adsorption step introduces a fluorine-containing inhibitor onto the semiconductor substrate, the fluorine-containing inhibitor being selectively adsorbed into the deposition exclusion region; a first purging step, wherein the first purging step removes the inhibitor remaining in the deposition target region; and a second adsorption step, wherein the second adsorption step introduces the inhibitor into the deposition exclusion region after the first purging step; and a step of forming a thin film in the deposition target region.

[0035] A method for manufacturing a semiconductor device according to one embodiment may further include: a second purging step for removing the inhibitor remaining in the deposition target region after the second adsorption step; a third adsorption step for introducing the inhibitor into the deposition exclusion region after the second purging step; and a third purging step for removing the inhibitor remaining in the deposition target region after the third adsorption step.

[0036] In one embodiment, the deposition target area may contain a silicon oxide film or a silicon nitride film, and the deposition exclusion area may contain a titanium nitride film or a tungsten layer.

[0037] In one embodiment, in the first purging step, an inert gas is introduced into the semiconductor substrate, and the process time in the first purging step can be 1.5 to 4.0 times the process time in the first adsorption step.

[0038] In one embodiment, in the first adsorption step and the second adsorption step, the adsorption process temperature can be 50°C to 120°C higher than the boiling point of the inhibitor.

[0039] In one embodiment, during the first purging step, the purging process temperature can be 70°C to 200°C higher than the boiling point of the inhibitor.

[0040] According to one embodiment, the deposition inhibitor composition is a semiconductor process composition adsorbed onto a titanium nitride film or tungsten layer to inhibit the deposition of additional process materials, and the semiconductor process composition comprises a fluorine compound represented by the following chemical formula 1.

[0041] [Chemical Formula 1] .

[0042] In the chemical formula, R1 is an alkyl group substituted with fluorine and containing 1 to 3 carbon atoms, and R2 is an alkenyl group substituted with fluorine and containing 1 to 6 carbon atoms.

[0043] According to one embodiment, the deposition inhibitor composition may comprise a fluorine compound represented by the following chemical formula 2.

[0044] [Chemical Formula 2] .

[0045] In the chemical formula 2, R1 is an alkyl group substituted with fluorine and containing 1 to 3 carbon atoms, R3 is an alkyl group substituted with fluorine and containing 1 to 3 carbon atoms, R4 is at least one group selected from hydrogen, fluorine, or an alkyl group substituted with fluorine and containing 1 to 3 carbon atoms, and R5 contains a hydroxyl group.

[0046] According to one embodiment, the deposition inhibitor composition may comprise a fluorine compound represented by the following chemical formula 3.

[0047] [Chemical Formula 3] .

[0048] In one embodiment, the fluorinated compound may have a molecular weight of about 100 g / mol to about 500 g / mol.

[0049] In one embodiment, the fluorinated compound can have a boiling point of 60°C to 100°C at atmospheric pressure.

[0050] [The effects of the invention] The semiconductor process composition according to the embodiment contains a fluorinated compound and is effectively adsorbed onto a titanium nitride film, and can cause a first increment of the water contact angle to exceed about 20°.

[0051] Therefore, the semiconductor process composition according to the embodiment is temporarily adsorbed onto the titanium nitride film, thereby effectively preventing the film from depositing on the titanium nitride film.

[0052] In particular, since the semiconductor process composition according to the embodiment contains fluorine, the semiconductor process composition can effectively prevent chemical reactions between the precursor used to form the thin film and the titanium nitride film.

[0053] Furthermore, the semiconductor process composition according to the embodiment is effectively adsorbed onto the tungsten layer, and the second increment of the water contact angle can exceed about 20°.

[0054] Therefore, the semiconductor process composition according to the embodiment is temporarily adsorbed onto the tungsten layer, thereby effectively preventing the deposition of thin films on the tungsten layer.

[0055] Furthermore, the semiconductor process composition according to the embodiments may contain fluorinated ketone compounds. Additionally, the semiconductor process composition according to the embodiments may contain functional groups such as hydroxyl groups.

[0056] Therefore, ketone groups and / or hydroxyl groups are effectively adsorbed into the deposition exclusion region, and fluorine can be exposed on the surface of the deposition barrier layer formed by the semiconductor process composition according to the embodiment.

[0057] Therefore, the semiconductor process composition according to the embodiment can effectively protect the deposition exclusion region from the influence of the precursor. Thus, a thin film can be formed in the deposition target region with a high selectivity.

[0058] Furthermore, the fluorinated compounds can have a molecular weight of 100 g / mol to 500 g / mol, and the compositions for semiconductor processing can have a boiling point of 60°C to 100°C under atmospheric pressure.

[0059] Therefore, the semiconductor process composition according to the embodiment can be easily introduced into the semiconductor substrate even at low temperatures. Therefore, the semiconductor process composition according to the embodiment can form a thin and uniform deposition barrier layer in the deposition exclusion region.

[0060] Furthermore, the semiconductor process composition according to the embodiments does not adhere to the silicon oxide film or has weak adhesion. Therefore, the semiconductor process composition according to the embodiments does not form a deposition barrier layer on the silicon oxide film. Therefore, the semiconductor process composition according to the embodiments can selectively deposit the target film only on the silicon oxide film.

[0061] Furthermore, the method for manufacturing a semiconductor device according to an embodiment includes a first purging step located between the first adsorption step and the second adsorption step. That is, the method for manufacturing a semiconductor device according to an embodiment introduces an inhibitor stepwise into the deposition exclusion region to form a reaction inhibition layer stepwise.

[0062] Therefore, the method for manufacturing a semiconductor device according to the embodiment can form a thin and uniform reaction inhibition layer in the deposition exclusion region while effectively removing inhibitor residues from the deposition target region.

[0063] Furthermore, the method for manufacturing a semiconductor device according to the embodiment can utilize the process time of the first purging step to a sufficiently long extent by using an inhibitor. In this case, since the inhibitor binds firmly to the deposited exclusion region, the first purging step can have a sufficiently long process time.

[0064] Therefore, the method for manufacturing a semiconductor device according to the embodiment can form a thin film with improved selectivity in the deposition target area.

[0065] Furthermore, the method for manufacturing a semiconductor device according to the embodiments can perform a first adsorption step and a second adsorption step at an appropriate process temperature, and a first purging step at an appropriate process temperature.

[0066] Therefore, the method for manufacturing a semiconductor device according to the embodiment can form a thin and uniform reaction inhibition layer in the deposition exclusion region while effectively removing inhibitor residues in the deposition target region. Attached Figure Description

[0067] Figures 1 to 9 The accompanying drawing illustrates a region-selective atomic layer deposition process according to an embodiment.

[0068] Figure 10 The accompanying drawing shows a cross-section of a semiconductor substrate containing a titanium nitride film formed according to an embodiment.

[0069] Figure 11 The accompanying drawing shows a cross-section of a semiconductor substrate containing a titanium nitride film formed according to a comparative example.

[0070] Figure 12 The accompanying drawing shows a cross-section of a semiconductor substrate containing a tungsten layer formed according to an embodiment.

[0071] Figure 13 The accompanying drawing shows a cross-section of a semiconductor substrate containing a tungsten layer formed according to a comparative example. Detailed Implementation

[0072] In the description of the embodiments, when describing the formation of regions, planes, layers, or substrates "on" or "below" the regions, planes, layers, or substrates, "on" and "below" include both cases of being formed "directly" and "indirectly" through other components. Furthermore, the references for "on" or "below" the components are described based on the accompanying drawings. The dimensions of the components in the drawings may be exaggerated for illustrative purposes and do not necessarily represent actual application dimensions.

[0073] A method for manufacturing a semiconductor device according to an embodiment includes the step of forming a thin film on a semiconductor substrate. The method for manufacturing a semiconductor device according to an embodiment may use an inhibitor to selectively deposit a thin film on the semiconductor substrate.

[0074] A method for manufacturing a semiconductor device according to an embodiment includes the following steps: preparing a semiconductor substrate comprising a deposition target region and a deposition exclusion region; a first adsorption step, wherein the first adsorption step introduces a fluorine-containing inhibitor onto the semiconductor substrate, the fluorine-containing inhibitor being selectively adsorbed onto the deposition exclusion region; a first purging step, wherein the first purging step removes the inhibitor remaining in the deposition target region; a second adsorption step, wherein the second adsorption step introduces the inhibitor into the deposition exclusion region after the first purging step; and a step of forming a thin film in the deposition target region.

[0075] Furthermore, the method for manufacturing a semiconductor device according to the embodiments may further include: a second purging step for removing the inhibitor remaining in the deposition target region after the second adsorption step; a third adsorption step for introducing the inhibitor into the deposition exclusion region after the second purging step; and a third purging step for removing the inhibitor remaining in the deposition target region after the third adsorption step.

[0076] The method for manufacturing a semiconductor device according to the embodiments can selectively form a thin film on a semiconductor substrate through the following process.

[0077] A method for forming a thin film on a semiconductor substrate may include the steps of preparing a semiconductor substrate, a first adsorption step, a first purging step, a second adsorption step, a second purging step, a third adsorption step, a third purging step, a deposition step, and a cleaning step.

[0078] First, a semiconductor substrate is provided.

[0079] like Figure 1 As shown, the semiconductor substrate (100) includes a support layer (110), a first material layer (120), and a second material layer (130).

[0080] The support layer (110) can be a silicon wafer. The support layer (110) can be disposed entirely on the semiconductor substrate (100).

[0081] A first material layer (120) is disposed on a support layer (110). The first material layer (120) can be formed on the support layer (110) by deposition. The first material layer (120) can be disposed next to a second material layer (130). Furthermore, the first material layer (120) can be disposed adjacent to the second material layer (130). The first material layer (120) can be in direct contact with the second material layer (130). The first material layer (120) and the second material layer (130) can be arranged on the same plane.

[0082] A second material layer (130) is disposed on a support layer (110). The second material layer (130) can be formed on the support layer (110) by deposition. The second material layer (130) can be disposed next to the first material layer (120). Furthermore, the second material layer (130) can be disposed adjacent to the first material layer (120). The second material layer (130) can be in direct contact with the first material layer (120). The second material layer (130) can be disposed on the same plane as the first material layer (120).

[0083] Furthermore, the semiconductor substrate (100) includes a deposition target region (GA) and a deposition exclusion region (NGA). The deposition target region (GA) may be a region on which a thin film is formed on the semiconductor substrate (100). The deposition target region (GA) may correspond to a region on which a first material layer (120) is disposed. The deposition target region (GA) may correspond to an upper surface region of the first material layer (120). The deposition target region (GA) may contain the first material layer (120).

[0084] The deposition exclusion region (NGA) can be a region on the semiconductor substrate (100) where no thin film is formed. The deposition exclusion region (NGA) can be arranged adjacent to the deposition target region (GA). The deposition exclusion region (NGA) can correspond to a region where the second material layer (130) is disposed. The deposition exclusion region (NGA) can correspond to the upper surface region of the second material layer (130). The deposition exclusion region (NGA) can contain the second material layer (130). A support layer (110) can be disposed across the deposition target region (GA) and the deposition exclusion region (NGA).

[0085] The first material layer (120) may comprise a silicon oxide film or a silicon nitride film. The second material layer (130) may comprise a titanium nitride film or a tungsten layer.

[0086] Subsequently, the semiconductor substrate (100) can be surface-treated with a diluted hydrogen fluoride (HF) solution. The surface treatment of the semiconductor substrate (100) with the hydrogen fluoride solution can be performed for approximately 10 seconds to approximately 120 seconds. Furthermore, the diluted hydrogen fluoride solution can be formed by dissolving hydrogen fluoride in deionized water at a concentration of approximately 0.1 wt% to approximately 5 wt%.

[0087] Therefore, the upper surfaces of the first material layer (120) and the second material layer (130) can be surface-treated with a diluted hydrogen fluoride solution. In particular, by surface treatment with a hydrogen fluoride solution, hydroxyl groups can be activated on the surface of the silicon oxide film. Furthermore, by surface treatment with a hydrogen fluoride solution, amine groups can be activated on the surface of the silicon nitride film.

[0088] Subsequently, an inhibitor is introduced onto the semiconductor substrate (100). The inhibitor can suppress surface reactions during the deposition process. The inhibitor can be a reaction inhibitor that suppresses the reaction.

[0089] Furthermore, the inhibitor can be selectively adsorbed onto the semiconductor substrate (100). Therefore, the inhibitor can selectively inhibit the deposition of thin films on the surface of the semiconductor substrate (100).

[0090] Specifically, inhibitors can be used in atomic layer deposition processes. Inhibitors can be compositions used in methods for manufacturing semiconductor devices. Inhibitors can be compositions used in semiconductor processes.

[0091] Inhibitors may contain fluorinated compounds. Inhibitors may be compositions containing fluorinated compounds. Inhibitors may include more than about 90 wt% of fluorinated compounds by weight. Inhibitors may include more than about 95 wt% of fluorinated compounds by weight. Inhibitors may include more than about 99 wt% of fluorinated compounds by weight. Inhibitors may contain only fluorinated compounds.

[0092] Fluorinated compounds can include ketones. Fluorinated compounds can be ketones.

[0093] Fluorine compounds can be represented by the following chemical formula 1.

[0094] [Chemical Formula 1] .

[0095] In the chemical formula 1, R1 is an alkyl group substituted with fluorine and containing 1 to 3 carbon atoms, and R2 is an alkenyl group substituted with fluorine and containing 1 to 6 carbon atoms.

[0096] R1 can be an alkyl group substituted with fluorine and containing 1 to 2 carbon atoms. R1 can contain 1 to 5 fluorine atoms.

[0097] In addition, R2 can be an alkenyl group containing 2 to 5 carbon atoms. R2 can contain 1 to 5 fluorine atoms.

[0098] Fluorine compounds can be represented by the following chemical formula 2.

[0099] [Chemical Formula 2] .

[0100] In the chemical formula 2, R1 is an alkyl group substituted with fluorine and containing 1 to 3 carbon atoms, R3 is an alkyl group substituted with fluorine and containing 1 to 3 carbon atoms, R4 is at least one group selected from hydrogen, fluorine, or an alkyl group substituted with fluorine and containing 1 to 3 carbon atoms, and R5 contains a hydroxyl group.

[0101] Fluorine compounds can include hexafluoroacetylacetone.

[0102] Fluorine compounds can be represented by the following chemical formula 3.

[0103] [Chemical Formula 3] .

[0104] Fluorine compounds can have molecular weights ranging from about 100 g / mol to about 500 g / mol.

[0105] Fluorine compounds have boiling points ranging from about 60°C to about 100°C at atmospheric pressure. Fluorine compounds have boiling points ranging from about 60°C to about 90°C at atmospheric pressure.

[0106] Subsequently, in order to introduce the inhibitor into the semiconductor substrate (100), the semiconductor substrate (100) can be placed in a vacuum deposition chamber. After the semiconductor substrate (100) is placed in the chamber, an inert gas is introduced into the chamber, and the interior of the chamber can be purged.

[0107] Inhibitors can be introduced into the chamber. For example... Figure 2 As shown, the inhibitor is introduced into the semiconductor substrate (100). Therefore, the first adsorption step can be performed.

[0108] Therefore, the inhibitor is selectively adsorbed onto the deposition exclusion region (NGA). Thus, a first reaction inhibition layer (210) is formed on the deposition exclusion region (NGA). The first reaction inhibition layer (210) is formed on the upper surface of the second material layer (130). The inhibitor can be adsorbed onto the upper surface of the second material layer (130) to form the first reaction inhibition layer (210).

[0109] In addition, a portion of the inhibitor (201) may remain in the deposition target area (GA).

[0110] That is, the inhibitor may be more adsorbed onto the titanium nitride film and tungsten layer, rather than onto the silicon oxide film and silicon nitride film. In other words, the area ratio of the inhibitor adsorbed on the titanium nitride film and tungsten layer can be greater than the area ratio of the inhibitor adsorbed on the silicon oxide film and silicon nitride film.

[0111] In the first adsorption step, the first adsorption process temperature can be about 50°C to about 120°C higher than the boiling point of the inhibitor. The first adsorption process temperature can be about 100°C to about 300°C.

[0112] Furthermore, in the first adsorption step, the first adsorption process time can be from about 5 seconds to about 30 seconds. In the first adsorption step, the first adsorption process time can be from about 5 seconds to about 20 seconds.

[0113] Furthermore, in the first adsorption step, the first adsorption process pressure can be from about 0.2 Torr to about 5 Torr. The first adsorption process pressure can be from about 0.3 Torr to about 3 Torr.

[0114] After the first adsorption step is completed, the first purging step can be performed.

[0115] In the first purging step, an inert gas, such as nitrogen, argon, or helium, is introduced into the chamber. In the first purging step, an inert gas, such as nitrogen, argon, or helium, is introduced into the chamber of the semiconductor substrate (100).

[0116] Therefore, as Figure 3 As shown, the inhibitor (201) remaining on the first material layer (120) is removed. That is, the inhibitor residue (201) is removed from the deposition target area (GA). Furthermore, the upper surface of the first material layer (120) can be fully exposed.

[0117] In the first purging step, the first purging process temperature can be about 50°C to about 120°C higher than the boiling point of the inhibitor. The first purging process temperature can be about 100°C to about 300°C.

[0118] Furthermore, in the first purging step, the first purging process time can be from about 5 seconds to about 60 seconds. In the first purging step, the first purging process time can be from about 2 seconds to about 60 seconds.

[0119] Then, the second adsorption step can be performed. After the first purging step is completed, the inhibitor can be reintroduced into the chamber.

[0120] like Figure 4 As shown, the inhibitor is introduced into the semiconductor substrate (100). Therefore, the second adsorption step can be performed.

[0121] Therefore, the inhibitor is additionally adsorbed onto the deposition exclusion region (NGA). Thus, a second reaction inhibition layer (220) is formed on the deposition exclusion region (NGA). The second reaction inhibition layer (220) is formed on the upper surface of the second material layer (130). The inhibitor can be adsorbed onto the upper surface of the second material layer (130) to form the second reaction inhibition layer (220).

[0122] In addition, a portion of the inhibitor (202) may remain in the deposition target area (GA).

[0123] In the second adsorption step, the second adsorption process temperature can be about 50°C to about 120°C higher than the boiling point of the inhibitor. The second adsorption process temperature can be about 100°C to about 300°C.

[0124] Furthermore, in the second adsorption step, the second adsorption process time can be from about 5 seconds to about 30 seconds. In the second adsorption step, the second adsorption process time can be from about 5 seconds to about 20 seconds.

[0125] Furthermore, in the second adsorption step, the second adsorption process pressure can be from about 0.2 Torr to about 5 Torr. Alternatively, the second adsorption process pressure can be from about 0.3 Torr to about 3 Torr.

[0126] After the second adsorption step is completed, the second purging step can be performed.

[0127] like Figure 5 As shown, in the second purging step, an inert gas such as nitrogen, argon, or helium is introduced into the chamber.

[0128] Therefore, the inhibitor (202) remaining on the first material layer (120) is removed. That is, the inhibitor residue (202) is removed from the deposition target area (GA). Furthermore, the upper surface of the first material layer (120) can be fully exposed.

[0129] In the second purging step, the second purging process temperature can be about 50°C to about 120°C higher than the boiling point of the inhibitor. The second purging process temperature can be about 100°C to about 300°C.

[0130] Furthermore, in the second purging step, the second purging process time can be from approximately 5 seconds to approximately 60 seconds. In the second purging step, the second purging process time can be from approximately 20 seconds to approximately 60 seconds.

[0131] Subsequently, the third adsorption step can be performed. After the second purging step is completed, the inhibitor can be reintroduced into the chamber.

[0132] like Figure 6 As shown, the inhibitor is introduced into the semiconductor substrate (100). Therefore, the third adsorption step can be performed.

[0133] Therefore, the inhibitor is additionally adsorbed onto the deposition exclusion region (NGA). Thus, a third reaction inhibition layer (200) is formed on the deposition exclusion region (NGA). The third reaction inhibition layer (200) is formed on the upper surface of the second material layer (130). The inhibitor can be adsorbed onto the upper surface of the second material layer (130) to form the third reaction inhibition layer (200). The third reaction inhibition layer (200) can cover the entire upper surface of the second material layer (130).

[0134] In addition, a portion of the inhibitor (203) may remain in the deposition target area (GA).

[0135] In the third adsorption step, the third adsorption process temperature can be approximately 50°C to approximately 120°C higher than the boiling point of the inhibitor. The third adsorption process temperature can be approximately 100°C to approximately 300°C.

[0136] Furthermore, in the third adsorption step, the third adsorption process time can be from approximately 5 seconds to approximately 30 seconds. In the third adsorption step, the third adsorption process time can be from approximately 5 seconds to approximately 20 seconds.

[0137] Furthermore, in the third adsorption step, the third adsorption process pressure can be from about 0.2 Torr to about 5 Torr. Alternatively, the third adsorption process pressure can be from about 0.3 Torr to about 3 Torr.

[0138] After the third adsorption step is completed, the third purging step can be performed.

[0139] like Figure 7As shown, in the third purging step, an inert gas such as nitrogen, argon or helium is introduced into the chamber.

[0140] Therefore, the inhibitor (203) remaining on the first material layer (120) is removed. That is, the inhibitor residue (203) is removed from the deposition target area (GA). Furthermore, the upper surface of the first material layer (120) can be fully exposed.

[0141] In the third purging step, the third purging process temperature can be about 50°C to about 120°C higher than the boiling point of the inhibitor. The third purging process temperature can be about 100°C to about 300°C.

[0142] Furthermore, in the third purging step, the third purging process time can be from approximately 5 seconds to approximately 60 seconds. In the third purging step, the third purging process time can be from approximately 20 seconds to approximately 60 seconds.

[0143] Therefore, a reaction inhibition layer (200) can be uniformly formed on the deposition exclusion region (NGA).

[0144] Subsequently, the deposition process described above is performed. For example... Figure 8 As shown, a thin film (300) is formed in the deposition target area (GA). The thin film (300) can be an oxide film, a nitride film, or a metal film. Furthermore, the thin film (300) can be formed by an atomic layer formation process.

[0145] To form the thin film (300), a precursor is introduced into the chamber. To form the thin film (300), a precursor is introduced into the semiconductor substrate (100). The precursor may include a first precursor and a second precursor.

[0146] The first precursor may include diisopropylaminosilane or diethylaminotrimethylsilane.

[0147] Furthermore, the second precursor may include an oxygen-containing oxygen source. The precursor may also include ozone gas. That is, silane and ozone can react with each other to form a thin film (300).

[0148] The first and second precursors react in the deposition target region (GA) to form a thin film, but do not react in the reaction inhibition layer (200). That is, the first and second precursors react on the upper surface of the first material layer (120), but do not react on the upper surface of the reaction inhibition layer (200).

[0149] That is, the first precursor and the second precursor are alternately introduced into the deposition target area (GA) to form a thin film (300).

[0150] Therefore, the thin film (300) can be formed only in the deposition target area (GA).

[0151] Furthermore, the precursor can include metals such as ruthenium. Therefore, a thin metal film can be formed in the deposition target area (GA).

[0152] Atomic layer deposition (ALD) processes can be performed approximately 30 to approximately 500 times.

[0153] Next, a cleaning process is performed. For example... Figure 9 As shown, stripping gas is injected into the chamber, and the reaction inhibition layer (200) can be removed. The stripping gas can be hydrogen fluoride gas.

[0154] In the cleaning process, stripping gas can be supplied to the chamber for approximately 10 to 60 seconds.

[0155] In addition, the cleaning process may also include the process of purging the interior of the chamber.

[0156] In addition, the cleaning process may include immersing the semiconductor substrate (100) in a stripping solution. The stripping solution may contain a hydrogen fluoride solution.

[0157] Inhibitors can alter the surface properties of the deposition exclusion region (NGA). Inhibitors can also alter the surface properties of the deposition exclusion region (NGA) without significantly changing the surface properties of the deposition target region (GA).

[0158] The inhibitor can have a first increment in the water contact angle. The first increment in the water contact angle can be measured by the following measurement method 1.

[0159] [Measurement Method 1] 1) The surface of the first semiconductor substrate containing the titanium nitride film is surface-treated using a hydrogen fluoride solution. The hydrogen fluoride solution may contain 99.9 wt% deionized water and 0.1 wt% hydrogen fluoride. The first semiconductor substrate may be immersed for approximately 30 seconds.

[0160] 2) At a temperature of approximately 150°C and a process pressure of 1 Torr, an inhibitor was deposited on a surface-treated titanium nitride film for up to 30 seconds.

[0161] 3) The first water contact angle of the titanium nitride film surface-treated with hydrogen fluoride was measured at room temperature. The first water contact angle was measured before the inhibitor was deposited onto the surface-treated titanium nitride film.

[0162] 4) The second water contact angle of the surface on which the inhibitor was deposited was measured at room temperature.

[0163] 5) The first increment of the water contact angle is the value obtained by subtracting the first water contact angle from the second water contact angle.

[0164] The first increment of the water contact angle can be derived from Equation 1 below.

[0165] [Equation 1] The first increment of the water contact angle = the second water contact angle - the first water contact angle.

[0166] The first increment of the water contact angle can exceed approximately 20°. The first increment of the water contact angle can exceed approximately 25°. The first increment of the water contact angle can exceed approximately 30°. The first increment of the water contact angle can exceed approximately 35°. The first increment of the water contact angle can exceed approximately 40°. The maximum value of the first increment of the water contact angle can be approximately 80°.

[0167] The first water contact angle can be from about 20° to about 50°. The first water contact angle can be from about 25° to about 45°. The first water contact angle can be from about 25° to about 40°.

[0168] The second water contact angle can be from about 50° to about 85°. The second water contact angle can be from about 55° to about 80°. The second water contact angle can be from about 60° to about 75°.

[0169] The first semiconductor substrate can be formed using a plasma-enhanced chemical vapor deposition process.

[0170] To form the first semiconductor substrate, titanium-based and nitrogen-based precursors are introduced onto the silicon wafer, and a titanium nitride film can be formed.

[0171] The process temperature for forming the titanium nitride film can be from about 400°C to about 500°C. In addition, the titanium-based precursor can be titanium tetrachloride (TiCl4), and the nitrogen-based precursor can be ammonia (NH3) or nitrogen (N2).

[0172] Titanium nitride films can contain TiN as the main component.

[0173] The inhibitor can have a second increment in the water contact angle. The second increment in the water contact angle described above can be measured by the following measurement method 2.

[0174] [Measurement Method 2] 1) The surface of the second semiconductor substrate containing the tungsten layer is surface-treated using a hydrogen fluoride solution. The hydrogen fluoride solution may contain 99.9 wt% deionized water and 0.1 wt% hydrogen fluoride. The second semiconductor substrate may be immersed for approximately 30 seconds.

[0175] 2) At a temperature of approximately 150°C and a process pressure of 1 Torr, an inhibitor was deposited on a surface-treated tungsten layer for up to 30 seconds.

[0176] 3) The third water contact angle of the tungsten layer surface-treated with hydrogen fluoride was measured at room temperature. The third water contact angle was measured before the inhibitor was deposited onto the surface-treated tungsten layer.

[0177] 4) The fourth water contact angle of the surface of the deposition inhibitor was measured at room temperature. 5) The second increment of the water contact angle was obtained by subtracting the third water contact angle from the fourth water contact angle.

[0178] The second increment of the water contact angle can be derived from Equation 2 below.

[0179] [Equation 2] The second increment of the water contact angle = fourth water contact angle - third water contact angle.

[0180] The second increment of the water contact angle can exceed approximately 20°. The second increment of the water contact angle can exceed approximately 25°. The second increment of the water contact angle can exceed approximately 30°. The second increment of the water contact angle can exceed approximately 35°. The second increment of the water contact angle can exceed approximately 40°. The maximum value of the second increment of the water contact angle can be approximately 80°.

[0181] The third water contact angle can be from about 10° to about 40°. The third water contact angle can be from about 15° to about 35°. The third water contact angle can be from about 10° to about 30°.

[0182] The fourth water contact angle can be from about 50° to about 85°. The fourth water contact angle can be from about 55° to about 80°. The fourth water contact angle can be from about 60° to about 75°.

[0183] The second semiconductor substrate can be formed by a sputtering process. To form the second semiconductor substrate, a tungsten metal layer can be formed on a silicon wafer using a tungsten metal sputtering target.

[0184] Inhibitors can have a third increment in the water contact angle. This third increment in the water contact angle can be measured using the following measurement method 3.

[0185] [Measurement Method 3] 1) The surface of the third semiconductor substrate containing the silicon nitride film is surface-treated using a hydrogen fluoride solution. The hydrogen fluoride solution may contain 99.9 wt% deionized water and 0.1 wt% hydrogen fluoride. The third semiconductor substrate may be immersed for approximately 30 seconds.

[0186] 2) At a temperature of approximately 150°C and a process pressure of 1 Torr, inhibitors were deposited on a surface-treated silicon nitride film for up to 30 seconds.

[0187] 3) The fifth water contact angle of the silicon nitride film surface-treated with hydrogen fluoride was measured at room temperature. The fifth water contact angle was measured before the inhibitor was deposited onto the surface-treated silicon nitride film.

[0188] 4) The sixth water contact angle of the surface with the deposited inhibitor was measured at room temperature.

[0189] 5) The third increment of the water contact angle is the value obtained by subtracting the fifth water contact angle from the sixth water contact angle.

[0190] The third increment of the water contact angle can be derived from Equation 3 below.

[0191] [Equation 2] The third increment of the water contact angle = the sixth contact angle - the fifth contact angle.

[0192] The third increment of the water contact angle can be from approximately -20° to approximately 20°. The third increment of the water contact angle can be from approximately -15° to approximately 15°. The third increment of the water contact angle can be from approximately -10° to approximately 10°.

[0193] The fifth contact angle can be from about 20° to about 60°. The fifth contact angle can be from about 25° to about 50°. The fifth contact angle can be from about 30° to about 45°.

[0194] The sixth contact angle can be from about 20° to about 60°. The sixth contact angle can be from about 25° to about 50°. The sixth contact angle can be from about 30° to about 45°.

[0195] The third semiconductor substrate can be formed using a chemical vapor deposition process.

[0196] Chemical vapor deposition processes can be selected from atmospheric pressure chemical vapor deposition (APCVD), low pressure chemical vapor deposition (LPCVD), or plasma-enhanced chemical vapor deposition (PECVD).

[0197] To form a third semiconductor substrate, silicon-based and nitrogen-based precursors can be introduced onto a silicon wafer. A silicon nitride film can then be formed using these precursors via chemical vapor deposition.

[0198] To form a third semiconductor substrate, when performing an atmospheric pressure chemical vapor deposition process, the process temperature is approximately 900°C to approximately 1000°C. The silicon-based precursor can be silane, and the nitrogen-based precursor can be ammonia. To form a third semiconductor substrate, when performing a low-pressure chemical vapor deposition process, the process temperature is approximately 700°C to approximately 900°C. The silicon-based precursor can be dichlorosilane, and the nitrogen-based precursor can be ammonia.

[0199] To form the third semiconductor substrate, when performing a plasma-enhanced chemical vapor deposition process, the process temperature is from about 250°C to about 350°C, the silicon-based precursor can be silane, and the nitrogen-based precursor can be ammonia.

[0200] Silica films can contain Si3N4 as the main component.

[0201] Inhibitors can have a fourth increment in the water contact angle. This fourth increment in the water contact angle can be measured using the following measurement method 4.

[0202] [Measurement Method 4] 1) The surface of the fourth semiconductor substrate containing the silicon oxide film is surface-treated using a hydrogen fluoride solution. The hydrogen fluoride solution may contain 99.9 wt% deionized water and 0.1 wt% hydrogen fluoride. The fourth semiconductor substrate may be immersed for approximately 30 seconds.

[0203] 2) At a temperature of approximately 150°C and a process pressure of 1 Torr, inhibitors were deposited on a surface-treated silicon oxide film for up to 30 seconds.

[0204] 3) The seventh contact angle of the silicon oxide film surface-treated with hydrogen fluoride was measured at room temperature. The seventh contact angle was measured before the inhibitor was deposited onto the surface-treated silicon oxide film.

[0205] 4) The eighth contact angle of the surface with the deposited inhibitor was measured at room temperature.

[0206] 5) The fourth increment of the water contact angle is the value obtained by subtracting the seventh contact angle from the eighth contact angle.

[0207] The fourth increment of the water contact angle can be derived from Equation 4 below.

[0208] [Equation 41] The fourth increment of the water contact angle = the eighth contact angle - the seventh contact angle.

[0209] The fourth increment of the water contact angle can be from about 0° to about 40°. The fourth increment of the water contact angle can be from about 5° to about 40°. The fourth increment of the water contact angle can be from about 10° to about 40°.

[0210] The seventh contact angle can be from about 0° to about 30°. The seventh contact angle can be from about 3° to about 25°. The seventh contact angle can be from about 0° to about 15°.

[0211] The eighth contact angle can be from about 10° to about 50°. The eighth contact angle can be from about 10° to about 45°. The eighth contact angle can be from about 15° to about 45°.

[0212] The fourth semiconductor substrate can be formed by chemical vapor deposition.

[0213] Chemical vapor deposition processes can be selected from atmospheric pressure chemical vapor deposition (APCVD), low pressure chemical vapor deposition (LPCVD), or plasma-enhanced chemical vapor deposition (PECVD).

[0214] To form a fourth semiconductor substrate, silicon-based precursors and oxygen-based precursors can be introduced onto a silicon wafer. A silicon oxide film can then be formed using the precursors via chemical vapor deposition.

[0215] When performing atmospheric pressure chemical vapor deposition to form a fourth semiconductor substrate, the process temperature is from about 200°C to about 500°C, the silicon-based precursor can be silane, and the oxygen-based precursor can be oxygen.

[0216] To form the fourth semiconductor substrate, when performing a low-pressure chemical vapor deposition process, the process temperature is from about 800°C to about 1000°C. The silicon-based precursor can be dichlorosilane, and the oxygen-based precursor can be oxygen.

[0217] To form the fourth semiconductor substrate, when performing a plasma-enhanced chemical vapor deposition process, the process temperature is from about 200°C to about 300°C. The silicon-based precursor can be dichlorosilane, and the oxygen-based precursor can be nitrous oxide (N2O).

[0218] Silica films can contain SiO2 as the main component.

[0219] The inhibitor may comprise a fluorinated compound as described above, and may have a first increment in the water contact angle within the range described above.

[0220] Therefore, the inhibitor is temporarily adsorbed onto the titanium nitride film, thereby effectively preventing the film from depositing on the titanium nitride film.

[0221] In particular, since semiconductor process compositions such as the aforementioned inhibitors contain fluorine, they can effectively block the chemical reaction between the precursor used to form the thin film and the titanium nitride film.

[0222] Furthermore, semiconductor process compositions such as the aforementioned inhibitors are effectively adsorbed onto the tungsten layer and can have a second increment of more than about 20° of water contact angle.

[0223] Therefore, semiconductor process compositions such as the aforementioned inhibitors are temporarily adsorbed onto the tungsten layer, thereby effectively preventing thin films from depositing on the tungsten layer.

[0224] Furthermore, the inhibitor may comprise a ketone compound containing the fluorine. Additionally, the inhibitor may contain functional groups such as hydroxyl groups.

[0225] Therefore, ketone groups and / or hydroxyl groups are effectively adsorbed onto the deposition exclusion region (NGA), and fluorine can be exposed to the surface of the deposition barrier layer formed by the inhibitor.

[0226] Therefore, inhibitors can effectively protect the deposition exclusion region (NGA) from the influence of precursors. Consequently, thin films can be formed in the deposition target region (GA) with a high selectivity.

[0227] Furthermore, fluorinated compounds can have molecular weights and boiling points within the ranges described above.

[0228] Therefore, even at low temperatures, the inhibitor can be easily introduced into the semiconductor substrate (100). Thus, the inhibitor can be deposited as a thin and uniform barrier layer in the deposition exclusion region (NGA).

[0229] Furthermore, the inhibitor does not adsorb onto the silicon oxide film or adsorbs only weakly. Therefore, the inhibitor does not form a deposition barrier layer on the silicon oxide film. Thus, the inhibitor can selectively deposit the target film only on the silicon oxide film.

[0230] Furthermore, the method for manufacturing a semiconductor device according to an embodiment includes a first purging step located between the first adsorption step and the second adsorption step. That is, the method for manufacturing a semiconductor device according to an embodiment introduces an inhibitor stepwise into a deposition exclusion region (NGA) to form a reaction inhibition layer stepwise.

[0231] Therefore, the method for manufacturing a semiconductor device according to the embodiment can effectively remove inhibitor residues from the deposition target region (GA) while forming a thin and uniform reaction inhibition layer in the deposition exclusion region (NGA).

[0232] Furthermore, the method for manufacturing a semiconductor device according to the embodiment can utilize inhibitors to sufficiently extend the process time of the first purging step. In this case, since the inhibitors are firmly bonded to the deposited exclusion region (NGA), the first purging step can have a sufficiently long process time.

[0233] Therefore, the method for manufacturing a semiconductor device according to the embodiment can form a thin film in the deposition target region (GA) with an improved selectivity.

[0234] Furthermore, the method for manufacturing a semiconductor device according to the embodiments can perform a first adsorption step and a second adsorption step at an appropriate process temperature, and a first purging step at an appropriate process temperature.

[0235] Therefore, the method for manufacturing a semiconductor device according to the embodiments can effectively remove inhibitor residues from the deposition target region (GA) while forming a thin and uniform reaction inhibition layer in the deposition exclusion region (NGA). Furthermore, the features, structures, effects, etc., described in the above embodiments are included in at least one embodiment of the present invention and are not necessarily limited to one embodiment. Moreover, the features, structures, effects, etc., exemplified in each embodiment can be combined or modified by those skilled in the art and implemented in other embodiments. Therefore, details related to these combinations and modifications should be interpreted as being included within the scope of the present invention.

[0236] Although the description focuses on implementation methods, these are merely examples and do not limit the invention. Those skilled in the art will understand that various modifications and applications not illustrated above can be made without departing from the essential characteristics of the implementation methods. For example, each component specifically shown in the implementation methods can be modified and implemented. Furthermore, differences associated with these modifications and applications should be interpreted as being included within the scope of the invention as defined by the appended claims.

[0237] Preparation Example Silicon wafer #1: A silicon wafer on which a titanium nitride film is formed. Silicon wafer #2: A silicon wafer on which a tungsten layer is formed. Silicon wafer #3: A silicon wafer on which a silicon nitride film is formed. Silicon wafer #4: A silicon wafer on which a silicon oxide film is formed. Hydrogen fluoride solution: A solution of hydrogen fluoride (0.1 wt%) dissolved in deionized water. Inhibitor: Hexafluoroacetylacetone (Sigma-Aldrich product) Precursor: 1,2-bis(diisopropylamino)disilane (BDIPADS) Preparation Example 1 Silicon wafer #1 was immersed in a hydrogen fluoride solution for approximately 30 seconds. Then, silicon wafer #1 was placed in a chamber (CN1, Atomic Classic), and argon gas was introduced into the chamber for approximately 30 seconds for a purging process. Subsequently, an inhibitor was introduced into the chamber for approximately 30 seconds at a process temperature of approximately 150°C and a process pressure of approximately 1 Torr. This process produced silicon wafer #1 that underwent surface treatment with an inhibitor.

[0238] In addition, silicon wafers #2, #3, and #4 underwent the same process as described above.

[0239] Preparation Example 2 As shown in Table 1 below, the process pressure was adjusted to 0.5 Torr, and the remaining processes were carried out in the same manner as in Preparation Example 1.

[0240] Preparation Example 3 Silicon wafer #1 was immersed in a hydrogen fluoride solution for approximately 30 seconds. Then, silicon wafer #1 was placed in a chamber (CN1, Atomic Classic product), and argon gas was introduced into the chamber for approximately 30 seconds for a purging process. Subsequently, at a process temperature of approximately 150°C and a process pressure of approximately 0.5 Torr, an inhibitor was introduced into the chamber for approximately 3 seconds for a first adsorption process. Argon gas was then introduced into the chamber for approximately 30 seconds for a first purging process. Subsequently, at a process pressure of approximately 0.5 Torr and a process temperature of approximately 150°C, an inhibitor was introduced into the chamber for approximately 3 seconds for a second adsorption process. Argon gas was then introduced into the chamber for approximately 30 seconds for a second purging process. Subsequently, at a process pressure of approximately 0.5 Torr and a process temperature of approximately 150°C, an inhibitor was introduced into the chamber for approximately 3 seconds for a third adsorption process. Argon gas was then introduced into the chamber for approximately 30 seconds for a third purging process.

[0241] In addition, silicon wafers #2, #3, and #4 underwent the same process as described above.

[0242] Preparation Examples 4 to 9 As shown in Tables 1 and 2 below, the process time and temperature were controlled in each adsorption process and each purging process, and the remaining processes were carried out in the same manner as in Preparation Example 3.

[0243] Table 1

[0244] Table 2

[0245] Example The silicon wafer prepared in Preparation Example 7 was arranged in a chamber. Then, a precursor was introduced into the chamber for 2 seconds at a temperature of approximately 150°C and a pressure of approximately 0.35 Torr. Argon gas was then introduced into the chamber for approximately 30 seconds. Ozone gas was then introduced into the chamber for approximately 30 seconds. Argon gas was then introduced into the chamber for approximately 60 seconds to form an atomic layer. The atomic layer formation process was repeated 60 times.

[0246] Comparative example Silicon wafers that had undergone surface treatment with a hydrogen fluoride solution but not with an inhibitor were used. The remaining processes were performed in the same manner as in this embodiment.

[0247] Evaluation example 1. Measurement of water contact angle Three points were randomly selected on the surface of the silicon wafer prepared in the preparation example, and the water contact angle at these points was measured at room temperature using a surface energy meter (FEMTOFAB, SDL200TEZD). Furthermore, the water contact angle was derived by averaging the values ​​measured at each point.

[0248] 2. Thickness Measurement The thickness of the films prepared in the examples and comparative examples was measured at two points using an ellipsometer (Nano View Co., MG-1000). The film thickness was derived from the average of the measured values.

[0249] The contact angles of silicon wafers surface-treated with hydrogen fluoride solution were measured as shown in Table 3 below.

[0250] Table 3

[0251] As shown in Table 4 below, the contact angle of the silicon wafers manufactured by the preparation example was measured.

[0252] Table 4

[0253] As shown in Table 5 below and Figures 10 to 13 As shown, the thickness of the films deposited in the examples and comparative examples was measured.

[0254] Table 5

[0255] As described in Tables 3 to 5 above, the method for manufacturing a semiconductor device according to the embodiments is able to form a desired film with improved selectivity.

Claims

1. A composition for semiconductor processing, said composition comprising: a fluorine-containing compound, in, The first increment of the water contact angle measured by the following measurement method 1 exceeds 20°: [Measurement Method 1] 1) The surface of the semiconductor substrate containing the titanium nitride film is treated with hydrogen fluoride; 2) A semiconductor process composition was deposited on a surface-treated titanium nitride film for up to 30 seconds at a temperature of 150°C and a process pressure of 1 Torr. 3) The first water contact angle of the titanium nitride film treated with hydrogen fluoride was measured at room temperature; 4) The second water contact angle of the surface on which the semiconductor process composition is deposited is measured at room temperature; 5) The first increment of the water contact angle is the value obtained by subtracting the first water contact angle from the second water contact angle.

2. The composition for semiconductor processing according to claim 1, wherein, The second increment of the water contact angle measured by the following measurement method 2 exceeds 20°: [Measurement Method 2] 1) The surface of a semiconductor substrate containing a tungsten layer is treated with hydrogen fluoride; 2) A semiconductor process composition was deposited on a surface-treated tungsten layer for up to 30 seconds at a temperature of 150°C and a process pressure of 1 Torr. 3) The third water contact angle of the tungsten layer, which has been surface-treated with hydrogen fluoride, was measured at room temperature; 4) The fourth water contact angle of the surface on which the semiconductor process composition is deposited is measured at room temperature; 5) The second increment of the water contact angle is the value obtained by subtracting the third water contact angle from the fourth water contact angle.

3. The composition for semiconductor processing according to claim 1, wherein, The fluorinated compounds include ketone compounds.

4. The composition for semiconductor processing according to claim 1, wherein, The fluorine-containing compound is represented by the following chemical formula 1: [Chemical Formula 1] In the chemical formula 1, R1 is an alkyl group substituted with fluorine and having 1 to 3 carbon atoms, and R2 is an alkenyl group substituted with fluorine and having 1 to 6 carbon atoms.

5. The composition for semiconductor processing according to claim 1, wherein, The fluorine-containing compound is represented by the following chemical formula 2: [Chemical Formula 2] In the chemical formula 2, R1 is an alkyl group substituted with fluorine and having 1 to 3 carbon atoms, R3 is an alkyl group substituted with fluorine and having 1 to 3 carbon atoms, R4 is at least one group selected from hydrogen, fluorine, or an alkyl group substituted with fluorine and having 1 to 3 carbon atoms, and R5 contains a hydroxyl group.

6. The composition for semiconductor processing according to claim 1, wherein, The fluorinated compound includes hexafluoroacetylacetone.

7. The composition for semiconductor processing according to claim 1, wherein, The fluorinated compound has a molecular weight of 100 g / mol to 500 g / mol.

8. The composition for semiconductor processing according to claim 1, wherein, The semiconductor process composition has a boiling point of 60°C to 100°C at atmospheric pressure.

9. The composition for semiconductor processing according to claim 1, wherein, The eighth water contact angle, measured by the following measurement method 3, is 20° to 50°: [Measurement Method 3] 1) The surface of a semiconductor substrate containing a silicon oxide film is treated with hydrogen fluoride; 2) A semiconductor process composition was deposited on a surface-treated silicon oxide film for up to 30 seconds at a temperature of 150°C and a process pressure of 1 Torr. 3) The eighth water contact angle was measured at room temperature on a silicon oxide film surface on which a semiconductor process composition was deposited.

10. A method for manufacturing a semiconductor device, the method comprising: A step of preparing a semiconductor substrate, wherein the semiconductor substrate includes a deposition target region and a deposition exclusion region; A first adsorption step is performed in which a fluorine-containing inhibitor is introduced onto the semiconductor substrate, and the fluorine-containing inhibitor is selectively adsorbed onto the deposition exclusion region. A first purging step, wherein the first purging step removes the inhibitor remaining in the deposition target area; The second adsorption step, which is performed after the first purging step, introduces the inhibitor into the deposition removal area. as well as The step of forming a thin film in the target deposition area.

11. The method for manufacturing a semiconductor device according to claim 10, the method further comprising: The second purging step is used to remove the inhibitor remaining in the deposition target area after the second adsorption step. A third adsorption step, wherein the third adsorption step is used to introduce the inhibitor into the deposition removal area after the second purging step; as well as The third purging step is used to remove the inhibitors remaining in the deposition target area after the third adsorption step.

12. The method for manufacturing a semiconductor device according to claim 10, wherein, The deposition target area contains a silicon oxide film or a silicon nitride film, and the deposition exclusion area contains a titanium nitride film or a tungsten layer.

13. The method for manufacturing a semiconductor device according to claim 10, wherein, In the first purging step, an inert gas is introduced into the semiconductor substrate, and the process time of the first purging step is 1.5 to 4.0 times that of the first adsorption step.

14. The method for manufacturing a semiconductor device according to claim 13, wherein, In the first adsorption step and the second adsorption step, the adsorption process temperature is 50°C to 120°C higher than the boiling point of the inhibitor.

15. The method for manufacturing a semiconductor device according to claim 14, wherein, In the first purging step, the purging process temperature is 70°C to 200°C higher than the boiling point of the inhibitor.

16. A deposition inhibitor composition for semiconductor processes, said deposition inhibitor composition comprising a fluorine compound represented by the following chemical formula 1, said deposition inhibitor composition being adsorbed onto a titanium nitride film or a tungsten layer: [Chemical Formula 1] In the chemical formula 1, R1 is an alkyl group substituted with fluorine and having 1 to 3 carbon atoms, and R2 is an alkenyl group substituted with fluorine and having 1 to 6 carbon atoms.

17. The deposition inhibitor composition for semiconductor processes according to claim 16, wherein the deposition inhibitor composition for semiconductor processes comprises a fluorine compound represented by the following chemical formula 2: [Chemical Formula 2] In the chemical formula 2, R1 is an alkyl group substituted with fluorine and having 1 to 3 carbon atoms, R3 is an alkyl group substituted with fluorine and having 1 to 3 carbon atoms, R4 is at least one group selected from hydrogen, fluorine, or an alkyl group substituted with fluorine and having 1 to 3 carbon atoms, and R5 contains a hydroxyl group.

18. The deposition inhibitor composition for semiconductor processes according to claim 16, wherein the deposition inhibitor composition for semiconductor processes comprises a fluorine compound represented by the following chemical formula 3: [Chemical Formula 3] 。 19. The deposition inhibitor composition for semiconductor processes according to claim 16, wherein, The fluorine compounds have a molecular weight of 100 g / mol to 500 g / mol.

20. The deposition inhibitor composition for semiconductor processes according to claim 16, wherein, The fluorine compounds have boiling points of 60°C to 100°C at atmospheric pressure.

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