Method of manufacturing an ultrathin insulating layer with reduced leakage current density

By introducing hydrogen plasma treatment and multiple ALD cycles into the ALD process, the growth of the thin film can be precisely controlled, solving the problems of leakage current density and interface thermal resistance of ultrathin insulating layers. This achieves efficient leakage current suppression and heat dissipation improvement, and is suitable for surface passivation layers of semiconductors, integrated circuits, optoelectronics and microelectromechanical components.

CN122128688APending Publication Date: 2026-06-02陈敏璋

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
陈敏璋
Filing Date
2025-12-01
Publication Date
2026-06-02

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Abstract

A method of fabricating an ultra-thin insulating layer with reduced leakage current density is accomplished by a plurality of atomic layer deposition cycles, and at a predetermined point in time during each cycle of the atomic layer deposition process, an in-situ hydrogen plasma treatment step is introduced. The hydrogen plasma treatment step is alternatively performed after the precursor is adsorbed on the material layer of the material structure and before the reactant is introduced into the reaction chamber, or after the reactant is introduced into the reaction chamber.
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Description

Technical Field

[0001] This invention relates to a method for manufacturing an ultrathin insulating layer, and more particularly to a method for manufacturing an ultrathin insulating layer with excellent film quality and extremely low leakage current density using a modified atomic layer deposition (ALD) process. The ultrathin insulating layer manufactured according to the method of this invention can be formed of metal oxides or metal nitrides, and can be applied to the dielectric layer of semiconductor devices, or as a surface passivation layer for devices such as integrated circuit devices, optoelectronic devices, and microelectromechanical systems (MEMS) that generate heat. Background Technology

[0002] Metal oxides (e.g., silicon dioxide (SiO2)) and metal nitrides (e.g., silicon nitride (SiN)) x High-performance insulating layers have been widely used as dielectric layers in semiconductor devices and as surface passivation layers in integrated circuit devices, optoelectronic devices, microelectromechanical systems (MEMS) devices, and other devices that generate heat. With the development of these high-performance devices, their operating power has also increased. Therefore, there is an urgent need for high-performance insulating layers in the field of thermal management for these devices.

[0003] When heat flows through the interface of different materials, the interfacial thermal resistance (R) int Interfacial thermal resistance (R) can impede heat transfer. int The larger the interfacial thermal resistance (R), the more difficult the heat transfer across the interface, which leads to a decrease in overall thermal conductivity. For nanoscale insulating films, the interfacial thermal resistance (R) is... int The overall thermal conductivity (Gb) of a thin film is one of the dominant factors in thermal transfer characteristics. total ) and overall thermal resistance (R) total The thermal conductivity (k) and interfacial thermal resistance (R) of a material are determined by its intrinsic thermal conductivity (k) and interfacial thermal resistance (R). int The two factors work together, and their combination determines the final heat transfer behavior:

[0004] Equation (1)

[0005] Where A is the cross-sectional area, R int1 With R int2 The interfacial thermal resistances R of interface 1 and interface 2 are respectively. film This represents the thermal resistance of the thin film itself. Based on the above analysis, it can be seen that the smaller the film thickness d, the higher the interfacial thermal resistance (R). int1 R int2 ) on the overall thermal resistance (R) of the thin film totalThe greater the contribution of ), the lower the overall thermal resistance (R). total The overall thermal conductivity of AlN films is primarily controlled by interfacial thermal resistance. Therefore, reducing the film thickness can effectively improve the overall thermal conductivity of the film. In the prior art, the inventors of this invention compared the overall thermal conductivity of AlN films manufactured by ALD (AlD AlN film) and AlN films manufactured by atomic layer annealing (ALA AlN film). The ALA process involves introducing in-situ He / Ar plasma treatment after each ALD cycle to anneal the atomic-level AlN. The results showed that the crystallinity of the ALA AlN film was superior to that of the ALD AlN film. These thermal conductivity studies of the two AlN films confirm that when the film thickness is extremely thin (less than 10 nanometers), its overall thermal conductivity is mainly controlled by interfacial thermal resistance, while the quality of the film's crystallinity has a relatively small impact on the overall thermal conductivity. Therefore, reducing the thickness of the insulating layer as much as possible without sacrificing electrical insulation is an effective way to improve overall heat dissipation efficiency.

[0006] Furthermore, with the continuous evolution of Moore's Law, the size of semiconductor devices is constantly shrinking, and the degree of integration is increasing. In order to maintain effective control of transistor channels and suppress short channel effects at smaller sizes, the thickness of the gate dielectric layer must be reduced accordingly. However, when the physical thickness of the traditional silicon dioxide (SiO2)-based gate dielectric layer is reduced to less than a few nanometers, it will lead to huge gate leakage current due to the quantum tunneling effect, which will cause a sharp increase in device power consumption and a decrease in performance, becoming a physical bottleneck for device miniaturization.

[0007] To address this challenge, materials with high dielectric constants (high-k), such as hafnium oxide (HfO2) and zirconium oxide (ZrO2), have been extensively studied and used to replace traditional silicon dioxide. This allows for maintaining a larger physical thickness with the same capacitance equivalent thickness (CET), thereby suppressing leakage current. Atomic layer deposition (ALD) technology, due to its unique self-limiting surface chemical reaction mechanism, can precisely control the thickness, composition, and uniformity of thin films at the atomic scale and possesses excellent three-dimensional conformal coverage, making it the mainstream technology for depositing high-quality nanoscale high-k dielectric layers.

[0008] Furthermore, taking integrated circuit components as an example, a typical surface passivation layer is a two-layer structure of silicon dioxide / silicon nitride. Looking outwards from the top metal layer: the first layer (closest to the metal interconnects): SiO2 manufactured using plasma-enhanced chemical vapor deposition (PECVD), with a thickness of approximately several hundred nanometers to 1 micrometer, serves to provide good dielectric isolation. The second layer (outermost layer): Si3N4 manufactured using PECVD, with a thickness of approximately several hundred nanometers to 1 micrometer, serves as a protective layer to prevent impurities such as moisture and sodium ions from entering the wafer. Clearly, a typical surface passivation layer is a material layer with extremely high thermal resistance, unless the surface passivation layer is reduced to an extremely thin layer.

[0009] However, whether used as a gate dielectric layer in semiconductor devices or as a surface passivation layer in integrated circuits, optoelectronic devices, microelectromechanical systems (MEMS) devices that generate heat, the physical thickness of the insulating layer shrinks to the nanometer scale, presenting a significant challenge of drastically increased leakage current density. Traditional ALD processes themselves still have several limitations. For example, after the organometallic precursors used in the process undergo chemisorption, their residual organic ligands often form steric hindrances, hindering the reaction sites of subsequent reactants, leading to incomplete chemical reactions and introducing defects such as oxygen vacancies and carbon residues into the film. These defects become the main pathways for leakage current. Secondly, while lower ALD process temperatures (typically below 300°C) help avoid exceeding the thermal budget, they also limit the migration ability of surface atoms during film deposition, resulting in insufficient film density.

[0010] In summary, the existing ALD process urgently needs further improvement to fundamentally enhance the internal structure and material quality of the ultrathin insulating layer, enabling it to more effectively suppress leakage current to meet the needs of next-generation semiconductor devices, and also reduce the thickness of the insulating layer to improve the overall heat dissipation efficiency of the ultrathin insulating layer. Summary of the Invention

[0011] One object of the present invention is to solve the problems faced by the prior art and provide a method that can effectively reduce the leakage current density of ultrathin insulating layers. The method according to the present invention can precisely control the growth mechanism of the thin film in a layer-by-layer and in-situ manner during the atomic layer deposition process, thereby significantly improving the film quality and greatly suppressing leakage current.

[0012] Another objective of this invention is to provide a highly flexible and universal process framework. The method according to this invention can be applied to various insulating materials such as metal oxides and metal nitrides, and different electrical properties, such as leakage current density, interface quality, reliability, and frequency dispersion, can be optimized by adjusting process parameters.

[0013] A method for fabricating an ultrathin insulating layer on a material layer of a material structure according to a preferred embodiment of the present invention is performed by multiple atomic layer deposition (ALD) cycles. The material structure is placed in a reaction chamber. Each ALD cycle includes the following steps: (a) introducing at least one first gas pulse into the reaction chamber, the at least one gas pulse containing at least one precursor, to adsorb the precursor onto the material layer of the material structure, wherein the precursor contains a metal element; (b) introducing a flushing gas into the reaction chamber; (c) introducing a second gas pulse into the reaction chamber to react with the precursor already adsorbed on the material layer to form the atomic-layer ultrathin insulating layer, wherein the second gas pulse contains reactants; (d) introducing the flushing gas back into the reaction chamber; and (e) alternatively, between steps (b) and (c) or after step (d), introducing hydrogen plasma into the reaction chamber and subsequently introducing the flushing gas into the reaction chamber.

[0014] In one specific embodiment, the plasma power of the hydrogen plasma can range from 10W to 600W.

[0015] In one specific embodiment, the application time of the hydrogen plasma can range from 3 seconds to 60 seconds.

[0016] Furthermore, according to the method of the present invention, the ultrathin insulating layer is subjected to post-metallization annealing (PMA) treatment in a furnace atmosphere of 5% H2 / 95% N2. The temperature range of the post-metallization annealing treatment can be from 300°C to 1000°C. The holding time of the post-metallization annealing treatment can range from 3 seconds to 10 minutes.

[0017] In one specific embodiment, the ultrathin insulating layer manufactured according to the method of the present invention is formed of a metal oxide. The metal oxide may be HfO2, ZrO2, or Hf... x Zr 1-x O2 (0≦x≦1), Ta2O3, Al2O3, Gd2O3, La2O3, SiO2, TiO2, Y2O3 or other metal oxides.

[0018] In another specific embodiment, the ultrathin insulating layer manufactured according to the method of the present invention is formed of a metal nitride. The metal nitride may be AlN. xSiN x GeN x and BN x Or other metal nitrides, wherein 0.5 ≤ x ≤ 1.5.

[0019] In one specific embodiment, the ultrathin insulating layer manufactured according to the method of the present invention serves as the dielectric layer, and the leakage current density of the ultrathin insulating layer is equal to or less than that of the dielectric layer. .

[0020] In one specific embodiment, the ultrathin insulating layer manufactured according to the method of the present invention serves as a surface passivation layer, and the leakage current density of the ultrathin insulating layer is equal to or less than that of the surface passivation layer. .

[0021] In one specific embodiment, the material structure can be an integrated circuit element structure, an optoelectronic element structure, or other element structure that generates heat. The ultrathin insulating layer manufactured according to the method of the present invention can serve as a surface passivation layer. The thickness of the ultrathin insulating layer serving as a surface passivation layer can range from 3 nm to 50 nm.

[0022] Unlike prior art, the method according to the present invention can precisely control the growth mechanism of the thin film in a layer-by-layer and in-situ manner during the atomic layer deposition process, thereby significantly improving the film quality and greatly suppressing leakage current. Furthermore, the ultrathin insulating layer manufactured according to the method of the present invention has a significantly reduced thickness, thereby effectively and substantially improving the overall heat dissipation efficiency of the ultrathin insulating layer.

[0023] The advantages and spirit of this invention can be further understood through the following detailed description of the invention and the accompanying drawings. Attached Figure Description

[0024] Figure 1 A flowchart of each of the plurality of ALD cycles used in the method according to a preferred embodiment of the present invention;

[0025] Figure 2 A flowchart of each of the plurality of ALD cycles used in the method according to another preferred embodiment of the present invention;

[0026] Figure 3 As a first example of the present invention, various Hf molecules were produced under the processing conditions of hydrogen plasma with different plasma powers. 0.5 Zr 0.5 A graph showing the measured dielectric constant of an O2(HZO) thin film sample.

[0027] Figure 4As an example of the present invention, various HZO thin film samples were manufactured under hydrogen plasma treatment conditions with different plasma application times, and the dielectric constants of the samples were measured.

[0028] Figure 5 of (a), Figure 5 (b) and Figure 5 (c) are cross-sectional high-resolution transmission electron microscopy (HRTEM) images of metal-oxide-semiconductor (MOS) capacitor element samples of the first reference example, the second example and the third example of the present invention, respectively.

[0029] Figure 6 The graph shows the capacitance-voltage (CV) measurement results of the MOS capacitor element in the first reference example, the second example, and the third example of the present invention.

[0030] Figure 7 The following are the leakage current density-voltage measurement results of the MOS capacitor element in the first reference example, the second example, and the third example of the present invention;

[0031] Figure 8 of (a), Figure 8 (b) and Figure 8 (c) shows the X-ray reflectivity (XRR) spectra and their fitting curves of the HfO2 ultrathin insulating layer in the first reference example, the second example, and the third example of the present invention, respectively.

[0032] Figure 9 The conductivity measured by the element in the second, third, and first reference examples of the present invention. diagonal frequency Relationship diagram;

[0033] Figure 10 of (a), Figure 10 (b) and Figure 10 (c) are CV curves of the elements of the second, third and first reference examples of the present invention at different frequencies, respectively.

[0034] Figure 11 (a) and Figure 11(b) are Weibull plots obtained from time-dependent dielectric breakdown (TDDB) lifetime tests performed on the elements of the first reference example and the third example of the present invention under different electric fields.

[0035] Figure 12 The graph shows the relationship between the characteristic breakdown time and electric field stress of the MOS capacitor element in the first reference example, the second example, and the third example of the present invention.

[0036] Figure 13 The graph shows the capacitance-voltage (CV) measurement results of the second reference example (reference-4) and the HAP (HAP-4) element;

[0037] Figure 14 The graph shows the leakage current density-voltage measurement results for the second reference example (reference-4) and the HAP (HAP-4) element;

[0038] Figure 15 The graph shows the capacitance-voltage (CV) measurement results of the metal-insulator-metal (MIM) capacitor element in the third reference example, the fourth example, and the fifth example of the present invention.

[0039] Figure 16 The graph shows the leakage current density-voltage measurement results of the MIM capacitor element in the third reference example, the fourth example, and the fifth example of the present invention.

[0040] Explanation of icon numbers

[0041] 1: Atomic layer deposition cycle

[0042] S10~S18: Process Steps

[0043] 2: Atomic layer deposition cycle

[0044] S20~S30: Process Steps Detailed Implementation

[0045] According to a preferred embodiment of the present invention, the method for fabricating an ultrathin insulating layer on a material layer of a material structure is accomplished through multiple atomic layer deposition (ALD) cycles. It should be emphasized that the material structure used in the method according to the preferred embodiment of the present invention can be a finished or semi-finished product of components in various fields such as semiconductors, integrated circuits, optoelectronics, and microelectromechanical systems.

[0046] It should be noted that each ALD cycle consists of two half cycles. According to the method of the present invention, the ultrathin insulating layer is formed based on an atomic layer deposition process, and each ALD cycle is also basically composed of two half cycles. The first half cycle introduces a first gas pulse containing a precursor of a predetermined metal element and a flushing gas into the reaction chamber, while the second half cycle introduces a second gas pulse containing a reactant and a flushing gas into the reaction chamber.

[0047] Please see Figure 1 , Figure 1 The flowchart of each of the plurality of ALD cycles 1 used in the method of the preferred embodiment of the present invention is shown below.

[0048] like Figure 1 As shown, each ALD cycle 1 first executes step S10, introducing at least one first gas pulse into the reaction chamber. The at least one first gas pulse contains a precursor, which is then adsorbed onto the material layer of the material structure. The material structure is pre-placed within the reaction chamber. The precursor contains a predetermined metal element.

[0049] Next, in each ALD cycle 1, step S12 is performed, introducing a flushing gas into the reaction chamber. In one specific embodiment, the flushing gas can be an inert gas (e.g., argon, helium) or a non-reactive gas (e.g., nitrogen). In practical applications, the flushing gas can also serve as a carrier gas for the precursor.

[0050] Next, in each ALD cycle 1, step S14 is performed, introducing hydrogen plasma into the reaction chamber. In this step, the highly reactive hydrogen plasma reacts with the organic ligands of precursor molecules chemisorbed on the surface, effectively removing them. This significantly reduces the steric hindrance caused by ligands, exposing more active reaction sites, allowing subsequent reactant pulses to carry out surface chemical reactions more thoroughly and uniformly. As a result, the deposited film has a lower defect density, less residual carbon impurities, and higher film density, thus significantly reducing leakage current.

[0051] Next, in each ALD cycle 1, step S15 is performed, in which flushing gas is introduced into the reaction chamber again. Then, in each ALD cycle 1, step S16 is performed, in which a second gas pulse (as a reactant) is introduced into the reaction chamber to react with the precursor already adsorbed on the material layer to form an atomically thin insulating layer, wherein the second gas pulse contains the reactant.

[0052] Finally, in each ALD cycle 1, step S18 is performed, in which a flushing gas is introduced into the reaction chamber. In this invention, the operation of introducing hydrogen plasma after the first gas pulse (precursor) step is named the HAP (hydrogen after precursor) process.

[0053] Please see Figure 2 , Figure 2 The following is a flowchart of each of the plurality of ALD cycles 2 used in the method according to another preferred embodiment of the present invention.

[0054] like Figure 2 As shown, each ALD cycle 2 first executes step S20, introducing at least one first gas pulse into the reaction chamber. The at least one first gas pulse contains a precursor, which is then adsorbed onto the material layer of the material structure. The material structure is pre-placed within the reaction chamber. The precursor contains a predetermined metal element.

[0055] Next, in each ALD cycle 2, step S22 is performed, in which a flushing gas is introduced into the reaction chamber. In one specific embodiment, the flushing gas can be an inert gas (e.g., argon, helium) or a non-reactive gas (e.g., nitrogen). In practical applications, the flushing gas can also be used as a carrier gas for the precursor.

[0056] Next, in each ALD cycle 2, step S24 is performed, in which a second gas pulse (as a reactant) is introduced into the reaction chamber to react with the precursor that has been adsorbed on the material layer to form an atomic-level ultrathin insulating layer, wherein the second gas pulse contains the reactant.

[0057] Next, in each ALD cycle 2, step S26 is performed, in which flushing gas is introduced into the reaction chamber.

[0058] Next, in each ALD cycle 2, step S28 is performed, introducing hydrogen plasma into the reaction chamber. In this step, the energy provided by the hydrogen plasma can be transferred to the newly formed atomic-level ultrathin insulating layer, promoting the migration and rearrangement of surface atoms, achieving the effect of atomic-level annealing, and thus improving the density and structure of the ultrathin insulating layer.

[0059] Finally, in each ALD cycle 2, step S30 is performed, in which a flushing gas is introduced into the reaction chamber. In this invention, the operation of introducing hydrogen plasma after the second gas pulse (reactant) step is named the HAO (hydrogen after oxidant) process.

[0060] In one specific embodiment, each ALD cycle is performed at a specific process temperature and vacuum level. The process temperature ranges from 100°C to 500°C, and the vacuum level ranges from 0.1 Pa to 1000 Pa.

[0061] Furthermore, according to the method of the present invention, the ultrathin insulating layer is subjected to post-metallization annealing (PMA) treatment in a furnace atmosphere of 5% H2 / 95% N2. The temperature range of the post-metallization annealing treatment can be from 300°C to 1000°C. The holding time of the post-metallization annealing treatment can range from 3 seconds to 10 minutes. It should be noted that the method of the present invention can also be used to perform other types of post-annealing treatment on the ultrathin insulating layer, wherein the temperature range of the post-annealing treatment is from 300°C to 1000°C, and the holding time of the post-annealing treatment ranges from 3 seconds to 10 minutes.

[0062] In one specific embodiment, the ultrathin insulating layer manufactured according to the method of the present invention is formed of a metal oxide. The metal oxide may be HfO2, ZrO2, or Hf... x Zr 1-x O2 (0≦x≦1), Ta2O3, Al2O3, Gd2O3, La2O3, SiO2, TiO2, Y2O3 or other metal oxides.

[0063] Precursors for supplying Hf can be HfCl4, HfI4, HfCl2[N(SiMe3)2]2, HfCp2Me2, HfCp2Cl2, Hf(CpMe)2Me2, Hf(CpMe)2(OMe)Me, Hf(CpMe)2(O i Pr)Me, Hf(CpMe)2(mmp)Me, Hf(Cp)(NMe2)3, Hf(CpMe)(NMe2)3, Hf(Cp2CMe2)Me2, Hf(Cp2CMe2)Me(OMe), Hf(O i Pr)4、Hf(O t Bu)4、Hf(O t Bu)2(mmp)2、Hf(O t The reactants that supply O can be O2 plasma, N2O plasma, O3, H2O, or H2O2. These reactants include Bu(NEtMe)3, Hf(mmp)4, Hf(mp)4, Hf(ONEt2)4, Hf(NMe2)4, Hf(NEt2)4, Hf(NEtMe)4, Hf[N(SiMe3)2]2Cl2, and Hf(NO3)4.

[0064] Precursors supplying Zr can be ZrCl4, ZrI4, ZrCp2Cl2, ZrCp2Me2, ZrCp2Me(OMe), ZrCp(NMe2)3, Zr(CpMe)2Me2, Zr(CpMe)2Me(OMe), Zr(CpMe)(NMe2)3, Zr(CpEt)(NMe2)3, Zr(Cp2CMe2)Me2, Zr(Cp2CMe2)Me(OMe), Zr(O i Pr)4、Zr(O i Pr)2(dmae)2、Zr(O t Bu)4、Zr(O t Bu)2(dmae)2, Zr(dmae)4, Zr(thd)4, Zr(NMe2)4, Zr(NEt2)4, Zr(NEtMe)4, Zr[N(SiMe3)2]2Cl2, Zr(MeAMD)4, etc.

[0065] Precursors for supplying Al can be AlCl3, AlBr3, Al(CH3)3 (trimethylaluminum, TMA), AlMe2Cl, and AlMe2O. i Pr, AlEt3, Al(OEt)3, Al(OnPr)3, Al(mmp)3, Al(NEt2)3, Al(NiPr2)3, Al( i PrAMD)Et2, etc.

[0066] Precursors supplying Ti can be TiF4, TiCl4, TiI4, Ti[N(CH3)2]4 (tetrakis(dimethylamino)titanium, TDMAT), Ti[N(C2H5)2]4, Ti(CpMe5)(OMe)3, Ti(CpMe)(O i Pr)3, Ti(OMe)4, Ti(OEt)4, Ti(O i Pr)4、Ti(O i Pr)2(dmae)2、Ti(O i Pr)2(thd)2, Ti(trhd)2(O(CMe2Et)2, Ti(OBu)4, Ti(NMe2)4, TiCp2(( i PrN)2C(NH i Pr)) etc.

[0067] The precursors supplying La can be La(thd)3, La[N(SiMe3)2]3, La( i PrAMD)3、La( iPrfAMD)3, La(Cp)3, La(CpEt)3, La(Cp i Pr)3, etc.

[0068] Precursors for supplying Si can be SiCl4, Si2Cl6, SiCl3H, SiCl2H2, SiH4, Si(OMe)4, Si(OEt)4, Si(OEt)3((CH2)3NH2), Si(O t Pe)3OH, HMDS, SiH2(N(CH3)2)2, SiH2(NH t Bu)2, SiH2(NEt2)2, SiH(N(CH3)2)3, Si(NCO)4, MeOSi(NCO)3, (SiH3)3N (trisilylamine, TSA), etc.

[0069] Precursors for supplying element Y can be Y(thd)3, YCp3, Y(CpMe)3, Y(CpEt)3, Y( i PrAMD)3, etc.

[0070] In another specific embodiment, the ultrathin insulating layer manufactured according to the method of the present invention is formed of a metal nitride. The metal nitride may be AlN. x SiN x GeN x and BN x Or other metal nitrides, wherein 0.5 ≤ x ≤ 1.5.

[0071] The precursors for supplying Hf, Zr, Al, Ti, La, Si, and Y are as described above. The precursor for supplying Ge can be Ge(NMe2)4 (Me=CH3, tetrakis(dimethylamino)germane, TDMAGe), etc. The reactants for supplying N can be ammonia (NH3) plasma, nitrogen and hydrogen mixed gas (N2 / H2) plasma, etc.

[0072] In one specific embodiment, the ultrathin insulating layer manufactured according to the method of the present invention serves as the dielectric layer, and the leakage current density of the ultrathin insulating layer is equal to or less than that of the dielectric layer. .

[0073] In one specific embodiment, the ultrathin insulating layer manufactured according to the method of the present invention serves as a surface passivation layer, and the leakage current density of the ultrathin insulating layer is equal to or less than that of the surface passivation layer. .

[0074] In one specific embodiment, the material structure can be an integrated circuit element structure, an optoelectronic element structure, a microelectromechanical system (MEMS) element structure, or other element structures that generate heat. The ultrathin insulating layer manufactured according to the method of the present invention can serve as a surface passivation layer. The thickness of the ultrathin insulating layer serving as a surface passivation layer can range from 3 nm to 50 nm.

[0075] In one specific embodiment, the plasma power of the hydrogen plasma can range from 10W to 600W.

[0076] In one specific embodiment, the application time of the hydrogen plasma can range from 3 seconds to 60 seconds.

[0077] The first example of the present invention is the manufacture of Hf according to the method of the present invention. 0.5 Zr 0.5 O2(HZO) thin film, and using such Figure 1 Each ALD cycle 1 process described herein fabricates an ultrathin insulating layer approximately 7.5 nm thick. This first example also incorporates hydrogen plasma treatments with varying plasma powers and application times to fabricate HZO films under diverse hydrogen plasma treatment conditions. See [link to relevant documentation]. Figure 3 and Figure 4 , Figure 3 As a first example of the present invention, various HZO thin films were manufactured by treating them with hydrogen plasma of different plasma powers, and the dielectric constant was further measured. Figure 4 As a first example of the present invention, various HZO thin films were manufactured by hydrogen plasma treatment with different plasma application times, and the dielectric constant was further measured. Figure 3 The results show that the dielectric constant of the HZO thin film increases to a peak value with increasing plasma power, and then shows a downward trend. Figure 4 The results also show that as the plasma application time increases, the dielectric constant of the HZO thin film first rises to a peak value, and then shows a downward trend. Figure 3 and Figure 4 The results show that the plasma power range of the hydrogen plasma disclosed in this invention can be from 25W to 300W, and the application time of the hydrogen plasma per application can range from 4 seconds to 15 seconds. According to... Figure 3 and Figure 4 The results of the extrapolation can support the plasma power range of the hydrogen plasma declared in this invention, which can be from 10W to 600W, and the application time of each hydrogen plasma can be from 3 seconds to 60 seconds. Figure 3 and Figure 4The results show that when the plasma power is 50W and the plasma application time is 7.5 seconds, it can be considered as the optimal conditions for hydrogen plasma treatment, which makes the dielectric constant of the HZO film reach its maximum value.

[0078] In the second, third, and first reference examples of this invention, a hafnium oxide (HfO2) high-k dielectric layer is fabricated, and a metal-oxide-semiconductor (MOS) capacitor element is further fabricated. The MOS capacitor element is fabricated on a p-type (100) oriented silicon substrate, and its resistivity is [missing information]. Its structure, from bottom to top, consists of an aluminum (Al) back electrode, a p-Si substrate, a hafnium oxide (HfO2) high-k dielectric layer, and a tungsten (W) top electrode. In the second, third, and first reference examples of this invention, the precursor used is tetrakis(dimethylamino)hafnium (TDMAHf), and the reactant is water vapor (H2O). The deposition temperature of the HfO2 ultrathin insulating layer is set to 300°C.

[0079] The second example of this invention employs the HAO process described herein, wherein the energy provided by the hydrogen plasma can be transferred to the newly formed single-atom-layer HfO2 thin film, promoting the migration and rearrangement of surface atoms, achieving the effect of atomic-level annealing, and thereby improving the density and structure of the HfO2 thin film. In this second example, the hydrogen plasma treatment uses a plasma power of 50W and a plasma application time of 7.5 seconds.

[0080] The third example of this invention employs the HAP process described herein. The key mechanism of this process lies in the effective removal of organic ligands adsorbed on the surface of TDMAHf molecules using hydrogen plasma before introducing the H2O reactants. Removing these ligands significantly reduces steric hindrance, allowing subsequent H2O molecules to undergo a more complete chemical reaction with Hf atoms, thereby forming a less defective and higher-quality HfO2 film.

[0081] The MOS capacitors containing an ultrathin HfO2 insulating layer manufactured in the second, third, and first reference examples of this invention were all subjected to rapid thermal annealing at 450°C for 5 minutes in a forming gas environment containing 5% H2 / 95% N2, followed by post-metallization annealing (PMA). In the following figures, the symbol "reference" represents the element of the first reference example, the symbol "HAO" represents the element of the second example, and the symbol "HAP" represents the element of the third example.

[0082] Please see Figure 5 of (a), Figure 5 (b) and Figure 5 (c) Figure 5 of (a), Figure 5 (b) and Figure 5 (c) are cross-sectional HRTEM images of MOS capacitor element samples from the first reference example, the second example, and the third example, respectively. Figure 5 of (a), Figure 5 (b) and Figure 5 Image (c) shows that the total physical thickness of the HfO2 dielectric layer and interfacial layer (IL) in all three samples is approximately 5.3 nm, which is consistent with the measurements obtained by spectroscopic ellipsometry. Notably, the second example sample has the thickest interfacial layer (approximately 1.70 nm), while the third example and the first reference sample have relatively thinner interfacial layer thicknesses (both approximately 1.13 nm). The thicker interfacial layer in the second example sample is due to the hydrogen plasma treatment applied after the reactant pulse. The plasma energy directly acts on the surface where Hf-O bonds have already formed, promoting the diffusion of oxygen atoms to the HfO2 / Si interface, thus resulting in a thicker Si oxide layer at the interface.

[0083] Please see Figure 6 , Figure 6 The graph shows the capacitance-voltage (CV) measurement results of the MOS capacitor elements in the first reference example, the second example, and the third example. The capacitance-voltage measurements were performed at a frequency of 100 kHz. Figure 6 The capacitance equivalent thickness (CET) curves show that the three devices have almost the same capacitance, approximately 1.4 nm. Furthermore, the hysteresis phenomenon in the CV curves reflects the density of mobile charge or traps in the dielectric layer. The device in the first reference example has the largest hysteresis window at 37.3 mV, while the hysteresis windows of the HAO and HAP devices are significantly reduced to 15.3 mV and 14.2 mV, respectively. This result demonstrates that the hydrogen plasma treatment employed in this invention can effectively reduce charge traps in the HfO2 ultrathin insulating layer.

[0084] Please see Figure 7 , Figure 7 The graph shows the leakage current density-voltage measurement results for the MOS capacitor elements in the first reference example, the second example, and the third example, from which the leakage current density of the three types of elements can be obtained. Leakage current density (J) g It is then defined as the flatband voltage (V). FB -1 volt (V) FB The current density value measured at -1V. Figure 7 It can be seen that the leakage current density (J) of the component in the first reference example is... g )Gundam In comparison, the J of HAO and HAP elements treated with hydrogen plasma is significantly higher. g They dropped sharply and The reduction in leakage current exceeds six orders of magnitude, fully demonstrating the superior effectiveness of the method of the present invention in suppressing leakage current density. The results fully support the claim that the leakage current density of the ultrathin insulating layer manufactured according to the method of the present invention is equal to or less than [a certain value]. .Depend on Figure 6 and Figure 7 The results yielded the relevant electrical parameters for the three components, which are summarized in Table 1 below. Table 1 also lists the interfacial state density (D) of the three components. it ).

[0085] Table 1

[0086]

[0087] Please see Figure 8 of (a), Figure 8 (b) and Figure 8 (c) Figure 8 of (a), Figure 8 (b) and Figure 8 (c) shows the X-ray reflectivity (XRR) spectra and their fitted curves of the HfO2 ultrathin insulating layers in the first reference example, second example, and third example, respectively. To investigate the physical reasons for the significant reduction in leakage current, this invention utilizes XRR measurement technology to analyze the density of the ultrathin insulating layer. Figure 8 of (a), Figure 8 (b) and Figure 8 As shown in (c), the film density can be accurately obtained by fitting the XRR spectrum. The density of the HfO2 ultrathin insulating layer in the first reference example is 8.71 g / cm³. After HAO treatment, the density of the HfO2 ultrathin insulating layer increases to 9.16 g / cm³. The sample treated with HAP achieves the highest density of 9.44 g / cm³ for its HfO2 ultrathin insulating layer. 3 The significantly increased density of the ultrathin insulating layer means a denser atomic arrangement and fewer defects and voids, effectively blocking the path of leakage current. This result is highly correlated with leakage current measurements; that is, the HAP sample with the highest density corresponds to the lowest leakage current.

[0088] Furthermore, the interface quality between the high-k dielectric layer and the silicon substrate can be determined by the interface trap density (Dk). it The value can be evaluated using the conductivity method, and can be further calculated using the conductivity method. Please refer to [link / reference]. Figure 9 , Figure 9 The conductivity measured by the conductivity method for the components of the second example, third example, and first reference example. diagonal frequency A relationship diagram, in which G p It is the equivalent parallel conductance, and its peak value is... With D it Proportional. Figure 9 It can be seen that the HAP element exhibits the lowest The value corresponds to the lowest D. it Value (See Table 1). This superior interface quality can be attributed to the hydrogen plasma in the HAP process, which effectively removes the ligands of precursors adsorbed on the surface, reduces steric hindrance, and thus improves the quality of the interfacial chemical bonding.

[0089] Please see Figure 10 of (a), Figure 10 (b) and Figure 10 (c) Figure 10 of (a), Figure 10 (b) and Figure 10 (c) CV curves of the components of the second example, the third example and the first reference example at different frequencies are used to evaluate their frequency dispersion characteristics. Figure 10 (a) shows that the capacitance of the first reference element in the accumulation region decreases significantly with increasing frequency, with a capacitance loss of up to 54.9% from 5 kHz to 1 MHz. This severe frequency dispersion is mainly due to the parasitic series resistance effect caused by its large leakage current. In contrast, as... Figure 10 (b) and Figure 10 As shown in (c), the CV curves of the HAO and HAP elements show that the capacitance decays less with increasing frequency, with frequency dispersions of only 14.2% and 15.8% respectively in the range of 5 kHz to 1 MHz. This result again demonstrates that hydrogen plasma treatment can effectively eliminate the interference of parasitic resistance by significantly suppressing leakage current, and can obtain more stable high-frequency operating characteristics by reducing the number of border traps.

[0090] To evaluate the impact of the ultrathin insulating layer manufactured by the method of this invention on the long-term reliability of MOS capacitor elements, TDDB measurements were performed on a MOS capacitor element of the first reference example and a HAP MOS capacitor element with optimal electrical characteristics (third example). This test measures the time required for the MOS capacitor element to undergo permanent breakdown after applying a constant high electric field stress. Please refer to [link to relevant documentation]. Figure 11 (a) and Figure 11 (b) Figure 11 (a) and Figure 11 (b) are the Weibull plots obtained from TDDB tests of the components of the first reference example and HAP under different electric fields. Figure 11 (a) shows the Weber distribution of the element in the first reference example at electric fields of 7.1, 7.3, and 7.5 MV / cm, while Figure 11 Figure (b) plots the data for the HAP element at electric fields of 8.3, 8.5, and 8.7 MV / cm. Both figures show a good Weber distribution between the cumulative collapse probability and the applied stress time. Figure 11 (a) and Figure 11 As shown in (b), the collapse time distribution of both components is quite concentrated, indicating that the film quality has good consistency.

[0091] Please see Figure 12 , Figure 12 The graph shows the relationship between the characteristic breakdown time and the applied electric field stress for MOS capacitors of the first reference and third example (HAP). The characteristic breakdown time (t) with a cumulative breakdown probability of 63.2% is represented by the value of the time under different electric fields. 63.2% After plotting and interpolating, the maximum electric field that a MOS capacitor can withstand for 10 years of continuous operation under normal operating voltage can be estimated. Figure 12 As shown, the first reference device can withstand a maximum electric field of 4.9 MV / cm for 10 years of operation, while the HAP device can withstand 5.5 MV / cm. This result clearly indicates that the high-k dielectric layer manufactured by the HAP process, due to its better film quality and lower defect density, can effectively mitigate the generation of electric field-induced defects, thereby significantly improving the long-term operational reliability of MOS capacitor devices.

[0092] To verify the applicability of the method of this invention to more advanced semiconductor technology nodes, this invention further fabricates MOS capacitor elements with an ultrathin insulating layer total thickness reduced to approximately 4 nanometers, namely the second reference example (reference-4) and the HAP (HAP-4) element. Please refer to... Figure 13 and Figure 14 , Figure 13 The graph shows the capacitance-voltage (CV) measurement results for the second reference example (reference-4) and the HAP (HAP-4) element. Figure 14 The graph shows the leakage current density-voltage measurement results for the second reference example (reference-4) and the HAP (HAP-4) element. Figure 13 and Figure 14 As shown, with the reduction in the thickness of the ultrathin insulating layer, the leakage current inevitably increases. The device in the second reference example (reference-4) exhibits significant distortion of its CV curve and capacitance degradation under negative voltage due to the dramatic increase in leakage current. However, the HAP-4 device maintains good and undistorted CV characteristics even with a reduced insulating layer thickness, and its leakage current density (1.14 × 10⁻⁻⁴) remains low. 5 The leakage current density (A / cm²) is still more than four orders of magnitude lower than that of the second reference example (reference-4) element (2.47 × 10⁻¹ A / cm²). This leakage current value also conforms to the principle that the leakage current density of the ultrathin insulating layer manufactured according to the method of the present invention is equal to or less than that of the leakage current density of the ultrathin insulating layer. (As mentioned earlier, leakage current density (J) g The definition of ) is in V FB The current density value measured at -1V. This result strongly demonstrates that the method of the present invention can still effectively improve the dielectric layer quality and exhibit excellent leakage current suppression capability, even under conditions of extremely small insulation layer thickness.

[0093] The fourth, fifth, and third reference examples of this invention all involve fabricating a hafnium oxide (HfO2) high-k dielectric layer and further completing the fabrication of a metal-insulator-metal (MIM) capacitor element. The structure of the MIM capacitor element, from bottom to top, consists of a Si substrate, a TiN adhesive layer, a ruthenium (Ru) bottom electrode, a hafnium oxide (HfO2) high-k dielectric layer, and a tungsten (W) top electrode. The precursor used in the fourth, fifth, and third reference examples of this invention is tetrakis(dimethylamino)hafnium (TDMAHf), and the reactant is water vapor (H2O). The deposition temperature of the HfO2 ultrathin insulating layer is set to 300°C.

[0094] The fourth example of this invention employs the HAO process described herein, wherein the energy provided by the hydrogen plasma can be transferred to the newly formed single-atom-layer HfO2 thin film, promoting the migration and rearrangement of surface atoms, achieving the effect of atomic-level annealing, and thereby improving the density and structure of the HfO2 thin film. In this fourth example, the hydrogen plasma treatment uses a plasma power of 50W and a plasma application time of 7.5 seconds.

[0095] The fifth example of this invention employs the HAP process described herein. The key mechanism of this process lies in the effective removal of organic ligands adsorbed on the surface of TDMAHf molecules using hydrogen plasma before introducing the H2O reactants. Removing these ligands significantly reduces steric hindrance, allowing subsequent H2O molecules to undergo a more complete chemical reaction with Hf atoms, thereby forming a less defective and higher-quality HfO2 film.

[0096] Please see Figure 15 , Figure 15 The graph shows the capacitance-voltage (CV) measurement results for the MIM capacitor elements of the third reference (HAO), fourth example (HAO), and fifth example (HAP), where the thickness of the HfO2 thin film is approximately 5 nm. The capacitance-voltage measurements were performed at a frequency of 100 kHz. Figure 15 The CV curves show that the capacitance equivalent thickness (CET) of the three components is almost the same, all around 1 nm.

[0097] Please see Figure 16 , Figure 16 The graph shows the leakage current density-voltage measurement results for the MIM capacitor elements in the third reference example (HAO), fourth example (HAO), and fifth example (HAP), from which the leakage current density of the three types of elements can be obtained. Figure 16 It can be seen that the leakage current density (J) of the component in the third reference example when a voltage of -1V is applied is... g )for In comparison, the J of HAO and HAP elements treated with hydrogen plasma is significantly higher. g (When the applied voltage is -1V) they suddenly dropped to and The reduction in leakage current exceeds two orders of magnitude, fully demonstrating the superior effectiveness of the method of the present invention in suppressing leakage current density. The results fully support the claim that the leakage current density of the surface passivation layer manufactured according to the method of the present invention is equal to or less than [a certain value]. .Depend on Figure 15 and Figure 16 The results yielded the relevant key electrical parameters for the three components, which are summarized in Table 2 below.

[0098] Table 2

[0099]

[0100] Through the detailed description of the present invention above, it is clear that the method of the present invention strategically introduces in-situ hydrogen plasma treatment during the atomic layer deposition cycle. By performing hydrogen plasma treatment at different time points (after the precursor adsorbs onto the surface and before the reactants are introduced into the chamber, or after the reactants are introduced into the chamber), the effects of removing precursor ligands to reduce steric hindrance and atomic layer annealing to improve film density are achieved, respectively. The present invention fundamentally improves the material quality of ultrathin insulating layers, significantly reduces their leakage current density, and comprehensively improves film density, interface quality, reliability, and high-frequency stability. The method of the present invention not only provides a breakthrough solution for the fabrication of high-performance high-k dielectric layers required for next-generation semiconductor devices, but the ultrathin and low-leakage insulating layers it produces can also be extended to the field of advanced thermal management, demonstrating its high technical value and broad industrial application potential.

[0101] The detailed description of the preferred embodiments above is intended to more clearly illustrate the features and spirit of the present invention, and is not intended to limit the scope of the invention to the preferred embodiments disclosed above. Rather, the aim is to cover various modifications and equivalent arrangements within the scope of the claims to which this invention is sought. Therefore, the scope of the claims to which this invention is sought should be interpreted in the broadest possible sense based on the foregoing description, so as to cover all possible modifications and equivalent arrangements.

Claims

1. A method for manufacturing an ultrathin insulating layer on a material layer of a material structure, said material structure being placed within a reaction chamber, said method being performed through multiple atomic layer deposition cycles, wherein each atomic layer deposition cycle comprises the following steps: (a) Introducing at least one first gas pulse into a reaction chamber, the at least one gas pulse containing a precursor to cause the precursor to adsorb onto the material layer, wherein the precursor contains a metallic element; (b) Introduce the flushing gas into the reaction chamber; (c) A second gas pulse is introduced into the reaction chamber to react with the precursor adsorbed on the material layer to form the atomic-level ultrathin insulating layer, wherein the second gas pulse contains reactants; (d) Introducing the flushing gas into the reaction chamber; and (e) Either between steps (b) and (c) or after step (d), hydrogen plasma is introduced into the reaction chamber and the flushing gas is subsequently introduced into the reaction chamber.

2. The method according to claim 1, wherein in step (e), the plasma power of the hydrogen plasma ranges from 10W to 600W, and the application time of the hydrogen plasma ranges from 3 seconds to 60 seconds.

3. The method according to claim 2, further comprising the following steps: The ultrathin insulating layer is subjected to a post-annealing process, wherein the temperature range of the post-annealing process is from 300°C to 1000°C, and the holding time of the post-annealing process ranges from 3 seconds to 10 minutes.

4. The method according to claim 2, wherein the ultrathin insulating layer is formed of a metal oxide.

5. The method according to claim 4, wherein the metal oxide is selected from HfO2, ZrO2, and Hf x Zr 1-x One of the groups consisting of O2 (0≦x≦1), Ta2O3, Al2O3, Gd2O3, La2O3, SiO2, TiO2, and Y2O3.

6. The method of claim 2, wherein the ultrathin insulating layer is formed of a metal nitride.

7. The method according to claim 6, wherein the metal nitride is selected from AlN. x SiN x GeN x and BN x And one of the groups formed, 0.5≦x≦1.

5.

8. The method according to claim 1, wherein the ultrathin insulating layer serves as a dielectric layer, and the leakage current density of the ultrathin insulating layer is equal to or less than... .

9. The method according to claim 1, wherein the ultrathin insulating layer serves as a surface passivation layer, and the leakage current density of the ultrathin insulating layer is equal to or less than... .

10. The method according to claim 1, wherein the material structure is selected from the group consisting of integrated circuit element structure, optoelectronic element structure and optical element structure, the ultrathin insulating layer serves as a surface passivation layer, and the thickness of the ultrathin insulating layer serving as the surface passivation layer ranges from 3 nm to 50 nm.