Three-dimensional interdigital electrode and preparation method thereof

Abstract

This invention discloses a three-dimensional interdigitated electrode and its preparation method, belonging to the field of interdigitated electrode technology. The three-dimensional interdigitated electrode of this invention achieves a multiplier increase in the effective surface area of ​​the electrode through the synergistic design of "multi-layer stacking" and "three-dimensional micropillars." The multi-layer structure allows the electrode to extend spatially in the vertical direction, while the three-dimensional micropillar structure on each layer surface further increases the planar roughness and effective area. Compared with traditional single-layer planar interdigitated electrodes, the specific surface area of ​​this invention can be increased by several to tens of times, greatly increasing the electrochemical active sites, thereby significantly improving the detection sensitivity of the sensor and meeting the needs of trace substance detection. The interdigitated electrode of this invention has a unique three-dimensional structure that forms uniform electrode gaps in both the transverse and longitudinal directions, thereby constructing a complex three-dimensional electric field that penetrates three-dimensional space. This three-dimensional electric field not only increases the interaction area with the analyte but also more effectively captures and detects the analyte.

Description

Technical Field

[0001] This invention belongs to the field of interdigital electrode technology, specifically relating to a three-dimensional interdigital electrode and its preparation method. Background Technology

[0002] As a basic microelectrode structure, interdigitated electrodes can achieve long electrode length and small electrode spacing within a limited area, forming a strong electric field and fully interacting with the analyte. Therefore, they are widely used in various sensors and microsystems and are a core component of related devices.

[0003] Traditional interdigitated electrodes are mostly single-layer planar structures, with simple fabrication processes. They can be completed in a single photolithography process combined with metal lift-off or etching, making them easy to mass-produce. However, as sensing technology develops towards higher sensitivity and lower detection limits, their performance bottlenecks are becoming increasingly prominent: First, the electrochemically active area is limited to a two-dimensional plane, resulting in low sensor sensitivity and a high detection limit, which cannot meet the needs of trace substance detection; second, the electric field is mainly concentrated at the electrode edge and parallel to the substrate, limiting the interaction area and efficiency with the analyte, thus restricting the improvement of device performance.

[0004] To overcome the limitations of two-dimensional structures, researchers have developed a variety of three-dimensional (3D) interdigitated electrodes, mainly forming three improvement methods, but all of them have obvious defects and limitations.

[0005] The first approach involves growing nanostructures (such as nanowires, nanorods, and porous materials) on the surface of planar interdigitated electrodes to increase the specific surface area. For example, zinc oxide nanorods can be grown on the surface of gold electrodes via electrochemical deposition or hydrothermal methods. However, this method has drawbacks: the nanostructures have poor conductivity, weak adhesion to the substrate, and are prone to detachment, which affects signal stability and shortens the sensor's lifespan.

[0006] The second method is to construct a three-dimensional electrode body structure, such as by using LIGA (lithography, electroplating, and molding) technology or SU-8 thick photoresist molds to prepare high aspect ratio three-dimensional interdigitated electrodes. However, this type of process has shortcomings: LIGA technology relies on synchrotron radiation light sources, which are costly; thick photoresist lithography is difficult and prone to defects such as residual photoresist and structural collapse, resulting in low yield and limiting practical applications.

[0007] The third method involves constructing multilayer interdigitated electrodes, stacking multiple electrodes vertically. Theoretically, this can achieve a three-dimensional electric field distribution, enhancing the sensing signal. However, its fabrication process is extremely complex. The core challenge lies in accurately fabricating the patterns of each layer and establishing electrode leads while avoiding interlayer short circuits. Existing processes require multiple high-precision photolithography alignments, have extremely high etching requirements, and even minor deviations can easily lead to device failure. Furthermore, the process window is narrow, reliability is poor, and large-scale production is difficult.

[0008] As can be seen from the above, existing interdigitated electrodes (whether two-dimensional planar or three-dimensional improved structures) all suffer from performance deficiencies or fabrication defects, failing to simultaneously meet the demands for high performance, simple fabrication, and large-scale application. Therefore, developing interdigitated electrodes with excellent performance, simple fabrication, high stability, and scalable production is an urgent problem to be solved in this field. Summary of the Invention

[0009] Therefore, the purpose of this invention is to provide a three-dimensional interdigitated electrode and its preparation method.

[0010] In a first aspect, the present invention provides a three-dimensional interdigitated electrode, comprising: Base; A first insulating layer is disposed on the substrate; A first adhesive metal layer is disposed on the side of the first insulating layer away from the substrate; The first electrode layer is disposed on the side of the first adhesive metal layer away from the first insulating layer; A plurality of first electrode fingers are arranged in an array at intervals on the first electrode layer and extend vertically in a direction away from the first electrode layer; The second insulating layer is filled in an array between adjacent first electrode fingers and is spaced apart from the first electrode fingers. A second adhesive metal layer is disposed on the side of the second insulating layer away from the first electrode layer; The second electrode layer is disposed on the side of the second adhesive metal layer away from the second insulating layer; A plurality of second electrode fingers are arranged in an array at intervals on the side of the second electrode layer away from the second insulating layer and extend vertically in a direction away from the second electrode layer. The second electrode fingers and the first electrode fingers are arranged alternately in the vertical direction.

[0011] Preferably, the substrate is a silicon substrate.

[0012] Preferably, the first insulating layer and the second insulating layer are each independently selected from either a SiO2 insulating layer or a Si3N4 insulating layer; the thickness of the first insulating layer and the second insulating layer are each independently 200~600nm.

[0013] Preferably, the first adhesive metal layer and the second adhesive metal layer are each independently selected from either a Cr adhesive metal layer or a Ti adhesive metal layer; the thickness of the first adhesive metal layer and the second adhesive metal layer are each independently 10~30 nm.

[0014] Preferably, the first electrode layer and the second electrode layer are each independently selected from Au electrode layer or Pt electrode layer; the thickness of the first electrode layer and the second electrode layer are each independently 150~250nm.

[0015] Preferably, the first electrode finger and the second electrode finger are each independently selected from Au electrode fingers or Pt electrode fingers; the height of the first electrode finger and the second electrode finger are each independently 2~3μm.

[0016] Secondly, the present invention provides a method for preparing a three-dimensional interdigitated electrode, comprising the following steps: S1. A first insulating layer is prepared on a silicon substrate, and a first adhesion metal layer and a first electrode layer are sequentially deposited on the first insulating layer to form a first electrode stack. S2. A second insulating layer, a second adhesive metal layer, and a second electrode layer are sequentially deposited on the first electrode layer of the first electrode stack to obtain the second electrode stack. S3. Photoresist is spin-coated onto the second electrode of the second electrode stack. After exposure and development, the position of the first electrode pointing to the pixel area is exposed. Then, dry etching is performed to remove the second electrode layer, the second adhesive metal layer and the second insulating layer of the first electrode pointing to the pixel area in sequence, and the first electrode layer of the first electrode pointing to the pixel area is exposed. After removing the photoresist, intermediate device 1 is obtained. S4: Spin-coat a layer of photoresist onto the entire surface of the second electrode layer side of the intermediate device 1 until the entire surface is smooth. Through photolithography and development, expose the positions of the first electrode finger and the second electrode finger to obtain the intermediate device 2 with the interdigitated electrode pattern. S5: The intermediate device 2 containing the interdigitated electrode pattern is placed in the electroplating solution as the cathode and electrochemically deposited. After electroplating, the first electrode finger and the second electrode finger are obtained. Then, the photoresist is removed by wet method to obtain the three-dimensional interdigitated electrode.

[0017] Preferably, the area of ​​the second electrode stack in step S2 is smaller than the area of ​​the first electrode stack in step S1.

[0018] Preferably, in step S5, the current density for electrochemical deposition is 0.8~1.2 mA / cm². 2 The electrochemical deposition time is 15~25 min.

[0019] Preferably, in step S5, the electroplating solution is an Au electroplating solution or a Pt electroplating solution.

[0020] Compared with the prior art, one or more of the above technical solutions can achieve at least one of the following beneficial effects: (1) The three-dimensional interdigitated electrode of the present invention achieves a multiplier increase in the effective surface area of ​​the electrode through the synergistic design of "multi-layer stacking" and "three-dimensional micropillars"; the multi-layer structure enables the electrode to extend in space in the vertical direction, while the three-dimensional micropillar structure on the surface of each layer further increases the planar roughness and effective area; compared with the traditional single-layer planar interdigitated electrode, the specific surface area of ​​the present invention can be increased by several times to tens of times, which greatly increases the electrochemical active sites, thereby significantly improving the detection sensitivity of the sensor and meeting the needs of trace substance detection.

[0021] (2) The unique three-dimensional structure of the interdigitated electrode of the present invention forms a uniform electrode gap in both the transverse and longitudinal directions, thereby constructing a complex three-dimensional electric field that runs through three-dimensional space. This three-dimensional electric field not only increases the interaction area with the analyte, but also captures and detects the analyte more effectively. In particular, for macromolecular biological substances or low-concentration gases, the signal response is significantly enhanced, thereby improving the detection efficiency and accuracy. Attached Figure Description

[0022] Figure 1 This is a schematic diagram of the structure of the three-dimensional interdigitated electrode in this invention.

[0023] Figure 2 This is a three-dimensional diagram of the three-dimensional interdigitated electrode in this invention.

[0024] Figure 3 This is a schematic diagram of the intermediate structure corresponding to step S1 of the preparation method of the present invention.

[0025] Figure 4 This is a schematic diagram of the intermediate structure corresponding to step S1 of the preparation method of the present invention.

[0026] Figure 5 This is a schematic diagram of the intermediate structure corresponding to step S1 of the preparation method of the present invention.

[0027] Figure 6 This is a schematic diagram of the intermediate structure corresponding to step S2 of the preparation method of the present invention.

[0028] Figure 7 This is a schematic diagram of the intermediate structure corresponding to step S2 of the preparation method of the present invention.

[0029] Figure 8 This is a schematic diagram of the intermediate structure corresponding to step S2 of the preparation method of the present invention.

[0030] Figure 9 This is a schematic diagram of the intermediate structure corresponding to step S3 of the preparation method of the present invention.

[0031] Figure 10 This is a schematic diagram of the intermediate structure corresponding to step S3 of the preparation method of the present invention.

[0032] Figure 11 This is a schematic diagram of the intermediate structure corresponding to step S3 of the preparation method of the present invention.

[0033] Figure 12 This is a schematic diagram of the intermediate structure corresponding to step S4 of the preparation method of the present invention.

[0034] Figure 13 This is a schematic diagram of the intermediate structure corresponding to step S4 of the preparation method of the present invention.

[0035] Wherein: 1-substrate; 2-first insulating layer; 3-first adhesive metal layer; 4-first electrode layer; 5-first electrode finger; 6-second insulating layer; 7-second adhesive metal layer; 8-second electrode layer; 9-second electrode finger; 10-first photoresist layer; 11-second photoresist layer; 12-pixel area of ​​the first electrode finger; 13-hole. Detailed Implementation

[0036] To facilitate understanding of the present invention, the present invention will be described more fully and in detail below with reference to the accompanying drawings and preferred embodiments, but the scope of protection of the present invention is not limited to the following specific embodiments.

[0037] Unless otherwise defined, all technical terms used herein have the same meaning as commonly understood by those skilled in the art. The technical terms used herein are for the purpose of describing particular embodiments only and are not intended to limit the scope of the invention.

[0038] As mentioned above, in a first aspect, the present invention provides a three-dimensional interdigitated electrode, comprising: Base 1; A first insulating layer 2 is disposed on the substrate 1; The first adhesive metal layer 3 is disposed on the side of the first insulating layer 2 away from the substrate 1; The first electrode layer 4 is disposed on the side of the first adhesive metal layer 3 away from the first insulating layer 2; A plurality of first electrode fingers 5 are arranged in an array at intervals on the first electrode layer 4 and extend vertically in a direction away from the first electrode layer 4; The second insulating layer 6 is filled in an array between adjacent first electrode fingers 5 and is spaced apart from the first electrode fingers 5. The second adhesive metal layer 7 is disposed on the side of the second insulating layer 6 away from the first electrode layer 4; The second electrode layer 8 is disposed on the side of the second adhesive metal layer 7 away from the second insulating layer 6; A plurality of second electrode fingers are arranged in an array at intervals on the side of the second electrode layer away from the second insulating layer and extend vertically in a direction away from the second electrode layer. The second electrode fingers and the first electrode fingers are arranged alternately in the vertical direction.

[0039] The three-dimensional interdigitated electrode of this invention achieves a multiplier increase in the effective surface area of ​​the electrode through the synergistic design of "multi-layer stacking" and "three-dimensional micropillars", and at the same time constructs a three-dimensional electric field that runs through three-dimensional space, thereby significantly improving the detection sensitivity, signal response efficiency and detection accuracy of the sensor, and meeting the detection needs of trace substances.

[0040] In some embodiments, the substrate 1 is a silicon substrate.

[0041] In some embodiments, the first insulating layer 2 and the second insulating layer 6 are each independently selected from either a SiO2 insulating layer or a Si3N4 insulating layer; the thickness of the first insulating layer 2 and the second insulating layer 6 are each independently 200~600nm, including but not limited to: 200nm, 300nm, 400nm, 500nm, 600nm, etc.

[0042] In some embodiments, the first adhesive metal layer 3 and the second adhesive metal layer 7 are each independently selected from either a Cr adhesive metal layer or a Ti adhesive metal layer; the thickness of the first adhesive metal layer 3 and the second adhesive metal layer 7 are each independently 10~30nm, including but not limited to: 10nm, 15nm, 20nm, 25nm, 30nm, etc.

[0043] In some embodiments, the first electrode layer 4 and the second electrode layer 8 are each independently selected from an Au electrode layer or a Pt electrode layer; the thickness of the first electrode layer 4 and the second electrode layer 8 are each independently 150~250nm, including but not limited to: 150nm, 160nm, 170nm, 180nm, 190nm, 200nm, 210nm, 220nm, 230nm, 240nm, 250nm, etc.

[0044] In some embodiments, the first electrode finger 5 and the second electrode finger 9 are each independently selected from Au electrode fingers or Pt electrode fingers; the height of the first electrode finger 5 and the second electrode finger 9 are each independently 2~3μm, including but not limited to: 2μm, 2.1μm, 2.2μm, 2.3μm, 2.4μm, 2.5μm, 2.6μm, 2.7μm, 2.8μm, 2.9μm, 3.0μm, etc.

[0045] Secondly, the present invention provides a method for preparing a three-dimensional interdigitated electrode, comprising the following steps: S1: A first insulating layer 2 is prepared on a silicon substrate 1, and a first adhesion metal layer 3 and a first electrode layer 4 are sequentially deposited on the first insulating layer 2 to form a first electrode stack. S2: A second insulating layer 6, a second adhesive metal layer 7, and a second electrode layer 8 are sequentially deposited in the first electrode layer 4 of the first electrode stack to obtain the second electrode stack; S3: Photoresist is spin-coated onto the second electrode 8 of the second electrode stack. After exposure and development, the pixel area 12 of the first electrode finger is exposed. Then, dry etching is performed to remove the second electrode layer 8, the second adhesion metal layer 7, and the second insulating layer 6 of the pixel area of ​​the first electrode finger in sequence, and the first electrode layer 4 of the pixel area of ​​the first electrode finger is exposed. After removing the photoresist, the intermediate device 1 is obtained. S4: Spin-coat a layer of photoresist onto the entire surface of the second electrode layer 8 on one side of the intermediate device 1 until the entire surface is flat. Through photolithography and development, expose the positions of the first electrode finger 5 and the second electrode finger 9 to obtain the intermediate device 2 with the interdigitated electrode pattern. S5: The intermediate device 2 with the interdigitated electrode pattern is placed in the electroplating solution as the cathode and electrochemically deposited. After electroplating, the first electrode finger 5 and the second electrode finger 9 are obtained. Then, the photoresist is removed by wet method to obtain the three-dimensional interdigitated electrode.

[0046] In the preparation method of this invention, the structure forming and template preparation are achieved simultaneously through two photolithography processes. In particular, in the electroplating process, the photoresist not only defines the growth position of the micropillars, but also fills the gap between the upper and lower electrodes to form a physical isolation wall, thereby avoiding the short circuit problem in the electroplating process from the root and greatly improving the yield of the process.

[0047] The photolithography, dry etching (RIE), and electroplating processes involved in the preparation method of this invention are all standard and mature semiconductor (MEMS) processing technologies. They do not require special and expensive equipment, are easy to scale up, and have controllable costs.

[0048] In the method of the present invention, the width and spacing of the interdigitated fingers can be conveniently adjusted by adjusting the photolithography mask, and the height, density and morphology (such as columnar or mushroom-shaped) of the conductive micropillars can be precisely adjusted by controlling the electroplating time or current density, so as to customize and optimize the electrode performance for different application scenarios.

[0049] In some embodiments, the area of ​​the second electrode stack in step S2 is smaller than the area of ​​the first electrode stack in step S1.

[0050] The area of ​​the second electrode stack is smaller than the area of ​​the first electrode stack in step S1, leaving space at the edge of the first electrode to facilitate the subsequent lead-out of the first electrode.

[0051] In some embodiments, in step S5, the current density of electrochemical deposition is 0.8~1.2 mA / cm². 2The electrochemical deposition time is 15~25 min.

[0052] In some embodiments, in step S5, the electroplating solution is an Au electroplating solution or a Pt electroplating solution.

[0053] A schematic diagram of the three-dimensional interdigitated electrode in this invention is shown below. Figure 1 As shown, the 3D diagram is as follows Figure 2 As shown, from bottom to top, it includes: a substrate 1; a first insulating layer 2 disposed on the upper surface of the substrate 1; a first adhesive metal layer 3 disposed on the upper surface of the first insulating layer 2; a first electrode layer 4 disposed on the upper surface of the first adhesive metal layer 3; first electrode fingers 5 disposed in an array at intervals on the first electrode layer 4 and extending vertically away from the first electrode layer 4; a second insulating layer 6, which fills the spaces between adjacent first electrode fingers 5 in an array and is spaced apart from the first electrode fingers 5; a second adhesive metal layer 7 covering the upper surface of the second insulating layer 6; a second electrode layer 8 covering the upper surface of the second adhesive metal layer 7; and a plurality of second electrode fingers 9 disposed in an array at intervals on the upper surface of the second electrode layer 8 and extending vertically away from the second electrode layer 8, wherein the second electrode fingers 9 and the first electrode fingers 5 are alternately arranged in the vertical direction.

[0054] Example 1 S1: A silicon wafer is used as the substrate 1; the upper surface of the silicon wafer is thermally oxidized to form a 500nm thick SiO2 layer as the first insulating layer 2 (see structural schematic diagram). Figure 3 A 20 nm thick Ti layer is first deposited on the first insulating layer 2 of the substrate 1 as the first adhesion metal layer 3 (see schematic diagram). Figure 4 Next, a 200 nm thick Au layer is deposited on the first adhesion metal layer 3 as the first electrode layer 4, forming the first electrode stack (see schematic diagram). Figure 5 ).

[0055] S2: A 300nm thick SiO2 layer is deposited as the second insulating layer 6 in the first electrode layer 4 of the first electrode stack (see structural schematic diagram). Figure 6 A 20 nm thick Ti layer is deposited on the second insulating layer 6 as the second adhesion metal layer 7 (see schematic diagram). Figure 7 Next, a 200 nm thick Au layer is deposited on the second adhesion metal layer 7 as the second electrode layer 8 (see schematic diagram). Figure 8 ( ), forming a second stacked electrode; the area of ​​the second stacked electrode needs to be slightly smaller than the area of ​​the first stacked electrode in order to facilitate the subsequent lead-out of the first electrode.

[0056] S3: Spin-coat a layer of first photoresist 10 onto the entire surface of one side of the second stacked electrode of the device (see structural schematic diagram). Figure 9 After exposure and development, the pixel area 12 of the first electrode finger 5 is exposed (see structural schematic diagram). Figure 10 The second electrode layer 8, the second adhesive metal layer 7, and the second insulating layer 6 of the pixel region of the first electrode finger are removed sequentially by dry etching until the surface of the first electrode layer 4 of the pixel region of the first electrode finger 5 is exposed (see schematic diagram). Figure 11 It can be seen that the pixel area 12 of the first electrode finger 5 and the pixel area of ​​the second electrode finger 9 are arranged alternately on the surface of the intermediate device; then the photoresist is removed to obtain the intermediate device.

[0057] S4: Spin-coat the second photoresist 11 onto the upper surface of the intermediate device (see structural schematic diagram). Figure 12 After exposure and development, the positions of the first electrode finger 5 and the second electrode finger 9 are exposed (see structural schematic diagram). Figure 13 It can be seen that the patterned photoresist layer has a precisely formed hole array 13, and the photoresist is retained in the gap between the upper and lower electrodes to serve as a temporary isolation, thus obtaining the electroplating template.

[0058] S5: Using the electroplating template as the cathode, electrochemical deposition is performed in the Au electroplating solution. During electrochemical deposition, the current density is controlled at 1 mA / cm². 2 Electroplating for 20 minutes allowed Au pillars to grow to approximately 2.5 μm in height within the cavity array, yielding the first electrode finger 5 and the second electrode finger 9. (During the electrochemical deposition process, the electrode gaps were filled with photoresist, effectively preventing short circuits caused by lateral connections during electroplating.) After electroplating, the second photoresist 11 was removed using a wet process, followed by cleaning and drying to obtain a three-dimensional multilayer interdigitated electrode (structural schematic diagram can be seen). Figure 1 and Figure 2 ).

[0059] Example 2 S1: A silicon wafer is used as the substrate 1; the upper surface of the silicon wafer is thermally oxidized to form a 200nm thick SiO2 layer as the first insulating layer 2 (structural schematic diagram can be seen). Figure 3 A 10 nm thick Cr layer is first deposited on the first insulating layer 2 of the substrate 1 as the first adhesion metal layer 3 (see schematic diagram). Figure 4 Next, a 250 nm thick Pt layer is deposited on the first adhesion metal layer 3 as the first electrode layer 4, forming the first electrode stack (see schematic diagram). Figure 5 ).

[0060] S2: A 600nm thick SiO2 layer is deposited as the second insulating layer 6 in the first electrode layer 4 of the first electrode stack (see structural schematic diagram). Figure 6A 10 nm thick Cr layer is deposited on the second insulating layer 6 as the second adhesion metal layer 7 (see schematic diagram). Figure 7 Next, a 250 nm thick Pt layer is deposited on the second adhesion metal layer 7 as the second electrode layer 8 (see schematic diagram). Figure 8 ( ), forming a second stacked electrode; the area of ​​the second stacked electrode needs to be slightly smaller than the area of ​​the first stacked electrode in order to facilitate the subsequent lead-out of the first electrode.

[0061] S3: Spin-coat a layer of first photoresist 10 onto the entire surface of one side of the second stacked electrode of the device (see structural schematic diagram). Figure 9 After exposure and development, the pixel area 12 of the first electrode finger 5 is exposed (see structural schematic diagram). Figure 10 The second electrode layer 8, the second adhesive metal layer 7, and the second insulating layer 6 of the pixel region of the first electrode finger are removed sequentially by dry etching until the surface of the first electrode layer 4 of the pixel region of the first electrode finger 5 is exposed (see schematic diagram). Figure 11 It can be seen that the pixel area 12 of the first electrode and the pixel area of ​​the second electrode are arranged alternately on the surface of the intermediate device; then the photoresist is removed to obtain the intermediate device.

[0062] S4: Spin-coat the second photoresist 11 onto the upper surface of the intermediate device (see structural schematic diagram). Figure 12 After exposure and development, the positions of the first electrode finger 5 and the second electrode finger 9 are exposed (see structural schematic diagram). Figure 13 It can be seen that the patterned photoresist layer has a precisely formed hole array 13, and the photoresist is retained in the gap between the upper and lower electrodes to serve as a temporary isolation, thus obtaining the electroplating template.

[0063] S5: The electroplating template is used as the cathode and placed in the Pt electroplating solution for electrochemical deposition. During electrochemical deposition, the current density is controlled at 0.8 mA / cm². 2 Electroplating was performed for 15 minutes to grow Pt pillars to a height of approximately 2 μm within the porous array, yielding the first electrode finger 5 and the second electrode finger 9. (During the electrochemical deposition process, the electrode gaps were filled with photoresist, effectively preventing short circuits caused by lateral connections during electroplating.) After electroplating, the second photoresist 11 was removed using a wet process, and the electrode was cleaned and dried to obtain a three-dimensional multilayer interdigitated electrode (see schematic diagram). Figure 1 and Figure 2 ).

[0064] Example 3 S1: A silicon wafer is used as the substrate 1; the upper surface of the silicon wafer is thermally oxidized to form a 600nm thick SiO2 layer as the first insulating layer 2 (see structural schematic diagram). Figure 3A 30 nm thick Ti layer is first deposited on the first insulating layer 2 of the substrate 1 as the first adhesion metal layer 3 (see schematic diagram). Figure 4 Next, a 150 nm thick Au layer is deposited on the first adhesion metal layer 3 as the first electrode layer 4, forming the first electrode stack (see schematic diagram). Figure 5 ).

[0065] S2: A 600nm thick Si3N4 layer is deposited as the second insulating layer 6 in the first electrode layer 4 of the first electrode stack (see structural schematic diagram). Figure 6 A 30 nm thick Ti layer is deposited on the second insulating layer 6 as the second adhesion metal layer 7 (see schematic diagram). Figure 7 Next, a 150 nm thick Au layer is deposited on the second adhesion metal layer 7 as the second electrode layer 8 (see schematic diagram). Figure 8 ( ), forming a second stacked electrode; the area of ​​the second stacked electrode needs to be slightly smaller than the area of ​​the first stacked electrode in order to facilitate the subsequent lead-out of the first electrode.

[0066] S3: Spin-coat a layer of first photoresist 10 onto the entire surface of one side of the second stacked electrode of the device (see structural schematic diagram). Figure 9 After exposure and development, the pixel area 12 of the first electrode finger 5 is exposed (see structural schematic diagram). Figure 10 The second electrode layer 8, the second adhesive metal layer 7, and the second insulating layer 6 of the pixel region of the first electrode finger are removed sequentially by dry etching until the surface of the first electrode layer 4 of the pixel region of the first electrode finger 5 is exposed (see schematic diagram). Figure 11 It can be seen that the pixel area 12 of the first electrode finger 5 and the pixel area of ​​the second electrode finger 9 are arranged alternately on the surface of the intermediate device; then the photoresist is removed to obtain the intermediate device.

[0067] S4: Spin-coat the second photoresist 11 onto the upper surface of the intermediate device (see structural schematic diagram). Figure 12 After exposure and development, the positions of the first electrode finger 5 and the second electrode finger 9 are exposed (see structural schematic diagram). Figure 13 It can be seen that the patterned photoresist layer has a precisely formed hole array 13, and the photoresist is retained in the gap between the upper and lower electrodes to serve as a temporary isolation, thus obtaining the electroplating template.

[0068] S5: The electroplating template is used as the cathode and placed in the Au electroplating solution for electrochemical deposition. During electrochemical deposition, the current density is controlled at 1.2 mA / cm². 2Electroplating for 25 minutes allowed Au pillars to grow to approximately 3 μm in height within the cavity array, yielding the first electrode finger 5 and the second electrode finger 9. (During the electrochemical deposition process, the electrode gaps were filled with photoresist, effectively preventing short circuits caused by lateral connections during electroplating.) After electroplating, the second photoresist 11 was removed using a wet process, followed by cleaning and drying to obtain a three-dimensional multilayer interdigitated electrode (see schematic diagram). Figure 1 and Figure 2 ).

[0069] Comparative Example 1 A photolithographic pattern for the interdigitated bottom electrode was fabricated by spin-coating photoresist (3000 rpm, 30 s), pre-baking (110°C, 70 s), exposure, post-baking (110°C, 70 s), and development (55 s) on the SiO2 layer of a silicon wafer. A 5 nm thick Cr metal layer was deposited at a deposition rate of 0.2 nm / s using electron beam evaporation, followed by a 50 nm thick Au metal layer at a deposition rate of 0.5 nm / s. After removing the photoresist, a conventional planar interdigitated electrode was obtained.

[0070] Application Example 1 S1: Using a 20 mg / mL ZnO NCs ethanol / chlorobenzene mixed solution, an electron transport layer of 50 nm thickness was formed by high-voltage electrostatic adsorption onto the first electrode of Example 1 under 10 kV electrostatic conditions.

[0071] S2: Use MoO2 at a concentration of 15 mg / mL x An isopropanol solution of NCs is electrostatically adsorbed onto the second electrode of Example 1 under a high voltage of 12kV to form a hole transport layer with a thickness of 40nm.

[0072] S3: Finally, PbS quantum dot ink is printed between the electron and hole transport layers by inkjet printing until the electrode fingers are completely covered, thus obtaining a quantum dot detector.

[0073] Comparative Application Example 1 A quantum dot detector was obtained by spin-coating a layer of PbS quantum dot ink with a thickness of 380 nm onto the planar interdigitated electrode of Comparative Example 1.

[0074] The responsivity and specific detectivity of the quantum dot detectors in Application Example 1 and Comparative Application Example 1 were tested, and the test results are shown in Table 1.

[0075] Table 1 As can be seen from the data in Table 1, the quantum dot detector in Application Example 1 has a 9-fold increase in responsivity compared to the traditional quantum dot detector in Comparative Application Example 1; the specific detectivity D* has also increased by an order of magnitude.

[0076] The above embodiments are only for illustrating the technical concept and features of the present invention, and are intended to enable those skilled in the art to understand the content of the present invention and implement it accordingly. They should not be construed as limiting the scope of protection of the present invention. All equivalent changes or modifications made in accordance with the spirit and essence of the present invention should be covered within the scope of protection of the present invention.

Claims

1. A three-dimensional interdigitated electrode, characterized in that, include: Base; A first insulating layer is disposed on the substrate; A first adhesive metal layer is disposed on the side of the first insulating layer away from the substrate; The first electrode layer is disposed on the side of the first adhesive metal layer away from the first insulating layer; A plurality of first electrode fingers are arranged in an array at intervals on the first electrode layer and extend vertically in a direction away from the first electrode layer; The second insulating layer is filled in an array between adjacent first electrode fingers and is spaced apart from the first electrode fingers. A second adhesive metal layer is disposed on the side of the second insulating layer away from the first electrode layer; The second electrode layer is disposed on the side of the second adhesive metal layer away from the second insulating layer; A plurality of second electrode fingers are arranged in an array at intervals on the side of the second electrode layer away from the second insulating layer and extend vertically in a direction away from the second electrode layer. The second electrode fingers and the first electrode fingers are arranged alternately in the vertical direction.

2. The three-dimensional interdigitated electrode according to claim 1, characterized in that, The substrate is a silicon substrate.

3. The three-dimensional interdigitated electrode according to claim 1, characterized in that, The first insulating layer and the second insulating layer are each independently selected from either SiO2 insulating layer or Si3N4 insulating layer; the thickness of the first insulating layer and the second insulating layer are each independently 200~600nm.

4. The three-dimensional interdigitated electrode according to claim 1, characterized in that, The first and second adhesive metal layers are each independently selected from either Cr or Ti adhesive metal layers; the thickness of the first and second adhesive metal layers is each independently 10~30 nm.

5. The three-dimensional interdigitated electrode according to claim 1, characterized in that, The first electrode layer and the second electrode layer are each independently selected from Au electrode layer or Pt electrode layer; the thickness of the first electrode layer and the second electrode layer are each independently 150~250nm.

6. The three-dimensional interdigitated electrode according to claim 1, characterized in that, The first electrode finger and the second electrode finger are each independently selected from Au electrode fingers or Pt electrode fingers; the height of the first electrode finger and the second electrode finger are each independently 2~3μm.

7. The method for preparing a three-dimensional interdigitated electrode according to any one of claims 1 to 6, characterized in that, Includes the following steps: S1. A first insulating layer is prepared on a silicon substrate, and a first adhesion metal layer and a first electrode layer are sequentially deposited on the first insulating layer to form a first electrode stack. S2. A second insulating layer, a second adhesive metal layer, and a second electrode layer are sequentially deposited in the first electrode layer of the first electrode stack. A second electrode stack is obtained; S3. Photoresist is spin-coated onto the second electrode of the second electrode stack. After exposure and development, the position of the first electrode pointing to the pixel area is exposed. Then, dry etching is performed to remove the second electrode layer, the second adhesive metal layer and the second insulating layer of the first electrode pointing to the pixel area in sequence, and the first electrode layer of the first electrode pointing to the pixel area is exposed. After removing the photoresist, intermediate device 1 is obtained. S4. Spin-coat a layer of photoresist onto the entire surface of the second electrode layer side of the intermediate device 1 until the entire surface is smooth. Through photolithography and development, expose the positions of the first electrode finger and the second electrode finger to obtain the intermediate device 2 with the interdigitated electrode pattern. S5. The intermediate device 2 containing the interdigitated electrode pattern is placed in the electroplating solution as the cathode and electrochemically deposited. After electroplating, the first electrode finger and the second electrode finger are obtained. Then, the photoresist is removed by wet process to obtain the three-dimensional interdigitated electrode.

8. The method for preparing a three-dimensional interdigitated electrode according to claim 7, characterized in that, In step S5, the current density for electrochemical deposition is 0.8~1.2 mA / cm². 2 The electrochemical deposition time is 15~25 min.

9. The method for preparing a three-dimensional interdigitated electrode according to claim 7, characterized in that, In step S5, the electroplating solution is either an Au electroplating solution or a Pt electroplating solution.

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