Silicon light modulation device and method of making the same

Abstract

This application provides a silicon optical modulation device and its fabrication method. The silicon optical modulation device includes a silicon device layer, a buried oxide layer, and a supporting substrate layer. The buried oxide layer is disposed on the supporting substrate layer, and the silicon device layer is disposed on the buried oxide layer. An electro-optic modulator for realizing phase modulation of optical signals based on target differential electrical signals is formed in the silicon device layer. An air cavity is formed between the buried oxide layer and the supporting substrate layer. The projection area of ​​the air cavity on the buried oxide layer at least partially overlaps with the projection area of ​​the electro-optic modulator on the buried oxide layer. In this way, the dielectric constant of the supporting substrate layer is reduced by the air cavity, the capacitance between the traveling wave electrode of the electro-optic modulator and the supporting substrate layer is reduced, thereby increasing the characteristic impedance of the silicon optical modulation device, reducing the effective refractive index and attenuation coefficient of the radio frequency signal, and thus increasing the bandwidth of the silicon optical modulation device. This allows the silicon optical modulation device of this solution to meet the requirements of high-speed optical networks.

Description

Technical Field

[0001] This application relates to the field of optoelectronic integration technology, and more specifically, to a silicon photonic modulation device and its fabrication method. Background Technology

[0002] In recent years, with the rapid development of artificial intelligence, big data models, and high-performance computing, data center traffic transmission has increased dramatically, placing higher demands on the transmission bandwidth of switches. Pluggable optical modules are small, hot-swappable optical transceivers installed in switch ports. Electro-optic modulators are an important component of optical transceivers, primarily used to convert electrical signals into optical signals.

[0003] On silicon-based platforms, the most common modulation principle is the free carrier dispersion effect. This effect changes the refractive index of the waveguide by voltage, and then converts the phase change into an intensity change through a Mach-Zehnder interferometer structure, thus achieving modulation. This type of modulator is called a Mach-Zehnder modulator (MZM). Building upon this, to achieve high bandwidth and low modulation voltage, a traveling-wave electrode structure is typically used to construct a silicon optical modulation device with a length on the order of millimeters. Silicon optical modulation devices usually use SOI wafers, with a buried oxide layer between the top silicon layer and the silicon substrate.

[0004] However, due to the low resistivity of the silicon substrate material in silicon photonics modulation devices, the modulation signal attenuates during transmission through the traveling wave electrode structure, and the refractive index increases, resulting in a low bandwidth for silicon photonics modulation devices, which is difficult to meet the requirements of high-speed optical networks. Summary of the Invention

[0005] The purpose of this application is to provide a silicon photonic modulation device and its fabrication method, in order to solve the problem that the silicon substrate material of the silicon photonic modulation device has low resistivity, the modulation signal attenuates during transmission in the traveling wave electrode structure, and the refractive index increases, which in turn leads to a low bandwidth of the silicon photonic modulation device.

[0006] In a first aspect, this application provides a silicon optical modulation device, including a silicon device layer, a buried oxide layer, and a supporting substrate layer; the buried oxide layer is disposed on the supporting substrate layer, and the silicon device layer is disposed on the buried oxide layer; an electro-optic modulator for realizing phase modulation of an optical signal based on a target differential electrical signal is formed in the silicon device layer; an air cavity is formed between the buried oxide layer and the supporting substrate layer, the air cavity extends along the planar extension direction of the buried oxide layer and the supporting substrate layer, and the air cavity is enclosed between the buried oxide layer and the supporting substrate layer; wherein, the projection area of ​​the air cavity on the buried oxide layer at least partially overlaps with the projection area of ​​the electro-optic modulator on the buried oxide layer.

[0007] The silicon photonic modulation device designed in this scheme incorporates an air cavity between the buried oxide layer and the supporting substrate. This air cavity is designed to at least partially overlap with the projection area of ​​the electro-optic modulator on the buried oxide layer. This air cavity reduces the dielectric constant of the supporting substrate, decreasing the capacitance between the traveling wave electrode of the electro-optic modulator and the supporting substrate. This, in turn, increases the characteristic impedance of the silicon photonic modulation device, reduces the effective refractive index and attenuation coefficient of the radio frequency signal, and consequently increases the bandwidth of the silicon photonic modulation device. This allows the silicon photonic modulation device of this scheme to meet the requirements of high-speed optical networks. Furthermore, the air cavity not only increases bandwidth but also reduces parasitic capacitance interference between the traveling wave electrode and the supporting substrate, suppressing the influence of interference signals from the supporting substrate on the electro-optic modulator. This enables the target differential electrical signal to more stably control the phase modulation of the optical signal, improving modulation accuracy and reducing signal distortion. In addition, the air cavity designed in this scheme extends along the plane extension direction of the buried oxide layer and the supporting substrate layer, and the air cavity is closed between the buried oxide layer and the supporting substrate layer. This ensures that the setting of the air cavity will not affect the overall mechanical strength of the device, such as the support and stability of the electro-optic modulator, thereby improving the overall working stability of the silicon photonics modulation device. At the same time, the cavity structure of the air cavity can also reduce the weight of the device, adapting to the development trend of miniaturization of pluggable optical modules.

[0008] In an alternative embodiment of the first aspect, the supporting substrate layer includes a silicon substrate layer; a buried oxide layer is disposed on the silicon substrate layer and connected to the silicon substrate layer; an etching trench is disposed on the silicon substrate layer; wherein the etching trench and the buried oxide layer form an air cavity.

[0009] The above-described implementation method provided by this solution consists only of a silicon substrate layer, eliminating the splicing or connection issues of multi-layer structures. This results in higher mechanical strength, reduces the likelihood of interlayer peeling and other failures, and provides more stable support for the buried oxide layer and silicon device layer. This improves the lifespan and reliability of the entire silicon optical modulation device, simplifies device structure design, and reduces assembly difficulty. Furthermore, this solution only requires etching the silicon substrate layer to form an etching groove, which is then bonded to the buried oxide layer to form an air cavity. No additional materials or complex processing steps are required, making the fabrication process mature, simple, and low-cost.

[0010] In an optional embodiment of the first aspect, the supporting substrate layer includes a silicon substrate layer and an isolation oxide layer; the isolation oxide layer is disposed between the silicon substrate layer and the buried oxide layer; an etching trench is formed on the silicon substrate layer; an etched via corresponding to the etching trench is formed on the isolation oxide layer; wherein the etching trench, the etched via, and the buried oxide layer form an air cavity.

[0011] The above-described implementation of this solution involves setting an isolation oxide layer between the silicon substrate and the buried oxide layer, and connecting the etching trenches and the buried oxide layer through etched vias in the isolation oxide layer to form an air cavity. This design of the support substrate layer can improve the insulation performance between the silicon substrate and the buried oxide layer through the isolation oxide layer, reducing leakage current and interference signal transmission. In conjunction with the air cavity's effect of reducing dielectric constant and capacitance, it can more effectively reduce the attenuation coefficient of radio frequency signals. At the same time, the isolation oxide layer can also protect the etching trenches of the silicon substrate, preventing the etching trenches from being contaminated by external impurities and affecting the effectiveness of the air cavity.

[0012] In an alternative embodiment of the first aspect, the area of ​​the projected region of the etched trench on the buried oxide layer is the same as the area of ​​the projected region of the etched via on the buried oxide layer.

[0013] In the above-described implementation method provided by this solution, the projected areas of the etched groove and the etched via are the same, which makes the internal space of the air cavity uniform, the reduction effect on the dielectric constant of the supporting substrate layer uniform, the capacitance distribution between the traveling wave electrode and the supporting substrate layer uniform, and the characteristic impedance, effective refractive index of the radio frequency signal and attenuation coefficient consistent in all regions of the electro-optic modulator. This avoids uneven local signal attenuation and inconsistent bandwidth, ensures the uniformity of optical signal phase modulation, reduces modulation distortion, and improves the transmission quality of optical signal.

[0014] In an alternative embodiment of the first aspect, the projected area of ​​the etched trench on the buried oxide layer is larger than the projected area of ​​the etched via on the buried oxide layer.

[0015] The above-described implementation method provided by this solution features a larger projected area of ​​the etching trench, resulting in a larger volume of the air cavity. This allows for a more thorough reduction in the dielectric constant of the supporting substrate, further decreasing the capacitance between the traveling wave electrode and the supporting substrate, increasing the characteristic impedance, and reducing the attenuation coefficient of the radio frequency signal. Consequently, it more effectively reduces the transmission loss of the modulation signal and increases the bandwidth of the modulator. Simultaneously, the smaller projected area of ​​the etched via reduces the opening area on the isolation oxide layer, preventing structural damage to the isolation oxide layer caused by excessive or oversized openings, and enhancing the mechanical strength and sealing performance of the isolation oxide layer.

[0016] In an alternative embodiment of the first aspect, the electro-optic modulator includes a first signal electrode and a second signal electrode symmetrically distributed along the PN junction; wherein the projection regions of the first signal electrode on the buried oxide layer and the projection regions of the second signal electrode on the buried oxide layer are both located within the projection regions of the air cavity on the buried oxide layer.

[0017] The above-described implementation of this solution places the projections of both the first signal electrode and the second signal electrode within the projection area of ​​the air cavity, enabling the air cavity to fully cover the area where the signal electrodes are located. This precisely reduces the dielectric constant of the supporting substrate area corresponding to the signal electrodes, decreases the parasitic capacitance between the traveling wave electrode and the supporting substrate, thereby improving the characteristic impedance, reducing the effective refractive index and attenuation coefficient of the radio frequency signal, and maximizing the bandwidth enhancement effect of the air cavity.

[0018] In an optional embodiment of the first aspect, the electro-optic modulator includes a first signal electrode and a second signal electrode symmetrically distributed along the PN junction, and the air cavity includes a first air cavity and a second air cavity; wherein the projection area of ​​the first signal electrode on the buried oxide layer coincides with the projection area of ​​the first air cavity on the buried oxide layer, and the projection area of ​​the second signal electrode on the buried oxide layer coincides with the projection area of ​​the second air cavity on the buried oxide layer.

[0019] The above-described implementation method provided by this solution precisely covers the two signal electrodes with two independent first air cavities and second air cavities respectively, thereby achieving one-to-one capacitance optimization of the two signal electrodes in the electro-optic modulator. This can specifically and precisely reduce the parasitic capacitance between each traveling wave electrode and the supporting substrate layer, further improve the characteristic impedance, reduce the RF signal attenuation coefficient, and achieve a more significant bandwidth improvement effect.

[0020] In an optional embodiment of the first aspect, the electro-optic modulator includes a first signal electrode and a second signal electrode symmetrically distributed along the PN junction, and the air cavity includes a plurality of spaced-apart air channels; wherein the projection regions of the first signal electrode and the second signal electrode on the buried oxide layer partially overlap with the projection regions of the plurality of spaced-apart air channels on the buried oxide layer.

[0021] The above-described implementation method provided by this solution can effectively reduce the dielectric constant of the supporting substrate layer, reduce the capacitance between the traveling wave electrode and the supporting substrate layer through synergistic effect, improve the characteristic impedance, and reduce the attenuation coefficient of the radio frequency signal, thereby increasing the bandwidth. At the same time, it can retain some connection areas between the supporting substrate layer and the buried oxide layer, avoid the mechanical strength reduction problem caused by a single large air cavity, achieve a balance between performance and stability, and improve the reliability and service life of the silicon photonics modulation device.

[0022] Secondly, this application provides a method for fabricating a silicon optical modulation device, comprising: obtaining an initial silicon optical wafer; wherein the initial silicon optical wafer includes a silicon device layer, a buried oxide layer, and an initial silicon substrate layer disposed sequentially from top to bottom, and an electro-optic modulator for realizing phase modulation of an optical signal based on a target differential electrical signal is formed in the silicon device layer; bonding a carrier layer on the silicon device layer and removing the initial silicon substrate layer of the initial silicon optical wafer to obtain a silicon optical wafer to be bonded; obtaining a target support substrate layer, wherein an etching groove corresponding to the electro-optic modulator on the silicon device layer is formed on the target support substrate layer; bonding the target support substrate layer to the buried oxide layer of the silicon optical wafer to be bonded, such that an air cavity is formed between the etching groove on the target support substrate layer and the buried oxide layer, wherein the projection area of ​​the air cavity on the buried oxide layer at least partially overlaps with the projection area of ​​the electro-optic modulator on the buried oxide layer; and removing the carrier layer to obtain the target silicon optical modulation device.

[0023] The fabrication method of the silicon photonic modulation device described above first involves bonding an existing SOI wafer with the substrate removed to a target support substrate layer with etched grooves. This creates an air cavity between the target support substrate layer and the buried oxide layer. The projection area of ​​this air cavity on the buried oxide layer at least partially overlaps with the projection area of ​​the electro-optic modulator, allowing the air cavity to specifically act on the traveling wave electrode region of the electro-optic modulator. This precisely reduces the dielectric constant of the support substrate layer and decreases parasitic capacitance, thereby stabilizing and improving the device bandwidth and effectively solving the problems of modulation signal attenuation and insufficient bandwidth in existing technologies. Simultaneously, this solution uses temporary bonding protection of the carrier layer to effectively avoid deformation, damage, or contamination of the silicon device layer and buried oxide layer during the removal of the initial silicon substrate layer. This ensures that the core structure of the electro-optic modulator remains undamaged, thus guaranteeing the stable electro-optic performance of the target silicon photonic modulation device, reducing device losses during fabrication, and improving fabrication yield. Furthermore, this solution modifies the existing SIO wafer structure without introducing special materials, equipment, or new processes. It is highly compatible with existing silicon-based device production lines, requiring no significant modifications to the production line, thus lowering the mass production threshold and production costs. Finally, the air cavity designed in this scheme extends along the plane extension direction of the buried oxide layer and the supporting substrate layer, and the air cavity is closed between the buried oxide layer and the supporting substrate layer. This ensures that the setting of the air cavity will not affect the overall mechanical strength of the device, such as the support and stability of the electro-optic modulator, thereby improving the overall stability of the silicon photonics modulation device.

[0024] In an optional embodiment of the second aspect, obtaining the target support substrate includes: obtaining a bonded silicon optical wafer; wherein the bonded silicon optical wafer includes a bonded silicon device layer, a bonded buried oxide layer, and a bonded silicon substrate layer arranged sequentially from top to bottom; removing the bonded silicon device layer and the bonded buried oxide layer on the bonded silicon optical wafer to obtain the bonded silicon substrate layer; and etching grooves on the bonded silicon substrate layer corresponding to the positions of the electro-optic modulators on the silicon device layer to obtain the target support substrate layer.

[0025] The above-described implementation method provided in this solution uses a conventional SOI wafer as the substrate, eliminating the need for a specially customized substrate. Existing etching processes can be used to remove redundant layers and prepare etching trenches. The process is mature and simple to operate, significantly reducing the preparation cost and processing difficulty of the target support substrate layer. At the same time, the main body of the target support substrate layer is consistent with the initial silicon substrate layer material of the initial silicon photonics wafer, exhibiting good compatibility with the buried oxide layer. During bonding, a stable bonding interface can be formed, avoiding problems such as interlayer peeling and gaps. This ensures that a closed air cavity is formed between the etching trench and the buried oxide layer, preventing air leakage and guaranteeing the long-term stability of the low dielectric constant characteristics of the air cavity, thereby ensuring the durability of the bandwidth improvement effect.

[0026] In an optional embodiment of the second aspect, obtaining the target support substrate includes: obtaining a bonded silicon optical wafer; wherein the bonded silicon optical wafer includes a bonded silicon device layer, a bonded buried oxide layer, a bonded isolation oxide layer, and a bonded silicon substrate layer arranged sequentially from top to bottom; removing the bonded silicon device layer and the bonded buried oxide layer on the bonded silicon optical wafer to obtain a bonded isolation oxide layer and a silicon substrate layer connected to the isolation oxide layer; etching grooves on the bonded silicon substrate layer corresponding to the positions of electro-optic modulators on the device layer, and etching vias on the isolation oxide layer corresponding to the positions of the etching grooves to obtain the target support substrate layer.

[0027] The above-described implementation method provided in this solution features a bonded buried oxide layer and a bonded silicon substrate layer that are inherent structures of the original SOI wafer. These structures are tightly bonded and structurally stable, eliminating the need for additional multilayer structures. This results in higher mechanical strength and stable support for the silicon device layer and the buried oxide layer. Furthermore, this solution retains the original bonded buried oxide layer of the bonded silicon photonic wafer, eliminating the need for additional isolation oxide layers. This further enhances the insulation performance between the silicon substrate layer and the buried oxide layer of the silicon photonic wafer to be bonded, reducing leakage current and substrate noise coupling. In synergy with the air cavity, this method can more effectively reduce the attenuation coefficient of the radio frequency signal, further improving device bandwidth and modulation accuracy.

[0028] In an alternative embodiment of the second aspect, removing the initial silicon substrate layer of the initial silicon photonic wafer includes: removing the initial silicon substrate layer of the initial silicon photonic wafer by mechanical polishing or dry etching.

[0029] The above-described implementation method provided in this solution offers two methods: mechanical polishing and dry etching. The specific method can be flexibly selected according to the actual scenario. Mechanical polishing can control the removal thickness by adjusting the polishing parameters, while dry etching can achieve precise etching by adjusting the process parameters. Both methods can ensure the complete removal of the initial silicon substrate layer without damaging the silicon device layer and buried oxide layer, thus protecting the core structure of the electro-optic modulator, reducing device loss during the fabrication process, and improving the fabrication yield.

[0030] The above description is only an overview of the technical solution of this application. In order to better understand the technical means of this application and to implement it in accordance with the contents of the specification, and to make the above and other objects, features and advantages of this application more obvious and understandable, the following are specific embodiments of this application. Attached Figure Description

[0031] To more clearly illustrate the technical solutions of the embodiments of this application, the accompanying drawings used in the embodiments of this application will be briefly introduced below. It should be understood that the following drawings only show some embodiments of this application and should not be regarded as a limitation of the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0032] Figure 1 This is a first structural schematic diagram of the silicon photonic modulation device provided in the embodiments of this application; Figure 2 This is a second structural schematic diagram of the silicon photonic modulation device provided in the embodiments of this application; Figure 3 This is a third structural schematic diagram of the silicon photonic modulation device provided in the embodiments of this application; Figure 4 This is a fourth structural schematic diagram of the silicon photonic modulation device provided in the embodiments of this application; Figure 5 This is a fifth structural schematic diagram of the silicon photonic modulation device provided in the embodiments of this application; Figure 6 This is a sixth structural schematic diagram of the silicon photonic modulation device provided in the embodiments of this application; Figure 7 This is a seventh structural schematic diagram of the silicon photonic modulation device provided in the embodiments of this application; Figure 8 Examples of various structures of air ducts provided in embodiments of this application; Figure 9 This is a schematic diagram of the first process of the preparation method provided in the embodiments of this application; Figure 10 This is a schematic diagram of the second process of the preparation method provided in the embodiments of this application; Figure 11This is a schematic diagram of the third process of the preparation method provided in the embodiments of this application.

[0033] Icons: 10 - Silicon device layer; 110 - Electro-optic modulator; 20 - Buried oxide layer; 30 - Support substrate layer; 310 - Silicon substrate layer; 3110 - Etching trench; 320 - Isolation oxide layer; 3210 - Etched via; 40 - Air cavity; 410 - First air cavity; 420 - Second air cavity; 430 - Air cavity channel; D1 - First signal electrode; D2 - Second signal electrode. Detailed Implementation

[0034] The embodiments of the technical solution of this application will now be described in detail with reference to the accompanying drawings. These embodiments are only used to more clearly illustrate the technical solution of this application and are therefore merely examples, and should not be used to limit the scope of protection of this application.

[0035] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application pertains; the terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the application; the terms “comprising” and “having”, and any variations thereof, in the specification, claims, and foregoing description of the drawings are intended to cover non-exclusive inclusion.

[0036] In the description of the embodiments of this application, technical terms such as "first" and "second" are used only to distinguish different objects and should not be construed as indicating or implying relative importance or implicitly specifying the number, specific order, or primary and secondary relationship of the indicated technical features. In the description of the embodiments of this application, "multiple" means two or more, unless otherwise explicitly defined.

[0037] In this document, the term "embodiment" means that a particular feature, structure, or characteristic described in connection with an embodiment may be included in at least one embodiment of this application. The appearance of this phrase in various places throughout the specification does not necessarily refer to the same embodiment, nor is it a separate or alternative embodiment mutually exclusive with other embodiments. It will be explicitly and implicitly understood by those skilled in the art that the embodiments described herein can be combined with other embodiments.

[0038] In the description of the embodiments in this application, the term "and / or" is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, and B existing alone. Additionally, the character " / " in this document generally indicates that the preceding and following related objects have an "or" relationship.

[0039] In the description of the embodiments of this application, the term "multiple" refers to two or more (including two), similarly, "multiple sets" refers to two or more (including two sets), and "multiple pieces" refers to two or more (including two pieces).

[0040] In the description of the embodiments of this application, the technical terms "center," "longitudinal," "lateral," "length," "width," "thickness," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," "clockwise," "counterclockwise," "axial," "radial," and "circumferential" indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing the embodiments of this application and simplifying the description, and are not intended to indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on the embodiments of this application.

[0041] In the description of the embodiments of this application, unless otherwise expressly specified and limited, technical terms such as "installation," "connection," "joining," and "fixing" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral part; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components. For those skilled in the art, the specific meaning of the above terms in the embodiments of this application can be understood according to the specific circumstances.

[0042] In recent years, with the rapid development of artificial intelligence, big data models, and high-performance computing, data center traffic transmission has increased dramatically, placing higher demands on the transmission bandwidth of switches. Pluggable optical modules are small, hot-swappable optical transceivers installed in switch ports. Electro-optic modulators are an important component of optical transceivers, primarily used to convert electrical signals into optical signals.

[0043] On silicon-based platforms, the most common modulation principle is the free carrier dispersion effect. This effect changes the refractive index of the waveguide by voltage, and then converts the phase change into an intensity change through a Mach-Zehnder interferometer structure, thus achieving modulation. This type of modulator is called a Mach-Zehnder modulator (MZM). Building upon this, to achieve high bandwidth and low modulation voltage, a traveling-wave electrode structure is typically used to construct a silicon optical modulation device with a length on the order of millimeters. Silicon optical modulation devices usually use SOI wafers, with a buried oxide layer between the top silicon layer and the silicon substrate.

[0044] However, due to the low resistivity of the silicon substrate material in silicon photonics modulation devices, the modulation signal attenuates during transmission through the traveling wave electrode structure, and the refractive index increases, resulting in a low bandwidth for silicon photonics modulation devices, which is difficult to meet the requirements of high-speed optical networks.

[0045] To address the aforementioned issues, this application provides a silicon photonics modulation device and its fabrication method. An air cavity is disposed between the buried oxide layer and the supporting substrate layer of the silicon photonics modulation device, and the air cavity is defined to at least partially overlap with the projection area of ​​the electro-optic modulator on the buried oxide layer. This air cavity reduces the dielectric constant of the supporting substrate layer, decreases the capacitance between the traveling wave electrode of the electro-optic modulator and the supporting substrate layer, thereby increasing the characteristic impedance of the silicon photonics modulation device, reducing the effective refractive index and attenuation coefficient of the radio frequency signal, and ultimately increasing the bandwidth of the silicon photonics modulation device. This allows the silicon photonics modulation device of this solution to meet the requirements of high-speed optical networks. Simultaneously, the air cavity not only improves bandwidth but also reduces parasitic capacitance interference between the traveling wave electrode and the supporting substrate layer, suppressing the influence of interference signals from the supporting substrate layer on the electro-optic modulator. This enables the target differential electrical signal to more stably control the phase modulation of the optical signal, improving modulation accuracy and reducing signal distortion. Furthermore, the air cavity does not affect the overall mechanical strength of the device, and its cavity structure also reduces the device weight, adapting to the miniaturization trend of pluggable optical modules.

[0046] Based on the above ideas, this application first provides a silicon photonic modulation device, such as... Figure 1 As shown, the silicon photonic modulation device includes a silicon device layer 10, a buried oxide layer 20, and a supporting substrate layer 30. The buried oxide layer 20 is disposed on the supporting substrate layer 30, and the silicon device layer 10 is disposed on the buried oxide layer 20.

[0047] Among them, the silicon device layer 10 represents the core functional layer for realizing optical signal modulation. It is usually made of high-purity silicon material and can be doped through processes such as ion implantation to meet the requirements of electro-optic modulation. It corresponds to the top silicon part in the SOI wafer. The buried oxide layer 20 represents the insulating layer set between the silicon device layer and the supporting substrate layer. Its main function is to achieve electrical isolation between the silicon device layer and the supporting substrate layer and reduce the interference of the substrate to the device layer. It is usually made of silicon dioxide (SiO2) material, and the thickness can be adjusted according to the device design requirements. It corresponds to the buried oxide layer in the SOI wafer. The supporting substrate layer 30 represents the supporting foundation of the silicon optical modulation device. It is used to support the buried oxide layer 20 and the silicon device layer 10 to ensure the structural stability of the entire device. Different material combinations can be used according to design requirements, and it has certain mechanical strength and chemical stability.

[0048] The silicon device layer 10 of this design has an electro-optic modulator 110 for realizing phase modulation of optical signals based on target differential electrical signals. The electro-optic modulator 110 can realize phase modulation of optical signals based on target differential electrical signals. The working principle is to realize phase modulation by changing the refractive index of the waveguide through the free carrier dispersion effect. The common structure is the Mach-Zehnder modulator (MZM).

[0049] In this design, an air cavity 40 is formed between the buried oxide layer 20 and the supporting substrate layer 30, wherein, for example... Figure 1 As shown, the air cavity 40 designed in this scheme extends along the plane extension direction of the buried oxide layer 20 and the supporting substrate layer 30, and the air cavity 40 is enclosed between the buried oxide layer 20 and the supporting substrate layer 30. It will not damage the overall support of the silicon device layer 10, the buried oxide layer 20 and the supporting substrate layer 30, so that the setting of the air cavity will not affect the overall mechanical strength of the device and improve the overall stability of the silicon photonic modulation device.

[0050] The projection area of ​​the air cavity 40 on the buried oxide layer 20 in this design at least partially overlaps with the projection area of ​​the electro-optic modulator 110 on the buried oxide layer 20. This partial overlap means that the orthographic projection of the air cavity 40 on the buried oxide layer 20 at least partially overlaps with the orthographic projection of the electro-optic modulator 110 on the buried oxide layer 20. This ensures that the air cavity can target the region where the electro-optic modulator is located, maximizing its effects of reducing dielectric constant, decreasing capacitance, and increasing bandwidth.

[0051] The silicon photonic modulation device provided in this solution utilizes an air cavity 40 between the buried oxide layer 20 and the supporting substrate layer 30. Since the dielectric constant of air (approximately 1) is much lower than that of the silicon substrate material (approximately 11.7), the air cavity effectively reduces the overall dielectric constant of the supporting substrate layer. This reduction in dielectric constant directly decreases the parasitic capacitance between the traveling wave electrode of the electro-optic modulator and the supporting substrate layer. Since characteristic impedance is negatively correlated with capacitance, reducing capacitance significantly increases the characteristic impedance of the silicon photonic modulation device, making it closer to the characteristic impedance of the RF transmission line and reducing signal reflection. Simultaneously, the increased characteristic impedance further reduces the effective refractive index and attenuation coefficient of the RF signal, reducing signal loss during transmission and thus increasing bandwidth. Furthermore, this solution ensures that the projection area of ​​the air cavity 40 and the electro-optic modulator 110 on the buried oxide layer 20 at least partially overlaps, allowing the air cavity 40 to precisely act on the area where the electro-optic modulator 110 is located, specifically optimizing the capacitance characteristics between the traveling wave electrode and the supporting substrate layer 30 and avoiding structural redundancy caused by ineffective placement.

[0052] The above design enables the silicon photonic modulation device to achieve phase modulation of the optical signal when the electro-optic modulator 110 is in operation. The target differential electrical signal is input to the electro-optic modulator 110, and the refractive index of the waveguide within the silicon device layer 10 is altered based on the free carrier dispersion effect. Due to the air cavity 40, the capacitance between the traveling wave electrode and the supporting substrate layer 30 is reduced, the characteristic impedance is increased, the effective refractive index and attenuation coefficient of the radio frequency signal are lowered, and the leakage and loss of the modulated signal are significantly reduced, thus ensuring the bandwidth performance of the silicon photonic modulation device. Furthermore, the presence of the air cavity 40 reduces heat conduction in the supporting substrate layer 30, concentrating the heat generated during the operation of the electro-optic modulator 110 near the silicon device layer 10, indirectly improving modulation efficiency.

[0053] This silicon photonic modulation device design incorporates an air cavity between the buried oxide layer and the supporting substrate. The air cavity is designed to at least partially overlap with the projection area of ​​the electro-optic modulator on the buried oxide layer. This air cavity reduces the dielectric constant of the supporting substrate, decreasing the capacitance between the traveling wave electrode of the electro-optic modulator and the supporting substrate. This, in turn, increases the characteristic impedance of the silicon photonic modulation device, reduces the effective refractive index and attenuation coefficient of the RF signal, and consequently increases the bandwidth, enabling the device to meet the requirements of high-speed optical networks. Furthermore, the air cavity not only enhances bandwidth but also reduces parasitic capacitance interference between the traveling wave electrode and the supporting substrate, suppressing the impact of interference signals from the supporting substrate on the electro-optic modulator. This allows the target differential electrical signal to more stably control the phase modulation of the optical signal, improving modulation accuracy and reducing signal distortion. Additionally, the air cavity does not affect the overall mechanical strength of the device, and its cavity structure reduces weight, aligning with the trend towards miniaturization of pluggable optical modules.

[0054] In an optional implementation of this embodiment, as one possible implementation, such as Figure 2 As shown, the support substrate 30 designed in this scheme may only include a silicon substrate 310, a buried oxide layer 20 disposed on the silicon substrate 310 and connected to the silicon substrate 310, and an etching groove 3110 disposed on the silicon substrate 310. The air cavity 40 is formed by the etching groove 3110 on the silicon substrate 310 and the buried oxide layer 20.

[0055] In the above-described implementation scheme, an etching trench 3110 is first fabricated on the silicon substrate 310 using an etching process (e.g., dry etching, wet etching). The position and size of the etching trench 3110 match the projection area of ​​the electro-optic modulator 110 on the buried oxide layer 20. Subsequently, the buried oxide layer 20 is placed on the silicon substrate 310, with the lower surface of the buried oxide layer 20 covering the upper surface of the silicon substrate (including the opening of the etching trench). Due to the good sealing properties of the buried oxide layer 20, the opening of the etching trench 3110 is sealed by the buried oxide layer 20, thereby forming a closed air cavity 40 between the etching trench 3110 and the buried oxide layer 20. This air cavity 40 reduces the dielectric constant of the corresponding region of the silicon substrate 310, reduces the capacitance between the traveling wave electrode of the electro-optic modulator 110 and the silicon substrate 310, increases the characteristic impedance, reduces the effective refractive index and attenuation coefficient of the radio frequency signal, and thus improves the bandwidth.

[0056] In the above-described implementation scheme, the supporting substrate layer designed in this scheme consists only of a silicon substrate layer. There are no splicing or connection problems of multi-layer structures, resulting in higher mechanical strength and less susceptibility to failures such as interlayer peeling. It can more stably support the buried oxide layer and silicon device layer, improve the service life and reliability of the entire silicon optical modulation device, simplify device structure design, and reduce assembly difficulty. At the same time, this scheme only requires etching the silicon substrate layer to form an etching groove, and then bonding it with the buried oxide layer to form an air cavity. No additional materials or complex processing steps are required. The fabrication process is mature, simple, and low in cost.

[0057] In an optional implementation of this embodiment, as another possible implementation, such as Figure 3 As shown, the support substrate 30 designed in this scheme may also include a silicon substrate 310 and an isolation oxide layer 320. The isolation oxide layer 320 is disposed between the silicon substrate 310 and the buried oxide layer 20. The air cavity 40 is formed by the etching trench 3110 on the silicon substrate 310, the etching via 3210 on the isolation oxide layer 320 and the buried oxide layer 20.

[0058] In the above-described implementation scheme, firstly, an etching trench 3110 is formed on the silicon substrate 310 by etching, and an etched via 3210 corresponding to the position of the etching trench 3110 is formed on the isolation oxide layer 320 by etching, ensuring that the etched via 3210 can completely connect the etching trench 3110 and the upper surface of the isolation oxide layer 320; then, the isolation oxide layer 320 is disposed on the silicon substrate 310, so that the isolation oxide layer 320 covers the upper surface of the silicon substrate 310, and the etched via 3210 is precisely aligned and connected with the etching trench 3110; finally, a buried oxide layer 20 is disposed on the isolation oxide layer 320, and the lower surface of the buried oxide layer 20 covers the upper surface of the isolation oxide layer 320, thereby forming a closed air cavity 40 through the etching trench 3110, the etched via 3210, and the buried oxide layer 20.

[0059] In the above-described implementation scheme, an isolation oxide layer is set between the silicon substrate and the buried oxide layer, and an air cavity is formed by connecting the etching trench and the buried oxide layer through etching vias formed on the isolation oxide layer. The support substrate layer designed in this way can improve the insulation performance between the silicon substrate and the buried oxide layer through the isolation oxide layer, reduce leakage current and interference signal transmission. In synergy with the effect of the air cavity in reducing the dielectric constant and reducing capacitance, it can more effectively reduce the attenuation coefficient of radio frequency signals. At the same time, the isolation oxide layer can also protect the etching trench of the silicon substrate, preventing the etching trench from being contaminated by external impurities and affecting the function of the air cavity.

[0060] In an optional implementation of this embodiment, as one possible implementation, such as Figure 3 As shown, the projected area of ​​the etching groove 3110 on the buried oxide layer 20 is the same as the projected area of ​​the etching via 3210 on the buried oxide layer 20.

[0061] In the above-described implementation scheme, the same projection area refers to the orthographic projection area of ​​the etching trench 3110 on the silicon substrate 310 onto the buried oxide layer 20 and the orthographic projection area of ​​the etched via 3210 on the isolation oxide layer 320 onto the buried oxide layer 20. The two areas are equal and the projection areas completely overlap, ensuring that the etching trench 3110 and the etched via 3210 can be precisely aligned to form a uniform air cavity channel.

[0062] Based on the design of having the same projection area, when the isolation oxide layer 320 and the buried oxide layer 20 are bonded together, the resulting air cavity 40 has a uniform internal space. This uniformly reduces the dielectric constant of the corresponding region of the supporting substrate layer 30, thereby ensuring a uniform capacitance distribution between the traveling wave electrode and the supporting substrate layer 30. There are no instances of excessively large or small local capacitances, ensuring that the characteristic impedance, effective refractive index of the RF signal, and attenuation coefficient remain consistent across all regions of the electro-optic modulator 110. This avoids differences in signal transmission loss caused by uneven capacitance distribution, ensuring consistent bandwidth performance across all regions of the electro-optic modulator 110 and improving modulation uniformity. Simultaneously, the identical projection area facilitates precise alignment during the etching process, reducing the difficulty of aligning the etched trench 3110 and the etched via 3210, improving fabrication accuracy, and enabling precise patterning through standard photolithography methods to ensure positional matching between the two.

[0063] In the above-described implementation scheme, the projected areas of the etched groove and the etched via are the same, which makes the internal space of the air cavity uniform, the reduction effect on the dielectric constant of the supporting substrate layer uniform, the capacitance distribution between the traveling wave electrode and the supporting substrate layer uniform, and the characteristic impedance, effective refractive index of the radio frequency signal and attenuation coefficient consistent in all regions of the electro-optic modulator. This avoids uneven local signal attenuation and inconsistent bandwidth, ensures the uniformity of optical signal phase modulation, reduces modulation distortion, and improves the transmission quality of optical signals.

[0064] In an optional implementation of this embodiment, as one possible implementation, such as Figure 4 As shown, the projected area of ​​the etching groove 3110 on the buried oxide layer 20 in this design is larger than the projected area of ​​the etching via 3210 on the buried oxide layer 20.

[0065] In the above embodiment, the area of ​​the orthogonal projection region of the etching trench 3110 on the silicon substrate 310 onto the buried oxide layer 20 is larger than the area of ​​the orthogonal projection region of the etched via 3210 on the isolation oxide layer 320 onto the buried oxide layer 20. Furthermore, the projection region of the etched via 3210 is completely located within the projection region of the etching trench 3110. In this way, the larger area of ​​the etching trench 3110 can provide a larger air-accommodating space, which can more effectively reduce the dielectric constant of the corresponding region of the silicon substrate. The smaller area of ​​the etched via 3210 can reduce the number and area of ​​vias on the isolation oxide layer, enhance the structural integrity and sealing of the isolation oxide layer, and ensure the long-term stability of the low dielectric constant characteristics of the air cavity.

[0066] In the above-described implementation scheme, the etched trench has a larger projected area, resulting in a larger air cavity volume. This allows for a more thorough reduction in the dielectric constant of the supporting substrate, further decreasing the capacitance between the traveling wave electrode and the supporting substrate, increasing the characteristic impedance, and reducing the RF signal attenuation coefficient. Consequently, it more effectively reduces modulation signal transmission loss and increases the modulator bandwidth. Simultaneously, the etched via has a smaller projected area, reducing the opening area on the isolation oxide layer. This avoids structural damage to the isolation oxide layer caused by excessive or oversized openings, and enhances the mechanical strength and sealing performance of the isolation oxide layer.

[0067] In an optional implementation of this embodiment, such as Figure 5 As shown, the electro-optic modulator 110 includes a first signal electrode D1 and a second signal electrode D2 symmetrically distributed along the PN junction. The first signal electrode D1 and the second signal electrode D2 represent two electrodes of the electro-optic modulator 110 that receive the target differential electrical signal. One electrode inputs a positive differential signal, and the other electrode inputs a negative differential signal. The symmetrical distribution ensures the uniform distribution of the electrical signal in the PN junction region, improving the modulation uniformity. A traveling wave electrode structure is usually adopted to achieve high bandwidth. The PN junction represents the interface between the P-type semiconductor and the N-type semiconductor formed by doping in the silicon device layer. It is the core structure of the electro-optic modulator to realize the phase modulation of the optical signal. Based on the free carrier dispersion effect, the carrier concentration in the PN junction region will change with the applied voltage (target differential electrical signal), thereby changing the waveguide refractive index and realizing the phase modulation of light.

[0068] Based on the electro-optic modulator 110 designed above, as a possible implementation, this scheme designs the projection areas of the first signal electrode D1 and the second signal electrode D2 on the buried oxide layer 20 to be located within the projection areas of the air cavity 40 on the buried oxide layer 20. Specifically, the air cavity 40 designed in this scheme can be as follows: Figure 5 The projection areas of the first signal electrode D1 and the second signal electrode D2 in the square air cavity shown both fall within the projection area of ​​the square air cavity.

[0069] In this embodiment, the projections of the first signal electrode D1 and the second signal electrode D2 are both set within the projection area of ​​the air cavity, so that the air cavity can fully cover the area where the signal electrodes are located, accurately reduce the dielectric constant of the area of ​​the supporting substrate layer 30 corresponding to the signal electrodes, reduce the parasitic capacitance between the traveling wave electrode and the supporting substrate layer 30, thereby improving the characteristic impedance, reducing the effective refractive index and attenuation coefficient of the radio frequency signal, and maximizing the role of the air cavity in improving bandwidth.

[0070] As another possible implementation, this solution designs the air cavity 40 to include a first air cavity 410 and a second air cavity 420, specifically as follows: Figure 6As shown, the first air cavity 410 and the second air cavity 420 are spaced apart and are both square. In this design, the projection area of ​​the first signal electrode D1 on the buried oxide layer 20 coincides with the projection area of ​​the first air cavity 410 on the buried oxide layer 20, and the projection area of ​​the second signal electrode D2 on the buried oxide layer 20 coincides with the projection area of ​​the second air cavity 420 on the buried oxide layer 20.

[0071] In this embodiment, based on the position and size of the first signal electrode D1 and the second signal electrode D2, a first air cavity 410 and a second air cavity 420 are respectively fabricated between the buried oxide layer 20 and the supporting substrate layer 30. The two air cavities are independent and not connected. The position and size of the first air cavity 410 are perfectly matched with the first signal electrode D1, and its projection on the buried oxide layer 20 completely coincides with the projection of the first signal electrode D1, thereby precisely reducing the dielectric constant of the supporting substrate layer region corresponding to the first signal electrode D1 and reducing the capacitance between the first signal electrode D1 and the supporting substrate layer 30. The position and size of the second air cavity 420 are perfectly matched with the second signal electrode D2, and its projection on the buried oxide layer 20 completely coincides with the projection of the second signal electrode D2, thereby precisely optimizing the capacitance between the second signal electrode D2 and the supporting substrate layer 30. This design allows each signal electrode to be precisely covered by its corresponding air cavity, achieving one-to-one capacitance optimization. This enables more precise reduction of the parasitic capacitance between each traveling wave electrode and the supporting substrate layer, improving characteristic impedance, reducing the RF signal attenuation coefficient, and avoiding mutual interference between the two signal electrodes.

[0072] The above-described implementation scheme achieves one-to-one capacitance optimization of the two signal electrodes in the electro-optic modulator by precisely covering the two signal electrodes with two independent first air cavities and second air cavities respectively. This can specifically and precisely reduce the parasitic capacitance between each traveling wave electrode and the supporting substrate layer, further improve the characteristic impedance, reduce the RF signal attenuation coefficient, and achieve a more significant bandwidth improvement effect.

[0073] As another possible implementation method, such as Figure 7 As shown, the air cavity 40 designed in this scheme may further include multiple spaced air channels 430. The projection areas of the first signal electrode D1 and the second signal electrode D2 on the buried oxide layer 20 partially overlap with the projection areas of the multiple spaced air channels 430 on the buried oxide layer 20. Wherein, as... Figure 8 As shown, the air cavity 430 designed in this scheme can be a series of radially spaced square air cavities, or a series of transversely spaced square air cavities, or a series of transversely and radially interconnected air cavities forming a grid pattern. The specific shape of the air cavity can be adapted to the actual application scenario and process.

[0074] In this embodiment, multiple air cavities 430 work together. The projections of the first signal electrode D1 and the second signal electrode D2 coincide with the projections of a portion of the air cavities 430, ensuring that each region of the signal electrode can achieve effective capacitance optimization. At the same time, the spaced arrangement avoids the problem of insufficient mechanical strength and small connection area between the supporting substrate layer and the buried oxide layer caused by a single large air cavity. This achieves a balance between capacitance optimization, bandwidth improvement, and structural stability, and is especially suitable for long traveling wave electrode structures, which can improve bandwidth while ensuring the mechanical reliability of the device.

[0075] The above-described implementation scheme uses multiple spaced air cavities that can effectively reduce the dielectric constant of the supporting substrate, decrease the capacitance between the traveling wave electrode and the supporting substrate, increase the characteristic impedance, and reduce the attenuation coefficient of the radio frequency signal, thereby increasing the bandwidth. At the same time, it can retain some connection areas between the supporting substrate and the buried oxide layer, avoiding the mechanical strength reduction problem caused by a single large air cavity, achieving a balance between performance and stability, and improving the reliability and service life of the silicon photonics modulation device.

[0076] This application also provides a method for fabricating a silicon photonic modulation device, such as... Figure 9 As shown, this method can realize the fabrication of a silicon photonic modulation device in the following manner, including: Step S900: Obtain an initial silicon photonic wafer comprising a silicon device layer, a buried oxide layer, and an initial silicon substrate layer arranged sequentially from top to bottom.

[0077] Step S910: Bond a carrier layer on the silicon device layer and remove the initial silicon substrate layer of the initial silicon photonic wafer to obtain the silicon photonic wafer to be bonded.

[0078] Step S920: Obtain the target support substrate layer with etched trenches corresponding to the electro-optic modulator on the silicon device layer.

[0079] Step S930: Bond the target support substrate layer to the buried oxide layer of the silicon photonics wafer to be bonded, so that an air cavity is formed between the etch trench on the target support substrate layer and the buried oxide layer.

[0080] Step S940: Remove the carrier layer to obtain the target silicon photonic modulation device.

[0081] The above-mentioned fabrication method first obtains an initial silicon photonic wafer, which adopts a conventional SOI wafer structure. The electro-optic modulator has been pre-fabricated in the silicon device layer, and the initial silicon substrate layer is a conventional low resistivity silicon substrate. This step utilizes existing mature wafer fabrication technology to reduce the introduction of new processes and lower the fabrication cost.

[0082] Secondly, this method bonds a carrier layer onto the silicon device layer. Since the silicon device layer and buried oxide layer are relatively thin (typically 1-3 μm for the buried oxide layer and 50-200 nm for the silicon device layer), directly removing the initial silicon substrate would cause deformation and damage. This method, by pre-bonding the carrier layer, effectively supports the silicon device layer and buried oxide layer, ensuring structural integrity. Subsequently, the initial silicon substrate layer is removed, exposing the lower surface of the buried oxide layer to obtain the silicon photonic wafer to be bonded. The initial silicon substrate layer can be removed using either mechanical polishing or dry etching.

[0083] Furthermore, this solution obtains a target support substrate layer. The core of this solution is to etch an etching groove on the target support substrate layer that corresponds to the electro-optic modulator. The position and size of the etching groove are precisely matched with the electro-optic modulator, providing a groove structure for the subsequent formation of the air cavity, ensuring that the air cavity can act specifically on the electro-optic modulator region.

[0084] Finally, this scheme bonds the target support substrate layer to the buried oxide layer of the silicon photonic wafer to be bonded. Utilizing the sealing property of the buried oxide layer, the etching trench and the lower surface of the buried oxide layer form a closed air cavity. The projection relationship between the air cavity and the electro-optic modulator is strictly controlled (at least partially overlapping) to ensure that the air cavity can accurately reduce the dielectric constant of the support substrate layer in the corresponding region of the electro-optic modulator. After the carrier layer has completed its protective function, it is removed, thereby obtaining the target silicon photonic modulation device.

[0085] The method for fabricating a silicon photonic modulation device provided in this solution first involves bonding an existing SOI wafer (with the substrate removed) to a target support substrate layer with etched grooves. This creates an air cavity between the target support substrate layer and the buried oxide layer. The projection area of ​​this air cavity on the buried oxide layer at least partially overlaps with the projection area of ​​the electro-optic modulator, allowing the air cavity to specifically act on the traveling wave electrode region of the electro-optic modulator. This precisely reduces the dielectric constant of the support substrate layer and decreases parasitic capacitance, thereby stabilizing and increasing the device bandwidth and effectively solving the problems of modulation signal attenuation and insufficient bandwidth in existing technologies. Simultaneously, this solution uses temporary bonding protection of the carrier layer to effectively prevent deformation, damage, or contamination of the silicon device layer and buried oxide layer during the removal of the initial silicon substrate layer. This ensures that the core structure of the electro-optic modulator remains undamaged, thus guaranteeing the stable electro-optic performance of the target silicon photonic modulation device, reducing device losses during fabrication, and improving fabrication yield. Furthermore, this solution modifies the existing SIO wafer structure without introducing special materials, equipment, or new processes. It is highly compatible with existing silicon-based device production lines, requiring no significant modifications to the production line, thus lowering the mass production threshold and production costs.

[0086] In an optional embodiment of this example, as a possible implementation, when the target support substrate layer consists only of a silicon substrate, the target support substrate layer can be fabricated in the following manner: Figure 10 As shown, it includes: Step S1000: Obtain a bonded silicon optical wafer comprising a bonded silicon device layer, a bonded buried oxide layer, and a bonded silicon substrate layer arranged sequentially from top to bottom.

[0087] Step S1010: Remove the bonded silicon device layer and the bonded buried oxide layer on the bonded silicon photonic wafer to obtain the bonded silicon substrate layer.

[0088] Step S1020: Etch grooves on the bonded silicon substrate layer corresponding to the positions of the electro-optic modulators on the silicon device layer to obtain the target support substrate layer.

[0089] This embodiment first obtains a bonded silicon photonic wafer. This wafer adopts the same SOI structure (silicon device layer-buried oxide layer-silicon substrate layer) as the initial silicon photonic wafer, requiring no special customization and can be directly obtained using existing SOI wafer fabrication technology, reducing substrate costs. Then, the bonded silicon device layer and bonded buried oxide layer on the bonded silicon photonic wafer are removed using mature processes such as dry etching and wet etching to completely remove the top bonded silicon device layer and the middle bonded buried oxide layer, leaving only the bottom bonded silicon substrate layer. Finally, etching trenches corresponding to the electro-optic modulator positions on the silicon device layer are etched on the bonded silicon substrate layer. By precisely controlling the photolithography and etching process parameters (such as etching time, etching depth, and etching range), the position and size of the etching trenches are ensured to perfectly match the electro-optic modulator. After etching, the bonded silicon substrate layer becomes the target support substrate layer, which can be directly used to bond with the buried oxide layer of the silicon photonic wafer to form an air cavity.

[0090] The above-described implementation scheme uses a conventional SOI wafer as the substrate, eliminating the need for a specially customized substrate. Existing etching processes can be used to remove redundant layers and fabricate etching trenches, resulting in mature and simple processes that significantly reduce the fabrication cost and processing difficulty of the target support substrate. Simultaneously, the main body of the target support substrate is made of the same material as the initial silicon substrate of the initial silicon photonics wafer, exhibiting good compatibility with the buried oxide layer. This allows for the formation of a stable bonding interface during bonding, avoiding issues such as interlayer delamination and gaps. It also ensures the formation of a closed air cavity between the etching trench and the buried oxide layer, preventing air leakage and guaranteeing the long-term stability of the air cavity's low dielectric constant characteristics, thereby ensuring the durability of the bandwidth enhancement effect.

[0091] In an optional embodiment of this example, as a possible implementation, when the target support substrate layer includes a silicon substrate and an isolation oxide layer, the target support substrate layer can be fabricated in the following manner: Figure 11 As shown, it includes: Step S1100: Obtain a bonded silicon optical wafer comprising a bonded silicon device layer, a bonded buried oxide layer, and a bonded silicon substrate layer arranged sequentially from top to bottom.

[0092] Step S1110: Remove the bonded silicon device layer on the bonded silicon photonic wafer to obtain a bonded buried oxide layer and a bonded silicon substrate layer connected to the bonded buried oxide layer.

[0093] Step S1120: Etch the bonded buried oxide layer and the bonded silicon substrate layer to form an etching trench on the bonded silicon substrate layer corresponding to the position of the electro-optic modulator on the device layer, and an etching via corresponding to the position of the etching trench on the bonded buried oxide layer, thereby obtaining the target support substrate layer.

[0094] This embodiment can first obtain a bonded silicon photonics wafer. The wafer adopts a conventional SOI wafer structure, which consists of a bonded silicon device layer, a bonded buried oxide layer, and a bonded silicon substrate layer from top to bottom. This structure is consistent with the basic structure of the initial silicon photonics wafer. There is no need to add an additional isolation oxide layer. It can be obtained directly using existing SOI wafer fabrication technology, reducing substrate cost and fabrication complexity.

[0095] Then, the bonded silicon device layer on the bonded silicon wafer is removed. Using mature etching processes (such as dry etching and wet etching), only the top bonded silicon device layer is removed, leaving the bonded buried oxide layer and the bonded silicon substrate layer connected to it. At this point, the bonded buried oxide layer and the bonded silicon substrate layer are tightly bonded, forming a double-layer basic structure of the bonded silicon substrate layer and the bonded buried oxide layer. There is no need to prepare an additional isolation oxide layer, simplifying the preparation steps.

[0096] Finally, the bonded buried oxide layer and the bonded silicon substrate layer are etched. By precisely controlling the photolithography and etching process parameters, etching trenches corresponding to the positions of the electro-optic modulators on the silicon device layer are simultaneously formed on the bonded silicon substrate layer. Etched vias corresponding to the positions of the etching trenches are formed on the bonded buried oxide layer. This ensures that the etched vias and etching trenches are precisely aligned and completely connected. Furthermore, the positions and sizes of the etching trenches and etched vias match the electro-optic modulators. After etching, the double-layer structure of the bonded silicon substrate layer and the bonded buried oxide layer becomes the target support substrate layer. After bonding with the buried oxide layer of the silicon photonic wafer to be bonded, the etching trenches, etched vias, and buried oxide layer together form a closed air cavity.

[0097] In the above-described implementation scheme, the bonded buried oxide layer and the bonded silicon substrate layer are the inherent structures of the original SOI wafer. They are tightly bonded and structurally stable, requiring no additional multi-layer structures. This results in higher mechanical strength and stable support for the silicon device layer and the buried oxide layer. Furthermore, this scheme retains the original bonded buried oxide layer of the bonded silicon photonic wafer, eliminating the need for additional isolation oxide layers. This further enhances the insulation performance between the silicon substrate layer and the buried oxide layer of the silicon photonic wafer to be bonded, reducing leakage current and substrate noise coupling. In synergy with the air cavity, it can more effectively reduce the RF signal attenuation coefficient, further improving device bandwidth and modulation accuracy.

[0098] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of this application, and not to limit them. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features therein. These modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of this application, and they should all be covered within the scope of the claims and specification of this application. In particular, as long as there is no structural conflict, the various technical features mentioned in the embodiments can be combined in any way. This application is not limited to the specific embodiments disclosed herein, but includes all technical solutions falling within the scope of the claims.

Claims

1. A silicon photonic modulation device, characterized in that, The silicon optical modulation device includes a silicon device layer, a buried oxide layer, and a supporting substrate layer; The buried oxide layer is disposed on the supporting substrate layer, and the silicon device layer is disposed on the buried oxide layer; An electro-optic modulator for realizing optical signal phase modulation based on the target differential electrical signal is formed within the silicon device layer; An air cavity is formed between the buried oxide layer and the supporting substrate layer. The air cavity extends along the plane extension direction of the buried oxide layer and the supporting substrate layer, and the air cavity is enclosed between the buried oxide layer and the supporting substrate layer. The projection area of ​​the air cavity on the buried oxide layer at least partially overlaps with the projection area of ​​the electro-optic modulator on the buried oxide layer.

2. The silicon photonic modulation device according to claim 1, characterized in that, The supporting substrate layer includes a silicon substrate layer; The buried oxide layer is disposed on the silicon substrate and connected to the silicon substrate; The silicon substrate layer is provided with etching grooves; The etched groove and the buried oxide layer together form the air cavity.

3. The silicon photonic modulation device according to claim 1, characterized in that, The supporting substrate layer includes a silicon substrate layer and an isolation oxide layer; The isolation oxide layer is disposed between the silicon substrate layer and the buried oxide layer; The silicon substrate has etching grooves formed on it; the isolation oxide layer has etching vias corresponding to the etching grooves. The etched groove, the etched through-hole, and the buried oxide layer form the air cavity.

4. The silicon photonic modulation device according to claim 3, characterized in that, The area of ​​the projected region of the etched groove on the buried oxide layer is the same as the area of ​​the projected region of the etched via on the buried oxide layer.

5. The silicon photonic modulation apparatus according to claim 3, characterized in that, The area of ​​the etched groove projected onto the buried oxide layer is larger than the area of ​​the etched via projected onto the buried oxide layer.

6. The silicon photonic modulation apparatus according to claim 1, characterized in that, The electro-optic modulator includes a first signal electrode and a second signal electrode symmetrically distributed along the PN junction; The projection areas of the first signal electrode and the second signal electrode on the buried oxide layer are both located within the projection areas of the air cavity on the buried oxide layer.

7. The silicon photonic modulation apparatus according to claim 1, characterized in that, The electro-optic modulator includes a first signal electrode and a second signal electrode symmetrically distributed along the PN junction, and the air cavity includes a first air cavity and a second air cavity; Wherein, the projection area of ​​the first signal electrode on the buried oxide layer coincides with the projection area of ​​the first air cavity on the buried oxide layer, and the projection area of ​​the second signal electrode on the buried oxide layer coincides with the projection area of ​​the second air cavity on the buried oxide layer.

8. The silicon photonic modulation apparatus according to claim 1, characterized in that, The electro-optic modulator includes a first signal electrode and a second signal electrode symmetrically distributed along the PN junction, and the air cavity includes multiple spaced air channels. The projection areas of the first signal electrode and the second signal electrode on the buried oxide layer partially overlap with the projection areas of the multiple spaced air channels on the buried oxide layer.

9. A method for fabricating a silicon photonic modulation device, characterized in that, The method includes: Obtain an initial silicon photonic wafer; wherein, the initial silicon photonic wafer includes a silicon device layer, a buried oxide layer and an initial silicon substrate layer arranged sequentially from top to bottom, and an electro-optic modulator for realizing optical signal phase modulation based on a target differential electrical signal is formed in the silicon device layer; A carrier layer is bonded on the silicon device layer, and the initial silicon substrate layer of the initial silicon photonic wafer is removed to obtain the silicon photonic wafer to be bonded. Obtain a target support substrate layer, wherein the target support substrate layer has an etching groove corresponding to the electro-optic modulator on the silicon device layer; The target support substrate is bonded to the buried oxide layer of the silicon photonic wafer to be bonded, such that an air cavity is formed between the etch trench on the target support substrate and the buried oxide layer, wherein the projection area of ​​the air cavity on the buried oxide layer at least partially overlaps with the projection area of ​​the electro-optic modulator on the buried oxide layer. Remove the carrier layer to obtain the target silicon photonic modulation device.

10. The method according to claim 9, characterized in that, The process of obtaining the target support substrate layer includes: Obtain a bonded silicon optical wafer; wherein the bonded silicon optical wafer comprises a bonded silicon device layer, a bonded buried oxide layer and a bonded silicon substrate layer arranged sequentially from top to bottom; Remove the bonded silicon device layer and the bonded buried oxide layer on the bonded silicon optical wafer to obtain the bonded silicon substrate layer; The target support substrate layer is obtained by etching grooves on the bonded silicon substrate layer that correspond to the positions of the electro-optic modulators on the silicon device layer.

11. The method according to claim 9, characterized in that, The process of obtaining the target support substrate layer includes: Obtain a bonded silicon optical wafer; wherein the bonded silicon optical wafer comprises a bonded silicon device layer, a bonded buried oxide layer and a bonded silicon substrate layer arranged sequentially from top to bottom; Remove the bonded silicon device layer on the bonded silicon optical wafer to obtain a bonded buried oxide layer and a bonded silicon substrate layer connected to the bonded buried oxide layer; The bonded buried oxide layer and the bonded silicon substrate layer are etched to form an etching trench on the bonded silicon substrate layer corresponding to the position of the electro-optic modulator on the silicon device layer, and an etching via corresponding to the position of the etching trench is formed on the bonded buried oxide layer to obtain the target support substrate layer.

12. The method according to claim 9, characterized in that, The removal of the initial silicon substrate layer from the initial silicon photonic wafer includes: The initial silicon substrate layer of the initial silicon photonic wafer is removed by mechanical grinding or dry etching.

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