A design method for generating circuit schematics from passive S-parameter matrices
By using a passive S-parameter matrix generation circuit schematic design method and merging inductances using a transformer equivalent model, the problems of excessive area and high cost of passive components during chip integration are solved, achieving circuit area optimization and cost reduction.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- POSSUMIC TECH CO LTD
- Filing Date
- 2026-02-09
- Publication Date
- 2026-06-02
AI Technical Summary
In existing technologies, passive devices have excessively large areas and high costs when integrated into chips. Traditional methods cannot effectively optimize circuit design to reduce inductor usage and lower costs.
By constructing a circuit schematic generated from a passive S-parameter matrix, and using a transformer equivalent model to merge multiple inductors in the circuit, the circuit topology is transformed into one with a transformer as the main component, thereby reducing the number of inductors and optimizing the circuit area.
It achieves a significant reduction in circuit area (by 2 to 4 times) and a reduction in cost, meeting the requirements of low-cost chip design.
Smart Images
Figure CN122133603A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of circuit schematic design technology, and in particular to a design method for generating circuit schematics from passive S-parameter matrices. Background Technology
[0002] In today's radio frequency and millimeter-wave communication systems, passive circuits play a crucial role. Depending on the application, common types include power dividers, circulators, various couplers, and baluns. While transmission line-based implementations of some traditional passive devices (such as branch-line couplers) are widely known, they typically occupy a large area, making them unsuitable for size- and cost-sensitive integrated circuit designs. For passive devices with specific functions (such as 45° hybrid couplers), obtaining a circuit schematic that can realize their functionality is a significant challenge in current circuit design.
[0003] In the prior art, patent CN114239458A provides a method for reproducing test results of existing devices through circuit modeling and simulation. Although this method can convert Y parameters into a circuit diagram containing capacitors, inductors, resistors, and controlled current sources, its main purpose is to perform broadband modeling and simulation of existing devices. The generated circuit contains the ideal component of "controlled current source" and cannot be directly applied to actual circuit production. Furthermore, for chip design, a large number of inductors significantly increases chip area, transmission loss, and cost, failing to meet the requirements of practical low-cost chip design. How to optimize their area so that they can be integrated onto a chip at a lower cost is also a problem that still needs to be solved.
[0004] Therefore, a circuit schematic design method is needed that can directly start from the target function, generate a circuit consisting only of realizable passive components, and combine multiple inductors in the circuit through specific equivalent means, thereby significantly reducing the circuit area and chip cost while achieving the specific function. Summary of the Invention
[0005] In view of this, the present invention provides a design method for generating circuit schematics from passive S-parameter matrices, in order to solve the technical problem that passive devices are too large in area and too expensive when integrated into chips due to the use of transmission lines or lumped circuit models containing a large number of independent inductors.
[0006] To achieve the above-mentioned technical objectives, the present invention adopts the following technical solution:
[0007] In a first aspect, the present invention provides a design method for generating circuit schematics from passive S-parameter matrices, comprising:
[0008] Determine the single-ended S-parameter matrix based on the function of the target circuit;
[0009] Convert the single-ended S-parameter matrix into the corresponding Y-parameter matrix;
[0010] Based on the imaginary part characteristics of the elements in the Y parameter matrix, an initial equivalent circuit consisting of capacitors and inductors is constructed.
[0011] The initial equivalent circuit is optimized using a transformer equivalent model, and multiple inductors in the circuit are combined into a transformer, resulting in a circuit schematic with the transformer as the main component.
[0012] In some embodiments of the present invention, before determining the single-ended S-parameter matrix according to the function of the target circuit, the method further includes:
[0013] If the input and output signals of the target circuit involve differential signals, the function of each device in the circuit is defined using a hybrid S-parameter matrix, and then the hybrid S-parameter matrix is converted into a single-ended S-parameter matrix.
[0014] In some embodiments of the present invention, constructing an initial equivalent circuit composed of capacitors and inductors based on the imaginary part characteristics of the elements in the Y-parameter matrix includes:
[0015] The capacitance or inductance values between ports in the circuit, as well as the connection method between the ports and the common ground, are determined based on the off-diagonal elements of the Y matrix; where:
[0016] Methods for determining the capacitance or inductance values between ports include:
[0017] For the off-diagonal elements of the Y matrix If its imaginary part is positive, then at the port With port An inductor with an inductance value is connected between them. If its imaginary part is negative, then at the port... With port A capacitor is connected between them, with a capacitance value of ;
[0018] in, This is the center operating angular frequency of the device;
[0019] The methods for determining the connection method of components between the port and the common ground include:
[0020] calculate If the imaginary part of the calculation result is positive, then the port... Connect a capacitor in parallel to a common location, with a capacitance value of If the imaginary part of the calculation result is negative, then the port... Connect an inductor in parallel to a common location, with an inductance value of If the imaginary part of the calculation result is zero, then the port... There are no components that extend to the public domain;
[0021] in, Total number of ports and Port identifier.
[0022] In some embodiments of the present invention, optimizing the initial equivalent circuit using a transformer equivalent model includes:
[0023] In the initial equivalent circuit, two non-common-port capacitors are selected, each corresponding to one of the two elements in the Y matrix whose imaginary part is negative. and , ;
[0024] If the four ports If there are two or more interconnected inductors, the circuit is replaced using a transformer equivalent model.
[0025] In some embodiments of the present invention, when the capacitance values of the two non-common-port capacitors are equal, circuit substitution using a transformer equivalent model includes:
[0026] Based on the parameter relationships of the transformer equivalent circuit, the interconnecting inductance in the original circuit can be directly replaced using the transformer equivalent circuit.
[0027] In some embodiments of the present invention, when the capacitance values of the two non-common ports are not equal, circuit substitution is performed using a transformer equivalent model, including:
[0028] The capacitor with the larger capacitance value is split into two parallel capacitors. One of these capacitors has the same capacitance value as the other capacitor at a different port to satisfy the equivalent circuit conditions of the transformer, thus constructing a transformer. The remaining parallel capacitors are retained in the circuit.
[0029] In some embodiments of the present invention, alternative steps to the transformer equivalent model further include:
[0030] If, after the transformer replacement, there exists a single element in the circuit with a negative imaginary part, then the first port corresponding to that element is selected to form a capacitor pair with the second port of another capacitor connected to the common ground.
[0031] If there are two or more interconnecting inductors between the first port and the second port and between them and ground, then the interconnecting inductors and capacitors are replaced by a transformer equivalent circuit to construct a transformer with one end grounded.
[0032] In some embodiments of the present invention, alternative steps to the transformer equivalent model further include:
[0033] For inductive elements that exist in the transformer equivalent circuit but not in the original circuit, an additional parallel capacitor is added to the circuit to make them resonate and cancel out the effect.
[0034] Calculate the specific parameters of the transformer based on the correspondence between the inductance and capacitance values of the transformer's equivalent circuit and those in the original circuit.
[0035] In some embodiments of the present invention, after obtaining the Y parameter matrix, the method further includes:
[0036] Transmission lines are used to replace capacitors and inductors in board-level circuit design.
[0037] Secondly, the present invention also provides a design apparatus for generating circuit schematics from passive S-parameter matrices, comprising:
[0038] The analysis module is used to determine the single-ended S-parameter matrix based on the function of the target circuit.
[0039] The first conversion module is used to convert the single-ended S-parameter matrix into the corresponding Y-parameter matrix.
[0040] The second conversion module is used to construct an initial equivalent circuit composed of capacitors and inductors based on the imaginary part characteristics of the elements in the Y parameter matrix.
[0041] The equivalent conversion module is used to optimize the initial equivalent circuit using the transformer equivalent model, merging multiple inductors in the circuit into a transformer, and obtaining a circuit schematic with the transformer as the main component.
[0042] Thirdly, the present invention also provides a computer-readable storage medium storing one or more programs, which can be executed by one or more processors to implement the steps in the design method of the passive S-parameter matrix generation circuit schematic described in the above technical solution.
[0043] Compared with existing technologies, the design method for generating circuit schematics from passive S-parameter matrices proposed in this invention has the following advantages:
[0044] (1) This invention breaks through the limitations of traditional theory. By establishing a complete conversion process of S-parameter matrix → Y-parameter matrix → LC element → transformer equivalent, it realizes the automated conversion from the functional goal of the circuit (defined by the S-parameter matrix) to the topology of manufacturable passive components, reducing the time required for design engineers to manually iterate and optimize the circuit topology.
[0045] (2) Introducing an equivalent transformer model. Inductors are the components that occupy the most chip area in RFICs. By merging multiple discrete inductors in the initial circuit into a single coupled transformer, a significant improvement in integration is achieved. This efficient replacement and integration directly translates into significant economic benefits, effectively reducing production costs.
[0046] In summary, this invention breaks through the limitations of traditional RF circuit synthesis theory, and can automatically transform functional objectives into manufacturable passive component topologies. By introducing a transformer equivalent model, it achieves the effective merging of multiple inductors in the circuit, thereby achieving significant chip area optimization (reducing area by 2 to 4 times) and cost reduction. Attached Figure Description
[0047] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0048] Figure 1 A system architecture diagram of an embodiment of the design method for the passive S-parameter matrix generation circuit schematic provided by the present invention;
[0049] Figure 2 A flowchart illustrating an embodiment of the design of a passive S-parameter matrix generation circuit schematic provided by the present invention;
[0050] Figure 3 The schematic diagram of the four-port orthogonal hybrid coupler circuit provided by the present invention;
[0051] Figure 4a The transformer schematic diagram provided for this invention;
[0052] Figure 4b The transformer Y-matrix equivalent capacitance and inductance circuit provided by this invention;
[0053] Figure 5 A schematic diagram of a four-port orthogonal hybrid coupler with a transformer provided for this invention;
[0054] Figure 6 This is a schematic diagram of an embodiment of the design device for the passive S-parameter matrix generation circuit provided by the present invention. Detailed Implementation
[0055] To make the objectives, technical solutions, and advantages of this application clearer, the embodiments of this application will be described in further detail below with reference to the accompanying drawings.
[0056] It should be noted that the design method for the passive S-parameter matrix generation circuit schematic provided in this application is generally executed by the terminal device, and correspondingly, the design device for the passive S-parameter matrix generation circuit schematic is generally set in the terminal device.
[0057] Figure 1 An exemplary system architecture is shown that can be applied to the design of circuit schematics generated from passive S-parameter matrices in this application.
[0058] like Figure 1 As shown, the system architecture may include: terminal device 101 and server 102. Terminal device 101 and server 102 can communicate via a network, which serves as the medium for providing communication links between the various units. The network may include various types of wired or wireless communication links, such as: wired communication links including fiber optic cables, twisted-pair cables, or coaxial cables; and wireless communication links including Bluetooth communication links, Wi-Fi communication links, or microwave communication links.
[0059] It should be noted that the terminal device 101 and the server 102 can be either hardware or software. When the terminal device 101 and the server 102 are hardware, they can be implemented as a distributed server cluster consisting of multiple servers, or as a single server. When the terminal device 101 and the server 102 are software, they can be implemented as multiple software programs or software modules (for example, to provide distributed services), or as a single software program or software module; no specific limitations are made here.
[0060] The terminal device of this application can be equipped with various communication client applications, such as video recording applications, video playback applications, voice interaction applications, search applications, instant messaging tools, email clients, social platform software, etc.
[0061] A terminal device can be either hardware or software. When the terminal device is hardware, it can be various terminal devices with a display screen, including but not limited to smartphones, tablets, laptops, and desktop computers. When the terminal device is software, it can be installed on the terminal devices listed above. It can be implemented as multiple software programs or software modules (e.g., used to provide distributed services) or as a single software program or software module; no specific limitation is made here.
[0062] When the terminal device is hardware, it can also be equipped with a display device and a camera. The display device can be any device capable of displaying information, and the camera is used to capture video streams. For example, the display device can be a cathode ray tube display (CR), a light-emitting diode display (LED), an e-ink screen, a liquid crystal display (LCD), a plasma display panel (PDP), etc. Users can use the display device on the terminal device to view displayed text, images, videos, and other information.
[0063] It should be understood that Figure 1 The number of terminal devices, networks, and servers shown is for illustrative purposes only. Depending on implementation needs, there can be any number of terminal devices, networks, and servers.
[0064] The following will be combined with the appendix Figure 2 This application provides a detailed description of the design method for the passive S-parameter matrix generation circuit schematic provided in the embodiments of this application. The design apparatus for the passive S-parameter matrix generation circuit schematic in the embodiments of this application can be... Figure 1 The terminal device shown.
[0065] Please see Figure 2 This document provides a flowchart illustrating a design method for generating circuit schematics from a passive S-parameter matrix, as described in an embodiment of this application. Figure 2 As shown, the method described in this application embodiment may include the following steps:
[0066] Step S101: Determine the single-ended S-parameter matrix based on the function of the target circuit;
[0067] Step S102: Convert the single-ended S-parameter matrix into the corresponding Y-parameter matrix;
[0068] Step S103: Based on the imaginary part characteristics of the elements in the Y parameter matrix, construct an initial equivalent circuit composed of capacitors and inductors;
[0069] Step S104: Optimize the initial equivalent circuit using the transformer equivalent model, and merge the multiple inductors in the circuit into a transformer to obtain a circuit schematic with the transformer as the main body.
[0070] The method provided in this embodiment breaks through the limitations of traditional radio frequency circuit synthesis theory and can automatically transform functional objectives into manufacturable passive component topologies. By introducing a transformer equivalent model, it achieves the effective merging of multiple inductors in the circuit, thereby reducing chip area (by 2 to 4 times) and lowering costs.
[0071] It should be noted that the conversion formula from single-ended S-parameter matrix to Y-parameter matrix in this method is suitable for describing port characteristics with a common ground reference and for cases where both input and output signals are single-ended. However, when the target circuit needs to process differential signals, the design objective is not only power transfer between ports, but more importantly, differential and common-mode performance. For differential circuits, although single-ended S-parameter matrices can be defined directly, this leads to ambiguous functional definitions. For example, if single-ended S-parameters are used directly, it is difficult for designers to guarantee whether the final common-mode rejection performance of the circuit meets the requirements. Hybrid S-parameter matrices provide an intuitive and accurate mathematical tool for defining these objectives.
[0072] Therefore, as a preferred embodiment, before step S101, the method further includes: if the input and output signals of the target circuit involve differential signals, then the function of each device in the circuit is defined using a hybrid S-parameter matrix, and then the hybrid S-parameter matrix is converted into a single-ended S-parameter matrix.
[0073] By converting a fully functionally defined hybrid S-parameter matrix into a single-ended S-parameter matrix, complex differential design requirements can be "translated" into standardized inputs acceptable to subsequent circuit design processes, thus avoiding the inability of subsequent circuit topologies to meet differential performance requirements.
[0074] The following example, a four-port orthogonal hybrid coupler, illustrates how this method starts with the definition of the target function, proceeds step by step in circuit design, and finally obtains a circuit schematic with the transformer as the main component.
[0075] As a specific implementation example, taking a typical single-ended network structure orthogonal hybrid coupler as an example, the function of the orthogonal hybrid coupler is to convert the input signal into two orthogonal and equal-amplitude output signals, and each port satisfies impedance matching. Its ideal passive S-parameter matrix can be defined as shown in equation (1):
[0076]
[0077] The S-parameter matrix in equation (1) can be transformed to obtain its corresponding Y-matrix:
[0078]
[0079] In equation (2), Z0 is the characteristic impedance of the device.
[0080] Assuming the device is ideal and lossless, and all elements of the Y matrix are composed of imaginary numbers, equation (2) can be converted into a circuit schematic composed of capacitors and inductors. The specific steps include:
[0081] 1. For any element of the Y matrix If its imaginary part is positive, then the corresponding ports a and b are connected by an inductor with an inductance value of If its imaginary part is negative, then a capacitor is connected between ports a and b, and the capacitance value is... ;in, This is the center operating angular frequency of the coupler.
[0082] 2. If Then there is a parallel capacitor from port a to ground, and its capacitance is [value missing]. ;like Then there is a parallel inductor from port a to ground, and its inductance value is ;like If so, then port a has no ground connection.
[0083] in, Total number of ports and Port identifier.
[0084] Based on the above steps, the Y matrix in equation (2) can be converted into a circuit schematic, such as... Figure 3 As shown. Based on the above analysis, the inductance value in this schematic diagram is... capacitance value , .
[0085] However, in integrated circuits, the area of an inductor is generally much larger than that of a capacitor. This circuit schematic has two inductors, occupying the area of two inductors. At the same time, in order to reduce the mutual inductance, a certain distance must be maintained between the two inductors. This distance not only further increases the chip area, but also increases the transmission loss inside the device.
[0086] To overcome the above-mentioned defects, this application utilizes the transformer equivalent circuit to combine multiple inductors.
[0087] The schematic diagram of a single transformer is as follows: Figure 4a As shown, the Y-parameter matrix corresponding to this transformer is represented as follows:
[0088]
[0089] in, The self-inductance of the primary coil P, The self-inductance of the secondary coil S, The coupling coefficient is... , The mutual inductance between the two coils, ω is the angular frequency.
[0090] It should be briefly explained here that in equation (3), the diagonal elements Representing self-admittance, the off-diagonal elements describe the coupling and connection relationships between different ports, i.e., the coupling admittance within the primary coil, including... The coupling admittance inside the secondary coil includes Main coupling terms (same polarity), including This represents the admittance between the primary and secondary windings at ports of the same polarity (P+ to S+, or P- to S-); cross-coupling terms (opposite polarity), including , which represents the admittance between opposite polarity ports (P+ to S-, or P- to S+) between the primary and secondary windings.
[0091] The equivalent circuit of capacitance and inductance for this transformer is as follows: Figure 4b As shown, Figure 4b In the diagram, the parameter values for each device are:
[0092]
[0093] Therefore, the transformer replacement circuit can combine up to four inductors, and its area is only equivalent to that of a single inductor, which reduces the chip area cost by 2 to 4 times.
[0094] The key to utilizing the equivalent combined inductance of a transformer lies in its equivalent circuit. Figure 4b The two Cs c Capacitors. This is because after replacing the original circuit with an equivalent transformer circuit, for inductive components that were not present in the original circuit, an additional parallel capacitor can be used to cancel their resonance, and the circuit area hardly changes; however, for capacitive components that were not present in the original circuit, an additional parallel inductor is needed to cancel their resonance, that is, an additional inductor is needed in addition to the transformer itself, which violates the original intention of combining inductors using an equivalent transformer circuit. To solve this problem, in practical applications, the specific steps of this solution to combine inductors using an equivalent transformer circuit include:
[0095] Find the two non-common capacitors, corresponding to the two elements in the Y matrix whose imaginary parts are negative. and , ,right and After judging the value, process it according to the following procedure:
[0096] Step S21: First, find two capacitors with equal capacitance values. When the capacitance values are equal, ,like Figure 4b As shown, these two capacitors correspond to Figure 4b The two Cs c Capacitor. If If there are two or more interconnecting inductors between the four ports, a transformer can be used to combine the inductors and reduce the area. The specific parameters of the transformer can be obtained by comparing the inductance and capacitance values of the transformer's equivalent circuit with those in the original circuit. For inductors that are not present in the original circuit, an additional parallel capacitor can be added for resonance after the transformer is replaced.
[0097] If the capacitance values are not equal, that is Then proceed to step S22;
[0098] Step S22: Divide the larger capacitor into two parallel capacitors. One of them and the other capacitor at a different port meet the condition of having the same capacitance value as in step S21, which constitutes the equivalent circuit condition of the transformer. At this time, the remaining parallel capacitors only need to be retained in the new circuit.
[0099] Step S23: If there is still a single element with a negative imaginary part after completing the above two steps, it can form a capacitor pair with another port that has a capacitance to ground. If there are two or more interconnecting inductors between these three ports and ground, repeat steps S21 and S22 to construct a transformer, where one end of the transformer is grounded.
[0100] In some embodiments, the four-port orthogonal coupler described above is used as an example below, combined with... Figure 3 and Figure 4b A detailed explanation of the process of equivalent merging inductance in a transformer:
[0101] First, follow step S21 to find two capacitors that do not share a common port (e.g., Figure 3 (As shown in the orange box), because there are two interconnecting inductors between the four ports corresponding to these two capacitors, merging them using a transformer can save half the area. In the equivalent transformation, Figure 4b In , correspond Figure 3 The two in , Figure 4b The two capacitors in Corresponding to Figure 3 The two in Then we can obtain the following equation:
[0102]
[0103] After the above steps Figure 4b The transformed circuit still contains a single element with a negative imaginary part, i.e., the redundant inductor. Therefore, as Figure 5 As shown, this method also requires the addition of a capacitor. With the redundant inductance in the equivalent circuit To achieve resonance, it can be calculated. The value is:
[0104]
[0105] Thus, the complete derivation of the four-port orthogonal hybrid coupler circuit with the transformer as the main component is completed, proving the completeness and reliability of the design process proposed in this invention.
[0106] The following are embodiments of the apparatus described in this application, which can be used to execute the embodiments of the method described in this application. For details not disclosed in the apparatus embodiments of this application, please refer to the embodiments of the method described in this application.
[0107] Please see Figure 6 This document illustrates a schematic diagram of a design apparatus for generating circuit schematics from passive S-parameter matrices, provided in an exemplary embodiment of this application, hereinafter referred to as apparatus 600. Apparatus 600 can be implemented as all or part of a terminal device through software, hardware, or a combination of both. Apparatus 600 includes:
[0108] Analysis module 610 is used to determine the single-ended S-parameter matrix based on the function of the target circuit;
[0109] The first conversion module 620 is used to convert the single-ended S-parameter matrix into the corresponding Y-parameter matrix.
[0110] The second conversion module 630 is used to construct an initial equivalent circuit composed of capacitors and inductors based on the imaginary part characteristics of the elements in the Y parameter matrix.
[0111] The equivalent conversion module 640 is used to optimize the initial equivalent circuit using the transformer equivalent model, merging multiple inductors in the circuit into a transformer, and obtaining a circuit schematic with the transformer as the main body.
[0112] This application also provides a computer storage medium that can store multiple instructions, which are adapted to be loaded and executed by a processor as described above. Figure 2 The method steps of the illustrated embodiment can be found in the following documentation for detailed execution. Figure 2 The specific details of the illustrated embodiments will not be elaborated here.
[0113] This application also provides a computer program product that stores at least one instruction, which is loaded and executed by the processor to implement the design method of the passive S-parameter matrix generation circuit schematic as described in the above embodiments.
[0114] Those skilled in the art will understand that all or part of the processes in the above embodiments can be implemented by a computer program instructing related hardware. The program can be stored in a computer-readable storage medium, and when executed, it can include the processes of the embodiments of the above methods. The storage medium can be a magnetic disk, optical disk, read-only memory, or random access memory, etc.
[0115] The above description discloses only preferred embodiments of the present invention and should not be construed as limiting the scope of the present invention. Therefore, equivalent variations made in accordance with the claims of the present invention are still within the scope of the present invention.
Claims
1. A design method for generating circuit schematics from passive S-parameter matrices, characterized in that, Includes the following steps: Determine the single-ended S-parameter matrix based on the function of the target circuit; Convert the single-ended S-parameter matrix into the corresponding Y-parameter matrix; Based on the imaginary part characteristics of the elements in the Y parameter matrix, an initial equivalent circuit consisting of capacitors and inductors is constructed. The initial equivalent circuit is optimized using a transformer equivalent model, and multiple inductors in the circuit are combined into a transformer, resulting in a circuit schematic with the transformer as the main component.
2. The design method for generating circuit schematics from passive S-parameter matrices according to claim 1, characterized in that, Before determining the single-ended S-parameter matrix based on the function of the target circuit, the process also includes: If the input and output signals of the target circuit involve differential signals, the function of each device in the circuit is defined using a hybrid S-parameter matrix, and then the hybrid S-parameter matrix is converted into a single-ended S-parameter matrix.
3. The design method for generating circuit schematics from passive S-parameter matrices according to claim 1, characterized in that, The construction of an initial equivalent circuit consisting of capacitors and inductors based on the imaginary part characteristics of the elements in the Y-parameter matrix includes: The capacitance or inductance values between ports in the circuit are determined based on the off-diagonal elements in the Y matrix, and the capacitance or inductance values between the corresponding port and the common ground are determined based on the sum of the elements in each row of the Y matrix. Methods for determining the capacitance or inductance values between ports include: For the off-diagonal elements of the Y matrix If its imaginary part is positive, then at the port With port An inductor with an inductance value is connected between them. If its imaginary part is negative, then at the port... With port A capacitor is connected between them, with a capacitance value of ; in, This is the center operating angular frequency of the device; Methods for determining the capacitance or inductance value between the port and the common ground include: calculate If the imaginary part of the calculation result is positive, then the port... Connect a capacitor in parallel to a common location, with a capacitance value of If the imaginary part of the calculation result is negative, then the port... Connect an inductor in parallel to a common location, with an inductance value of If the imaginary part of the calculation result is zero, then the port... There are no components that extend to the public domain; in, Total number of ports and Port identifier.
4. The design method for generating circuit schematics from passive S-parameter matrices according to claim 1, characterized in that, The optimization of the initial equivalent circuit using the transformer equivalent model includes: In the initial equivalent circuit, two non-common-port capacitors are selected, each corresponding to one of the two elements in the Y matrix whose imaginary part is negative. and , ; If the four ports If there are two or more interconnected inductors, the circuit is replaced using a transformer equivalent model.
5. The design method for generating circuit schematics from passive S-parameter matrices according to claim 4, characterized in that, When the capacitance values of the two non-common-port capacitors are equal, circuit substitution using the transformer equivalent model includes: Based on the parameter relationships of the transformer equivalent circuit, the interconnecting inductance in the original circuit can be directly replaced using the transformer equivalent circuit.
6. The design method for generating circuit schematics from passive S-parameter matrices according to claim 4, characterized in that, When the capacitance values of the two non-common ports are not equal, circuit substitution is performed using a transformer equivalent model, including: The capacitor with the larger capacitance value is split into two parallel capacitors. One of these capacitors has the same capacitance value as the other capacitor at a different port to satisfy the equivalent circuit conditions of the transformer, thus constructing a transformer. The remaining parallel capacitors are retained in the circuit.
7. The design method for generating circuit schematics from a passive S-parameter matrix according to claim 5 or 6, characterized in that, The alternative steps for the transformer equivalent model also include: If, after the transformer replacement, there exists a single element in the circuit with a negative imaginary part, then the first port corresponding to that element is selected to form a capacitor pair with the second port of another capacitor connected to the common ground. If there are two or more interconnecting inductors between the first port and the second port and between them and ground, then the interconnecting inductors and capacitors are replaced by a transformer equivalent circuit to construct a transformer with one end grounded.
8. The design method for generating circuit schematics from passive S-parameter matrices according to claim 4, characterized in that, The alternative steps for the transformer equivalent model also include: For inductive elements that exist in the transformer equivalent circuit but not in the original circuit, an additional parallel capacitor is added to the circuit to make them resonate and cancel out the effect. Calculate the specific parameters of the transformer based on the correspondence between the inductance and capacitance values of the transformer's equivalent circuit and those in the original circuit.
9. A design device for generating circuit schematics from passive S-parameter matrices, characterized in that, include: The analysis module is used to determine the single-ended S-parameter matrix based on the function of the target circuit. The first conversion module is used to convert the single-ended S-parameter matrix into the corresponding Y-parameter matrix. The second conversion module is used to construct an initial equivalent circuit composed of capacitors and inductors based on the imaginary part characteristics of the elements in the Y parameter matrix. The equivalent conversion module is used to optimize the initial equivalent circuit using the transformer equivalent model, merging multiple inductors in the circuit into a transformer, and obtaining a circuit schematic with the transformer as the main component.
10. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores one or more programs, which can be executed by one or more processors to implement the steps in the design method of the passive S-parameter matrix generation circuit schematic as described in any one of claims 1-8.