Half-bridge type power frequency coreless solid state transformer based on time-reversal symmetry principle

Abstract

This invention discloses a half-bridge type coreless solid-state transformer for power frequency based on the parity-time symmetry principle, comprising an input filter, first and second single-phase matrix converters, first and second resonant capacitors, a coreless winding, and an output filter. The input filter is connected in parallel to the input terminal of the first single-phase matrix converter; the output terminal of the first single-phase matrix converter is connected in series with the first resonant capacitor; the coreless winding includes a first coreless winding and a second coreless winding, with the first coreless winding connected in series with the first resonant capacitor, and the second coreless winding connected in series with the second resonant capacitor; the input terminal of the second single-phase matrix converter is connected in series with the second resonant capacitor; the output filter is connected in parallel to the output terminal of the second single-phase matrix converter. This invention revolutionarily eliminates the transformer core and achieves efficient power transmission and voltage transformation functions, significantly reducing the weight and volume of the transformer. Furthermore, it eliminates the production and manufacturing costs of core components, increases power density, and is expected to significantly reduce costs.

Description

Technical Field

[0001] This invention relates to the technical field of transformers and power electronic conversion, and in particular to a half-bridge type coreless solid-state transformer for power frequency based on the principle of parity-time symmetry. Background Technology

[0002] In traditional power systems, power frequency transformers are fundamental equipment for voltage transformation and electrical isolation, consisting of copper windings and silicon steel lamination cores. Operating at an extremely low frequency of 50Hz, traditional power frequency transformers require a large number of coil turns and silicon steel laminations, making them bulky, space-consuming, and increasing the difficulty of transportation and installation. Although power frequency transformers are gradually being replaced by solid-state transformers in some low-voltage applications, the overall cost of solid-state transformers remains significantly higher than that of power frequency transformers, especially due to the high cost of core materials and their customized manufacturing processes, severely limiting their economic viability. To address these issues, coreless solid-state transformers are considered a promising research direction and solution. Coreless transformers offer the following advantages: significantly reduced weight and volume, greatly facilitating solid-state transformer system integration; complete elimination of core materials and manufacturing processes, eliminating the need for complex core optimization design; complete elimination of eddy current and hysteresis losses in the core; and the absence of magnetic saturation issues, as the main magnetic flux is not limited by core saturation flux, resulting in linear characteristics that are more suitable for high-power applications. The parity-time symmetric coreless transformer mechanism solves key problems such as extremely small main magnetic flux, high excitation current, and extremely large leakage flux when the iron core is removed, but it still cannot be applied to power frequency voltage conversion. Therefore, if a solid-state transformer topology capable of power frequency voltage conversion can be constructed based on the parity-time symmetry principle, it is possible to significantly reduce equipment weight, increase power density, and potentially substantially reduce transformer costs while meeting the requirements for efficient power conversion, thereby effectively improving the overall economic efficiency of the power supply system. Summary of the Invention

[0003] The purpose of this invention is to provide a half-bridge type power frequency coreless solid-state transformer based on the parity-time symmetry principle. Based on the parity-time symmetry principle and power electronics technology, it revolutionarily eliminates the iron core element and solves the problem that traditional coreless transformers cannot achieve efficient power conversion at the power frequency.

[0004] To achieve the above objectives, the technical solution provided by this invention is as follows: a half-bridge type power frequency coreless solid-state transformer based on the parity-time symmetry principle, the transformer comprising an input filter, a first single-phase matrix converter, a first resonant capacitor, a coreless winding, a second resonant capacitor, a second single-phase matrix converter, and an output filter; the input filter is composed of passive components and is connected in parallel to the input terminal of the first single-phase matrix converter; the output terminal of the first single-phase matrix converter is connected in series with the first resonant capacitor; the coreless winding comprises a first coreless winding and a second coreless winding coupled to each other, the first coreless winding being connected in series with the first resonant capacitor, and the second coreless winding being connected in series with the second resonant capacitor; the input terminal of the second single-phase matrix converter is connected in series with the second resonant capacitor; the output filter is connected in parallel with the output terminal of the second single-phase matrix converter;

[0005] The first single-phase matrix converter and the second single-phase matrix converter can adopt any of the following topologies:

[0006] The first type of single-phase matrix converter consists of a first half-bridge circuit, a first voltage-dividing capacitor, and a second voltage-dividing capacitor. The first half-bridge circuit is composed of two bidirectional switches connected in series, namely a first bidirectional switch and a second bidirectional switch, representing the bidirectional switch on the high side and the bidirectional switch on the low side of the first half-bridge circuit, respectively. Each bidirectional switch consists of two semiconductor switching transistors connected in reverse series, used for bidirectional power flow and to prevent voltage shoot-through. The first and second voltage-dividing capacitors are connected in series and then connected in parallel to the input terminal of the first single-phase matrix converter. The midpoint of the connection between the two voltage-dividing capacitors is connected to the midpoint of the connection between the two bidirectional switches in the first half-bridge circuit. The first single-phase matrix converter is composed of a second half-bridge circuit, a third voltage-dividing capacitor, and a fourth voltage-dividing capacitor. The second half-bridge circuit consists of two bidirectional switches connected in series, namely a third bidirectional switch and a fourth bidirectional switch, representing the bidirectional switch on the high side and the bidirectional switch on the low side of the second half-bridge circuit, respectively. The third and fourth voltage-dividing capacitors are connected in series and then connected in parallel to the output terminal of the second single-phase matrix converter. The midpoint of the connection between the third and fourth voltage-dividing capacitors and the midpoint of the connection between the two bidirectional switches in the second half-bridge circuit constitute the output terminal of the second single-phase matrix converter.

[0007] The second type is a half-bridge topology consisting of a first bidirectional switch and a second bidirectional switch connected in series, which eliminates the need for a voltage divider capacitor. The two ends of the second bidirectional switch are defined as the output terminals of the first single-phase matrix converter. The second single-phase matrix converter adopts a half-bridge topology consisting of two bidirectional switches connected in series to realize the power conversion on the secondary side.

[0008] The third type involves the first and second single-phase matrix converters being constructed from a half-bridge circuit consisting of two resonant capacitors and two bidirectional switches connected in series. Specifically, two resonant capacitors replace the voltage divider capacitors in the first topology. The connection method is as follows: two resonant capacitors with a capacitance half that of the first resonant capacitor are connected in series and then in parallel to the input terminal of the first single-phase matrix converter. The midpoint of the series connection of the two resonant capacitors and the midpoint of the connection of the two bidirectional switches constitute the output terminal of the first single-phase matrix converter. Similarly, two resonant capacitors with a capacitance half that of the first resonant capacitor are connected in series and then in parallel to the input terminal of the second single-phase matrix converter. The midpoint of the series connection of the two resonant capacitors and the midpoint of the connection of the two bidirectional switches constitute the output terminal of the second single-phase matrix converter.

[0009] The fourth type is where the first and second single-phase matrix converters are composed of two semiconductor switching transistors and a single bidirectional switch. For the first single-phase matrix converter, the two semiconductor switching transistors are connected in series across the input terminals of the first single-phase matrix converter, and the single bidirectional switch is connected in parallel to the output terminal of the first single-phase matrix converter. For the second single-phase matrix converter, the two semiconductor switching transistors are connected in series across the output terminals of the second single-phase matrix converter, and the single bidirectional switch is connected in parallel to the input terminal of the second single-phase matrix converter.

[0010] Furthermore, the control circuit of the transformer includes a digital control unit, a first zero-crossing detection unit, a second zero-crossing detection unit, a third zero-crossing detection unit, a first current sampling unit, a second current sampling unit, an input voltage sampling unit, a first driving circuit, and a second driving circuit. The first current sampling unit is used to sample the current of the first coreless winding and outputs a square wave in phase with the first coreless winding current through the first zero-crossing detection unit. The second current sampling unit is used to sample the current of the second coreless winding and outputs a square wave in phase with the digital control unit through the second zero-crossing detection unit. The input voltage sampling unit is used to sample the input power frequency AC voltage and outputs a square wave in phase with the digital control unit through the third zero-crossing detection unit. The digital control unit generates a primary-side PWM control signal and a secondary-side PWM control signal. The primary-side PWM control signal generates a switching drive signal for the first single-phase matrix converter via the first driving circuit. The secondary-side PWM control signal generates a switching drive signal for the second single-phase matrix converter via the second driving circuit.

[0011] Furthermore, when the first and second single-phase matrix converters select the first topology, during the positive half-cycle of the input AC voltage, when the input current of the first coreless winding is positive, the first bidirectional switch is on, the second bidirectional switch is off, and the first single-phase matrix converter outputs a positive voltage; when the input current of the first coreless winding is negative, the first bidirectional switch is off, the second bidirectional switch is on, and the first single-phase matrix converter outputs a negative voltage; when the output current of the second coreless winding is positive, the third bidirectional switch is on, the fourth bidirectional switch is off, and the input of the second single-phase matrix converter is a positive voltage; when the output current of the second coreless winding is negative, the third bidirectional switch is off, the fourth bidirectional switch is on, and the input of the first single-phase matrix converter is a negative voltage; during the negative half-cycle of the input AC voltage, when the input current of the first coreless winding is positive, the first bidirectional switch is off, and the second bidirectional switch is on. The first single-phase matrix converter outputs a positive voltage. When the input current of the first coreless winding is negative, the first bidirectional switch is turned on and the second bidirectional switch is turned off, resulting in a negative output voltage for the first single-phase matrix converter. When the output current of the second coreless winding is positive, the third bidirectional switch is turned off and the fourth bidirectional switch is turned on, resulting in a positive input voltage for the second single-phase matrix converter. When the output current of the second coreless winding is negative, the third bidirectional switch is turned on and the fourth bidirectional switch is turned off, resulting in a negative input voltage for the first single-phase matrix converter. Simultaneously, the output voltage of the second single-phase matrix converter is demodulated to the power frequency AC voltage. During power transfer, the first single-phase matrix converter is always considered a negative resistor, and the second single-phase matrix converter is always considered a purely positive resistor, satisfying the parity-time symmetry condition. This enhances the main magnetic flux of the coreless winding, increases the equivalent excitation impedance, and reduces the excitation current, thus enabling efficient power transfer even without a core.

[0012] Furthermore, the following conditions must be met for the first resonant capacitor, the second resonant capacitor, the first coreless winding, and the second coreless winding:

[0013] ;

[0014] In the formula, L1 and L2 are the self-inductance values ​​of the first and second coreless windings, respectively, and C1 and C2 are the capacitance values ​​of the first and second resonant capacitors, respectively.

[0015] Furthermore, the voltage turns ratio n of the transformer satisfies:

[0016] ;

[0017] In the formula, v1 represents the AC input voltage at power frequency, and v2 represents the AC output voltage at power frequency.

[0018] Compared with the prior art, the present invention has the following advantages and beneficial effects:

[0019] Compared to traditional power frequency transformers and existing solid-state transformers, this invention revolutionarily eliminates the transformer core while achieving efficient power transmission and voltage conversion, significantly reducing the transformer's weight and size. Furthermore, it eliminates the production and manufacturing costs of the core component, increases power density, and is expected to substantially reduce costs, making it a practically valuable and worthy of widespread adoption. Attached Figure Description

[0020] Figure 1 This is one of the topology diagrams of the transformer of the present invention.

[0021] Figure 2 This is the second topology diagram of the transformer of the present invention.

[0022] Figure 3 This is the third topology diagram of the transformer of the present invention.

[0023] Figure 4 This is the fourth topology diagram of the transformer of the present invention.

[0024] Figure 5 This is the fifth topology diagram of the transformer of the present invention.

[0025] Figure 6 This is a control strategy framework diagram for the transformer of the present invention.

[0026] Figure 7 The waveforms of the power frequency input voltage, output voltage, input current, and output current are shown in the embodiment of the present invention.

[0027] Figure 8 This is a load regulation rate curve diagram of an embodiment of the present invention. Detailed Implementation

[0028] The present invention will be further described in detail below with reference to the embodiments and accompanying drawings, but the embodiments of the present invention are not limited thereto.

[0029] like Figure 1 As shown, this embodiment discloses a half-bridge type power frequency coreless solid-state transformer based on the parity-time symmetry principle, including an input filter, a first single-phase matrix converter, a first resonant capacitor, a coreless winding, a second resonant capacitor, a second single-phase matrix converter, and an output filter. The input filter includes a filter inductor L. i Composed of passive components, it is connected in parallel to the input of the first single-phase matrix converter for AC filtering and input power factor correction; the coreless winding includes a first coreless winding and a second coreless winding; the first single-phase matrix converter consists of two bidirectional switches S B1 S B2 First voltage divider capacitor C i1 Second voltage divider capacitor Ci2 Composition; the first voltage divider capacitor C i1 Second voltage divider capacitor C i2 After being connected in series, it is connected in parallel to the input terminal of the first single-phase matrix converter; the output terminal of the first single-phase matrix converter is connected in series with the first resonant capacitor, the first coreless winding, and the second coreless winding; the first coreless winding and the second coreless winding are only electromagnetically coupled through air; the second coreless winding is connected in series with the second resonant capacitor, and then connected in series with the input terminal of the second single-phase matrix converter; the second single-phase matrix converter consists of two bidirectional switches S. B3 S B4 The third voltage divider capacitor C o1 Fourth voltage divider capacitor C o2 Composition; C o1 C o2 The third voltage divider capacitor C is connected in parallel to the output of the second single-phase matrix converter after being connected in series. o1 and the fourth voltage divider capacitor C o2 The connection midpoint with two bidirectional switches S B3 S B4 The midpoint of the connection forms the output terminal of the second single-phase matrix converter; the output filter is connected in parallel with the output terminal of the second single-phase matrix converter.

[0030] Alternatively, when using semiconductor switching transistors, the specific circuit topology is as follows: Figure 2 As shown. The first single-phase matrix converter consists of four semiconductor switches S1, S2, S3, S4, and a first voltage divider capacitor C. i1 Second voltage divider capacitor C i2 The circuit consists of S1, S2, S3, and S4 forming the first half-bridge circuit; S1 and S2 are connected in reverse series to form the first bidirectional switch; and S3 and S4 are connected in reverse series to form the second bidirectional switch. The second single-phase matrix converter consists of four semiconductor switching transistors S5, S6, S7, and S8, and a third voltage-dividing capacitor C. o1 Fourth voltage divider capacitor C o2 Composition: S5, S6 and S7, S8 respectively constitute the third and fourth bidirectional switches; the remaining circuit connections are as follows. Figure 1 Similarly, I will not elaborate further.

[0031] Optionally, the first and second single-phase matrix converters may also adopt a second topology, such as... Figure 3 As shown. Specifically, the first single-phase matrix converter is a half-bridge topology composed of a first bidirectional switch and a second bidirectional switch connected in series, eliminating the need for a voltage divider capacitor. The two ends of the second bidirectional switch are defined as the output terminals of the first single-phase matrix converter. The second single-phase matrix converter adopts a half-bridge topology composed of two bidirectional switches connected in series to achieve power conversion on the secondary side.

[0032] Alternatively, as another implementation, in the third topology, the first and second single-phase matrix converters are composed of a half-bridge circuit consisting of two resonant capacitors and two bidirectional switches connected in series, that is, two resonant capacitors are used to replace the original voltage divider capacitors. For example... Figure 4 As shown, the two capacitance values ​​are C r1 The resonant capacitors of / 2 are connected in series and then in parallel to the input terminal of the first single-phase matrix converter. S1, S2 and S3, S4 respectively form two bidirectional switches, both with a capacitance of C. r1 The midpoint of the resonant capacitor ( / 2) and the midpoint of the two bidirectional switches form the output terminal of the first single-phase matrix converter; similarly, the second single-phase matrix converter adopts a similar structure, which will not be described in detail here.

[0033] Optionally, such as Figure 5 As shown, in the fourth topology, the first and second single-phase matrix converters consist of two semiconductor switches and one bidirectional switch. For the first single-phase matrix converter, the two semiconductor switches S1 and S2 are connected in series across the input terminals, and the bidirectional switch composed of S3 and S4 is connected in parallel to the output terminals. For the second single-phase matrix converter, the two semiconductor switches S5 and S6 are connected in series across the output terminals, and the bidirectional switch composed of S7 and S8 is connected in parallel to the input terminals.

[0034] Specifically, for Figure 1 The topology of the coreless solid-state transformer at power frequency based on the parity-time symmetry principle is shown below. Figure 6 As shown, the control circuit of the transformer includes a digital control unit with 8-channel PWM signal output, a first zero-crossing detection unit, a second zero-crossing detection unit, a third zero-crossing detection unit, a first current sampling unit, a second current sampling unit, an input voltage sampling unit, a first drive circuit, and a second drive circuit. The first current sampling unit samples the current of the first coreless winding and outputs a square wave in phase with the first coreless winding current through the first zero-crossing detection unit. The second current sampling unit samples the current of the second coreless winding and outputs a square wave in phase with the digital control unit through the second zero-crossing detection unit. The input voltage sampling unit samples the input AC voltage and outputs a square wave in phase with the digital control unit through the third zero-crossing detection unit. The digital control unit generates a primary-side PWM control signal and a secondary-side PWM control signal. The primary-side PWM control signal generates a drive signal for the semiconductor switching transistor of the first single-phase matrix converter via the first drive circuit. The secondary-side PWM control signal generates a drive signal for the semiconductor switching transistor of the second single-phase matrix converter via the second drive circuit.

[0035] Specifically, for Figure 1The topology of the power frequency coreless solid-state transformer based on the parity-time symmetry principle is shown. During the positive half-cycle of the input power frequency AC voltage, when the input current of the first coreless winding is positive, the first bidirectional switch is on, the second bidirectional switch is off, and the first single-phase matrix converter outputs a positive voltage. When the input current of the first coreless winding is negative, the first bidirectional switch is off, the second bidirectional switch is on, and the first single-phase matrix converter outputs a negative voltage. When the output current of the second coreless winding is positive, the third bidirectional switch is on, the fourth bidirectional switch is off, and the input of the second single-phase matrix converter is a positive voltage. When the output current of the second coreless winding is negative, the third bidirectional switch is off, the fourth bidirectional switch is on, and the input of the first single-phase matrix converter is a negative voltage. During the negative half-cycle of the input power frequency AC voltage, when the input current of the first coreless winding is positive, the first bidirectional switch is off, the second bidirectional switch is on, and the first single-phase matrix converter outputs a positive voltage. The single-phase matrix converter outputs a positive voltage. When the input current of the first coreless winding is negative, the first bidirectional switch is turned on, the second bidirectional switch is turned off, and the first single-phase matrix converter outputs a negative voltage. When the output current of the second coreless winding is positive, the third bidirectional switch is turned off, the fourth bidirectional switch is turned on, and the input of the second single-phase matrix converter is a positive voltage. When the output current of the second coreless winding is negative, the third bidirectional switch is turned on, the fourth bidirectional switch is turned off, and the input of the first single-phase matrix converter is a negative voltage. Simultaneously, the output voltage of the second single-phase matrix converter is demodulated to the power frequency AC voltage. During power transfer, the first single-phase matrix converter is always considered a negative resistor, and the second single-phase matrix converter is always considered a purely positive resistor, satisfying the parity-time symmetry condition. This enhances the main magnetic flux of the coreless winding, increases the equivalent excitation impedance, and significantly reduces the excitation current, thus achieving efficient power transfer even without a core. For the first resonant capacitor, the second resonant capacitor, the first coreless winding, and the second coreless winding, the following conditions must be met:

[0036] ;

[0037] In the formula, L1 and L2 are the self-inductance values ​​of the first and second coreless windings, respectively, and C1 and C2 are the capacitance values ​​of the first and second resonant capacitors, respectively.

[0038] The voltage turns ratio n of the transformer satisfies:

[0039] ;

[0040] In the formula, v1 represents the AC input voltage at power frequency, and v2 represents the AC output voltage at power frequency.

[0041] To illustrate the accuracy and feasibility of this invention, a half-bridge type power frequency ironless solid-state core transformer based on the parity-time symmetry principle is designed in this embodiment. The rated power is 2.5kW, the power frequency AC input voltage is 220V, the frequency is 50Hz, and the power frequency AC output voltage is 110V, the frequency is 50Hz. The first ironless core winding has 36 turns and an average turn length of 18.6cm, and the second ironless core winding has 18 turns and an average turn length of 18.9cm. Both are wound with Litz wire to reduce the loss caused by the high-frequency skin effect.

[0042] Figure 7 The waveforms of input voltage, input current, output voltage, and output current under full-load conditions are shown in this embodiment. From... Figure 7 As can be seen, the input voltage and input current waveforms are basically in phase, indicating that the input power factor is close to 1; the output voltage waveform is in phase with the input voltage waveform, and the voltage amplitude ratio and current amplitude ratio are basically consistent with the turns ratio of the first winding and the second winding, verifying that the power frequency transformer function implemented by this invention based on the parity-time symmetry principle has accurate voltage and current transformation relationships. The load regulation curve of this embodiment is as follows: Figure 8 As shown, the load regulation rate remains at a low level; during load changes, the load regulation rate is basically maintained within 5%, indicating that the present invention has good output voltage stability and load adaptability.

[0043] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. A half-bridge type coreless solid-state transformer for power frequency based on the parity-time symmetry principle, characterized in that, The transformer includes an input filter, a first single-phase matrix converter, a first resonant capacitor, a coreless winding, a second resonant capacitor, a second single-phase matrix converter, and an output filter. The input filter is composed of passive components and is connected in parallel to the input terminal of the first single-phase matrix converter. The output terminal of the first single-phase matrix converter is connected in series with the first resonant capacitor. The coreless winding includes a first coreless winding and a second coreless winding coupled together. The first coreless winding is connected in series with the first resonant capacitor, and the second coreless winding is connected in series with the second resonant capacitor. The input terminal of the second single-phase matrix converter is connected in series with the second resonant capacitor. The output filter is connected in parallel with the output terminal of the second single-phase matrix converter. The first single-phase matrix converter and the second single-phase matrix converter can adopt any of the following topologies: The first type of single-phase matrix converter consists of a first half-bridge circuit, a first voltage-dividing capacitor, and a second voltage-dividing capacitor. The first half-bridge circuit is composed of two bidirectional switches connected in series, namely a first bidirectional switch and a second bidirectional switch, representing the bidirectional switch on the high side and the bidirectional switch on the low side of the first half-bridge circuit, respectively. Each bidirectional switch consists of two semiconductor switching transistors connected in reverse series, used for bidirectional power flow and to prevent voltage shoot-through. The first and second voltage-dividing capacitors are connected in series and then connected in parallel to the input terminal of the first single-phase matrix converter. The midpoint of the connection between the two voltage-dividing capacitors is connected to the midpoint of the connection between the two bidirectional switches in the first half-bridge circuit. The first single-phase matrix converter is composed of a second half-bridge circuit, a third voltage-dividing capacitor, and a fourth voltage-dividing capacitor. The second half-bridge circuit consists of two bidirectional switches connected in series, namely a third bidirectional switch and a fourth bidirectional switch, representing the bidirectional switch on the high side and the bidirectional switch on the low side of the second half-bridge circuit, respectively. The third and fourth voltage-dividing capacitors are connected in series and then connected in parallel to the output terminal of the second single-phase matrix converter. The midpoint of the connection between the third and fourth voltage-dividing capacitors and the midpoint of the connection between the two bidirectional switches in the second half-bridge circuit constitute the output terminal of the second single-phase matrix converter. The second type is a half-bridge topology consisting of a first bidirectional switch and a second bidirectional switch connected in series, which eliminates the need for a voltage divider capacitor. The two ends of the second bidirectional switch are defined as the output terminals of the first single-phase matrix converter. The second single-phase matrix converter adopts a half-bridge topology consisting of two bidirectional switches connected in series to realize the power conversion on the secondary side. The third type involves the first and second single-phase matrix converters being constructed from a half-bridge circuit consisting of two resonant capacitors and two bidirectional switches connected in series. Specifically, two resonant capacitors replace the voltage divider capacitors in the first topology. The connection method is as follows: two resonant capacitors with a capacitance half that of the first resonant capacitor are connected in series and then in parallel to the input terminal of the first single-phase matrix converter. The midpoint of the series connection of the two resonant capacitors and the midpoint of the connection of the two bidirectional switches constitute the output terminal of the first single-phase matrix converter. Similarly, two resonant capacitors with a capacitance half that of the first resonant capacitor are connected in series and then in parallel to the input terminal of the second single-phase matrix converter. The midpoint of the series connection of the two resonant capacitors and the midpoint of the connection of the two bidirectional switches constitute the output terminal of the second single-phase matrix converter. The fourth type is where the first and second single-phase matrix converters are composed of two semiconductor switching transistors and a single bidirectional switch. For the first single-phase matrix converter, the two semiconductor switching transistors are connected in series across the input terminals of the first single-phase matrix converter, and the single bidirectional switch is connected in parallel to the output terminal of the first single-phase matrix converter. For the second single-phase matrix converter, the two semiconductor switching transistors are connected in series across the output terminals of the second single-phase matrix converter, and the single bidirectional switch is connected in parallel to the input terminal of the second single-phase matrix converter.

2. The half-bridge type coreless solid-state transformer based on the parity-time symmetry principle according to claim 1, characterized in that, The control circuit of the transformer includes a digital control unit, a first zero-crossing detection unit, a second zero-crossing detection unit, a third zero-crossing detection unit, a first current sampling unit, a second current sampling unit, an input voltage sampling unit, a first drive circuit, and a second drive circuit. The first current sampling unit is used to sample the current of the first coreless winding and outputs a square wave in phase with the first coreless winding current through the first zero-crossing detection unit; the second current sampling unit is used to sample the current of the second coreless winding and outputs a square wave in phase with the digital control unit through the second zero-crossing detection unit; the input voltage sampling unit is used to sample the input power frequency AC voltage and outputs a square wave in phase with the digital control unit through the third zero-crossing detection unit; the digital control unit generates a primary-side PWM control signal and a secondary-side PWM control signal; the primary-side PWM control signal generates a switching drive signal for the first single-phase matrix converter via the first driving circuit; the secondary-side PWM control signal generates a switching drive signal for the second single-phase matrix converter via the second driving circuit.

3. The half-bridge type coreless solid-state transformer based on the parity-time symmetry principle according to claim 1, characterized in that, When the first and second single-phase matrix converters select the first topology, during the positive half-cycle of the input AC voltage, when the input current of the first coreless winding is positive, the first bidirectional switch is on, the second bidirectional switch is off, and the first single-phase matrix converter outputs a positive voltage; when the input current of the first coreless winding is negative, the first bidirectional switch is off, the second bidirectional switch is on, and the first single-phase matrix converter outputs a negative voltage; when the output current of the second coreless winding is positive, the third bidirectional switch is on, the fourth bidirectional switch is off, and the input of the second single-phase matrix converter is a positive voltage; when the output current of the second coreless winding is negative, the third bidirectional switch is off, the fourth bidirectional switch is on, and the input of the first single-phase matrix converter is a negative voltage; during the negative half-cycle of the input AC voltage, when the input current of the first coreless winding is positive, the first bidirectional switch is off, the second bidirectional switch is on, and the first... The single-phase matrix converter outputs a positive voltage. When the input current of the first coreless winding is negative, the first bidirectional switch is turned on and the second bidirectional switch is turned off, resulting in a negative output voltage for the first single-phase matrix converter. When the output current of the second coreless winding is positive, the third bidirectional switch is turned off and the fourth bidirectional switch is turned on, resulting in a positive input voltage for the second single-phase matrix converter. When the output current of the second coreless winding is negative, the third bidirectional switch is turned on and the fourth bidirectional switch is turned off, resulting in a negative input voltage for the first single-phase matrix converter. Simultaneously, the output voltage of the second single-phase matrix converter is demodulated to the power frequency AC voltage. During power transfer, the first single-phase matrix converter is always considered a negative resistor, and the second single-phase matrix converter is always considered a purely positive resistor, satisfying the parity-time symmetry condition. This enhances the main magnetic flux of the coreless winding, increases the equivalent excitation impedance, and reduces the excitation current, thus enabling efficient power transfer even without a core.

4. The half-bridge type coreless solid-state transformer based on the parity-time symmetry principle according to claim 3, characterized in that, For the first resonant capacitor, the second resonant capacitor, the first coreless winding, and the second coreless winding, the following conditions must be met: ； In the formula, L1 and L2 are the self-inductance values ​​of the first and second coreless windings, respectively, and C1 and C2 are the capacitance values ​​of the first and second resonant capacitors, respectively.

5. The half-bridge type coreless solid-state transformer based on the parity-time symmetry principle according to claim 4, characterized in that, The voltage turns ratio n of the transformer satisfies: ； In the formula, v1 represents the AC input voltage at power frequency, and v2 represents the AC output voltage at power frequency.

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