A driving circuit and a current detection control method for an E-GaN device

Abstract

This invention discloses a driving circuit for an E-GaN device, comprising an E-GaN power device, a two-stage driving unit, a two-stage discharge unit, a current mirror sampling unit, a gate voltage detection comparator unit, and a switch control unit. The two-stage driving unit consists of a PWM signal, an NMOS transistor Q1, a current-limiting resistor R1, a comparator AR1, and a high-drive NMOS transistor Q2. The two-stage discharge unit consists of a PWM signal, a PMOS transistor Q3, a discharge resistor R2, a comparator AR2, and a high-discharge NMOS transistor Q4. The current mirror sampling unit consists of a current mirror, a comparator AR3, a switch-controlled NMOS transistor Q5, and a sampling resistor RCS. The input terminals of comparators AR1, AR2, and AR3 are all connected to the gate of the E-GaN power device, forming the gate voltage detection comparator unit. This invention uses gate voltage detection as its core to achieve precise linkage between driving and detection, fundamentally solving EMI and current spike problems. The circuit structure is simple, uses general-purpose components, is cost-controllable, and is easy to industrialize. It is compatible with 700V high-voltage E-GaN devices and has a wide range of applications.

Description

Technical Field

[0001] This invention relates to the field of transportation, specifically to a driving circuit and current detection and control method for an E-GaN device. Technical Background

[0002] Enhancement-mode gallium nitride (E-GaN) power devices are widely used in high-voltage, high-frequency power conversion, on-board chargers, AI data center power supplies, and industrial inverters due to their high-frequency and high-efficiency characteristics. However, their driving and current sensing technologies face the following industry challenges and technical issues: 1. Current Status of Driver Technology: Mainstream solutions are divided into two categories: direct-drive and two-stage drive. Direct-drive uses a dedicated E-GaN driver IC, providing 5-6V positive voltage turn-on and -2.5V to -5V negative voltage turn-off, matching the enhancement characteristics of E-GaN (threshold voltage Vth≈1.5-3V); the two-stage drive solution achieves the switching from soft drive to strong drive through a fixed delay circuit. Both types of solutions have drawbacks: high-frequency switching is prone to severe EMI interference, and there is a significant current spike in the initial stage of conduction.

[0003] 2. Current Status of Current Sensing Technology: Existing solutions mainly include three types: series sampling resistors, current transformers, and current mirror sampling. Series sampling resistors have high additional losses, which does not meet the low-loss requirements of E-GaN; current transformers have slow response speeds and cannot adapt to high-frequency scenarios; current mirror sampling has no additional losses and a fast response, but it does not filter out current spike noise during the initial conduction phase. System Coordination Deficiencies: Drive control and current sensing are independent modules, and a cooperative control relationship based on VGS voltage has not been established, making it impossible to simultaneously solve the core issues of EMI suppression and current spike avoidance.

[0004] Currently, the closest solution to the technology of this invention is the fixed-delay two-stage drive and full-range current mirror sampling scheme, the specific contents and defects of which are as follows: 1. Technical solution content: The two-stage drive uses an RC circuit to set a fixed delay to achieve the switching from soft drive to strong drive; the current mirror sampling circuit is connected in parallel with the E-GaN drain and source, and replicates the drain current throughout the process and transmits it to the sampling resistor for overcurrent protection and other control logic.

[0005] 2. Defects and their causes: a. Fixed delay cannot adapt to the dynamic changes in E-GaN gate voltage: The rise / fall rate of gate voltage varies between different batches of devices and under different operating conditions. The length of fixed delay can easily lead to "overshoot" or "undershoot", causing EMI interference or increased conduction loss.

[0006] b. Full-process sampling introduces spike noise: In the early stage of E-GaN conduction, the gate voltage is not stable and there is a spike in the drain current. Full-process sampling will include spike noise in the detection signal, which will interfere with the overcurrent protection logic and reduce the system reliability.

[0007] c. Lack of coordination mechanism between driving and detection: The timing of driving switching is not related to the timing of sampling triggering, and sampling cannot be started after the gate voltage is stable, thus avoiding spike noise at the source. Summary of the Invention

[0008] To address the aforementioned shortcomings, the present invention aims to solve the following core technical problems: 1. Solve the problems of large EMI interference and obvious conduction current spikes caused by fixed delay in traditional drive schemes, and realize dynamic drive and discharge control based on the actual gate voltage state.

[0009] 2. Solve the problem of spike noise interference caused by the effective current detection throughout the entire process, realize accurate sampling triggering based on gate voltage threshold, and improve detection accuracy.

[0010] 3. Establish a collaborative mechanism for drive control and current detection to simplify the circuit architecture and improve the overall reliability and integration of E-GaN device drive and detection.

[0011] To achieve the above objectives, this invention provides a driving circuit and current detection and control method for E-GaN devices. It adopts a gate voltage triggering architecture with two-stage driving and two-stage discharge, and is equipped with a current mirror sampling circuit with gate voltage threshold control to achieve coordinated optimization of driving and detection. The specific plan is as follows: A driving circuit for an E-GaN device includes: an E-GaN power device, a two-stage driving unit, a two-stage discharge unit, a current mirror sampling unit, a gate voltage detection comparator unit, and a switch control unit; The two-stage drive unit consists of a PWM signal, an NMOS transistor Q1, a current-limiting resistor R1, a comparator AR1, and a strong-drive NMOS transistor Q2. The output of the comparator AR1 is connected to the gate of the strong-drive NMOS transistor Q2, the drain of the strong-drive NMOS transistor Q2 is connected to the drive power supply VDD, and the source is connected to the gate of the E-GaN power device. The two-stage discharge unit consists of a PWM signal, a PMOS transistor Q3, a discharge resistor R2, a comparator AR2, and a high-discharge NMOS transistor Q4; wherein, the output terminal of the comparator AR2 is connected to the gate of the high-discharge NMOS transistor Q4, the drain of the high-discharge NMOS transistor Q4 is connected to the gate of the E-GaN power device, and the source is grounded. The current mirror sampling unit consists of a current mirror, a comparator AR3, a switch-controlled NMOS transistor Q5, and a sampling resistor RCS. The input terminal of the current mirror is connected in parallel with the drain and source of the E-GaN power device, and the output terminal is connected to the drain of the switch-controlled NMOS transistor Q5. The output terminal of the comparator AR3 is connected to the gate of the high-discharge NMOS transistor Q5, and the source of the switch-controlled NMOS transistor Q5 is grounded and connected in parallel with the sampling resistor RCS. The input terminals of comparators AR1, AR2, and AR3 are all connected to the gate of the E-GaN power device to detect the gate voltage VG in real time, thus forming a gate voltage detection comparator unit.

[0012] Furthermore, the workflow of the two-stage drive unit is as follows: The drive threshold is set to VG=4V. When the PWM input signal is high, the NMOS transistor Q1 is turned on, and the drive power supply VDD charges the gate of the E-GaN power device through the current limiting resistor R1. This is the first stage of soft drive. The current limiting resistor R1 limits the charging current to prevent the gate voltage from rising rapidly and causing EMI interference. When VG rises to 4V, the comparator AR1 outputs a high level, controlling the strong drive NMOS transistor Q2 to turn on, entering the second stage of strong drive. The drive power supply VDD is directly connected to the gate of the E-GaN power device, providing a large current charge, so that VG can quickly stabilize to the turn-on voltage, shorten the turn-on time, and reduce conduction losses.

[0013] Furthermore, the working process of the two-stage discharge unit is as follows: The discharge threshold is set to VG=1V. When the PWM input signal is low, the PMOS transistor Q3 is turned on, and the gate voltage VG of the E-GaN power device is discharged through the discharge resistor R2. This is the first stage of soft discharge. The discharge resistor R2 limits the discharge rate to avoid voltage ringing caused by a sudden drop in gate voltage. When VG drops to 1V, the comparator AR2 outputs a high level, controlling the strong discharge NMOS transistor Q4 to turn on, entering the second stage of strong discharge. The strong discharge NMOS transistor Q4 provides a low-impedance discharge path, allowing VG to drop quickly to the turn-off voltage, ensuring reliable turn-off of the E-GaN and avoiding tail current.

[0014] Furthermore, the workflow of the current mirror sampling unit is as follows: The sampling trigger threshold is consistent with the second-stage driver threshold, set to VG=4V. The current mirror circuit replicates the drain current of the E-GaN power device according to a preset ratio K:1. When VG<4V, the E-GaN power device is in the initial stage of conduction, and there is spike noise in the drain current. At this time, the comparator AR3 outputs a high level, the control switch controls the NMOS transistor Q5 to conduct, the current mirror output current is discharged through the switch-controlled NMOS transistor Q5, no current flows through the sampling resistor, and no sampling is performed. When VG rises to 4V, the E-GaN power device conducts stably, the comparator AR3 outputs a low level, the control switch controls the NMOS transistor Q5 to turn off, the current mirror output current flows to the sampling resistor, and precise current sampling is started.

[0015] A current detection and control method for a driving circuit of an E-GaN device, comprising: S1, Turn-on phase: PWM high level → NMOS transistor Q1 turns on → Drive power supply VDD is soft-driven charged through current limiting resistor R1 → VG rises to 4V → Comparator AR1 is triggered → Strong drive NMOS transistor Q2 turns on for strong drive → VG stabilizes to 5V → E-GaN power device is reliably turned on. S2. Sampling stage: VG < 4V → Switch-controlled NMOS transistor Q5 turns on → Current mirror current discharges → No sampling; VG ≥ 4V → Switch-controlled NMOS transistor Q5 turns off → Sampling resistor starts precise sampling. S3, Turn-off phase: PWM low level → PMOS transistor Q3 turns on → VG soft discharges through discharge resistor R2 → VG drops to 1V → comparator AR2 is triggered → strong discharge NMOS transistor Q4 turns on for strong discharge → VG drops to 0V → E-GaN power device is reliably turned off. S4. Abnormal Protection: When the sampled voltage exceeds the preset threshold, the protection circuit is triggered, the PWM signal is pulled low, and the E-GaN power device is shut down in an emergency.

[0016] The beneficial effects of this invention are: This invention uses gate voltage detection as its core to achieve precise linkage between driving and detection, fundamentally solving EMI and current spike problems. The circuit structure is simple, uses general-purpose components, is cost-effective, and easy to industrialize. It is compatible with 700V high-voltage E-GaN devices, making it suitable for a wide range of applications. Specific advantages are as follows: 1. Significantly reduced EMI interference: The two-stage drive / discharge architecture limits the gate voltage change rate through soft drive and soft discharge stages, avoiding EMI radiation caused by high-frequency switching.

[0017] 2. Significantly improved current detection accuracy: The sampling triggering mechanism based on the gate voltage threshold avoids current spike noise in the early stage of conduction, resulting in higher current detection accuracy.

[0018] 3. Enhanced drive reliability: Gate voltage triggering replaces traditional fixed delay, adapting to the dynamic changes in E-GaN gate voltage, reducing conduction losses, and eliminating tail current during turn-off.

[0019] 4. High system integration: A collaborative control mechanism for driving and detection is established, eliminating the need for additional control logic and meeting the high power density requirements of E-GaN. Attached Figure Description

[0020] Figure 1 The circuit schematic of this invention includes a two-stage driving unit, a two-stage discharge unit, a current mirror sampling unit, and a gate voltage detection unit.

[0021] Among them, E-GaN is an enhancement-gallium nitride power device, Q1-Q5 are switching MOSFETs, R1-R2 are current-limiting / discharge resistors, AR1-AR3 are gate voltage detection comparators, VDD is the drive power supply, and PWM is the pulse width modulation signal input terminal; key thresholds: AR1 detection threshold 4V (drive trigger), AR2 detection threshold 1V (discharge trigger), AR3 detection threshold 4V (sampling trigger). Detailed Implementation

[0022] The present invention will be further illustrated below with reference to the accompanying drawings and specific embodiments. It should be understood that the following specific embodiments are for illustrative purposes only and are not intended to limit the scope of the invention.

[0023] It should be noted that the key terms and abbreviations in this application are as follows: E-GaN: Enhancement-mode Gallium Nitride; PWM: Pulse Width Modulation; VGS: Gate-Source Voltage; EMI: Electromagnetic Interference; HEMT: High Electron Mobility Transistor; MOS: Metal-Oxide-Semiconductor; Op Amp: Operational Amplifier.

[0024] As shown in the figure, the present invention provides a driving circuit for an E-GaN device, including: an E-GaN power device, a two-stage driving unit, a two-stage discharge unit, a current mirror sampling unit, a gate voltage detection comparator unit, and a switch control unit; The two-stage drive unit consists of a PWM signal, an NMOS transistor Q1, a current-limiting resistor R1, a comparator AR1, and a strong-drive NMOS transistor Q2. The output of the comparator AR1 is connected to the gate of the strong-drive NMOS transistor Q2, the drain of the strong-drive NMOS transistor Q2 is connected to the drive power supply VDD, and the source is connected to the gate of the E-GaN power device. The two-stage discharge unit consists of a PWM signal, a PMOS transistor Q3, a discharge resistor R2, a comparator AR2, and a high-discharge NMOS transistor Q4; wherein, the output terminal of the comparator AR2 is connected to the gate of the high-discharge NMOS transistor Q4, the drain of the high-discharge NMOS transistor Q4 is connected to the gate of the E-GaN power device, and the source is grounded. The current mirror sampling unit consists of a current mirror, a comparator AR3, a switch-controlled NMOS transistor Q5, and a sampling resistor RCS. The input terminal of the current mirror is connected in parallel with the drain and source of the E-GaN power device, and the output terminal is connected to the drain of the switch-controlled NMOS transistor Q5. The output terminal of the comparator AR3 is connected to the gate of the high-discharge NMOS transistor Q5, and the source of the switch-controlled NMOS transistor Q5 is grounded and connected in parallel with the sampling resistor RCS. The input terminals of comparators AR1, AR2, and AR3 are all connected to the gate of the E-GaN power device to detect the gate voltage VG in real time, thus forming a gate voltage detection comparator unit.

[0025] In this embodiment, the workflow of the two-stage drive unit is as follows: The drive threshold is set to VG=4V. When the PWM input signal is high, the NMOS transistor Q1 is turned on, and the drive power supply VDD charges the gate of the E-GaN power device through the current limiting resistor R1. This is the first stage of soft drive. The current limiting resistor R1 limits the charging current to prevent the gate voltage from rising rapidly and causing EMI interference. When VG rises to 4V, the comparator AR1 outputs a high level, controlling the strong drive NMOS transistor Q2 to turn on, entering the second stage of strong drive. The drive power supply VDD is directly connected to the gate of the E-GaN power device, providing a large current charge, so that VG can quickly stabilize to the turn-on voltage, shorten the turn-on time, and reduce conduction losses.

[0026] In this embodiment, the working process of the two-stage discharge unit is as follows: The discharge threshold is set to VG=1V. When the PWM input signal is low, the PMOS transistor Q3 is turned on, and the gate voltage VG of the E-GaN power device is discharged through the discharge resistor R2. This is the first stage of soft discharge. The discharge resistor R2 limits the discharge rate to avoid voltage ringing caused by a sudden drop in gate voltage. When VG drops to 1V, the comparator AR2 outputs a high level, controlling the strong discharge NMOS transistor Q4 to turn on, entering the second stage of strong discharge. The strong discharge NMOS transistor Q4 provides a low-impedance discharge path, allowing VG to drop quickly to the turn-off voltage, ensuring reliable turn-off of the E-GaN and avoiding tail current.

[0027] In this embodiment, the workflow of the current mirror sampling unit is as follows: The sampling trigger threshold is consistent with the second-stage driver threshold, set to VG=4V. The current mirror circuit replicates the drain current of the E-GaN power device according to a preset ratio K:1. When VG<4V, the E-GaN power device is in the initial stage of conduction, and there is spike noise in the drain current. At this time, the comparator AR3 outputs a high level, the control switch controls the NMOS transistor Q5 to conduct, the current mirror output current is discharged through the switch-controlled NMOS transistor Q5, no current flows through the sampling resistor, and no sampling is performed. When VG rises to 4V, the E-GaN power device conducts stably, the comparator AR3 outputs a low level, the control switch controls the NMOS transistor Q5 to turn off, the current mirror output current flows to the sampling resistor, and precise current sampling is started.

[0028] In this embodiment, the device selection and parameter configuration are as follows:

[0029] The present invention also provides a current detection and control method for a driving circuit of an E-GaN device, comprising: S1, Turn-on phase: PWM high level → NMOS transistor Q1 turns on → Drive power supply VDD is soft-driven charged through current limiting resistor R1 → VG rises to 4V → Comparator AR1 is triggered → Strong drive NMOS transistor Q2 turns on for strong drive → VG stabilizes to 5V → E-GaN power device is reliably turned on. S2. Sampling stage: VG < 4V → Switch-controlled NMOS transistor Q5 turns on → Current mirror current discharges → No sampling; VG ≥ 4V → Switch-controlled NMOS transistor Q5 turns off → Sampling resistor starts precise sampling. S3, Turn-off phase: PWM low level → PMOS transistor Q3 turns on → VG soft discharges through discharge resistor R2 → VG drops to 1V → comparator AR2 is triggered → strong discharge NMOS transistor Q4 turns on for strong discharge → VG drops to 0V → E-GaN power device is reliably turned off. S4. Abnormal Protection: When the sampled voltage exceeds the preset threshold, the protection circuit is triggered, the PWM signal is pulled low, and the E-GaN power device is shut down in an emergency.

[0030] The technical means disclosed in this invention are not limited to those disclosed in the above embodiments, but also include technical solutions composed of any combination of the above technical features. It should be noted that those skilled in the art can make various improvements and modifications without departing from the principles of this invention, and these improvements and modifications are also considered within the scope of protection of this invention.

Claims

1. A driving circuit for an E-GaN device, characterized in that, include: E-GaN power devices, two-stage drive unit, two-stage discharge unit, current mirror sampling unit, gate voltage detection comparator unit and switch control unit; The two-stage drive unit consists of a PWM signal, an NMOS transistor Q1, a current-limiting resistor R1, a comparator AR1, and a strong-drive NMOS transistor Q2. The output of the comparator AR1 is connected to the gate of the strong-drive NMOS transistor Q2, the drain of the strong-drive NMOS transistor Q2 is connected to the drive power supply VDD, and the source is connected to the gate of the E-GaN power device. The two-stage discharge unit consists of a PWM signal, a PMOS transistor Q3, a discharge resistor R2, a comparator AR2, and a high-discharge NMOS transistor Q4; wherein, the output terminal of the comparator AR2 is connected to the gate of the high-discharge NMOS transistor Q4, the drain of the high-discharge NMOS transistor Q4 is connected to the gate of the E-GaN power device, and the source is grounded. The current mirror sampling unit consists of a current mirror, a comparator AR3, a switch-controlled NMOS transistor Q5, and a sampling resistor RCS. The input terminal of the current mirror is connected in parallel with the drain and source of the E-GaN power device, and the output terminal is connected to the drain of the switch-controlled NMOS transistor Q5. The output terminal of the comparator AR3 is connected to the gate of the high-discharge NMOS transistor Q5, and the source of the switch-controlled NMOS transistor Q5 is grounded and connected in parallel with the sampling resistor RCS. The input terminals of comparators AR1, AR2, and AR3 are all connected to the gate of the E-GaN power device to detect the gate voltage VG in real time, thus forming a gate voltage detection comparator unit.

2. The driving circuit for an E-GaN device according to claim 1, characterized in that, The workflow of the two-stage drive unit is as follows: The drive threshold is set to VG=4V. When the PWM input signal is high, the NMOS transistor Q1 is turned on, and the drive power supply VDD charges the gate of the E-GaN power device through the current limiting resistor R1. This is the first stage of soft drive. The current limiting resistor R1 limits the charging current to prevent the gate voltage from rising rapidly and causing EMI interference. When VG rises to 4V, the comparator AR1 outputs a high level, controlling the strong drive NMOS transistor Q2 to turn on, entering the second stage of strong drive. The drive power supply VDD is directly connected to the gate of the E-GaN power device, providing a large current charge, so that VG can quickly stabilize to the turn-on voltage, shorten the turn-on time, and reduce conduction losses.

3. The driving circuit for an E-GaN device according to claim 1, characterized in that, The working process of the two-stage discharge unit is as follows: The discharge threshold is set to VG=1V. When the PWM input signal is low, the PMOS transistor Q3 is turned on, and the gate voltage VG of the E-GaN power device is discharged through the discharge resistor R2. This is the first stage of soft discharge. The discharge resistor R2 limits the discharge rate to avoid voltage ringing caused by a sudden drop in gate voltage. When VG drops to 1V, the comparator AR2 outputs a high level, controlling the strong discharge NMOS transistor Q4 to turn on, entering the second stage of strong discharge. The strong discharge NMOS transistor Q4 provides a low-impedance discharge path, allowing VG to drop quickly to the turn-off voltage, ensuring reliable turn-off of the E-GaN and avoiding tail current.

4. The driving circuit for an E-GaN device according to claim 1, characterized in that, The workflow of the current mirror sampling unit is as follows: The sampling trigger threshold is set to VG=4V; the current mirror circuit replicates the drain current of the E-GaN power device according to a preset ratio K:1; when VG<4V, the E-GaN power device is in the initial stage of conduction, and there is spike noise in the drain current. At this time, the comparator AR3 outputs a high level, the control switch controls the NMOS transistor Q5 to conduct, the current mirror output current is discharged through the switch-controlled NMOS transistor Q5, no current flows through the sampling resistor, and no sampling is performed; when VG rises to 4V, the E-GaN power device conducts stably, the comparator AR3 outputs a low level, the control switch controls the NMOS transistor Q5 to turn off, the current mirror output current flows to the sampling resistor, and precise current sampling is started.

5. A current detection and control method for a driving circuit of an E-GaN device, based on the driving circuit as described in any one of claims 1-4, characterized in that, include: S1, Turn-on phase: PWM high level → NMOS transistor Q1 turns on → Drive power supply VDD is soft-driven charged through current limiting resistor R1 → VG rises to 4V → Comparator AR1 is triggered → Strong drive NMOS transistor Q2 turns on for strong drive → VG stabilizes to 5V → E-GaN power device is reliably turned on. S2. Sampling stage: VG < 4V → Switch-controlled NMOS transistor Q5 turns on → Current mirror current discharges → No sampling; VG ≥ 4V → Switch-controlled NMOS transistor Q5 turns off → Sampling resistor starts precise sampling. S3, Turn-off phase: PWM low level → PMOS transistor Q3 turns on → VG soft discharges through discharge resistor R2 → VG drops to 1V → comparator AR2 is triggered → strong discharge NMOS transistor Q4 turns on for strong discharge → VG drops to 0V → E-GaN power device is reliably turned off. S4. Abnormal Protection: When the sampled voltage exceeds the preset threshold, the protection circuit is triggered, the PWM signal is pulled low, and the E-GaN power device is shut down in an emergency.

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