A soft-start circuit
By combining a constant current source generation module and a feedback control module, the problems of high power consumption and low accuracy in traditional soft-start circuits are solved, realizing a low-power, high-precision, and highly integrated soft-start circuit suitable for battery-powered portable devices.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- SHANGHAI CHANGYUAN WAYON MICROELECTRONICS
- Filing Date
- 2026-04-02
- Publication Date
- 2026-06-02
Smart Images

Figure CN122137224A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of electronic power technology, and in particular to a soft-start circuit. Background Technology
[0002] The soft-start circuit is a key module in power management chips (PMICs). Its core function is to control the output voltage to rise slowly when the system is powered on, thereby avoiding damage to downstream load devices caused by instantaneous large current surges (inrush currents) and reducing voltage drops at the power input.
[0003] Traditional soft-start circuits often employ a simple resistor-capacitor (RC) charging structure. Their working principle involves using a resistor to charge a capacitor, generating a gradually increasing voltage to control the conduction level of the power transistor, thereby achieving a slow build-up of the output voltage. However, this type of traditional circuit has several significant drawbacks: High static power consumption: Power is continuously consumed through the charging resistor, resulting in a high static current, which is particularly detrimental to portable devices that rely on battery power.
[0004] Low control precision: The resistance and capacitance values are easily affected by temperature and process deviations, resulting in unstable charging slope and output voltage that may rise too slowly or overshoot, making it difficult to achieve precise control.
[0005] Integration and compatibility issues: To achieve a longer soft-start time, large-value capacitors are often required, which are usually difficult to integrate inside the chip and require external components, increasing the system size and cost.
[0006] To address the aforementioned issues, existing technologies have employed dedicated current sources to replace resistors. While this improves the linearity of voltage rise to some extent, the current source module and its associated comparator circuits lack power consumption optimization, resulting in a still relatively high overall quiescent current. This makes it difficult to meet the stringent low-power requirements of modern portable electronic devices. Therefore, designing a soft-start circuit that combines high precision with low power consumption has become a pressing technical problem in this field. Summary of the Invention
[0007] To address the problems existing in the prior art, the present invention provides a soft-start circuit, comprising: A constant current source generation module is used to generate a bias current with zero temperature coefficient and then output the bias current after mirroring and reducing it to a constant current in the nA range. A constant current charging module, connected to the constant current source generating module, is used to linearly charge the soft-start capacitor using the constant current to generate a soft-start reference voltage that increases linearly with time. The feedback control module includes a comparator and a power device. The comparator clamps the output sampling voltage to the soft-start reference voltage through a negative feedback loop to control the output voltage to rise smoothly. A low-power logic control module is used to detect the soft-start reference voltage and generate a control logic signal after the soft-start is completed to turn off the constant current charging module and the feedback control module. A gate drive module is used to drive the power device to be fully turned on.
[0008] Preferred, including: The bias current branch uses a bandgap reference source and a positive and negative temperature coefficient resistor compensation structure to generate the bias current; The multi-stage current mirror structure includes a first-stage mirror composed of N-type transistors and a second-stage mirror composed of P-type transistors. By adjusting the transistor width-to-length ratio, the bias current is reduced to a constant current in the nA range and then input to the constant current charging module.
[0009] Preferably, the first-level image includes: A first N-type transistor and a second N-type transistor, wherein the drain of the first N-type transistor is shorted to its gate and connected to the output terminal of the bias current branch, and the gate of the second N-type transistor is connected to the gate of the first N-type transistor. The second-stage mirror includes: a first P-type transistor, the source of which is connected to the power supply voltage, and its drain connected to the drain of the second N-type transistor and shorted to its gate; The gate of the first P-type transistor serves as the output terminal of the constant current source generation module and forms a proportional current mirror with the second P-type transistor in the constant current charging module, which is used to reduce the bias current to the constant current in the nA range before outputting it.
[0010] Preferably, the soft-start capacitor in the constant current charging module adopts a MOM capacitor structure, and the soft-start capacitor is a programmable capacitor used to adjust the soft-start time of the output voltage according to the load current.
[0011] Preferably, the feedback control module further includes: The voltage divider sampling branch consists of a first resistor and a second resistor connected in series. The common connection point of the first resistor and the second resistor outputs the sampling voltage to the inverting input of the comparator. The switching transistor, controlled by the control logic signal, is used to cut off the ground path of the voltage divider sampling branch after the soft start is completed.
[0012] Preferably, in the feedback control module: The non-inverting input of the comparator is connected to the output of the constant current charging module to receive the soft-start reference voltage, and its inverting input is connected to the common connection point of the first resistor and the second resistor to receive the sampling voltage. The power device is an N-type power MOSFET, whose drain is connected to the input voltage, and whose source serves as the output terminal of the output voltage and is connected to the end of the first resistor furthest from the common connection point. The output of the gate drive module and the output of the comparator are connected together to the gate of the power device, which is used to raise the gate potential of the power device after soft start so that it enters the linear region and is fully turned on.
[0013] Preferably, the low-power logic control module includes: A Schmitt trigger is used to shape and threshold-detect the soft-start reference voltage; A logic inversion chain is used to generate complementary control logic signals, wherein the control logic signals include a first control logic signal, which controls a switching transistor connected in parallel across the soft-start capacitor to turn off the charging circuit.
[0014] Preferably, the constant current charging module includes: The second P-type transistor has its gate connected to the gate of the first P-type transistor and its source connected to the power supply voltage, and is used to output the mirrored nA-level charging current. The first terminal of the soft-start capacitor is connected to the drain of the second P-type transistor (PM2), and its second terminal is grounded, for generating a linearly rising voltage using the constant current; The buffered output branch includes a third N-type transistor, a fourth N-type transistor, and a fifth N-type transistor connected in series between the power supply voltage and ground; The gate of the third N-type transistor is connected to the first terminal of the soft-start capacitor, and its source serves as the output terminal of the soft-start reference voltage; the gate of the fourth N-type transistor is connected to the control logic signal, and the gate of the fifth N-type transistor is connected to the gate of the first N-type transistor.
[0015] The above technical solution has the following advantages or beneficial effects: 1. By setting a low-power logic control module, the constant current charging module and feedback control module are actively shut down after soft start. Combined with the constant current source generation module, the bias current is reduced to the nA level output, which solves the problem of high static power consumption caused by the presence of resistance in the traditional RC charging structure.
[0016] 2. A zero-temperature coefficient nA-level current is used to linearly charge the soft-start capacitor, generating a precise reference voltage. The output voltage is clamped to this reference voltage through a negative feedback loop, ensuring that the output voltage strictly follows the linear rise of the reference voltage. This solves the problems of unstable charging slope and low control accuracy caused by temperature drift of resistors and capacitors in traditional RC structures.
[0017] 3. Each module can be integrated on-chip based on standard integrated circuit technology, eliminating the need for external components. This solves the problems of traditional solutions requiring external components and being difficult to integrate on-chip, thus reducing system size and cost. Attached Figure Description
[0018] Figure 1 This is a schematic diagram of a soft-start circuit in a preferred embodiment of the present invention. Detailed Implementation
[0019] The present invention will now be described in detail with reference to the accompanying drawings and specific embodiments. The present invention is not limited to this embodiment; other embodiments that conform to the spirit of the present invention may also fall within the scope of the present invention.
[0020] In a preferred embodiment of the present invention, based on the above-mentioned problems existing in the prior art, a soft-start circuit is provided, such as... Figure 1 As shown, it includes a constant current source generation module 1, which generates a bias current with zero temperature coefficient and then outputs the current after mirroring and reducing it to a constant current in the nA range. The constant current charging module 1 is connected to the constant current source generating module 2 and is used to linearly charge the soft-start capacitor CSS with a constant current of nA level to generate a soft-start reference voltage VDVDT that increases linearly with time. Feedback control module 3 includes comparator COMP and power device NM7. Comparator COMP clamps the output sampling voltage VA to the soft-start reference voltage VDVDT through a negative feedback loop to control the output voltage to rise smoothly. The low-power logic control module 4 is used to detect the soft-start reference voltage VDVDT and generate a control logic signal after the soft-start is completed to turn off the constant current charging module 2 and the feedback control module 3. Gate drive module 5 is used to drive the power devices to be fully turned on.
[0021] Specifically, in this embodiment, the soft-start circuit includes five core modules: constant current source generation module 1, constant current charging module 2, feedback control module 3, low-power logic control module 4, and gate drive module 5.
[0022] The technical principle of this embodiment is as follows: First, the constant current source generation module 1 generates a precise nanoampere (nA) level constant current IB1 that is almost independent of temperature and power supply voltage. This current is fed into the constant current charging module 2 to linearly charge the internal soft-start capacitor CSS, thereby generating a soft-start reference voltage at the capacitor terminal that rises precisely and linearly with time. Subsequently, feedback control module 3 forms a negative feedback loop through its internal comparator COMP and power device NM7. The core function of this loop is to adjust the output voltage... The sampled value VA is precisely clamped to the linearly rising soft-start reference voltage. Therefore, the output voltage The rising slope and soft-start reference voltage The rising slope is strictly proportional to the voltage, ensuring a smooth and controllable rise in output voltage and avoiding surge current at power-on. Simultaneously, the low-power logic control module continuously monitors the soft-start process (e.g., monitoring...). (Voltage value). Once the soft-start process is detected as complete, it immediately generates a control logic signal to cut off part or all of the operating current of the constant current charging module 2 and the feedback control module 3, enabling the circuit to enter an ultra-low power standby mode. Finally, the gate drive module intervenes after the soft-start process ends, providing sufficient drive capability to the power devices to ensure they are fully turned on, transmitting the input voltage to the output terminal with minimal on-state voltage drop, and maintaining normal system operation.
[0023] This embodiment achieves precise control of the output voltage rise process by combining constant current source charging with negative feedback clamping technology, solving the problem of low accuracy in traditional RC structures. At the same time, the intelligent shutdown function of the logic module significantly reduces the static power consumption during steady-state operation, meeting the requirements of low power consumption design.
[0024] Compared with the prior art, the technical solution of this embodiment has the following beneficial effects: First, a low-power design is achieved. By setting up a low-power logic control module, a control logic signal is generated after soft-start to actively shut down the constant current charging module and the feedback control module, ensuring that the circuit has only a very small quiescent current during steady-state operation. Combined with the constant current source generation module, the bias current is reduced to a constant current output in the nA range, and the overall circuit quiescent current can be controlled within 1μA. This solves the problems of high quiescent power consumption caused by the presence of resistance in traditional RC charging structures and the lack of power optimization in existing current source solutions, making it particularly suitable for battery-powered portable devices.
[0025] Secondly, high-precision soft-start control is achieved. A constant current source module outputs a constant current in the nA range with zero temperature coefficient to linearly charge the soft-start capacitor, generating a precise soft-start reference voltage. Simultaneously, the feedback control module clamps the output sampling voltage to this reference voltage through a negative feedback loop, ensuring that the output voltage strictly follows the linear rise of the reference voltage. This overcomes the control accuracy problems of traditional RC structures, which suffer from unstable charging slopes, easy overshoot, or slow rise of the output voltage due to temperature drift of resistors and capacitors, ensuring a stable and controllable rise of the output voltage across the entire temperature range.
[0026] Third, it improves integration compatibility. The soft-start circuit consists of a constant current source generation module, a constant current charging module, a feedback control module, a low-power logic control module, and a gate drive module. Each module can be integrated on-chip using standard integrated circuit technology (such as BCD technology), eliminating the need for external resistors, capacitors, and other components. This solves the problems of traditional solutions requiring external components and being difficult to integrate on-chip, reducing system size and cost, and improving the integration level of the power management chip.
[0027] In summary, the technical solution of this embodiment, through modular design and its collaborative operation, simultaneously solves the technical problems of high power consumption, low control accuracy, and poor integration compatibility of traditional soft-start circuits, achieving the beneficial effects of high precision, low power consumption, and high integration.
[0028] In another preferred embodiment of the present invention, such as Figure 1 As shown, the constant current source generation module 2 includes: The bias current branch uses a bandgap reference source and a positive and negative temperature coefficient resistor compensation structure to generate the bias current IB1; The multi-stage current mirror structure includes a first-stage mirror composed of N-type transistors and a second-stage mirror composed of P-type transistors. By adjusting the transistor width-to-length ratio, the bias current IB1 is reduced to a constant current in the nA range and then input to the constant current charging module 2.
[0029] The first-level mirror includes: The first N-type transistor NM1 and the second N-type transistor NM2 are provided, wherein the drain of the first N-type transistor NM1 is shorted to its gate and connected to the output terminal of the bias current branch, and the gate of the second N-type transistor NM2 is connected to the gate of the first N-type transistor NM1. The second-stage mirror includes: a first P-type transistor PM1, the source of which is connected to the power supply voltage VDD, and its drain is connected to the drain of the second N-type transistor NM2 and shorted to its gate. Among them, the gate of the first P-type transistor PM1 serves as the output terminal of the constant current source generation module 1, and forms a proportional current mirror with the second P-type transistor PM2 in the constant current charging module 2, which is used to reduce the initial bias IB1 current to a constant current in the nA range before outputting it.
[0030] Specifically, in this embodiment, the constant current source generation module 1 includes a bias current branch and a multi-stage current mirror structure.
[0031] The bias current branch uses a bandgap reference source and a positive and negative temperature coefficient resistor compensation structure to generate the bias current. Its working principle is based on the classical theory of bandgap references: utilizing the negative temperature coefficient characteristic of the base-emitter voltage (VBE) of a bipolar transistor and the positive temperature coefficient characteristic of the VBE difference (ΔVBE) at two different current densities, a weighted sum is obtained through a resistor network (containing both positive and negative temperature coefficient resistors) to obtain a theoretically temperature-independent zero-temperature-drift reference voltage at the output point. Subsequently, a temperature-independent bias current IB1 is generated by passing this reference voltage through a voltage-to-current conversion circuit (e.g., applying this reference voltage across a high-precision resistor).
[0032] A multi-stage current mirror structure, comprising a first-stage mirror composed of N-type transistors and a second-stage mirror composed of P-type transistors. More specifically, combined with Figure 1 As shown, the first-stage mirror includes a first N-type transistor NM1 and a second N-type transistor NM2. The drain of the first N-type transistor is shorted to its gate (forming a diode connection) and connected to the output of the bias current branch to receive the bias current IB1. The gate of the second N-type transistor is connected to the gate of the first N-type transistor, thus forming a current mirror that precisely mirrors IB1 to its drain.
[0033] The second-stage mirror includes a first P-type transistor PM1. The source of the first P-type transistor PM1 is connected to the power supply voltage VDD, and its drain is connected to the drain of the second N-type transistor NM2, with its drain shorted to its gate. Thus, the current flowing through the first P-type transistor PM1 is the current IB1 mirrored from the second N-type transistor NM2.
[0034] In this design, the gate of the first P-type transistor PM1 serves as the output terminal of the constant current source generation module. A second P-type transistor PM2 is included in the subsequent constant current charging module. The first P-type transistor PM1 and the second P-type transistor PM2 form a proportional current mirror. By precisely adjusting the channel width-to-length ratio (W / L) of PM1 and PM2, for example, by setting a large ratio (such as 1:K, where K is much greater than 1), IB1 can be reduced to the nanoampere (nA) level, serving as the final charging current IPM2 output.
[0035] This embodiment employs a bandgap reference source and a resistor compensation structure to ensure high accuracy and zero temperature drift of the bias current across the entire temperature range, laying the foundation for subsequent precise charging. Utilizing multi-stage current mirrors for current reduction not only achieves the generation of ultra-low charging currents in the nA range but also ensures the accuracy of the reduced current through precise transistor size ratio control. This structure reduces the static power consumption introduced by the soft-start module to an extremely low level, representing a key step in achieving low power consumption for the overall circuit.
[0036] In another preferred embodiment of the invention, such as Figure 1 As shown, the soft-start capacitor CSS in the constant current charging module 2 adopts a MOM capacitor structure, and the soft-start capacitor CSS is a programmable capacitor used to adjust the soft-start time of the output voltage according to the load current.
[0037] Specifically, in this embodiment, the soft-start capacitor CSS in the constant current charging module 2 adopts a metal-oxide-metal (MOM) capacitor structure. MOM capacitors utilize the parasitic capacitance between metal layers, exhibiting superior electrical characteristics. First, its temperature coefficient is extremely small, almost unaffected by temperature changes. This means that the charging slope voltage, jointly determined by the charging current IPM2 and the capacitor CSS, is: ; It also exhibits extremely high temperature stability, a crucial guarantee for achieving high-precision soft-start control. Secondly, the MOM capacitor has very low leakage current, which is essential for nA-level charging current environments. If a capacitor structure with high leakage current (such as a MOS capacitor) is used, some of the charging current will leak through the capacitor, reducing the effective current used to build up the voltage, affecting the linearity of the ramp voltage, and even preventing normal charging to the target threshold at high temperatures, thus causing the soft-start function to fail. The low leakage current characteristic of the MOM capacitor perfectly solves this problem. Furthermore, MOM capacitors can be directly implemented using existing metal layers in standard CMOS or BCD processes, without adding extra masks or process steps, and without introducing any additional costs.
[0038] As a further preferred embodiment, the soft-start capacitor CSS can be designed as a programmable capacitor array. VDVDT and VA are clamped together by a negative feedback operational amplifier, and the VOUT voltage can be represented by VA as follows: ; Based on the formula above, the rise time TOUT of the output voltage VOUT can be calculated as follows: ; As can be seen, the soft-start time is directly proportional to the capacitance value of the CSS (Capacitor Array). By designing the CSS as a capacitor array that can be controlled by digital signals, users or systems can flexibly configure the soft-start time according to the specific needs of the backend load. For example, for capacitive or high-current loads, a larger capacitance value can be connected to extend the startup time and avoid overshoot; for resistive loads, a shorter startup time can be selected to improve the system response speed.
[0039] This embodiment uses a MOM capacitor as the energy storage element, fundamentally ensuring the temperature stability of the charging slope and its resistance to leakage interference, thus improving the high precision and reliability of soft-start. The introduction of a programmable capacitor provides great flexibility for system design, enabling the same chip to adapt to diverse application scenarios and broadening its applicability.
[0040] In another preferred embodiment of the invention, such as Figure 1 As shown, the feedback control module 3 also includes: The voltage divider sampling branch consists of a first resistor R1 and a second resistor R2 connected in series. The common connection point of the first resistor R1 and the second resistor R2 outputs the sampling voltage VA to the inverting input of the comparator COMP. The switching transistor NM6, controlled by the control logic signal, is used to cut off the ground path of the voltage divider sampling branch after the soft start is completed.
[0041] In feedback control module 3: The non-inverting input of comparator COMP is connected to the output of constant current charging module 2 to receive the soft-start reference voltage VDVDT, and its inverting input is connected to the common connection point of the first resistor R1 and the second resistor R2 to receive the sampling voltage VA. The power device NM7 is an N-type power MOSFET. Its drain is connected to the input voltage VIN, and its source serves as the output terminal of the output voltage VOUT and is connected to the end of the first resistor R1 furthest from the common connection point. The output of the gate drive module 5 and the output of the comparator COMP are connected to the gate of the power device NM7. This is used to raise the gate potential of the power device NM7 after soft start so that it can enter the linear region and be fully turned on.
[0042] Specifically, in combination Figure 1 As shown, the feedback control module in this embodiment mainly consists of a comparator COMP, an N-type power MOSFET NM7 as a power device, and a voltage divider sampling branch composed of a first resistor R1 and a second resistor R2. The working principle of its core negative feedback loop is as follows: The voltage divider sampling branch consists of a first resistor R1 and a second resistor R2 connected in series between the output voltage VOUT and ground. The common connection point A of R1 and R2 outputs the sampling voltage VA to the inverting input of comparator COMP. The non-inverting input of comparator COMP is connected to the output of the constant current charging module to receive the soft-start reference voltage VDVDT. The output of comparator COMP is connected to the gate of power device NM7 for control. The drain of NM7 is connected to the input voltage VIN, and its source serves as the output of the output voltage VOUT, also connected to the end of R1 furthest from the common connection point.
[0043] During the soft-start phase, comparators COMP and NM7 form a negative feedback amplifier. When the system powers on, VDVDT rises linearly from 0. At this time, if VOUT is 0, the sampled voltage VA is also 0, the comparator outputs a high level, gradually turning on NM7. VIN charges the output capacitor and load through NM7, and VOUT begins to rise. The function of the negative feedback loop is to force the voltages at the non-inverting and inverting inputs of the comparator to be equal, i.e.: VA=VDVDT According to the voltage divider relationship, VA = VOUT × (R2 / (R1+R2)), substituting into the above formula, we can obtain the relationship between VOUT and VDVDT as follows: ; Therefore, the rising slope of VOUT is determined by the slope of VDVDT, thus achieving precise control of the output voltage.
[0044] As before, combining the constant current charging formula, the complete expression for the rising slope of VOUT can be derived:
[0045] Wherein, IPM2 is the charging current provided by the second P-type transistor, and Css is the soft-start capacitor.
[0046] As a further improvement to this embodiment, the feedback control module 3 also includes a switching transistor NM6. This switching transistor NM6 is controlled by a control logic signal (such as the first control logic signal EN_SS) generated by the low-power logic control module and is connected in series in the ground path of R2. During soft-start, this switching transistor is closed, allowing the voltage divider sampling circuit to operate normally. After the soft-start is complete, the control logic signal activates, turning off the switching transistor and thus cutting off the ground path of the voltage divider sampling branch. This prevents continuous static current from flowing through R1 and R2, further reducing power consumption; on the other hand, it also makes the inverting input of the comparator present a high-impedance state with respect to ground, avoiding unnecessary interference.
[0047] This embodiment clearly reveals the principle of achieving high-precision output voltage tracking through a defined negative feedback loop structure and formula derivation. By introducing a controlled switch into the feedback loop, the DC path of the voltage divider resistor is cut off after soft-start, eliminating a major source of static power consumption, which is another important contribution to low-power design.
[0048] In another preferred embodiment of the invention, such as Figure 1 As shown, the low-power logic control module 4 includes: Schmitt trigger O1 is used to shape the soft-start reference voltage and detect the threshold. The logic inversion chain O2 is used to generate complementary control logic signals, which include a first control logic signal EN_SS and a second control logic signal EN_SS1. The first control logic signal EN_SS turns off the charging circuit by controlling the switching transistor connected in parallel across the soft-start capacitor CSS.
[0049] Specifically, in this embodiment, the low-power logic control module includes a Schmitt trigger O1 and a logic inverting chain O2. Its core function is to accurately monitor the end point of the soft-start process and generate a corresponding shutdown control signal.
[0050] The input of Schmitt trigger O1 is connected to the soft-start reference voltage VDVDT. The Schmitt trigger has a hysteresis characteristic, which can effectively shape and threshold the slowly rising analog voltage VDVDT, avoiding false triggering due to noise interference. When VDVDT rises to the preset threshold voltage (which corresponds to the moment the soft start is completed), the output of Schmitt trigger O1 changes, generating a clean digital logic level transition.
[0051] The flip signal is then fed into the logic inverting chain O1. This chain, composed of a series of inverters, not only provides sufficient drive capability but, more importantly, generates complementary control logic signals, such as the first control logic signal EN_SS and the second control logic signal EN_SS1. The EN_SS signal is used to control the constant current charging module. For example, it can control a switching transistor connected in parallel across the soft-start capacitor CSS. When the soft-start is complete and the EN_SS signal is valid, the switching transistor turns on, short-circuiting and discharging the CSS, completely cutting off the charging current path, thereby shutting down the constant current charging module.
[0052] This embodiment utilizes a Schmitt trigger O1 to achieve precise and interference-resistant detection of the soft-start completion point. By generating multiple complementary control signals through a logic inversion chain, different functional modules in the circuit can be precisely and independently shut down, achieving refined and intelligent management of system power consumption and ensuring that the overall static current of the circuit can be reduced to an ultra-low level of less than 1μA after the soft start is completed.
[0053] In another preferred embodiment of the invention, such as Figure 1 As shown, the constant current charging module 2 includes: The second P-type transistor PM2 has its gate connected to the gate of the first P-type transistor PM1, and its source connected to the power supply voltage VDD, and is used to output a mirrored nA level constant current. The first terminal of the soft-start capacitor CSS is connected to the drain of the second P-type transistor PM2, and its second terminal is grounded, which is used to generate a linearly rising voltage using an nA-level charging current. The buffered output branch includes a third N-type transistor NM3, a fourth N-type transistor NM4, and a fifth N-type transistor NM5 connected in series between the power supply voltage VDD and ground; Among them, the gate of the third N-type transistor NM3 is connected to the first terminal of the soft-start capacitor CSS, and its source serves as the output terminal of the soft-start reference voltage VDVDT; the gate of the fourth N-type transistor NM4 is connected to the control logic signal, and the gate of the fifth N-type transistor NM5 is connected to the gate of the first N-type transistor NM1.
[0054] Specifically, in combination Figure 1 As shown, the constant current charging module 2 mainly includes: The second P-type transistor PM2 has its gate connected to the gate of the first P-type transistor PM1, and its source connected to the power supply voltage. As before, PM2 and PM1 form a proportional current mirror, and the drain of PM2 outputs a precise nA-level charging current IPM2. The third P-type transistor PM3 has its drain connected to the non-inverting input of the comparator COMP, its source connected to the drain of the third N-type transistor NM3, and its gate controlled by the first logic control signal EN_SS.
[0055] The first terminal of the soft-start capacitor CSS is connected to the drain of PM2, and the second terminal is grounded. Therefore, under the action of the charging current IPM2, the voltage across the capacitor CSS (i.e., the voltage at point VDVDT) rises linearly from 0.
[0056] To stably and with low impedance transmit the VDVDT voltage to the subsequent feedback control module, this embodiment includes a buffered output branch. This branch comprises a third N-type transistor NM3, a fourth N-type transistor NM4, and a fifth N-type transistor NM5 connected in series between the power supply voltage and ground. NM3 forms a source follower, with its gate connected to the first terminal of the soft-start capacitor CSS, its drain connected to the power supply voltage, and its source serving as the output terminal of the buffered soft-start reference voltage VDVDT. The source follower features high input impedance and low output impedance, effectively isolating the charging and discharging effects of the subsequent circuitry on the capacitor CSS, ensuring the purity of the VDVDT charging slope. The gate of NM4 is connected to a control logic signal (such as EN_SS), acting as a switch. When the soft-start ends, the EN_SS signal can turn off NM4, thereby cutting off the operating current of the buffered output branch and further saving power. The gate of NM5 is connected to the gate of the first N-type transistor NM1, receiving the bias voltage from the constant current source generation module, providing a stable quiescent operating current for the source follower.
[0057] This embodiment uses a source follower to buffer the ramp voltage, eliminating the interference of load effects on charging accuracy and ensuring the accuracy of the reference voltage. Simultaneously, a power control switch is integrated into the buffer stage, demonstrating the invention's pursuit of low power consumption in every circuit detail.
[0058] In summary, through the above-described embodiments and their combinations, this invention constructs a complete technical solution encompassing high-precision current generation, accurate ramp generation, negative feedback tracking control, and intelligent low-power management. This solution effectively solves the dual problems of high power consumption and low accuracy in traditional soft-start circuits, demonstrating significant advancement and extremely high practical value.
[0059] The above are merely preferred embodiments of the present invention and are not intended to limit the implementation methods and protection scope of the present invention. Those skilled in the art should recognize that any equivalent substitutions and obvious changes made using the content of this specification and illustrations should be included within the protection scope of the present invention.
Claims
1. A soft-start circuit, characterized in that, include: A constant current source generation module is used to generate a bias current with zero temperature coefficient and then output the bias current after mirroring and reducing it to a constant current in the nA range. A constant current charging module, connected to the constant current source generating module, is used to linearly charge the soft-start capacitor using the constant current to generate a soft-start reference voltage that increases linearly with time. The feedback control module includes a comparator and a power device. The comparator clamps the output sampling voltage to the soft-start reference voltage through a negative feedback loop to control the output voltage to rise smoothly. A low-power logic control module is used to detect the soft-start reference voltage and generate a control logic signal after the soft-start is completed to turn off the constant current charging module and the feedback control module. A gate drive module is used to drive the power device to be fully turned on.
2. The soft-start circuit according to claim 1, characterized in that, The constant current source generation module includes: The bias current branch uses a bandgap reference source and a positive and negative temperature coefficient resistor compensation structure to generate the bias current; The multi-stage current mirror structure includes a first-stage mirror composed of N-type transistors and a second-stage mirror composed of P-type transistors. By adjusting the transistor width-to-length ratio, the bias current is reduced to a constant current in the nA range and then input to the constant current charging module.
3. The soft-start circuit according to claim 2, characterized in that, The first-level image includes: A first N-type transistor and a second N-type transistor, wherein the drain of the first N-type transistor is shorted to its gate and connected to the output terminal of the bias current branch, and the gate of the second N-type transistor is connected to the gate of the first N-type transistor. The second-stage mirror includes: a first P-type transistor, the source of which is connected to the power supply voltage, and its drain connected to the drain of the second N-type transistor and shorted to its gate; The gate of the first P-type transistor serves as the output terminal of the constant current source generation module and forms a proportional current mirror with the second P-type transistor in the constant current charging module, which is used to reduce the bias current to the constant current in the nA range before outputting it.
4. The soft-start circuit according to claim 1, characterized in that, The soft-start capacitor in the constant current charging module adopts a MOM capacitor structure and is a programmable capacitor, used to adjust the soft-start time of the output voltage according to the load current.
5. The soft-start circuit according to claim 1, characterized in that, The feedback control module also includes: The voltage divider sampling branch consists of a first resistor and a second resistor connected in series. The common connection point of the first resistor and the second resistor outputs the sampling voltage to the inverting input of the comparator. The switching transistor, controlled by the control logic signal, is used to cut off the ground path of the voltage divider sampling branch after the soft start is completed.
6. The soft-start circuit according to claim 5, characterized in that, In the feedback control module: The non-inverting input of the comparator is connected to the output of the constant current charging module to receive the soft-start reference voltage, and its inverting input is connected to the common connection point of the first resistor and the second resistor to receive the sampling voltage. The power device is an N-type power MOSFET, whose drain is connected to the input voltage, and whose source serves as the output terminal of the output voltage and is connected to the end of the first resistor furthest from the common connection point. The output of the gate drive module and the output of the comparator are connected together to the gate of the power device, which is used to raise the gate potential of the power device after soft start so that it enters the linear region and is fully turned on.
7. The soft-start circuit according to claim 1, characterized in that, The low-power logic control module includes: A Schmitt trigger is used to shape and threshold-detect the soft-start reference voltage; A logic inversion chain is used to generate complementary control logic signals, wherein the control logic signals include a first control logic signal, which controls a switching transistor connected in parallel across the soft-start capacitor to turn off the charging circuit.
8. The soft-start circuit according to claim 3, characterized in that, The constant current charging module includes: The second P-type transistor has its gate connected to the gate of the first P-type transistor and its source connected to the power supply voltage, and is used to output the mirrored nA-level charging current. The first terminal of the soft-start capacitor is connected to the drain of the second P-type transistor, and its second terminal is grounded, which is used to generate a linearly rising voltage using the constant current. The buffered output branch includes a third N-type transistor, a fourth N-type transistor, and a fifth N-type transistor connected in series between the power supply voltage and ground; The gate of the third N-type transistor is connected to the first terminal of the soft-start capacitor, and its source serves as the output terminal of the soft-start reference voltage; the gate of the fourth N-type transistor is connected to the control logic signal, and the gate of the fifth N-type transistor is connected to the gate of the first N-type transistor.