Signal smoothing processing method, circuit and chip

Abstract

This application provides a signal smoothing processing method, circuit, and chip. The method includes: responding to the detection of a signal switching point in the input digital signal, dynamically adjusting the filter coefficients based on global filter control parameters; and initializing boundary control parameters according to the signal switching characteristics corresponding to the signal switching point, wherein the global filter control parameters include a voltage change correction coefficient and an initial filter delay value, and the boundary control parameters include a limiting threshold; determining the single-step change amount of the output signal corresponding to the input digital signal based on the adjusted filter coefficients; applying the voltage change correction coefficient to correct the single-step change amount, obtaining a corrected single-step change amount; constraining the amplitude of the corrected single-step change amount based on the initialized limiting threshold, obtaining a constrained single-step change amount; and generating a smoothed output signal corresponding to the current moment based on the constrained single-step change amount. This reduces hardware resource consumption and improves EMI suppression capabilities.

Description

Technical Field

[0001] This application relates to the fields of signal processing algorithms and chip digital circuit technology, and in particular to a signal smoothing processing method, circuit and chip. Background Technology

[0002] In modern electronic systems, Device Serial Interface (DSI) is widely used in display modules, sensor communication, and data transmission between master and slave devices. For example, in display driving, DSI signals map digital control codes (such as 0, 1, 3, etc.) into analog voltage signals via serial communication to drive backlights or pixel units. However, the digital characteristics of DSI signals cause step voltage changes during code switching. This steep signal transition can excite high-frequency harmonics, leading to severe electromagnetic interference (EMI) problems. EMI can not only interfere with the device's own function (such as causing display malfunctions or communication errors) but also affect the normal operation of nearby electronic devices. Therefore, signal processing techniques are needed to smooth DSI signals. Furthermore, similar scenarios in industrial control, automotive electronics, and IoT devices also require reducing EMI during DSI signal switching.

[0003] In related technologies, the main methods for signal smoothing processing are lookup table method and integration method. Specifically, the lookup table method uses the input signal as an index to directly read the target smoothed output voltage corresponding to the input signal from a preset mapping table of input signal and smoothed output voltage, thereby achieving piecewise linear signal smoothing processing. The integration method uses a fixed-length sliding window to perform local accumulation or averaging operations on the discrete input signal sequence to achieve a smoothing effect.

[0004] However, all of the above solutions suffer from high hardware resource consumption and insufficient EMI suppression. Summary of the Invention

[0005] This application provides a signal smoothing processing method, circuit, and chip to reduce hardware resource consumption and improve EMI suppression capabilities.

[0006] In a first aspect, this application provides a signal smoothing processing method, comprising:

[0007] In response to the detection of the signal switching point of the input digital signal, the filter coefficient is dynamically adjusted based on the global filter control parameters, which include the voltage change correction coefficient and the initial filter delay value.

[0008] Based on the signal switching characteristics corresponding to the signal switching point, initialize the boundary control parameters, which include the amplitude limiting threshold.

[0009] Based on the adjusted filter coefficients, determine the single-step change of the output signal corresponding to the input digital signal;

[0010] The voltage change correction factor is applied to correct the single-step change, resulting in the corrected single-step change.

[0011] Based on the initialized amplitude limiting threshold, the amplitude of the corrected single-step change is constrained to obtain the constrained single-step change.

[0012] Based on the constrained single-step change, a smoothed output signal corresponding to the current moment is generated.

[0013] In one possible implementation, a smoothed output signal corresponding to the current moment is generated based on the constrained single-step change, including:

[0014] The constrained single-step change is added to the smoothed output signal from the previous time step to obtain the summation result;

[0015] Based on the summation result, a smoothed output signal corresponding to the current time is generated.

[0016] In one possible implementation, the boundary control parameters further include a convergence determination threshold, and based on the summation result, a smoothed output signal corresponding to the current time moment is generated, including:

[0017] If the summation result satisfies the fast convergence condition, the input digital signal is used as the smoothed output signal corresponding to the current time. The fast convergence condition includes that the absolute difference between the input digital signal and the summation result is less than the convergence judgment threshold.

[0018] If the summation result does not meet the fast convergence condition, the summation result will be used as the smoothed output signal corresponding to the current time.

[0019] In one possible implementation, the filter coefficients are dynamically adjusted based on global filter control parameters, including:

[0020] Reset the number of filtering operations in response to signal switching points;

[0021] Based on the initial filter delay value and the number of filter operations, the filter coefficients at the current moment are calculated using a preset piecewise function, where the segmentation points of the piecewise function are determined by the initial filter delay value in the global filter control parameters.

[0022] In one possible implementation, the filter coefficients satisfy the following form:

[0023]

[0024] In the formula, These are the values ​​of the filter coefficients; This represents the number of filtering operations; This represents a piecewise function.

[0025] In one possible implementation, the piecewise function satisfies the following form:

[0026]

[0027] in, This is the initial filter delay value; The duration of a slow change in a signal is related to the signal type of the output signal; This is a constant used to set the initial strength of the filter coefficients; The step value is an integer.

[0028] In one possible implementation, the global filter control parameters are determined as follows:

[0029] Obtain the signal category corresponding to the input digital signal. The signal category is used to characterize the smoothness of the expected transition process of the filtered output signal from one steady state to another.

[0030] From the pre-calibrated configuration mapping relationship, the initial filter delay value and voltage change correction coefficient corresponding to the signal category are determined. The configuration mapping relationship characterizes the correspondence between the signal category and the global filter control parameters.

[0031] Secondly, this application provides a signal smoothing processing circuit, comprising:

[0032] The preamplifier circuit is used to dynamically adjust the filter coefficients based on global filter control parameters in response to the detection of the signal switching point of the input digital signal; and to initialize the boundary control parameters according to the signal switching characteristics corresponding to the signal switching point. The global filter control parameters include voltage change correction coefficients and initial filter delay values, and the boundary control parameters include amplitude limiting thresholds.

[0033] The shifter, electrically connected to the preamplifier circuit, is used to determine the single-step change of the output signal corresponding to the input digital signal based on the adjusted filter coefficients; the voltage change correction coefficient is applied to correct the single-step change to obtain the corrected single-step change.

[0034] The first comparator, electrically connected to the shifter, is used to constrain the amplitude of the corrected single-step change based on the initialized amplitude limiting threshold, so as to obtain the constrained single-step change.

[0035] The post-processor circuit, electrically connected to the first comparator, is used to generate a smoothed output signal corresponding to the current moment based on the constrained single-step change.

[0036] In one possible implementation, the boundary control parameters further include a convergence determination threshold, and the post-processor includes an adder, a subtractor, a second comparator, and a selector, wherein:

[0037] An adder is used to add the constrained single-step change to the smoothed output signal from the previous time step to obtain the summation result.

[0038] A subtractor is used to calculate the absolute difference between the input digital signal and the summation result;

[0039] The second comparator is used to output a first comparison result when the absolute difference is less than the convergence threshold, the first comparison result indicating that the summation result meets the fast convergence condition; and to output a second comparison result when the absolute difference is greater than the convergence threshold, the second comparison result indicating that the summation result does not meet the fast convergence condition.

[0040] The selector is used to use the input digital signal as the smoothed output signal at the current time when the summation result meets the fast convergence condition; and to use the summation result as the smoothed output signal at the current time when the summation result does not meet the fast convergence condition.

[0041] Thirdly, this application provides a signal smoothing processing chip, including: the signal smoothing processing circuit of the second aspect.

[0042] Fourthly, this application provides a signal smoothing processing apparatus, comprising:

[0043] The processing module is used to respond to the detection of a signal switching point of the input digital signal, dynamically adjust the filter coefficients based on global filter control parameters, including voltage change correction coefficients and initial filter delay values; and initialize boundary control parameters according to the signal switching characteristics corresponding to the signal switching point, including amplitude limiting thresholds.

[0044] The determination module is used to determine the single-step change of the output signal corresponding to the input digital signal based on the adjusted filter coefficients.

[0045] The correction module is used to apply a voltage change correction coefficient to correct the single-step change and obtain the corrected single-step change.

[0046] The amplitude limiting module is used to constrain the amplitude of the corrected single-step change based on the initialized amplitude limiting threshold, so as to obtain the constrained single-step change.

[0047] The generation module is used to generate a smoothed output signal corresponding to the current moment based on the constrained single-step change.

[0048] In one possible implementation, the generation module is specifically used to: add the constrained single-step change amount to the smoothed output signal of the previous time step to obtain a summation result; and generate the smoothed output signal corresponding to the current time step based on the summation result.

[0049] In one possible implementation, the boundary control parameters further include a convergence determination threshold, and the generation module is further configured to: if the summation result satisfies the fast convergence condition, then use the input digital signal as the smoothed output signal corresponding to the current time, the fast convergence condition including that the absolute difference between the input digital signal and the summation result is less than the convergence determination threshold; if the summation result does not satisfy the fast convergence condition, then use the summation result as the smoothed output signal corresponding to the current time.

[0050] In one possible implementation, the processing module is specifically used to: reset the number of filtering operations in response to a signal switching point; and calculate the filtering coefficients at the current moment using a preset piecewise function based on the initial filtering delay value and the number of filtering operations, wherein the segmentation point of the piecewise function is determined by the initial filtering delay value in the global filtering control parameters.

[0051] In one possible implementation, the filter coefficients satisfy the following form:

[0052]

[0053] In the formula, These are the values ​​of the filter coefficients; This represents the number of filtering operations; This represents a piecewise function.

[0054] In one possible implementation, the piecewise function satisfies the following form:

[0055]

[0056] in, This is the initial filter delay value; The duration of a slow change in a signal is related to the signal type of the output signal; This is a constant used to set the initial strength of the filter coefficients; The step value is an integer.

[0057] In one possible implementation, the global filter control parameters are determined as follows: the signal category corresponding to the input digital signal is obtained, the signal category being used to characterize the smoothness of the expected transition process of the filtered output signal from one steady state to another; from a pre-calibrated configuration mapping relationship, the initial filter delay value and voltage change correction coefficient corresponding to the signal category are determined, the configuration mapping relationship characterizing the correspondence between the signal category and the global filter control parameters.

[0058] The signal smoothing processing method, circuit, and chip provided in this application dynamically adjust the filter coefficients based on global filter control parameters when a signal switching point of the input digital signal is detected; and initialize boundary control parameters according to the signal switching characteristics corresponding to the signal switching point. The global filter control parameters include a voltage change correction coefficient and an initial filter delay value, while the boundary control parameters include a limiting threshold. Based on the adjusted filter coefficients, the single-step change of the output signal corresponding to the input digital signal is determined; the voltage change correction coefficient is applied to correct the single-step change, resulting in a corrected single-step change; based on the initialized limiting threshold, the amplitude of the corrected single-step change is constrained, resulting in a constrained single-step change; and based on the constrained single-step change, the smoothed output signal corresponding to the current moment is generated. In this process, by dynamically adjusting the filter coefficients and adaptively initializing the boundary control parameters when a signal switching is detected, a variable step-size filtering mechanism is implemented. This allows the filter to adaptively optimize the smoothing effect under different signal switching conditions and significantly reduce signal delay, meeting real-time requirements. Meanwhile, adaptive boundary control dynamically constrains the slope of the output signal change based on signal switching characteristics, suppressing high-frequency harmonics generated by steep edges at the source, thus achieving precise and efficient suppression of electromagnetic interference. Furthermore, this application achieves smoothing and EMI suppression effects that traditionally require high-order filters or oversampling techniques using a simple first-order filter structure and lightweight control logic, significantly saving hardware resources. Ultimately, it provides smooth filtering results and significantly reduces signal transmission delay without increasing additional hardware resource consumption, meeting EMI standard requirements. It is particularly suitable for display interfaces, high-speed serial communication, and precision measurement fields with stringent requirements for signal quality, EMI, and cost control. Attached Figure Description

[0059] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this application and, together with the description, serve to explain the principles of this application.

[0060] Figure 1 A schematic flowchart illustrating the signal smoothing processing method provided in an embodiment of this application;

[0061] Figure 2 A schematic flowchart of a signal smoothing processing method provided in another embodiment of this application;

[0062] Figure 3 A schematic diagram comparing the DSI code input and the DSI mapped output voltage provided in the embodiments of this application;

[0063] Figure 4 A comparative schematic diagram of the filtering results provided in the embodiments of this application;

[0064] Figure 5 A comparative schematic diagram of filtering results provided in another embodiment of this application;

[0065] Figure 6 This is a schematic diagram of the structure of a signal smoothing processing circuit provided in an embodiment of this application;

[0066] Figure 7 This is a schematic diagram of the signal smoothing processing circuit provided in another embodiment of this application;

[0067] Figure 8 This is a schematic diagram of the signal smoothing processing circuit provided in another embodiment of this application;

[0068] Figure 9 This is a schematic diagram of the signal smoothing processing chip provided in the embodiments of this application;

[0069] Figure 10 This is a schematic diagram of the signal smoothing processing device provided in an embodiment of this application.

[0070] The accompanying drawings illustrate specific embodiments of this application, which will be described in more detail below. These drawings and descriptions are not intended to limit the scope of the concept in any way, but rather to illustrate the concept of this application to those skilled in the art through reference to particular embodiments. Detailed Implementation

[0071] Exemplary embodiments will now be described in detail, examples of which are illustrated in the accompanying drawings. When the following description relates to the drawings, unless otherwise indicated, the same numbers in different drawings denote the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with this application. Rather, they are merely examples of apparatuses and methods consistent with some aspects of this application as detailed in the appended claims.

[0072] The terms “first,” “second,” etc., used in the specification and claims of this application are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of this application described herein can be implemented, for example, in orders other than those illustrated or described herein. Furthermore, the terms “comprising” and “having,” and any variations thereof, are intended to cover non-exclusive inclusion; for example, a process, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, products, or apparatus.

[0073] It should be noted that the user information (including but not limited to user device information, user personal information, etc.) and data (including but not limited to data used for analysis, data stored, data displayed, etc.) involved in this application are all information and data authorized by the user or fully authorized by all parties. Furthermore, the collection, use and processing of the relevant data must comply with relevant laws, regulations and standards, and corresponding operation entry points are provided for users to choose to authorize or refuse.

[0074] In related technologies, piecewise linear signal smoothing processing based on lookup table method divides the input signal into several intervals according to voltage, stores the smoothed output voltage corresponding to each interval in ROM or Flash to form a mapping table, and then directly reads the corresponding target smoothed output voltage by looking up the mapping table using the actual input signal as an index, thereby avoiding real-time calculation. However, if a high-precision smoothing effect is required, the voltage interval needs to be subdivided into hundreds or even thousands of points, and the data table to be stored is large, which leads to a significant increase in storage resource consumption, increased hardware cost, and increased chip area.

[0075] Slice-line signal smoothing based on the integral method achieves a low-pass filtering effect by locally accumulating discrete input signals through a fixed-length sliding window. The sliding window integral (moving average) is essentially a finite-impulse-response (FIR) filter. Its frequency response exhibits high gain (gain ≈ 1) in the low-frequency range (frequencies close to 0), while the gain significantly attenuates (gain ≈ 0) in the high-frequency range (frequencies close to half the sampling rate). This method allows low-frequency signals to pass through with almost no attenuation, while high-frequency signals are significantly suppressed, thus achieving a smoothing effect. Therefore, it is often used in digital signal processing to suppress high-frequency noise. However, its hardware implementation relies on multi-stage adders and registers, resulting in high circuit complexity, high hardware resource consumption, and significant signal transmission delay. Furthermore, the sliding window integral method has limited response speed to sudden signal changes (such as symbol steps), which may not meet real-time requirements, and its filtering effect is limited by the window length and sampling rate, making it difficult to adjust flexibly.

[0076] In addition, neither of the above two schemes is optimized for the dynamic characteristics of the signal switching point, and they cannot effectively suppress high-frequency harmonics, resulting in limited EMI suppression effect.

[0077] To address the aforementioned technical issues, the signal smoothing processing scheme provided in this application dynamically initializes boundary control parameters and adjusts filter coefficients at signal switching points, achieving synergy between adaptive variable bandwidth filtering and hard limiting of output slope. This avoids the excitation of high-frequency harmonics, thereby achieving effective EMI suppression, high-quality signal waveforms, and fast transient response without increasing hardware overhead. This solves the dual problem of high hardware resource consumption and insufficient EMI suppression in related technologies.

[0078] Next, we will first explain the terms used in this application:

[0079] DSI: A serial communication interface standard between devices, encompassing various protocols and specifications such as UART, SPI, and I2C. Therefore, it can be used for master-slave communication in different ways. In this application, the DSI signal refers to the signal after directly mapping DSI communication symbols to circuit voltage. Because changes in the symbols cause the mapped signal to have a stepped shape, this can lead to circuit interference signals.

[0080] EMI: Interference generated through electromagnetic radiation or induction. In certain operating environments, EMI from electronic devices can cause noise interference to themselves or other devices. Therefore, many countries and regions have EMI standards for electronic devices to ensure electronic compatibility. To meet EMI requirements, it is necessary to eliminate interference signals within the chip circuitry.

[0081] An Infinite-Impulse-Response (IIR) filter is a digital filter based on an infinite-length unit impulse response network. It consists of an input delay branch and an output delay branch. The filtering result is obtained by multiplying the coefficients of each branch by their corresponding delayed signals and then summing the results. The coefficients of the input and output delay branches are the filter coefficients, and the number of branches is the order. Compared to FIR filters, IIR filters can construct steep frequency domain transition bands with fewer orders, thus saving computational resources, and are therefore commonly used in chip design.

[0082] The technical solution of this application and how the technical solution of this application solves the above-mentioned technical problems are described in detail below with specific embodiments. These specific embodiments can be combined with each other, and the same or similar concepts or processes may not be described again in some embodiments. The embodiments of this application will now be described with reference to the accompanying drawings.

[0083] Figure 1 This is a schematic flowchart illustrating the signal smoothing processing method provided in an embodiment of this application. The signal smoothing processing method can be executed by software and / or hardware devices. For example, the hardware device can be a signal smoothing processing apparatus, which can be an electronic device or a processing chip within an electronic device.

[0084] It should be noted that the embodiments of this application are not limited to processing only DSI signals; they can also be any serial data bus communication signal. This embodiment only uses DSI signals as input digital signals for illustrative purposes. In the filtering process, this embodiment employs a first-order IIR filter.

[0085] It should be understood that, for an IIR filter, let the filter coefficient sequence be... ,use After normalizing the filter coefficient sequence, the corresponding IIR filter operation formula is:

[0086]

[0087] Without loss of generality, the embodiments described in this application are only discussed =1, >0, <0, =1, and other filter coefficients are 0. In this case, the IIR filter degenerates into a first-order IIR filter, and its corresponding IIR filtering operation formula is:

[0088]

[0089] like Figure 1 As shown, the signal smoothing processing method includes:

[0090] S101. In response to the detection of the signal switching point of the input digital signal, the filter coefficient is dynamically adjusted based on the global filter control parameters, which include the voltage change correction coefficient and the initial filter delay value.

[0091] The signal switching point is the moment when the input digital signal undergoes a step change, i.e., each rising or falling edge of the signal. Taking the DSI signal as an example, it is a jump from symbol 0 to symbol 1, or from symbol 0 to symbol 3. The filter coefficient is a dynamic value between 0 and 1, which determines the weight of the current input digital signal x(n) and the historical smooth output signal y(n-1) in the current calculation. The smaller the filter coefficient, the smoother the change in the output signal.

[0092] For example, when the comparator detects that |x(n)-x(n-1)| is greater than the switching threshold, it determines that a signal switching point has occurred.

[0093] The voltage change correction factor is a global scaling factor used to attenuate the voltage change in a fundamental way; it can be considered a parameter that adjusts the correction ratio of the voltage change. The initial filter delay value defines the initial number of clock cycles after the signal switching point for the filter to maintain its strongest damped state; it can be considered a parameter that controls the initial response speed of the filter.

[0094] For example, let , For any function, The number of filtering operations is denoted as _____. After detecting a signal switching point, the filter coefficients are calculated using a piecewise function based on the relationship between the initial filter delay value and the current internal counter (number of filtering operations). The piecewise function is configured to cause the filter coefficients to decay non-linearly with increasing number of filtering operations; for example, the filter coefficients are an exponential mapping of the piecewise function.

[0095] In one possible implementation, the piecewise function is configured such that: when the number of filtering operations is less than or equal to a first threshold (i.e., the initial filtering delay value)... When the number of filtering operations is greater than the first threshold and less than or equal to the second threshold (e.g., the second threshold = ...), the filter coefficients are maintained at the first level; the value of the piecewise function increases rapidly; when ... When the filter coefficient is at the first level (+preset constant), it changes monotonically from the first level to the second level at the first rate of change. When the number of filtering operations is greater than the second threshold, the filter coefficient remains at the second level, where the first level is higher than the second level.

[0096] S102. Based on the signal switching characteristics corresponding to the signal switching point, initialize the boundary control parameters, including the amplitude limiting threshold.

[0097] The boundary control parameters should be understood as the safety boundaries dynamically calculated based on the specific characteristics of the signal transition each time a signal switching point is detected. The amplitude limiting threshold is used to constrain the maximum single-step change of the filtered output signal in each clock cycle. The amplitude limiting threshold determines the maximum slope of the output signal (i.e., dV / dt), which is the key to suppressing EMI.

[0098] For example, in one implementation, initializing boundary control parameters based on the signal switching characteristics corresponding to the signal switching point may include: retrieving the boundary control parameter matching the signal switching characteristics from a preset mapping table, and using that boundary control parameter as the initialized boundary control parameter. This mapping table predefines boundary control parameters corresponding to different signal switching paths; for example, a jump from symbol 0 to symbol 1 corresponds to a limiting threshold of 24; a jump from symbol 0 to symbol 3 corresponds to a limiting threshold of 12.

[0099] S103. Based on the adjusted filter coefficients, determine the single-step change of the output signal corresponding to the input digital signal.

[0100] For example, apply the adjusted filter coefficients. The input digital signal is filtered, and the result of the filtering operation is expressed as follows:

[0101]

[0102] Single-step change in the output signal:

[0103]

[0104] S104. Apply the voltage change correction coefficient to correct the single-step change and obtain the corrected single-step change.

[0105] For example, the voltage change correction factor is denoted as ,use Scaling up the change in a single step.

[0106] In one implementation, the corrected single-step change amount .

[0107] S105. Based on the initialized amplitude limiting threshold, apply amplitude constraints to the corrected single-step change to obtain the constrained single-step change.

[0108] For example, the initialized threshold is denoted as . ,use By applying a hard absolute value limit to the corrected single-step change, a safe and constrained single-step change is obtained.

[0109] In one implementation, the constrained single-step change amount This operation ensures that no matter how large the calculated change is, the final change in each step will not exceed [a certain value]. .

[0110] S106. Based on the constrained single-step change, generate the smoothed output signal corresponding to the current moment.

[0111] In this step, after obtaining the constrained single-step change, a smoothed output signal corresponding to the current moment is generated based on the constrained single-step change through a preset algorithm logic.

[0112] For details on how to generate the smoothed output signal corresponding to the current moment based on the constrained single-step change, please refer to the subsequent embodiments, which will not be repeated here.

[0113] This application implements a variable step-size filtering mechanism by dynamically adjusting the filter coefficients and adaptively initializing boundary control parameters when a signal switch is detected. This allows the filter to adaptively optimize the smoothing effect under different signal switching conditions and significantly reduce signal delay, meeting real-time requirements. Simultaneously, the adaptive boundary control dynamically constrains the output signal change slope based on signal switching characteristics, suppressing high-frequency harmonics generated by steep edges at their source, achieving precise and efficient suppression of electromagnetic interference. Furthermore, this application achieves smoothing and EMI suppression effects traditionally requiring high-order filters or oversampling techniques using a simple first-order filter structure and lightweight control logic, significantly saving hardware resources. Ultimately, it provides smooth filtering results and significantly reduces signal transmission delay without increasing additional hardware resource consumption, meeting EMI standard requirements. This is particularly suitable for display interfaces, high-speed serial communication, and precision measurement fields with stringent requirements for signal quality, EMI, and cost control.

[0114] In some embodiments, generating a smoothed output signal corresponding to the current time step based on a constrained single-step change includes: adding the constrained single-step change to the smoothed output signal of the previous time step to obtain a sum; and generating a smoothed output signal corresponding to the current time step based on the sum.

[0115] For example, the constrained single-step change Smoothed output signal compared to the previous time step The result is fed into an adder and the sum is calculated. = .

[0116] In one implementation, the summation result is directly expressed. As the smoothed output signal corresponding to the current moment, i.e. .

[0117] Figure 2 This is a schematic flowchart illustrating a signal smoothing processing method according to another embodiment of this application. Based on the above embodiments, this application further describes the signal smoothing processing method. For example... Figure 2 As shown, the method in this application embodiment may include:

[0118] S201. In response to the detection of a signal switching point of the input digital signal, the filter coefficient is dynamically adjusted based on the global filter control parameters; and the boundary control parameters are initialized according to the signal switching characteristics corresponding to the signal switching point. The global filter control parameters include a voltage change correction coefficient and an initial filter delay value, and the boundary control parameters include a limiting threshold.

[0119] The initialization of boundary control parameters can be found in step S102, and will not be repeated here.

[0120] For example, in one possible implementation, the filter coefficients are dynamically adjusted based on global filter control parameters. Specifically, this may include: resetting the number of filter operations in response to a signal switching point; and calculating the filter coefficients at the current moment using a preset piecewise function based on the initial filter delay value and the number of filter operations, wherein the segmentation points of the piecewise function are determined by the initial filter delay value in the global filter control parameters.

[0121] Understandably, the number of filtering operations This is a locally valid counter that starts from zero. It is reset to 0 after a signal switching event is detected, and increments by 1 for each filtering operation completed within the processing cycle of this signal switching event. The number of filtering operations reflects how many sampling cycles have been performed since the signal switching occurred.

[0122] For example, when the comparator detects that |x(n) - x(n-1)| is greater than the switching threshold, it determines that a signal switching point has occurred. The system immediately updates its internal state variables. Reset to zero.

[0123] The preset piecewise function is based on the number of filtering operations. The function is a rounding function.

[0124] For example, in one possible implementation, the filter coefficients satisfy the following form:

[0125]

[0126] In the formula, These are the values ​​of the filter coefficients; This represents the number of filtering operations; This represents a piecewise function.

[0127] It should be understood that the change in the filter coefficient is not linear, but rather a negative exponential function with base 2. Therefore, Tiny changes can cause Significant changes. Control The step size, that is, to achieve the... Control of the decay rate.

[0128] Furthermore, in one possible implementation, the piecewise function satisfies the following form:

[0129]

[0130] in, This is the initial filter delay value; The duration of a slow change in a signal is related to the signal type of the output signal; This is a constant used to set the initial strength of the filter coefficients; The step value is an integer.

[0131] Based on the specific expression of the piecewise function above, it can be understood that the entire dynamic adjustment process of the filter coefficients is divided into three stages. The first stage is the hold period, which occurs initially at the signal switching point. During the first cycle, the filter coefficient remains at a fixed value to quickly suppress fast impulses and high-frequency noise (EMI). The second stage is a rapid relaxation period, during which the filter coefficient... Follow Increase and with The factorial decays sharply, and after the initial hold period, the filter coefficients... It begins to relax (attenuate) rapidly. This can be considered as the relaxation step length at this stage. The larger the filter coefficient, the higher the filter coefficient. The faster the relaxation, the better, as it allows the filter's bandwidth (i.e., inertia) to quickly recover from a very narrow (strong filtering) state to its normal operating state, preventing excessive signal delay caused by prolonged strong filtering. The third stage is the saturation hold period, i.e., the filter coefficient... If the value remains unchanged and stabilizes at the minimum, it means that the first-order IIR filter is almost entirely dependent on the historical output, with extremely high inertia and extremely narrow bandwidth. This determines how long the second phase will last. and Together, they determine the trajectory of the transition from the strongly filtered state. The third stage ensures that the system is in a deterministic and safe extremely smooth state before convergence.

[0132] This implementation achieves variable step size adjustment by indirectly and non-uniformly controlling the attenuation rate of the filter coefficients. Compared with traditional fixed filter coefficient IIR or simple linear changes, variable step size filtering achieves better EMI suppression, faster dynamic response and stronger stability.

[0133] S202. Based on the adjusted filter coefficients, determine the single-step change of the output signal corresponding to the input digital signal.

[0134] For details of this step, please refer to step S103, which will not be repeated here.

[0135] S203. Apply the voltage change correction coefficient to correct the single-step change and obtain the corrected single-step change.

[0136] For details of this step, please refer to step S104, which will not be repeated here.

[0137] S204. Based on the initialized amplitude limiting threshold, apply amplitude constraints to the corrected single-step change to obtain the constrained single-step change.

[0138] For details of this step, please refer to step S105, which will not be repeated here.

[0139] S205. Add the constrained single-step change to the smoothed output signal from the previous time step to obtain the sum.

[0140] For example, the constrained single-step change Smoothed output signal compared to the previous time step The result is fed into an adder and the sum is calculated. = .

[0141] Then, based on the summation result, the smoothed output signal corresponding to the current time is generated, specifically including the following steps S206~S208.

[0142] S206. Determine whether the summation result satisfies the fast convergence condition.

[0143] Among them, the boundary control parameters also include the convergence determination threshold. Convergence criterion threshold This threshold is typically set to a small positive number, for example, slightly larger than the system's noise floor or quantization error. Convergence criterion threshold. It is also dynamically determined based on the signal switching characteristics corresponding to the signal switching point. For example, the boundary control parameters matching the signal switching characteristics are retrieved from a preset mapping table, and these boundary control parameters are used as the initialized boundary control parameters. This mapping table predefines the boundary control parameters corresponding to different signal switching paths. For example, when switching from symbol 0 to symbol 1, the corresponding amplitude limiting threshold is 24, and the convergence determination threshold is... The threshold is 16; the amplitude limiting threshold corresponding to the transition from symbol 0 to symbol 3 is 12, and the convergence determination threshold is 16. It is 20.

[0144] The fast convergence condition serves as a decision threshold to determine whether the filtering process can end prematurely. Its core is to determine whether the output signal has converged sufficiently to the input digital signal.

[0145] Fast convergence criteria include the absolute difference between the input digital signal and the summation result being less than a convergence threshold; that is, in each signal processing cycle, the calculated... Then, calculate the current input digital signal. and absolute difference | |, absolute difference| | and convergence threshold Compare them.

[0146] If the absolute difference | | Less than the convergence threshold This indicates that the summation result satisfies the fast convergence condition, i.e., it has converged, so execute S207;

[0147] If the absolute difference | |Greater than or equal to the convergence threshold If the sum does not meet the fast convergence condition, i.e., it does not converge, then execute S208.

[0148] S207. Use the input digital signal as the smoothed output signal corresponding to the current moment.

[0149] For example, .

[0150] Understandably, this step is considered as the system performing a fast convergence protection operation, discarding the results generated by the filtering algorithm. The final output signal will be smoothed. Forced update to input digital signal .

[0151] S208. Use the summation result as the smoothed output signal corresponding to the current time.

[0152] For example, = .

[0153] This application embodiment, by further introducing a fast convergence protection mechanism, fundamentally solves the inherent overshoot and hysteresis defects of IIR filters, avoids signal distortion caused by hysteresis, and improves signal fidelity. In addition, this fast convergence protection mechanism allows the filtering process to terminate early during convergence, effectively improving system response speed, reducing latency, and lowering system power consumption and computational load.

[0154] In some embodiments, the global filter control parameters are determined as follows: the signal category corresponding to the input digital signal is obtained, the signal category being used to characterize the smoothness of the expected transition process of the filtered output signal from one steady state to another; from a pre-calibrated configuration mapping relationship, the initial filter delay value and voltage change correction coefficient corresponding to the signal category are determined, the configuration mapping relationship characterizing the correspondence between the signal category and the global filter control parameters.

[0155] It should be understood that signal category is used to quantify the expectation of the "filtered signal waveform," characterizing the steepness or flatness of the output signal edges. Signal category is, for example, specified by rise time (e.g., 2ns, 10ns), with flatness implying a long rise time and steepness implying a short rise time. This signal category is pre-defined and stored in the system; for example, during system initialization, the corresponding signal category is obtained based on the application scenario of the product or device.

[0156] The pre-calibrated configuration mapping relationship can be a parameter database or lookup table stored inside the system, for example, based on deep domain knowledge (circuit models, EMI theory, etc.), simulation verification, or experimental calibration.

[0157] For example, using the category signal as an index, the configuration mapping table stored in the system's internal read-only memory (ROM) or register set is accessed to read a pair of parameters (voltage change correction coefficients) that are bound to that category signal and pre-optimized. and initial filter delay value ).

[0158] In this embodiment, matching global filter control parameters are quickly determined from a pre-defined configuration mapping relationship based on signal category, simplifying the complex filter parameter tuning process and reducing the development cycle. Furthermore, when requirements or standards change, only the configuration mapping table needs to be updated, without modifying the algorithm code or hardware circuitry, improving system flexibility and maintainability.

[0159] Next, combined Figures 3-5 The filtering effect of the signal smoothing processing method provided in the embodiments of this application will be illustrated by way of example.

[0160] Figure 3 A schematic diagram comparing the DSI code input and the DSI mapped output voltage provided in the embodiments of this application. Figure 3 In the diagram, (a) represents the DSI input digital signal. The horizontal axis represents time (in µs), and the vertical axis represents the DSI code, which includes three code elements: 0, 1, and 3. The data update time is 0.04 µs. It can be seen that the code elements switch rapidly between 0, 1, and 3. Figure 3 In the diagram, (b) represents the voltage output directly mapped by the DSI code, meaning the code elements directly correspond to the converted voltage signal. The horizontal axis represents time (in microseconds); the vertical axis represents voltage. Figure 3 As can be seen from (b) in the figure, due to the large numerical difference between the symbols (0, 1, 3), the voltage will have a significant step change at the signal switching point (for example, jumping directly from the high voltage corresponding to "3" to the low voltage corresponding to "1"). The rapid and large voltage step will generate serious electromagnetic interference (i.e. EMI), so the direct mapping output method has EMI risks.

[0161] To address this, IIR filtering is used to reduce the steepness of the output signal, that is, to generate a smooth rising or falling edge at the signal switching point.

[0162] For example, taking a transition time of 1µs as an example, the global filter control parameters are initialized according to the signal category, and the initial filter delay value is... =6, voltage variation correction factor =0.5. For any signal switching point, initialize... ,Right now =9, for ,Keep Unchanged; for , ;for ,Keep Unchanged. For signal switching points from 0 to 3, or from 3 to 0, the limiting threshold remains unchanged. Convergence threshold For signal switching points from 0 to 1, or from 1 to 3, the limiting threshold is... Convergence threshold .

[0163] It should be noted that the amplitude limiting threshold This can limit the maximum single-step change of the filtered output signal, thereby controlling the rise or fall slope of the analog signal. For example, for large-span switching (such as 0V→3.3V), the rate of change needs to be strictly limited (i.e., A smaller setting is allowed to prevent overshoot oscillations; for small-amplitude switching (e.g., 1.2V→3.3V), a higher rate of change is permitted (i.e., ... Set a larger threshold to accelerate response. Convergence criterion threshold. Used to force when the input signal drops sharply and approaches the output value. Eliminate hysteresis errors. For example, during large-scale switching (such as 0V→3.3V), relax the convergence threshold. To avoid false triggering due to noise; during small-scale switching (e.g., 1.2V→3.3V), tighten the convergence threshold. This ensures rapid tracking of small signals. Furthermore, and The integer chosen is essentially a multiple of the ADC quantization steps. For example, γ=12 corresponds to 12 least significant bits (LSB) steps.

[0164] Furthermore, the 1µs transition time directly determines the voltage change rate, thus deriving the minimum integer value of γ. Taking the 0→3.3V switching as an example, the 1µs transition time requires a slope ≤ 3.3V / µs. Combined with a 10ns sampling period, the maximum allowable change per step is 3.3V. 10ns / 1us = 33mV. In a 12-bit ADC (LSB = 0.293mV), 33mV is equivalent to 113 LSBs. However, in this embodiment, γ is only 12, greatly increasing the safety margin. During the 0→1.2V switching... =16 LSB≈4.69mV, which is exactly the critical point of the typical noise peak (about 5mV), ensuring both no false triggering and timely convergence.

[0165] Figure 4 This is a comparative diagram of the filtering results provided in the embodiments of this application. Figure 4 The diagram illustrates the filtering results (line 1) of applying the aforementioned filtering coefficients, global filtering control parameters, and boundary control parameters (i.e., the signal smoothing processing method of this application) to the DSI input digital signal for signal smoothing processing; the filtering results (line 2) of applying the integral-based line smoothing processing method from related technologies; and the voltage output directly mapped from the DSI code (line 3). Figure 4 As can be seen, for DSI code metadata, under the condition of manually adjusting the delay, the signal smoothing processing method of this application embodiment can obtain a very close filtered output even with an increase of 6 sampling point delays. Furthermore, the correlation coefficient calculated for the filtering results expressed by line 1 and line 2 is 0.9982, exceeding 0.99.

[0166] To make it clear, via Figure 5 The output results are further shown under the condition of no manual adjustment of the delay. Figure 5 This is a comparative schematic diagram of filtering results provided in another embodiment of this application. Figure 5 The diagram illustrates the filtering results (line 1) of applying the aforementioned filtering coefficients, global filtering control parameters, and boundary control parameters (i.e., the signal smoothing processing method of this application) to the DSI input digital signal for signal smoothing processing; the filtering results (line 2) of applying the integral-based line smoothing processing method from related technologies; and the voltage output directly mapped from the DSI code (line 3). Figure 5 As can be seen from the embodiments of this application, the signal smoothing processing method has a smaller filtering delay.

[0167] Next, this application embodiment also provides a signal smoothing processing circuit for implementing the signal smoothing processing method in the above embodiments. Combined with... Figures 6-8 The signal smoothing processing circuit of the present application embodiment will be described by way of example.

[0168] Figure 6 This is a schematic diagram of the signal smoothing processing circuit provided in an embodiment of this application, as shown below. Figure 6 As shown, the signal smoothing processing circuit 60 includes: a preamplifier circuit 61, a shifter 62, a first comparator 63, and a postamplifier circuit 64. Wherein:

[0169] The preamplifier circuit 61 is used to dynamically adjust the filter coefficient based on global filter control parameters in response to the detection of the signal switching point of the input digital signal; and to initialize the boundary control parameters according to the signal switching characteristics corresponding to the signal switching point. The global filter control parameters include voltage change correction coefficient and initial filter delay value, and the boundary control parameters include amplitude limiting threshold.

[0170] For example, see below. Figure 7 The preamplifier circuit 61 includes at least a subtractor 611 and a delay unit 612. The delay unit 612 is used to delay the signal by one sampling period and to delay the result (such as...) Input subtractor 611, subtractor 611 is used to output a difference signal (such as...) to shifter 62. ).

[0171] The shifter 62, connected to the preamplifier circuit 61, is used to determine the single-step change of the output signal corresponding to the input digital signal based on the adjusted filter coefficients; and to correct the single-step change by applying a voltage change correction coefficient to obtain the corrected single-step change.

[0172] For example, two shifters 62 are cascaded, with one shifter connected to the output of subtractor 611, used to determine the single-step change in the output signal corresponding to the input digital signal based on the adjusted filter coefficients. For example:

[0173] Another shifter is used to apply a voltage change correction factor to correct the single-step change, resulting in a corrected single-step change. For example, .

[0174] The first comparator 63, electrically connected to the shifter 62, is used to constrain the amplitude of the corrected single-step change based on the initialized amplitude limiting threshold, so as to obtain the constrained single-step change.

[0175] For example, the initialized threshold is denoted as . ,use A hard absolute value limit is applied to the corrected single-step change to obtain a safe, constrained single-step change. The first comparator 63 is used to... and By comparing the magnitudes, the constrained single-step change can be determined. ,like ,but ,otherwise .

[0176] The post-circuit 64, electrically connected to the first comparator 63, is used to generate a smoothed output signal corresponding to the current moment based on the constrained single-step change.

[0177] Figure 7 This is a schematic diagram of the signal smoothing processing circuit provided in another embodiment of this application.

[0178] For example, such as Figure 7 As shown, in one possible implementation, the boundary control parameters further include a convergence determination threshold, and the post-circuit 64 includes an adder 641, a subtractor 642, a second comparator 643, and a selector 644, wherein:

[0179] Adder 641 is used to add the constrained single-step change to the smoothed output signal of the previous time step to obtain the summation result.

[0180] For example, the sum output by adder 641 is: = .

[0181] Subtractor 642 is used to calculate the absolute difference between the input digital signal and the summation result.

[0182] For example, subtractor 642 calculates the current input digital signal. and absolute difference | |

[0183] The second comparator 643 is used to output a first comparison result when the absolute difference is less than the convergence threshold, the first comparison result indicating that the summation result meets the fast convergence condition; and to output a second comparison result when the absolute difference is greater than the convergence threshold, the second comparison result indicating that the summation result does not meet the fast convergence condition.

[0184] For example, the second comparator 643 will compare the absolute difference | | and convergence threshold Compare, if | | Output 1 (i.e., the first comparison result), indicating that the summation result satisfies the fast convergence condition. If | | The output is 0 (i.e., the second comparison result), indicating that the summation result does not meet the fast convergence condition.

[0185] Selector 644 is used to use the input digital signal as the smoothed output signal corresponding to the current time when the summation result meets the fast convergence condition; and to use the summation result as the smoothed output signal corresponding to the current time when the summation result does not meet the fast convergence condition.

[0186] For example, selector 644 has two inputs to its left: the summation result. and input digital signal Above selector 644 is a control signal, which is the output signal of the second comparator 643. The output of selector 644 depends on this control signal. When the control signal is the first comparison result (e.g., 1), selector 644 will input a digital signal. As the smoothed output signal corresponding to the current moment When the control signal is the second comparison result (e.g., 0), selector 644 will sum the results. As the smoothed output signal corresponding to the current moment Output the results.

[0187] It should be noted that the signal smoothing processing circuit also includes a bus splicer and delay unit 65, which provides register functions to the outside world.

[0188] In this embodiment, a shifter is used instead of a multiplier to perform filter coefficient calculations, reducing hardware resource consumption. Specifically, the α and β parameters are designed as powers of 2, and shift operations are used to replace multiplication, reducing the number of hardware logic units and minimizing hardware resource usage.

[0189] Figure 8 This is a schematic diagram of the signal smoothing processing circuit provided in another embodiment of this application, compared to... Figure 7 The difference lies in that the second comparator 643 uses a single-input comparator and adds an adder 66, which is used for calculation. and and Subtractor 642 is used for calculation , The second comparator 643 is used for comparison. The magnitude of 0, if Then selector 644 will input digital signal As the smoothed output signal corresponding to the current moment Output if Then selector 644 will sum the results. As the smoothed output signal corresponding to the current moment Output the results.

[0190] Based on the above embodiments, Figure 9 This is a schematic diagram of the signal smoothing processing chip provided in the embodiments of this application, as shown below. Figure 9 As shown, the signal smoothing processing chip 90 includes a signal smoothing processing circuit 60 as described in any of the above embodiments. Through the signal smoothing processing circuit 60, a smoothed output signal corresponding to the current moment can be obtained, which is used to control the generation of analog communication signals.

[0191] The signal smoothing processing chip in this application embodiment can provide smooth filtering results and significantly reduce signal transmission delay without increasing hardware resource consumption, thus meeting EMI standard requirements.

[0192] The following are embodiments of the apparatus described in this application, which can be used to execute the embodiments of the method described in this application. For details not disclosed in the apparatus embodiments of this application, please refer to the embodiments of the method described in this application.

[0193] Figure 10 This is a schematic diagram of the signal smoothing processing apparatus provided in an embodiment of this application. Figure 10 As shown, the signal smoothing processing device 10 includes: a processing module 11, a determining module 12, a correcting module 13, a limiting module 14, and a generating module 15. Wherein:

[0194] Processing module 11 is used to respond to the detection of a signal switching point of the input digital signal, dynamically adjust the filter coefficients based on global filter control parameters, including voltage change correction coefficients and initial filter delay values; and initialize boundary control parameters according to the signal switching characteristics corresponding to the signal switching point, including amplitude limiting thresholds.

[0195] The determination module 12 is used to determine the single-step change of the output signal corresponding to the input digital signal based on the adjusted filter coefficients.

[0196] Correction module 13 is used to apply voltage change correction coefficient to correct the single-step change amount and obtain the corrected single-step change amount.

[0197] The amplitude limiting module 14 is used to constrain the amplitude of the corrected single-step change based on the initialized amplitude limiting threshold, so as to obtain the constrained single-step change.

[0198] The generation module 15 is used to generate a smoothed output signal corresponding to the current moment based on the constrained single-step change.

[0199] In one possible implementation, the generation module 15 is specifically used to: add the constrained single-step change amount to the smoothed output signal of the previous time step to obtain a summation result; and generate the smoothed output signal corresponding to the current time step based on the summation result.

[0200] In one possible implementation, the boundary control parameters further include a convergence determination threshold, and the generation module 15 is further configured to: if the summation result satisfies the fast convergence condition, then use the input digital signal as the smoothed output signal corresponding to the current time, the fast convergence condition including the absolute difference between the input digital signal and the summation result being less than the convergence determination threshold; if the summation result does not satisfy the fast convergence condition, then use the summation result as the smoothed output signal corresponding to the current time.

[0201] In one possible implementation, the processing module 11 is specifically used to: reset the number of filtering operations in response to a signal switching point; and calculate the filtering coefficients at the current moment using a preset piecewise function based on the initial filtering delay value and the number of filtering operations, wherein the segmentation point of the piecewise function is determined by the initial filtering delay value in the global filtering control parameters.

[0202] In one possible implementation, the filter coefficients satisfy the following form:

[0203]

[0204] In the formula, These are the values ​​of the filter coefficients; This represents the number of filtering operations; This represents a piecewise function.

[0205] In one possible implementation, the piecewise function satisfies the following form:

[0206]

[0207] in, This is the initial filter delay value; The duration of a slow change in a signal is related to the signal type of the output signal; This is a constant used to set the initial strength of the filter coefficients; The step value is an integer.

[0208] In one possible implementation, the global filter control parameters are determined as follows: the signal category corresponding to the input digital signal is obtained, the signal category being used to characterize the smoothness of the expected transition process of the filtered output signal from one steady state to another; from a pre-calibrated configuration mapping relationship, the initial filter delay value and voltage change correction coefficient corresponding to the signal category are determined, the configuration mapping relationship characterizing the correspondence between the signal category and the global filter control parameters.

[0209] The apparatus of this application embodiment can be used to execute the technical solutions of any of the method embodiments shown above. Its implementation principle and technical effect are similar, and will not be repeated here.

[0210] Finally, it should be noted that other embodiments of the invention will readily occur to those skilled in the art upon consideration of the specification and practice of the invention disclosed herein. This invention is intended to cover any variations, uses, or adaptations of the invention that follow the general principles of the invention and include common knowledge or customary techniques in the art not disclosed herein, and is not limited to the precise structures described above and shown in the accompanying drawings, and various modifications and changes can be made without departing from its scope. The scope of the invention is limited only by the appended claims.

Claims

1. A signal smoothing processing method, characterized in that, include: In response to the detection of a signal switching point of the input digital signal, the filter coefficients are dynamically adjusted based on global filter control parameters, including a voltage change correction coefficient and an initial filter delay value. Based on the signal switching characteristics corresponding to the signal switching point, initialize the boundary control parameters, which include the amplitude limiting threshold. Based on the adjusted filter coefficients, the single-step change of the output signal corresponding to the input digital signal is determined; The voltage change correction coefficient is applied to correct the single-step change, resulting in the corrected single-step change. Based on the initialized amplitude limiting threshold, the amplitude of the corrected single-step change is constrained to obtain the constrained single-step change. Based on the constrained single-step change, a smoothed output signal corresponding to the current moment is generated.

2. The signal smoothing processing method according to claim 1, characterized in that, The step of generating the smoothed output signal corresponding to the current moment based on the constrained single-step change includes: The constrained single-step change is added to the smoothed output signal of the previous time step to obtain the summation result; Based on the summation result, a smoothed output signal corresponding to the current moment is generated.

3. The signal smoothing processing method according to claim 2, characterized in that, The boundary control parameters also include a convergence determination threshold, and the generation of the smoothed output signal corresponding to the current time based on the summation result includes: If the summation result satisfies the fast convergence condition, then the input digital signal is used as the smoothed output signal corresponding to the current time. The fast convergence condition includes that the absolute difference between the input digital signal and the summation result is less than the convergence determination threshold. If the summation result does not meet the fast convergence condition, then the summation result is used as the smoothed output signal corresponding to the current time.

4. The signal smoothing processing method according to any one of claims 1 to 3, characterized in that, The dynamic adjustment of the filter coefficients based on global filter control parameters includes: In response to the signal switching point, reset the number of filtering operations; Based on the initial filter delay value and the number of filter operations, the filter coefficients at the current time are calculated using a preset piecewise function, wherein the segmentation points of the piecewise function are determined by the initial filter delay value in the global filter control parameters.

5. The signal smoothing processing method according to claim 4, characterized in that, The filter coefficients satisfy the following form: In the formula, These are the values ​​of the filter coefficients; This represents the number of filtering operations; This represents the piecewise function.

6. The signal smoothing processing method according to claim 5, characterized in that, The piecewise function satisfies the following form: in, The initial filter delay value; The duration of a slow change in a signal is related to the signal type of the output signal; This is a constant used to set the initial strength of the filter coefficients; The step value is an integer.

7. The signal smoothing processing method according to any one of claims 1 to 3, characterized in that, The global filter control parameters are determined in the following manner: Obtain the signal category corresponding to the input digital signal. The signal category is used to characterize the smoothness of the expected transition process of the filtered output signal from one steady state to another. From the pre-calibrated configuration mapping relationship, the initial filter delay value and voltage change correction coefficient corresponding to the signal category are determined. The configuration mapping relationship represents the correspondence between the signal category and the global filter control parameters.

8. A signal smoothing processing circuit, characterized in that, include: The preamplifier circuit is used to dynamically adjust the filter coefficients based on global filter control parameters in response to the signal switching point detected by the input digital signal. And based on the signal switching characteristics corresponding to the signal switching point, the boundary control parameters are initialized, wherein the global filter control parameters include a voltage change correction coefficient and an initial filter delay value, and the boundary control parameters include a limiting threshold. A shifter, electrically connected to the preamplifier circuit, is used to determine the single-step change of the output signal corresponding to the input digital signal based on the adjusted filter coefficients; and to correct the single-step change by applying the voltage change correction coefficients to obtain the corrected single-step change. The first comparator, electrically connected to the shifter, is used to constrain the amplitude of the corrected single-step change based on the initialized amplitude limiting threshold, so as to obtain the constrained single-step change. The post-processor circuit, electrically connected to the first comparator, is used to determine the smoothed output signal corresponding to the current moment based on the constrained single-step change.

9. The signal smoothing processing circuit according to claim 8, characterized in that, The boundary control parameters also include a convergence determination threshold, and the post-processor includes an adder, a subtractor, a second comparator, and a selector, wherein: The adder is used to add the constrained single-step change amount to the smoothed output signal of the previous time step to obtain the summation result; The subtractor is used to calculate the absolute difference between the input digital signal and the summation result; The second comparator is configured to output a first comparison result when the absolute difference is less than the convergence threshold, wherein the first comparison result indicates that the summation result satisfies the fast convergence condition; and to output a second comparison result when the absolute difference is greater than the convergence threshold, wherein the second comparison result indicates that the summation result does not satisfy the fast convergence condition. The selector is configured to use the input digital signal as the smoothed output signal corresponding to the current time when the summation result satisfies the fast convergence condition; and to use the summation result as the smoothed output signal corresponding to the current time when the summation result does not satisfy the fast convergence condition.

10. A signal smoothing processing chip, comprising the signal smoothing processing circuit as described in claim 8 or 9.

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