Semiconductor device

Abstract

A semiconductor device is disclosed. The semiconductor device includes a plurality of cell units. A cell unit includes a body region having opposite first and second surfaces, the body region having a first doping type; an implanted region extending from the first surface into the body region, the implanted region having a second doping type opposite the first doping type, wherein the implanted region includes a first sub-region; and a second sub-region located circumferentially from the first sub-region, the second sub-region having a higher doping concentration than the first sub-region. Charge compensation is provided by the high concentration of the second sub-region, thereby improving current uniformity.

Description

Technical Field

[0001] This application relates to the field of semiconductor technology, and in particular to a semiconductor device. Background Technology

[0002] In the field of power semiconductors, silicon carbide (SiC) has become an ideal choice for fabricating high-voltage, high-temperature, and high-frequency semiconductor devices due to its wide bandgap, high critical breakdown field strength, and high thermal conductivity. While traditional SiC Schottky barrier diodes (SBDs) exhibit extremely fast reverse recovery characteristics, their reverse leakage current increases sharply with increasing voltage, and their surge current capability is limited. To overcome these shortcomings, the industry has proposed a composite PiN Schottky (MPS) structure. By introducing a P-type doped region near the Schottky interface, surge capability can be enhanced under high forward current, while leakage current is suppressed under reverse bias.

[0003] However, existing SiC MPS diodes typically suffer from uneven current distribution and concentrated electric field. Summary of the Invention

[0004] In view of the above problems, the purpose of this application is to provide a semiconductor device that can achieve uniform current distribution and optimized electric field distribution, thereby improving the breakdown voltage and reliability of the semiconductor device.

[0005] According to one aspect of the present invention, a semiconductor device is provided, comprising a plurality of cell units, each cell unit comprising: a body region having opposing first and second surfaces, the body region having a first doping type; and an implantation region extending from the first surface into the interior of the body region, the implantation region having a second doping type opposite to the first doping type, wherein the implantation region comprises: a first sub-region; and a second sub-region located circumferentially in the first sub-region, the second sub-region having a higher doping concentration than the first sub-region.

[0006] Optionally, the doped ions in the second sub-region diffuse toward the center of the implantation region to form a charge compensation region.

[0007] Optionally, the doping concentration of the first sub-region is 1×10⁻⁶. 17 ~1×10 18 The doping concentration of the second sub-region is greater than 1×10 19 .

[0008] Optionally, the width of the charge compensation region is 20% to 30% of the depth of the second sub-region.

[0009] Optionally, the width of the charge compensation region is 0.2~0.3μm.

[0010] Optionally, the injection area is a ring structure, and the main body area is disposed within the area surrounded by the ring structure.

[0011] Optionally, the main body region includes a substrate having a stepped structure with a central protrusion, and the remainder of the cell unit is disposed on the central protrusion.

[0012] Optionally, the main body region includes a cutoff layer for suppressing electric field diffusion in the thickness direction.

[0013] Optionally, the main body region further includes a substrate and a drift layer, wherein the substrate, the cutoff layer and the drift layer are stacked sequentially, and the doping concentration of the substrate, the cutoff layer and the drift layer decreases sequentially.

[0014] Optionally, the doping concentration of the substrate is greater than 8 × 10⁻⁶. 18 The doping concentration of the stop layer is 1×10⁻⁶. 17 ~1×10 18 The doping concentration of the drift layer is 1×10⁻⁶. 14 ~1×10 16 .

[0015] Optionally, the thickness of the stop layer is 0.5~1µm.

[0016] According to the semiconductor device provided in this application, a charge compensation region extending from the periphery of the implanted region towards its center is formed by setting a second sub-region with a high doping concentration. Charge compensation through this region can improve the uniformity of the current distribution, effectively alleviate electric field concentration, and enhance the breakdown voltage capability of the semiconductor device. Attached Figure Description

[0017] The above and other objects, features and advantages of this application will become clearer from the following description of embodiments with reference to the accompanying drawings, in which:

[0018] Figure 1 Schematic structural diagrams of semiconductor devices in some embodiments of this application are shown;

[0019] Figure 2 Show along Figure 1 A cross-sectional view taken from line A-A' in the middle;

[0020] Figure 3 Show Figure 1 and Figure 2 Enlarged schematic diagram of the injection region;

[0021] Figure 4Schematic structural diagrams of semiconductor devices in some embodiments of this application are shown;

[0022] Figure 5 Show along Figure 4 A cross-sectional view taken from line B-B' in the middle;

[0023] Figure 6 Show Figure 5 Enlarged schematic diagram of the injection region;

[0024] Figure 7 A schematic structural diagram of a semiconductor device is shown in yet another embodiment of this application. Detailed Implementation

[0025] Various embodiments of the present application will now be described in more detail with reference to the accompanying drawings. In the various drawings, the same elements are indicated by the same or similar reference numerals. For clarity, the various parts in the drawings are not drawn to scale.

[0026] Furthermore, certain terms are used in this specification and claims to refer to specific components. Those skilled in the art will understand that manufacturers may use different names to refer to the same component. This specification and claims do not use differences in name to distinguish components.

[0027] It should be understood that in the following description, when a layer, region, or structure is referred to as "connected" to another layer, region, or structure, or as "connected" between two nodes, it can be in direct contact with or connected to the other layer, region, or structure, or there may be an intermediate layer or region. The connection can be physical contact, electrical connection, or a combination thereof. Conversely, when a layer, region, or structure is referred to as "directly connected" to another layer, region, or structure, it means that there is no intermediate layer or region between them.

[0028] Furthermore, it should be noted that in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0029] In the accompanying drawings, the first direction is defined as X, the second direction as Y, and the third direction as Z. An example is given where the first direction X, the second direction Y, and the third direction Z are mutually perpendicular. The third direction Z represents the thickness direction of the semiconductor device. The plane formed by the intersection of the first direction X and the second direction Y is parallel to the first and second surfaces of the semiconductor layer in the semiconductor device.

[0030] In some embodiments, the semiconductor device disclosed in this application has a plurality of cell units 100. Figure 1 and Figure 2 Taking a single cell unit 100 as an example, cross-sectional views of the semiconductor device in the XY and XZ planes are shown. And, by example, Figure 2 It can be Figure 1 This was obtained by cutting cell element 100 from the XZ plane containing line A-A'. Figure 1 It can be Figure 2 The first surface 110a is obtained by cutting cell unit 100 from the XY plane.

[0031] Cell unit 100 has a first shape. The first shape is, for example, a polygon, a circle, or an ellipse. The polygon can be a regular polygon, or an elongated polygon whose dimensions in one or more directions of the XY plane are larger than their dimensions in other directions.

[0032] In some embodiments, the first shape is hexagonal. Hexagonal shapes can improve current accumulation and increase current density. The hexagonal structure also helps reduce the on-resistance and switching losses of semiconductor devices. Figure 1 In the example, the first shape is a regular hexagon.

[0033] In some embodiments, the size of the cell unit 100 is 6~13 μm and can be adjusted according to the rated withstand voltage of the semiconductor device. It should be understood that, when the first shape is polygonal, the size of the cell unit 100 can refer to the width of opposite sides or the width of opposite diagonals of the polygon; when the first shape is circular, the size of the cell unit can refer to the diameter of the circle; and when the first shape is elliptical, the size of the cell unit can refer to the major axis or the minor axis of the ellipse. Figure 1 In the embodiments, for the hexagonal cell unit 100, its size refers to the width W1 of opposite sides of the hexagon.

[0034] Combination Figure 1 and Figure 2 The cell unit 100 includes a semiconductor layer 110 and a metal layer 120.

[0035] The semiconductor layer 110 can be made of semiconductor materials such as silicon, silicon carbide, gallium nitride, potassium oxide, and diamond, or other group IV semiconductor materials, binary, ternary, or quaternary group III-V semiconductor materials. In some embodiments, wide-bandgap silicon carbide, such as 2H-SiC, 4H-SiC, or 6H-SiC, can be selected to improve the high voltage and high temperature resistance of the semiconductor device.

[0036] The semiconductor layer 110 has a host region 111 and an implantation region 112. Figure 1 and Figure 2 In the illustration, a cell unit 100 is used as an example, which includes an injection region 112 and a body region 111 surrounding the injection region 112.

[0037] The semiconductor layer 110 has opposing first surfaces 110a and second surfaces 110b. Figure 2 In the embodiment shown, the first surface 110a is also the upper surface of the main body region 111, and the second surface 110b is also the lower surface of the main body region 111.

[0038] The main body region 111 has a first doping type, which is either N-type doping or P-type doping. In this embodiment, N-type doping is used as an example for explanation.

[0039] In some embodiments, such as Figure 2 As shown, the main body region 111 includes a substrate 1111 and a drift layer 1112 stacked together. Correspondingly, the first surface 110a is also the upper surface of the drift layer 1112, and the second surface 110b is also the lower surface of the substrate 1111. The doping concentration of the substrate 1111 is greater than the doping concentration of the drift layer 1112.

[0040] The injection region 112 extends from the first surface 110a into the main body region 111, in Figure 2 In the illustrated embodiment, the injection region 112 extends from the upper surface of the drift layer 1112 into the drift layer 1112.

[0041] The implantation region 112 has a second doping type, which is either P-type doping or N-type doping, i.e., the first doping type and the second doping type are opposite. In this embodiment, P-type doping is used as an example for explanation.

[0042] Because of the opposite doping types, a PN junction 111a will be formed at the contact surface between the host region 111 and the implantation region 112.

[0043] It should be understood that, in some other embodiments, in Figure 2 The I1 region and I1' region can also have multiple injection regions 112.

[0044] In some embodiments, the injection regions 112 located in the I1 region and the I1' region may be connected, that is, the cell unit 100 may include a plurality of injection regions 112 that surround each other in a stepwise manner.

[0045] In some other embodiments, the injection regions 112 of region I1 and region I1' may be disconnected, that is, there may be breakpoints in each annular injection region 112 in the cell unit 100.

[0046] exist Figure 1 and Figure 2 In the embodiment shown, the injection region 112 is a solid structure located at the center of the cell unit 100, and the injection region 112 has the same first shape as the cell unit 100.

[0047] The injection region 112 includes a first sub-region 112a and a second sub-region 112b. The second sub-region 112b is located circumferentially to the first sub-region 112a.

[0048] In some embodiments, it may be as follows Figure 1 and Figure 2 As shown, the second subregion 112b surrounds the first subregion 112a circumferentially and encloses the first subregion 112a.

[0049] For ease of understanding, Figure 3 An enlarged schematic diagram of the injection region 112 is shown. Figure (a) shows... Figure 1 A magnified view of the injection zone 112, (b) shows... Figure 2 Enlarged view of injection zone 112.

[0050] Combination Figures 1 to 3 In the embodiments of this application, the doping concentration of the second sub-region 112b is higher than that of the first sub-region 112a. Because the second sub-region 112b has a higher doping concentration, charge carriers diffuse from the second sub-region 112b towards the center of the injection region 112, forming a charge compensation region I2 at the circumferential edge of the first sub-region 112a, thereby improving the uniformity of the current distribution in the XY plane. Furthermore, when the semiconductor device is reverse-biased, the increased depletion layer due to the compensated charge can improve the breakdown voltage of the semiconductor device, thereby protecting the semiconductor device.

[0051] In some embodiments, the doping concentration of the first sub-region is 1×10⁻⁶. 17 ~1×10 18 The doping concentration of the second sub-region is 1×10 19At this doping concentration, both the first sub-region 112a and the second sub-region 112b can have a concentration gradient, and the overall concentration of the implanted region 112 can be kept within a good range to balance the breakdown voltage and reverse leakage current of the semiconductor device, thereby improving the reliability of the semiconductor device.

[0052] Depending on the location of the second sub-region 112b, the charge compensation region I2 can be symmetrically distributed along the center of the injection region 112 in the XY plane, which is beneficial for optimizing the uniformity of the transverse electric field and for suppressing leakage current in the high electric field region.

[0053] The width W2 of the charge compensation region I2 can be adjusted by regulating the doping concentration of the second sub-region 112b, thereby adjusting the breakdown voltage characteristics of the semiconductor device.

[0054] In some embodiments, such as Figure 3 As shown, the extension depth of the second sub-region 112b in the third direction Z is H1. Then, the width W2 of the charge compensation region I2 can be 20% to 30% of this extension depth H1. By limiting the above proportional relationship between H1 and W2, the charge distribution of the second sub-region 112b in the longitudinal and lateral directions is optimized in a coordinated manner. This ensures that the depletion layer is sufficiently widened to improve the voltage withstand capability of the semiconductor device, while avoiding local electric field distortion caused by excessive compensation.

[0055] In some embodiments, the width W2 of the charge compensation region I2 can be 0.2~0.3μm. With this width, the depth H1 of the second sub-region 112b can be set to 1µm, which is beneficial to ensure the charge compensation effect while taking into account process feasibility and semiconductor device yield.

[0056] It should be understood that, for the polygonal cell 100, high electric field regions are typically formed at the vertices of the polygon. For example, in Figure 3 In the example, for the regular hexagonal cell 100, high electric field regions are formed at the vertices such as Con1 and Con2. Therefore, in some other embodiments, in order to reduce the manufacturing cost of the semiconductor device, the second sub-region 112b can be formed only at these vertices to save manufacturing costs.

[0057] Furthermore, in some other embodiments, the second sub-region 112b may be located at other positions circumferential to the first sub-region 112a, depending on the overall requirements for manufacturing costs and semiconductor device performance.

[0058] Combination Figure 2As shown, the metal layer 120 includes a first metal layer 121 and a second metal layer 122. The first metal layer 121, the semiconductor layer 110, and the second metal layer 122 are stacked sequentially. The first metal layer 121 and the semiconductor layer 110 are in contact with a first surface 110a, and the second metal layer 122 and the semiconductor layer 110 are in contact with a second surface 110b. The first metal layer 121 typically serves as the anode metal of the semiconductor device. The second metal layer 122 typically serves as the cathode metal of the semiconductor device.

[0059] On the first surface 110a, the first metal layer 121 and the main region 111, i.e. the drift layer 1112, form a Schottky junction 121a, and the first metal layer 121 and the injection region 112 form a first ohmic contact 121b.

[0060] In some embodiments, the first metal layer 121 may be made of a material or composite suitable for forming a Schottky junction and an ohmic contact. Examples of such materials or composites include titanium / aluminum (Ti / Al) or nickel / titanium (Ni / Ti) series metals for forming a Schottky junction, and nickel-silicon alloys for forming an ohmic contact, but this application is not limited thereto.

[0061] On the second surface 110b, the second metal layer 122 and the main region 111, i.e. the substrate 1111, contact to form a second ohmic contact 122a.

[0062] The second metal layer 122 may be made of, for example, titanium, nickel, silver, alloys thereof, etc., but this application is not limited thereto.

[0063] When the semiconductor device is working, the PN junction 111a can be turned on under the action of a surge current, forming a parallel working mode of PN junction 111a and Schottky junction 121a, thereby providing the semiconductor device with a higher surge current resistance capability.

[0064] In some embodiments, a passivation layer 130 may also be stacked on the first metal layer 121. The passivation layer 130 is located on the surface of the first metal layer 121 and exposes a portion of the first metal layer 121 to enable electrode connections via these exposed portions.

[0065] The passivation layer 130 can be made of dielectric materials such as silicon dioxide (SiO2) or silicon nitride (SI2N4) to enhance the insulation performance of the semiconductor device surface and improve the reliability of the semiconductor device.

[0066] Figure 4 and Figure 5 Taking a single cell unit 200 as an example, cross-sectional views of the semiconductor device in the XY and XZ planes are shown in some embodiments of this application. And, by way of example, Figure 5 It can be Figure 4The line B-B' is obtained by cutting off a cell element of 200 in the XZ plane. Figure 4 It can be Figure 5 The first surface 210a is obtained by cutting cell element 200 from the XY plane.

[0067] In this embodiment, the shape and size of the cell unit 200, the metal layer 220, the first metal layer 221, the second metal layer 222, the passivation layer 230 in the cell unit 200, and the formed PN junction 211a, the first ohmic contact 221b, the second ohmic contact 222a, and the Schottky junction 221a can be referred to the above. Figures 1 to 3 Description of the illustrated embodiment.

[0068] The semiconductor layer 210 can be made of semiconductor materials such as silicon, silicon carbide, gallium nitride, potassium oxide, and diamond, or other group IV semiconductor materials, binary, ternary, or quaternary group III-V semiconductor materials. In some embodiments, wide-bandgap silicon carbide, such as 2H-SiC, 4H-SiC, or 6H-SiC, can be selected to improve the high voltage and high temperature resistance of the semiconductor device.

[0069] The semiconductor layer 210 has a host region 211 and an implantation region 212. Figure 4 and Figure 5 In the illustration, a cell unit 200 including an injection region 212 and a body region 211 surrounding the injection region 212 is used as an example.

[0070] The semiconductor layer 210 has opposing first surfaces 210a and second surfaces 210b. Figure 5 In the embodiment shown, the first surface 210a is also the upper surface of the main body region 211, and the second surface 210b is also the lower surface of the main body region 211.

[0071] The main body region 211 has a first doping type, which is either N-type doping or P-type doping. In this embodiment, N-type doping is used as an example for explanation.

[0072] The main body region 211 includes a cutoff layer 2112, which is used to suppress the diffusion of the electric field into the depth of the substrate 2111 in the third direction Z.

[0073] The main body region 211 also includes a substrate 2111 and a drift layer 2113 stacked together. The cutoff layer 2112 may be located between the substrate 2111 and the drift layer 2113, that is, the substrate 2111, the cutoff layer 2112 and the drift layer 2113 are stacked in sequence.

[0074] The doping concentrations of the substrate 2111, the stop layer 2112, and the drift layer 2113 decrease sequentially.

[0075] In some embodiments, the substrate doping concentration is greater than 8 × 10⁻⁶. 18 The doping concentration of the stop layer is 1×10⁻⁶. 17 ~1×10 18 The doping concentration of the drift layer is 1×10 14 ~1×10 16 Such a doping concentration can effectively balance on-resistance and breakdown voltage, taking into account both the switching speed and power handling capability of the device.

[0076] In some embodiments, the thickness of the stop layer 2112 in the third direction Z is, for example, 0.5 to 1 micrometer. This thickness range ensures both the suppression of electric field diffusion and avoids increasing the overall on-resistance due to excessive thickness of the stop layer 2112.

[0077] Based on the suppression effect of the cutoff layer 2112, without allowing the electric field to diffuse into the depth of the substrate 2111, charge compensation can be performed in the third direction Z by adjusting the thickness and doping concentration of the drift layer 2113, thereby making the electric field near the Schottky junction 221a uniformly distributed and suppressing the electric field peak.

[0078] In some embodiments, the breakdown voltage of a semiconductor device can be improved by increasing the thickness of the drift layer 2113 or by reducing the doping concentration of the drift layer 2113.

[0079] In other embodiments, the breakdown voltage of the semiconductor device can be improved by increasing the thickness of the drift layer 2113 while reducing the doping concentration of the drift layer 2113.

[0080] For example, when the thickness of the drift layer 2113 is 5~7 μm and the doping concentration is 6×10⁻⁶, 15 ~1×10 16 cm -3 The rated withstand voltage of semiconductor devices is 600~700V.

[0081] Therefore, when a semiconductor device needs to achieve a target breakdown voltage of 1150~1250V, the thickness of the drift layer 2113 can be adjusted to 8~12μm, and the doping concentration to 8×10⁻⁶. 14 ~1.5×10 15 cm -3 .

[0082] When a semiconductor device needs to achieve a target breakdown voltage of 1650~1750V, the thickness of the drift layer 2113 can be adjusted to 15~20μm, and the doping concentration to 3×10⁻⁶. 14 ~7×10 14 cm -3 .

[0083] When a semiconductor device needs to achieve a target withstand voltage of 3200V~3400V, the thickness of the drift layer 2113 can be adjusted to 28~40μm, and the doping concentration to 1×10⁻⁶. 14 ~3×10 14 cm -3 .

[0084] Furthermore, it should be understood that in some embodiments, the target breakdown voltage within the aforementioned range can be achieved simply by adjusting the doping concentration while maintaining the thickness of the drift layer 2113 at 5~7 μm; in some embodiments, the doping concentration of the drift layer 2113 can be maintained at 6×10⁻⁶. 15 ~1×10 16 cm -3 In such cases, the target withstand pressure within any range can be achieved simply by adjusting the thickness of the drift layer 2113. In actual operating conditions, any of the above adjustment methods can be selected based on process requirements.

[0085] It is easy to understand that after the doping concentration of the drift layer 2113 changes, the doping concentration of the stop layer 2112 also needs to be adjusted accordingly. For example, corresponding to the condition described above where the target breakdown voltage is achieved by simultaneously adjusting the thickness and doping concentration of the drift layer 2113, when the target breakdown voltage range is 600V~3400V as shown in the example above, the doping concentration of the stop layer 2112 can be selected, for example, 1×10⁻⁶. 17 ~5×10 18 cm -3 The range is determined to ensure the suppression effect on electric field diffusion.

[0086] The injection region 212 extends from the first surface 210a into the main body region 211, in Figure 4 This is manifested in the implantation region 212 extending from the upper surface of the drift layer 2113 into the drift layer 2113. The implantation region 212 has a second doping type, which is either P-type doping or N-type doping, that is, the first doping type and the second doping type are different.

[0087] In this embodiment, P-type doping is used as an example for illustration. A PN junction 211a is formed at the contact surface between the host region 211 and the implantation region 212.

[0088] The implantation region 212 includes a first sub-region 212a and a second sub-region 212b. The doping concentration, relative position, and physical properties of the first sub-region 212a and the second sub-region 212b can be found above. Figures 1 to 3 Description of the illustrated embodiment.

[0089] exist Figure 4 and Figure 5In the example, the injection region 212 of the annular structure is used.

[0090] The injection region 212 of the ring structure is located at the center of the cell unit 200.

[0091] exist Figure 4 In the illustrated embodiment, the outer ring shape of the injection region 212 is the same as the shape of the cell unit 200, and the region I3 surrounded by the ring structure has a different shape than the cell unit 200. In some embodiments, the outer ring shape of the injection region 212 may be different from the shape of the cell unit 200, while the region I3 may have the same shape as the cell unit 200. In still other embodiments, both the outer ring shape of the injection region 212 and the shape of the region I3 may be different from the shape of the cell unit 200, or both may be the outer ring shape of the injection region 212 and the shape of the region I3 may be the same as the shape of the cell unit 200.

[0092] The main area 211 is located within region I3, which is surrounded by the ring structure.

[0093] exist Figure 4 In the illustrated embodiment, the entire region I3 surrounded by the annular structure is the main body region 211. In some embodiments, region I3 may also contain multiple main body regions 211 and injection regions 212 that alternately surround each other in a progressively larger manner.

[0094] Figure 6 An enlarged schematic diagram of the injection region 212 is shown. Specifically, it is an enlarged cross-section of the injection region 212 in the corresponding XZ plane.

[0095] Combination Figures 4 to 6 In this embodiment, the doping concentration of the second sub-region 212b is higher than that of the first sub-region 212a. Due to the higher doping concentration in the second sub-region 212b, charge carriers diffuse from the second sub-region 212b towards the center of the injection region 212, forming a charge compensation region I5 at the circumferential edge of the first sub-region 212a, thereby improving the uniformity of the current distribution in the XY plane. Furthermore, when the semiconductor device is reverse-biased, the increased depletion layer due to the compensated charge can improve the breakdown voltage of the semiconductor device, thus protecting it.

[0096] In some embodiments, such as Figure 6 As shown, the second sub-region 212b extends to a depth of H2 in the third direction Z. Therefore, the width W3 of the charge compensation region I5 can be 20% to 30% of this extension depth H2. By limiting the ratio of H2 and W3, the charge distribution in the second sub-region 212b in the longitudinal and lateral directions is optimized in a coordinated manner. This ensures that the depletion layer is sufficiently widened to improve the breakdown voltage of the semiconductor device, while avoiding local electric field distortion due to over-compensation.

[0097] In some embodiments, the width W3 of the charge compensation region I5 can be 0.2~0.3 μm. With this width, the depth H2 of the second sub-region 212b can be set to 1 μm. This ensures effective charge compensation while also considering process feasibility and semiconductor device yield.

[0098] exist Figures 4 to 6 In this embodiment, charge compensation can be achieved in the XY plane through the charge compensation region I5, which helps to improve the uniformity of the current. When the semiconductor device is reverse biased, the increased depletion layer by the compensated charge can improve the breakdown voltage of the semiconductor device, thereby protecting the semiconductor device. At the same time, by providing the cutoff layer 2112, charge compensation in the XZ plane can be achieved without allowing the electric field to diffuse into the substrate 2111, by adjusting at least one of the thickness and doping concentration of the drift layer 2113 in the third direction Z.

[0099] It should be noted that, in Figure 4 and Figure 5 In the illustrated embodiment, each cell 200 includes an injection region 212 and a body region 211 surrounding the injection region 212. However, it should be understood that this application is not limited thereto.

[0100] For example, in some other embodiments, Figure 4 The I4 region and I4' region can also have multiple injection regions 212, that is, the cell unit 200 can include multiple injection regions 212 that surround each other in a step-by-step manner.

[0101] In some embodiments, the injection regions 212 located in the I4 region and the I4' region may be connected, that is, the cell unit 200 may also include a plurality of injection regions 212 that surround each other in a stepwise manner.

[0102] In some other embodiments, the injection regions 212 of region I4 and region I4' may be disconnected, that is, there may be breakpoints in each annular injection region 212 in the cell unit 200.

[0103] Figure 7 A schematic structural diagram of a semiconductor device according to another embodiment of this application is shown. Specifically, a semiconductor layer 310 in a cell 300 is illustrated.

[0104] The semiconductor layer 310 has a host region 311 and an implantation region 312.

[0105] The main body region 311 includes a substrate 3111, a cutoff layer 3112, and a drift layer 3113.

[0106] exist Figure 7In one embodiment, the substrate 3111 in the cell unit 300 has a stepped structure with a central protrusion. That is, the substrate 3111 includes a lower stepped layer 3111a and an upper stepped layer 3111b, the upper stepped layer 3111b being located above the lower stepped layer 3111a, the lower stepped layer 3111a forming a support portion of the substrate 3111, and the upper stepped layer 3111b forming a central protrusion of the stepped structure.

[0107] The stepped structure can be located at the center of the substrate 3111, that is, the upper stepped layer 3111b is located at the center of the lower stepped layer 3111a, and the upper stepped layer 3111b and the lower stepped layer 3111a overlap at the central axis of the third direction Z.

[0108] like Figure 7 In the illustrated embodiment, W4 is defined as the width of the lower step layer 3111b in the first direction X, and W5 is the width of the upper step layer 3111b in the first direction X. In any direction of the XY plane, the width W4 of the lower step layer 3111a is greater than the width W5 of the upper step layer 3111b.

[0109] In some other embodiments, the central protrusion may also be a stepped structure that is not located at the center of the substrate 3111, but has a certain offset. That is, the upper step layer 3111b is not located at the center of the lower step layer 3111a, and the upper step layer 3111b and the lower step layer 3111a do not overlap on the central axis of the third direction Z, but have a certain offset stepped structure.

[0110] The remainder of the cell unit 300 is disposed on the central protrusion of the substrate 3111. For example... Figure 7 As shown, the cutoff layer 3112, drift layer 3113, injection region 312, and the formed Schottky junction 312 are all disposed on the upper step layer 3111b. Accordingly, in any direction of the XY plane, the width W5 of the upper step layer 3111b is also the width of the step layer cutoff layer 3112 and drift layer 3113 in that direction.

[0111] For the substrate 3111, there is a central protrusion of a cell unit 300, which is connected to the other adjacent cell units through a lower step layer 3111a of the substrate 3111. The upper step layer 3111b of the substrate 3111, and the remaining portion of the cell unit 300 disposed on the upper step layer 3111b, are spaced apart from the adjacent cell units, and are separated from each other by step layers.

[0112] The implantation region 312 includes a first sub-region 312a and a second sub-region 312b surrounding the first sub-region 312a. The doping concentration of the second sub-region 312b is higher than that of the first sub-region 312a, thereby forming a charge compensation region.

[0113] The injection region 312 may have a ring structure, and the main body region 311 is arranged in the region surrounded by the ring structure.

[0114] In this case, the outer ring width of the annular structure is less than or equal to W5 as described above. Figure 7 In the embodiment shown, the outer ring width of the annular structure is equal to W5, that is, the outer edge of the injection region 312 is the outer edge of the drift layer 3113.

[0115] The region enclosed by the annular structure is typically located at the center of the injection region 312, meaning the annular structure and the injection region 312 overlap on the central axis in the third direction Z. A Schottky junction 321 is formed on the surface of the main region 311 of the region enclosed by the annular structure.

[0116] In some embodiments, the injection region 312 is not surrounded by an annular structure, and the body region 311 is not disposed at its center, but it is still configured as the injection region 312. In at least some directions in the XY plane, the width of the injection region 312 should be smaller than the width of the drift layer 3113, so that the body region 311 is disposed around the injection region 312 and a Schottky junction is formed on the surface of the body region 311.

[0117] In addition, in some embodiments, the cell unit 300 also has the structure of the first metal layer, the second metal layer, the passivation layer, etc., as described in any of the above embodiments.

[0118] According to the semiconductor device provided in this application, a charge compensation region extending from the periphery of the implanted region towards its center is formed by setting a second sub-region with a high doping concentration. Charge compensation through this region can improve the uniformity of the current distribution, effectively alleviate electric field concentration, and enhance the breakdown voltage capability of the semiconductor device.

[0119] The embodiments described above, as per the examples of this application, do not exhaustively describe all details, nor do they limit this application to the specific embodiments described above. Clearly, many modifications and variations can be made based on the above description. This specification selects and specifically describes these embodiments to better explain the principles and practical applications of this application, thereby enabling those skilled in the art to effectively utilize this application and its modifications. The scope of protection of this application should be determined by the scope defined in the claims of this application.

Claims

1. A semiconductor device, wherein, Includes multiple cellular units, The cellular unit includes: A main region having opposing first and second surfaces, the main region having a first doping type; An implantation region extends from the first surface into the interior of the main region, the implantation region having a second doping type opposite to the first doping type. The injection region includes: The first subregion; and The second sub-region is located circumferentially to the first sub-region, and the doping concentration of the second sub-region is higher than that of the first sub-region.

2. The semiconductor device according to claim 1, wherein, The doped ions in the second sub-region diffuse toward the center of the implantation region to form a charge compensation region.

3. The semiconductor device according to claim 2, wherein, The doping concentration of the first sub-region is 1×10 17 ~1×10 18 The doping concentration of the second sub-region is greater than 1×10 19 .

4. The semiconductor device according to claim 2, wherein, The width of the charge compensation region is 20% to 30% of the depth of the second sub-region.

5. The semiconductor device according to claim 2, wherein, The width of the charge compensation region is 0.2~0.3μm.

6. The semiconductor device according to any one of claims 1-5, wherein, The injection area has a ring structure, and the main body area is arranged within the area enclosed by the ring structure.

7. The semiconductor device according to claim 6, wherein, The main region includes a substrate. The substrate has a stepped structure with a central protrusion. The remaining portion of the cell unit is disposed on the central protrusion.

8. The semiconductor device according to any one of claims 1 to 5, wherein, The main body region includes a cutoff layer for suppressing electric field diffusion in the thickness direction.

9. The semiconductor device according to claim 8, wherein, The main area also includes: A substrate and a drift layer, wherein the substrate, the cutoff layer, and the drift layer are stacked sequentially. The doping concentrations of the substrate, the cutoff layer, and the drift layer decrease sequentially.

10. The semiconductor device according to claim 9, wherein, The substrate has a doping concentration greater than 8 × 10⁻⁶. 18 The doping concentration of the stop layer is 1×10⁻⁶. 17 ~1×10 18 The doping concentration of the drift layer is 1×10⁻⁶. 14 ~1×10 16 .

11. The semiconductor device according to claim 8, wherein, The thickness of the stop layer is 0.5~1um.

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