A gallium oxide surface passivation method based on PEALD-grown ultrathin SiO2 passivation layer and a gallium oxide Schottky diode based thereon.

Abstract

This invention discloses a gallium oxide surface passivation method based on PEALD-grown ultrathin SiO2 passivation layer and a gallium oxide Schottky diode based thereon, belonging to the field of semiconductor power device manufacturing technology. The passivation method of this invention includes the following steps: S1: in-situ ozone plasma pretreatment of the gallium oxide substrate; S2: growing an ultrathin SiO2 passivation layer on the gallium oxide surface after in-situ ozone plasma pretreatment using plasma-enhanced atomic layer deposition (PEALD); S3: depositing Schottky anode metal on the surface with the grown ultrathin SiO2 passivation layer, depositing ohmic contact cathode metal on the back side of the gallium oxide substrate, and then performing post-annealing. This invention utilizes the synergistic mechanism of in-situ defect repair and quantum tunneling effect to achieve surface depinning without increasing the device's series resistance.

Description

Technical Field

[0001] This invention belongs to the field of semiconductor power device manufacturing technology, specifically relating to a gallium oxide surface passivation method based on PEALD-grown ultrathin SiO2 passivation layer and a gallium oxide Schottky diode based thereon. Background Technology

[0002] β-Ga₂O₃, as a fourth-generation ultrawide bandgap semiconductor material, possesses an ultrawide bandgap of 4.8 eV and a theoretical breakdown field strength as high as 8 MV / cm, demonstrating enormous application potential in the field of power electronics. Compared to SiC and GaN, Ga₂O₃ exhibits a higher Baliga figure of merit and can be grown into large-size single-crystal substrates at low cost using the melt method.

[0003] However, gallium oxide faces serious interface problems when used in the actual fabrication of Schottky diodes (SBDs). Due to the high density of interface states and oxygen vacancy defects on the surface of gallium oxide, the metal / semiconductor interface often exhibits Fermi level pinning, making it difficult to effectively control the Schottky barrier height through the metal work function, and it is usually low, resulting in large reverse leakage current and low breakdown voltage of the device.

[0004] Chinese patent CN110660643A discloses an optimized passivation method for gallium nitride (GaN) high electron mobility transistors (HEMTs). The method employs MOCVD to grow a GaN / AlGaN / GaN structure, forms active region mesas through photolithography and ICP etching, fabricates alloy electrodes using electron beam evaporation, and performs rapid thermal annealing in a nitrogen atmosphere to remove the natural oxide layer. Afterward, gallium oxide is deposited as an intermediate layer in an ALD or PEALD device. Subsequently, a passivation layer is grown using PECVD or ICPCVD, utilizing the gallium oxide intermediate layer as both a protective and passivation layer to reduce plasma damage to the surface. The passivation layer in the gate electrode region is then etched using photolithography, retaining the gallium oxide intermediate layer as the gate dielectric. This method effectively reduces the current collapse rate of GaN HEMT devices, improves device reliability and breakdown voltage, and enhances interface quality and performance stability. However, this passivation method only reduces interface defects through acid cleaning and the intermediate layer, without actively repairing the surface or utilizing quantum effects.

[0005] Traditional SiO2 passivation layers are typically thick (>2nm), which, while reducing leakage current, introduces significant series resistance, severely degrading the device's forward conduction capability. Furthermore, conventional plasma-enhanced chemical vapor deposition (PECVD) or high-power PEALD processes easily cause plasma bombardment damage to the fragile gallium oxide surface, introducing new defects. Therefore, developing a low-damage, ultrathin dielectric layer growth method that can effectively passivate surface defects, relieve Fermi pinning, and maintain the device's forward conduction characteristics is a current challenge in gallium oxide device research. Summary of the Invention

[0006] In order to overcome the shortcomings of the prior art, the present invention aims to provide a gallium oxide surface passivation method based on PEALD-grown ultrathin SiO2 passivation layer and a gallium oxide Schottky diode based thereon, so as to solve the technical problem of how to effectively repair gallium oxide surface defects, achieve high-quality passivation, and at the same time, relieve Fermi pinning and maintain low on-resistance through ultrathin layer design.

[0007] To achieve the above objectives, the present invention employs the following technical solution: This invention provides a method for gallium oxide surface passivation based on PEALD-grown ultrathin SiO2 passivation layers, comprising the following steps: S1: In-situ ozone plasma pretreatment of gallium oxide substrate; S2: An ultrathin SiO2 passivation layer is grown on the gallium oxide surface after in-situ ozone plasma pretreatment using plasma-enhanced atomic layer deposition (PEALD). S3: Deposit Schottky anode metal on the surface with an ultrathin SiO2 passivation layer, deposit ohmic contact cathode metal on the back side of the gallium oxide substrate, and then perform post-annealing.

[0008] Preferably, in step S1, the conditions for the in-situ ozone plasma pretreatment include: the in-situ ozone plasma pretreatment adopts a remote plasma mode, the power is 50W-200W, and the pretreatment time is 30 s-120 s.

[0009] Further preferred, the power is 150W and the pretreatment time is 60 s.

[0010] Preferably, in step S2, the process conditions of the plasma-enhanced atomic layer deposition process include: 2-12 cycles of the plasma-enhanced atomic layer deposition process, a single cycle growth rate of 0.8-1.2 Å / cycle, a temperature of 200℃-250℃, a thickness of 0.2nm-1.2nm for the ultrathin SiO2 passivation layer, a pressure of 100Pa-500Pa, and the silicon source precursor used is an aminosilane compound, and the oxygen source is oxygen plasma.

[0011] More preferably, the growth temperature is controlled at 225°C, and the aminosilane compound is bis(diethylamino)silane (BDEAS). BDEAS has excellent thermal stability and reactivity within a temperature window of 200°C-250°C, and when combined with oxygen plasma, a dense and carbon-free ultrathin SiO2 passivation layer can be obtained.

[0012] Preferably, a single cycle of the plasma-enhanced atomic layer deposition process includes: (a) Introduce a silicon source precursor, with a pulse duration of 0.1s-2.0s; (b) Purge with inert gas for 3-10 seconds; (c) Introduce an oxygen source and excite the plasma. The plasma power is 100W-400W and the pulse time is 2s-10s. (d) Purge with inert gas for 3-10 seconds.

[0013] Preferably, the post-annealing conditions include: a temperature of 300-400℃, an inert gas atmosphere, and a time of 30-120 s.

[0014] More preferably, the temperature is 350°C, the atmosphere is nitrogen, and the time is 1 min. This step is used to eliminate the fixed charge during the PEALD process and densify the ultrathin SiO2 passivation layer.

[0015] Preferably, the gallium oxide substrate is cleaned before the in-situ ozone plasma pretreatment.

[0016] Preferably, the cleaning process includes cleaning with a piranha solution at 80°C for 10-15 minutes and soaking in dilute hydrofluoric acid for 30-60 seconds.

[0017] More preferably, the piranha solution is prepared by mixing H2SO4 and H2O2 in a volume ratio of 3:1.

[0018] Preferably, the Schottky anode metal is a Ni / Au or Pt / Au stacked structure, and the ohmic contact cathode metal is a Ti / Au or Ti / Al / Ni / Au stacked structure.

[0019] Preferably, the gallium oxide substrate is a single crystal substrate or epitaxial wafer of β-phase gallium oxide (β-Ga2O3) with a crystal plane orientation of (001) or (-201).

[0020] The present invention also provides a gallium oxide Schottky diode manufactured using the above passivation method, comprising a gallium oxide substrate, an ultrathin SiO2 passivation layer grown on the surface of the gallium oxide substrate, a Schottky anode metal deposited on the surface of the ultrathin SiO2 passivation layer, an ohmic contact cathode metal deposited on the back side of the gallium oxide substrate, and the thickness of the ultrathin SiO2 passivation layer being 0.2 nm-1.2 nm.

[0021] More preferably, the thickness of the ultrathin SiO2 passivation layer is 1 nm.

[0022] Compared with the prior art, the present invention has the following beneficial effects: This invention provides a gallium oxide surface passivation method based on PEALD-grown ultrathin SiO2 passivation layer. By combining in-situ ozone plasma pretreatment with PEALD ultrathin SiO2 growth, high-quality passivation of gallium oxide surface is achieved. Specifically, this involves cleaning and activating the gallium oxide (GaO) surface through in-situ ozone plasma pretreatment. This not only allows the active oxygen atoms generated by the ozone plasma to effectively fill oxygen vacancies on the GaO surface and convert CH bonds on the GaO surface into -OH bonds, promoting uniform nucleation of subsequent ALD precursors, but also reduces the surface state density, repairs GaO surface defects, and creates a dense SiO2 layer that blocks leakage channels, reducing leakage current by 1-2 orders of magnitude and significantly reducing reverse leakage. Using plasma-enhanced atomic layer deposition (PEALD) to grow a SiO2 passivation layer on the GaO surface allows for precise control of its thickness, providing a dense dielectric layer to passivate defect states on the GaO surface and increasing the Schottky barrier height (by approximately 0.2 eV). Post-annealing after depositing the Schottky anode metal and ohmic contact cathode metal optimizes the metal-semiconductor interface, reduces interface states, and eliminates the Fermi pinning effect. The SiO2 passivation layer allows carrier tunneling, thus maintaining low on-resistance while achieving surface passivation.

[0023] Furthermore, the pretreatment was limited to a remote plasma mode, which avoided direct bombardment of the gallium oxide substrate by high-energy particles and reduced lattice damage. The optimized power range of 50W-200W and time range of 30s-120s ensured that ozone was effectively decomposed into active oxygen species, gently removing contaminants from the gallium oxide surface and forming an oxygen-loving surface. This provided uniform nucleation sites for the subsequent growth of the SiO2 passivation layer and improved the adhesion of the SiO2 passivation layer.

[0024] Furthermore, the Plasma Enhanced Atomic Layer Deposition (PEALD) process achieves atomic-level precision growth through a self-limiting reaction. With 2-12 cycles and a growth rate of 0.8-1.2 Å / cycle, the thickness of the SiO2 passivation layer is controlled within 0.2 nm-1.2 nm. This thickness range is sufficient to block metal wavefunction penetration (MIGS suppression), relieve Fermi pinning, and allow majority carriers to transport through quantum tunneling, ensuring that the Schottky diode device maintains low on-resistance. The temperature range of 200℃-250℃ avoids thermal damage and impurity diffusion to the gallium oxide substrate at high temperatures. Using an aminosilane precursor as the silicon source precursor, due to its high reactivity, it forms a high-density SiO2 passivation layer with the plasma-excited oxygen source at low temperatures, reducing the surface state density.

[0025] Furthermore, in a single cycle of the plasma-enhanced atomic layer deposition process, silicon source precursor pulses and oxygen source plasma pulses are alternated, supplemented by a purging step, to ensure that the silicon source precursor is fully adsorbed and byproducts are removed, thus achieving an ultrathin SiO2 passivation layer without pinholes. Plasma enhancement increases the concentration of oxygen free radicals, promotes low-temperature oxidation of the silicon source, forms a SiO2 passivation layer with superior stoichiometry, and reduces the contribution of defects such as oxygen vacancies to Fermi pinning.

[0026] Furthermore, the post-annealing treatment at a temperature of 300-400℃, in an inert gas atmosphere, and for 30-120 s is carried out in an inert atmosphere, which promotes atomic interdiffusion at the metal-SiO2 / gallium oxide interface, eliminates interface defect states, and stabilizes the Schottky barrier height. At the same time, moderate annealing can repair micro-damage in PEALD growth without causing excessive crystallization or thickening of the ultrathin SiO2 passivation layer, thus balancing interface optimization and tunneling conductivity.

[0027] Furthermore, the gallium oxide substrate is cleaned before in-situ ozone plasma pretreatment to remove organic contaminants and the natural oxide layer on the gallium oxide surface, which fundamentally reduces the initial surface states and prevents contaminants from interfering with the ozone pretreatment effect. The clean surface improves the uniformity of subsequent SiO2 growth, reduces the density of interface traps, and enhances passivation reliability.

[0028] Furthermore, the piranha solution is beneficial for removing organic pollutants, while dilute hydrofluoric acid is beneficial for etching the natural oxide layer.

[0029] Furthermore, the Schottky anode metal (Ni / Au or Pt / Au) has a high work function, which helps to form a high hole barrier and suppress reverse leakage current; in the ohmic contact cathode metal (Ti / Au or Ti / Al / Ni / Au), Ti / Al reacts with gallium oxide to form a low-resistance alloy layer, reducing contact resistance. The stacked structure provides thermal stability and low series resistance, which, together with the ultrathin SiO2 passivation layer, maintains the overall low conduction characteristics of the Schottky diode device.

[0030] Furthermore, β-phase gallium oxide, as a wide bandgap semiconductor, has a high breakdown field strength; the (001) and (-201) crystal planes have regular surface atomic arrangement and relatively low surface state density, which is conducive to the growth of an ultra-thin SiO2 passivation layer with consistent orientation in PEALD, further improving the passivation effect and interface electrical stability.

[0031] The present invention also provides a gallium oxide Schottky diode device fabricated using the above passivation method, which significantly reduces the interface state density, optimizes the ideal factor n to 1.00-1.10, reduces the leakage current, maintains a low level of leakage current in the reverse voltage range of less than 1.3kV, and increases the Schottky barrier height by more than 0.2eV, significantly improving the switching characteristics and breakdown voltage of the gallium oxide Schottky diode device. Attached Figure Description

[0032] Figure 1 This is a flowchart illustrating the implementation of the present invention; Figure 2 This is a structural diagram of the present invention; Figure 3 The JV characteristics of the Pt / 1 nm SiO2 / Ga2O3 device prepared by the passivation method of the present invention are compared with those of the device without ozone plasma treatment and the conventional control SBD. Figure 4 A comparison diagram of the interface state density extraction with and without ozone plasma treatment; Figure 5 Extraction plots for ideal factor n and subthreshold swing SS. Detailed Implementation

[0033] To enable those skilled in the art to understand the features and effects of the present invention, the following descriptions and definitions are only general descriptions of the terms and expressions mentioned in the specification and claims. Unless otherwise specified, all technical and scientific terms used herein have the ordinary meaning understood by those skilled in the art regarding the present invention, and in the event of any conflict, the definitions in this specification shall prevail.

[0034] The theories or mechanisms described and disclosed herein, whether right or wrong, should not in any way limit the scope of the invention, that is, the contents of the invention can be implemented without being limited by any particular theory or mechanism.

[0035] In this document, all features defined by numerical ranges or percentage ranges, such as numerical values, quantities, contents, and concentrations, are for the sake of brevity and convenience only. Accordingly, descriptions of numerical ranges or percentage ranges should be considered as covering and specifically disclosing all possible sub-ranges and individual numerical values ​​(including integers and fractions) within those ranges.

[0036] In this article, unless otherwise specified, “contains,” “includes,” “containing,” “has,” or similar terms cover the meanings of “composed of” and “mainly composed of,” for example, “A contains a” covers the meanings of “A contains a and others” and “A contains only a.”

[0037] For the sake of brevity, not all possible combinations of the technical features in each implementation scheme or embodiment are described herein. Therefore, as long as there is no contradiction in the combination of these technical features, the technical features in each implementation scheme or embodiment can be combined arbitrarily, and all possible combinations should be considered within the scope of this specification.

[0038] The present invention will be further illustrated below with reference to specific embodiments. It should be understood that these embodiments are for illustrative purposes only and are not intended to limit the scope of the invention. Furthermore, it should be understood that after reading the teachings of this invention, those skilled in the art can make various alterations or modifications to the invention, and these equivalent forms also fall within the scope defined by the appended claims.

[0039] The following examples use instruments and equipment conventional in the art. Experimental methods in the following examples, unless otherwise specified, are generally performed under conventional conditions or as recommended by the manufacturer. All raw materials used in the following examples are conventional commercially available products with specifications conventional in the art. In this specification and the following examples, unless otherwise specified, "%" represents weight percentage, "parts" represents parts by weight, and "ratio" represents weight proportion.

[0040] Example 1 like Figure 1 As shown, this embodiment provides a method for passivating gallium oxide surfaces based on PEALD-grown SiO2, and the specific steps are as follows: S1: Substrate preparation: Sn-doped (001) oriented β-Ga2O3 substrate was selected, and the carrier concentration of the epitaxial layer was 2×10⁻⁶. 16 cm -3 The surface was ultrasonically cleaned with acetone and isopropanol for 5 minutes in sequence, and then rinsed with deionized water. It was then soaked in a piranha solution at 80°C for 15 minutes to remove organic matter, and finally soaked in a dilute HF solution for 1 minute to remove the natural oxide layer. It was then dried with nitrogen. The piranha solution was prepared by mixing H2SO4 and H2O2 solutions in a 3:1 volume ratio, and the dilute HF solution was prepared by mixing HF and H2O in a 1:50 volume ratio. S2: In-situ ozone plasma pretreatment: The sample is immediately loaded into the PEALD reaction chamber (e.g., Picosun R-200). Before deposition, high-purity O2 (200 sccm) is introduced, and the ozone generator and remote plasma source are turned on. Processing power: 100W (low power to avoid bombardment damage); processing time: 60 seconds; temperature: 250℃. This step fully hydroxylates the surface (Ga-OH) and repairs surface oxygen vacancies. S3: PEALD growth of ultrathin SiO2: PEALD growth was performed while maintaining a constant chamber temperature of 250℃. Precursor: BDEAS (source bottle temperature 45℃); Oxygen source: O2 plasma (power 300W); Single cycle parameters: BDEAS pulse 1.6s → N2 purge 6s → O2 plasma pulse 6s → N2 purge 6s. Number of cycles: 6. Based on a growth rate of 0.85 Å / cycle, the total thickness was 0.5 nm. S4: Electrode fabrication: Using photolithography and electron beam evaporation processes, Ni / Au (20nm / 150nm) was deposited on the surface with a SiO2 passivation layer as a Schottky anode; Ti / Au (20nm / 150nm) was deposited on the back side of a gallium oxide substrate as an ohmic cathode to obtain the fabricated device; S5: Post-annealing treatment: Place the device in a rapid annealing furnace and anneal at 350°C for 1 minute under a N2 atmosphere.

[0041] like Figure 2 As shown in the figure, the complete vertical stacked structure of the gallium oxide Schottky diode prepared using the passivation method described in this invention is clearly illustrated. A brief analysis follows: Structural layering and correspondences: The structure from top to bottom consists of: Pt / Au layer: This is the Schottky anode metal, corresponding to the Ni / Au or Pt / Au stacked structure, and is directly deposited on the SiO2 passivation layer to form a Schottky contact.

[0042] The SiO2 passivation layer (highlighted in red in the figure) is an ultrathin passivation layer grown using plasma-enhanced atomic layer deposition (PEALD) and is the core of the method of this invention. Approximately 0.5 nm was grown in Example 1.

[0043] HVPE n - -Ga2O3 epitaxial layer: This is the functional semiconductor layer of the device, with a low carrier concentration (e.g., 2×10⁻⁶ in Example 1). 16 cm -3 ), which is where the Schottky junction and conductive channel are located.

[0044] N + - Ga2O3 substrate: This is a highly doped gallium oxide substrate used to support the epitaxial layer and achieve good backside ohmic contact.

[0045] Ti / Au layer: This is the ohmic contact cathode metal, corresponding to the Ti / Au or Ti / Al / Ni / Au stacked structure, and is deposited on the back side of the substrate.

[0046] The structural diagram visually illustrates a key feature of the present invention: an extremely thin and high-quality SiO2 interface passivation layer is inserted between the Schottky metal (Pt / Au) and the gallium oxide epitaxial layer.

[0047] Method Corresponding: The SiO2 layer is grown on the gallium oxide surface after in-situ ozone plasma pretreatment (step S1) using the PEALD process (step S2).

[0048] As per the instruction manual, examples and Figure 3 , Figure 4The test results show that this ultrathin SiO2 layer can effectively suppress Fermi level pinning, significantly reduce the interface state density, thereby significantly reducing reverse leakage current, optimizing the ideal factor, and ultimately improving device performance.

[0049] Conclusion: This structural diagram confirms that the passivation method can successfully fabricate Schottky diodes with an improved "metal-ultrathin dielectric-semiconductor" structure.

[0050] Test Result Analysis: like Figure 3 As shown, the JV characteristics of three different devices are compared: The Schottky diode prepared only by SiO2 passivation (purple line): Due to severe Fermi level pinning on the surface, the reverse leakage current is extremely high, and the turn-on voltage is low. The SiO2 passivated Schottky diode without in-situ ozone plasma pretreatment (blue line): Although an ultrathin SiO2 layer is deposited, due to the lack of in-situ defect repair, a high density of oxygen vacancies still exists at the interface, resulting in a larger ideality factor n (significantly greater than 1.1), and the reverse leakage current is about 1 to 2 orders of magnitude higher than that of the device of this invention, indicating that simple deposition cannot completely eliminate the interface leakage path. The Schottky diode prepared using the in-situ ozone plasma pretreatment and SiO2 passivation method of this invention (red line): After the in-situ ozone pretreatment in step S2, the performance of the Schottky diode achieves a qualitative leap. The forward turn-on voltage is consistent with that of an ideal Schottky diode (SBD), the on / off ratio is as high as 10 to the power of 12, and the ideality factor n is optimized to 1.00 (the theoretical limit). This indicates that electrons are effectively transported through the tunneling effect and interface defects are greatly suppressed.

[0051] Figure 4 Further, the microscopic mechanism of this performance improvement was revealed: the interface state density (D) without in-situ ozone plasma pretreatment it ) distributed in 4×10 12 eV -1 cm -2 The interface state density was approximately 2 × 10⁻⁶ after in-situ ozone plasma pretreatment according to this invention. 12 eV -1 cm -2 This strongly demonstrates that the in-situ ozone plasma pretreatment in step S2 effectively fills surface oxygen vacancies and significantly improves interface quality, which is key to achieving high-performance surface passivation.

[0052] like Figure 5The figure shows the subthreshold swing SS and the ideality factor n as a function of bias voltage for the Schottky diode fabricated in this embodiment. The results show that the minimum ideality factor is 1.00, and the value of n remains below 1.10 throughout the anode voltage range of 0.42 V to 0.96 V. Simultaneously, the minimum value of SS is 60 mV / dec, and SS remains below 63 mV / dec across a forward current density range of nine orders of magnitude. This confirms that over a large bias voltage range, the carrier transport mechanism is unaffected by the non-ideal effects caused by interface defects and the passivation layer, and the Schottky diode device exhibits excellent switching response speed and subthreshold characteristics.

[0053] Example 2 The difference from Example 1 is that the growth temperature in step S3 is set to 200°C. At this temperature, the reactivity of BDEAS is slightly lower, requiring the BDEAS pulse time to be extended to 2.0 s and the number of cycles to be increased to 8 to achieve similar density and thickness.

[0054] Test results show that films grown at 200℃ also have good passivation effects, making them suitable for heterogeneous integration processes that are more sensitive to temperature.

[0055] Example 3 The difference from Example 1 is that in step S2, the power of the in-situ ozone plasma pretreatment is set to 50W, and the treatment time remains 60 seconds. Test results show that the device ideality factor n is 1.05, and the interface state density is significantly reduced, proving that the low-power pretreatment is effective.

[0056] Example 4 The difference from Example 1 is that in step S2, the power of the in-situ ozone plasma pretreatment is set to 200W, and the treatment time remains 60 seconds. Test results show that the device performance is comparable to that of Example 1, with an ideality factor n of 1.02, proving that high power did not cause damage.

[0057] Example 5 The difference from Example 1 is that in step S2, the in-situ ozone plasma pretreatment time is set to 30 seconds, while the power remains at 100W. Test results show that the short-time treatment can effectively repair the surface, and the device ideality factor n is 1.08.

[0058] Example 6 The difference from Example 1 is that in step S2, the in-situ ozone plasma pretreatment time is set to 120 seconds, while the power remains at 100W. Test results show that the performance is comparable to Example 1, indicating that the treatment effect has reached saturation.

[0059] Example 7 The difference from Example 1 is that in step S3, the number of PEALD cycles is controlled to be 2. The resulting SiO2 thickness is approximately 0.17 nm. Test results show that the device ideality factor n is optimized to 1.10, proving that the ultrathin layer passivation is effective.

[0060] Example 8 The difference from Example 1 is that in step S3, the number of PEALD cycles is controlled to be 12. The resulting SiO2 thickness is approximately 1.02 nm. Test results show that the device ideality factor n is 1.03, and the relatively thick passivation layer still performs excellently.

[0061] Example 9 The difference from Example 1 is that, through process optimization, the single-cycle growth rate in step S3 reached 1.2 Å / cycle. To obtain a thickness of ~0.6 nm, the number of cycles was set to 5. Test results show that the device ideality factor n is 1.06, proving that a high growth rate is feasible.

[0062] Example 10 The difference from Example 1 is that in step S3, the PEALD process pressure is controlled at 100 Pa. Test results show that the film is uniform and the device ideality factor n is 1.04.

[0063] Example 11 The difference from Example 1 is that in step S3, the PEALD process pressure is controlled at 500 Pa. Test results show that the film is dense and the device performance is comparable to that of Example 1.

[0064] Example 12 The difference from Example 1 is that in step S3, the PEALD process pressure is controlled at 300 Pa. Test results show that the process window is wide, the device ideality factor n is 1.03, and the performance is stable.

[0065] Example 13 The difference from Example 1 is that the single-cycle parameters in step S3 are adjusted as follows: BDEAS pulse 0.1s, purge 3s, O2 plasma power 100W, pulse 2s. Test results show that the process is controllable, the device ideality factor n is 1.12, confirming that the lower limit of the parameters is feasible.

[0066] Example 14 The difference from Example 1 is that the single-cycle parameters in step S3 were adjusted as follows: BDEAS pulse 2.0s, purge 10s, O2 plasma power 400W, pulse 10s. Test results showed that the thin film quality was good, and the device ideality factor n was 1.02, confirming the effectiveness of the upper limit of parameters.

[0067] Example 15 The difference from Example 1 is that in step S5, the post-annealing temperature is set to 300°C and the time is 60 seconds. Test results show that the device ideality factor n is 1.06, and the contact is stable.

[0068] Example 16 The difference from Example 1 is that in step S5, the post-annealing temperature is set to 400°C and the time is 60 seconds. Test results show that the device's ideality factor n is 1.01, indicating excellent performance.

[0069] Example 17 The difference from Example 1 is that in step S5, the post-annealing time is set to 30 seconds and the temperature to 350°C. Test results show that the device ideality factor n is 1.08, indicating that short-time annealing is effective.

[0070] Example 18 The difference from Example 1 is that in step S5, the post-annealing time is set to 120 seconds and the temperature to 350°C. Test results show that the device ideality factor n is 1.01, indicating that long-term annealing is safe.

[0071] Example 19 The difference from Example 1 is that in step S1, the piranha solution was used for cleaning for 10 minutes, followed by soaking in dilute HF for 30 seconds. Test results showed that the cleaning effect was sufficient, and the final device performance was comparable to that of Example 1.

[0072] Example 20 The difference from Example 1 is that the number of cycles in step S3 was adjusted to 14 (combined with the growth rate of Example 1), making the SiO2 passivation layer thickness precisely 1.2 nm. Test results show that the device ideality factor n is 1.05, and the breakdown characteristics are improved, proving that the upper limit of the thickness is effective.

[0073] The above content is only for illustrating the technical concept of the present invention and should not be construed as limiting the scope of protection of the present invention. Any modifications made to the technical solution based on the technical concept proposed in this invention shall fall within the scope of protection of the claims of this invention.

Claims

1. A method for gallium oxide surface passivation based on a PEALD-grown ultrathin SiO2 passivation layer, characterized in that, Includes the following steps: S1: In-situ ozone plasma pretreatment of gallium oxide substrate; S2: An ultrathin SiO2 passivation layer is grown on the gallium oxide surface after in-situ ozone plasma pretreatment using plasma-enhanced atomic layer deposition (PEALD). S3: Deposit Schottky anode metal on the surface with an ultrathin SiO2 passivation layer, deposit ohmic contact cathode metal on the back side of the gallium oxide substrate, and then perform post-annealing.

2. The gallium oxide surface passivation method based on PEALD-grown ultrathin SiO2 passivation layer according to claim 1, characterized in that, In step S1, the conditions for the in-situ ozone plasma pretreatment include: the in-situ ozone plasma pretreatment adopts a remote plasma mode, the power is 50W-200W, and the pretreatment time is 30 s-120 s.

3. The gallium oxide surface passivation method based on PEALD-grown ultrathin SiO2 passivation layer according to claim 1, characterized in that, In step S2, the process conditions of the plasma-enhanced atomic layer deposition process include: 2-12 cycles of plasma-enhanced atomic layer deposition, a single cycle growth rate of 0.8-1.2 Å / cycle, a temperature of 200℃-250℃, a thickness of 0.2nm-1.2nm for the ultrathin SiO2 passivation layer, a pressure of 100Pa-500Pa, and the silicon source precursor used is an aminosilane compound, and the oxygen source is oxygen plasma.

4. The gallium oxide surface passivation method based on PEALD-grown ultrathin SiO2 passivation layer according to claim 3, characterized in that, A single cycle of the plasma-enhanced atomic layer deposition process includes: (a) Introduce a silicon source precursor, with a pulse duration of 0.1s-2.0s; (b) Purge with inert gas for 3-10 seconds; (c) Introduce an oxygen source and excite the plasma. The plasma power is 100W-400W and the pulse time is 2s-10s. (d) Purge with inert gas for 3-10 seconds.

5. The gallium oxide surface passivation method based on PEALD-grown ultrathin SiO2 passivation layer according to claim 1, characterized in that, The post-annealing conditions include: a temperature of 300-400℃, an inert gas atmosphere, and a time of 30-120 s.

6. The gallium oxide surface passivation method based on a PEALD-grown ultrathin SiO2 passivation layer according to claim 1, characterized in that, The gallium oxide substrate is cleaned before the in-situ ozone plasma pretreatment.

7. A gallium oxide surface passivation method based on a PEALD-grown ultrathin SiO2 passivation layer according to claim 6, characterized in that, The cleaning process includes washing with piranha solution at 80°C for 10-15 minutes and soaking in dilute hydrofluoric acid for 30-60 seconds.

8. The gallium oxide surface passivation method based on PEALD-grown ultrathin SiO2 passivation layer according to claim 1, characterized in that, The Schottky anode metal is a Ni / Au or Pt / Au stacked structure, and the ohmic contact cathode metal is a Ti / Au or Ti / Al / Ni / Au stacked structure.

9. A gallium oxide surface passivation method based on a PEALD-grown ultrathin SiO2 passivation layer according to claim 1, characterized in that, The gallium oxide substrate is a single crystal substrate or epitaxial wafer of β-phase gallium oxide, with a crystal orientation of (001) or (-201).

10. A gallium oxide Schottky diode manufactured using the passivation method according to any one of claims 1-9, characterized in that, The device includes a gallium oxide substrate, on the surface of which an ultrathin SiO2 passivation layer is grown, on the surface of which a Schottky anode metal is deposited, and on the back side of which an ohmic contact cathode metal is deposited, wherein the thickness of the ultrathin SiO2 passivation layer is 0.2 nm to 1.2 nm.

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