Method, system, electronic device and readable storage medium for managing data exchange
By introducing memory address management rules into the SPI protocol, the problem of inflexible data exchange management in the SPI protocol is solved, and flexible data exchange and memory management between master and slave devices are realized.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- 广东世炬网络科技股份有限公司
- Filing Date
- 2026-04-20
- Publication Date
- 2026-06-05
AI Technical Summary
The existing SPI protocol lacks a memory address management mechanism in data exchange, resulting in poor flexibility in data exchange management between the master and slave devices.
By introducing memory address management rules into the SPI protocol, the master and slave devices pre-agree on memory address management rules, including partitioning, permission allocation, and data exchange methods, thereby achieving flexible data exchange management.
It enhances the flexibility of data exchange management between master and slave devices and enables flexible management of slave device memory.
Smart Images
Figure CN122152730A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of communication technology, and in particular to a data exchange management method, system, electronic device, and readable storage medium. Background Technology
[0002] The Serial Peripheral Interface (SPI) protocol is a synchronous, full-duplex serial communication protocol. It is primarily used for short-distance, high-speed communication between microcontrollers (MCUs) and various peripheral devices (such as sensors, displays, and memory). The SPI protocol employs a master-slave architecture, meaning it is implemented based on a master and slave device structure.
[0003] The standard SPI protocol used in related technologies has a single function, often only responsible for transmitting data from one device to another, such as writing data from the master device to the slave device's memory. However, it lacks a memory address management mechanism. For example, during the transmission process, the address information sent by the master device to the slave device based on the SPI protocol can only contain the specific address of the slave device's memory, instructing the slave device to write the data directly to that specific address. This results in poor management flexibility for data exchange between the master and slave devices. Summary of the Invention
[0004] This application provides a data exchange management method, system, electronic device, and readable storage medium. Under the guidance of the memory address management rules, the slave device can flexibly exchange data with the memory according to an efficient memory address management mechanism. The memory of the slave device can be flexibly managed through the pre-agreed memory address management rules, which can improve the management flexibility of data exchange between the master device and the slave device.
[0005] In a first aspect, embodiments of this application provide a data exchange management method applied to a slave device, wherein the slave device and the master device are connected for communication based on the SPI protocol, and the method includes: The system receives address information sent by the master device based on the SPI protocol. The address information is used to request data exchange and carries memory address management rules pre-agreed with the master device. Traverse each bit of the address information to extract the definition information carried by each bit; The memory address management rules are parsed based on the definition information carried by each bit, and the data exchange method is determined under the guidance of the memory address management rules. Data is exchanged with memory based on the determined data exchange method; The memory address management rules are defined by definition information carried by several bits in the address information; the definition information includes: partitioning information of memory addresses, selection information of the partitions, read and write permission allocation information of the partitions, and switching information between data reading and writing.
[0006] Optionally, the selection information includes selection information for the target partition, the read / write permission allocation information includes information granting write permissions to the target partition, and the switching information includes instructions for writing data. Accordingly, the data exchange methods include: Select the target partition from the partitions defined by the memory address, and write the data from the master device into the target partition.
[0007] Optionally, the selection information includes selection information for the target partition, the read / write permission allocation information includes information granting read permissions to the target partition, and the switching information includes instructions for data reading; Accordingly, the data exchange methods include: Select the target partition from the partitions defined by the memory address, and read the data stored in the target partition.
[0008] Optionally, the slave device is equipped with an FPGA; Accordingly, before receiving the address information sent by the master device based on the SPI protocol, the method further includes: Configure the SPI protocol in the FPGA; Based on the memory address management rules, a custom SPI protocol is obtained by customizing the pre-configured SPI protocol in the FPGA. Accordingly, receiving the address information sent by the master device based on the SPI protocol includes: Receive the address information sent by the master device based on the custom SPI protocol.
[0009] Secondly, embodiments of this application provide a data exchange management method applied to a master device, wherein the master device and a slave device are connected for communication based on the SPI protocol, and the method includes: In response to a trigger command for data exchange, address information for requesting data exchange is generated based on the SPI protocol. The address information carries memory address management rules pre-agreed with the slave device. The address information is sent to the slave device to exchange data with the slave device based on the address information; the address information is used to enable the slave device to exchange data with the slave device's memory under the instruction of the memory address management rules; The memory address management rules are defined by definition information carried by several bits in the address information; the definition information includes: partitioning information of memory addresses, selection information of the partitions, read and write permission allocation information of the partitions, and switching information between data reading and writing.
[0010] Optionally, the selection information includes selection information for the target partition, the read / write permission allocation information includes information granting write permissions to the target partition, and the switching information includes instructions for writing data. Accordingly, the data exchange with the slave device based on the address information includes: Send target data corresponding to the address information to the slave device; the target data is data that is expected to be written to the target partition.
[0011] Optionally, the selection information includes selection information for the target partition, the read / write permission allocation information includes information granting read permissions to the target partition, and the switching information includes instructions for data reading; Accordingly, the data exchange with the slave device based on the address information includes: The system receives target data corresponding to the address information sent by the slave device; the target data is data read by the slave device from the target partition.
[0012] Thirdly, embodiments of this application provide a data exchange management system, the system including a master device and a slave device that is communicatively connected to the master device based on the SPI protocol; The master device is configured to respond to a trigger command for data exchange, generate address information for requesting data exchange based on the SPI protocol, the address information carrying memory address management rules pre-agreed with the slave device, and send the address information to the slave device to exchange data with the slave device based on the address information; The slave device is configured to receive the address information; traverse each bit of the address information to extract the definition information carried by each bit; parse the memory address management rules according to the definition information carried by each bit, and determine the data exchange method under the instruction of the memory address management rules; and exchange data with memory based on the determined data exchange method. The memory address management rules are defined by definition information carried by several bits in the address information; the definition information includes: partitioning information of memory addresses, selection information of the partitions, read and write permission allocation information of the partitions, and switching information between data reading and writing.
[0013] Fourthly, embodiments of this application provide an electronic device, the electronic device including a processor, a memory, and a program or instructions stored in the memory and executable on the processor, wherein the program or instructions, when executed by the processor, implement the method as described in the first or second aspect.
[0014] Fifthly, embodiments of this application provide a readable storage medium on which a program or instructions are stored, which, when executed by a processor, implement the method described in the first or second aspect.
[0015] In this embodiment, the address information sent by the master device to the slave device based on the SPI protocol carries a pre-agreed memory address management rule. This memory address management rule is defined by definition information carried by several bits in the address information. This definition information includes: partitioning information of the memory address, selection information of the partition, read and write permission allocation information of the partition, and data read and write switching information. Under the instruction of the memory address management rule, the slave device can flexibly exchange data with the memory. The pre-agreed memory address management rule enables flexible management of the slave device's memory, thereby improving the management flexibility of data exchange between the master device and the slave device. Attached Figure Description
[0016] Figure 1 This is a schematic diagram of a communication scenario based on the SPI protocol in related technologies; Figure 2 This is a flowchart illustrating a data exchange management method according to an embodiment of this application; Figure 3 This is a schematic diagram of the memory address management rules of the SPI protocol according to one embodiment of this application; Figure 4 This is a flowchart illustrating a data exchange management method according to another embodiment of this application; Figure 5 This is a flowchart illustrating a data exchange management method according to another embodiment of this application; Figure 6 This is a schematic diagram of the structure of a data exchange management system according to an embodiment of this application; Figure 7 This is a schematic diagram of the structure of an electronic device according to an embodiment of this application. Detailed Implementation
[0017] To make the objectives, technical solutions, and advantages of this application clearer, specific embodiments of this application will be described in further detail below with reference to the accompanying drawings. It should be understood that the specific embodiments described herein are merely for explaining this application and not for limiting it. It should also be noted that, for ease of description, only the parts relevant to this application are shown in the drawings, not all of them. Before discussing exemplary embodiments in more detail, it should be mentioned that some exemplary embodiments are described as processes or methods depicted as flowcharts. Although the flowcharts describe operations (or steps) as sequential processes, many of these operations can be performed in parallel, concurrently, or simultaneously. Furthermore, the order of the operations can be rearranged. The process can be terminated when its operation is completed, but may also have additional steps not included in the drawings. The process can correspond to a method, function, procedure, subroutine, subprogram, etc.
[0018] The technical solutions of the embodiments of this application will be clearly described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this application. All other embodiments obtained by those skilled in the art based on the embodiments of this application are within the scope of protection of this application.
[0019] The terms "first," "second," etc., used in the specification and claims of this application are used to distinguish similar objects and not to describe a specific order or sequence. It should be understood that such use of data can be interchanged where appropriate so that embodiments of this application can be implemented in orders other than those illustrated or described herein, and the objects distinguished by "first," "second," etc., are generally of the same class and the number of objects is not limited; for example, a first object can be one or more. Furthermore, in the specification and claims, "and / or" indicates at least one of the connected objects, and the character " / " generally indicates that the preceding and following objects are in an "or" relationship.
[0020] The data exchange management method, system, electronic device, and readable storage medium provided in this application will be described in detail below with reference to the accompanying drawings and through specific embodiments and application scenarios.
[0021] Please see Figure 1 First, we will provide an exemplary introduction to the Serial Peripheral Interface (SPI) communication scenario in related technologies: like Figure 1 As shown, Figure 1This is a schematic diagram of a communication scenario based on the SPI protocol in related technologies. SPI is a synchronous, full-duplex serial communication protocol. It is mainly used for short-distance, high-speed communication between microcontroller units (MCUs) and various peripheral devices (such as sensors, displays, and memory). The SPI protocol adopts a master-slave architecture, meaning it is based on... Figure 1 The architecture implementation of the master device (or host) and slave device (or slave) shown.
[0022] The standard SPI protocol used in related technologies has a single function. It is often only responsible for transmitting data from one device to another, such as writing data from the master device (or master) into the memory of the slave device (or slave). However, it does not have a memory address management mechanism. For example, during the transmission process, the address information sent by the master device to the slave device based on the SPI protocol can only contain the specific address of the slave device's memory to instruct the slave device to write the data directly to that specific address. This results in poor management flexibility for data exchange between the master device and the slave device.
[0023] It is worth noting that the above description of SPI communication scenarios in related technologies is only an example. In practical applications, other types of SPI communication scenarios may exist, and no specific limitations are made for them.
[0024] To address the aforementioned issues, this application provides a data exchange management method that enables slave devices to flexibly exchange data with memory under the guidance of memory address management rules. By using pre-agreed memory address management rules, the method achieves flexible management of the slave device's memory, thereby improving the management flexibility of data exchange between the master and slave devices.
[0025] The master and slave devices communicate via the SPI protocol. The slave device exchanges data with the master device using different data exchange methods under different circumstances. Several embodiments are provided; one embodiment is described below. For a detailed description of the execution process of this embodiment, please refer to [link to relevant documentation]. Figure 2 As shown, Figure 2 This is a flowchart illustrating a data exchange management method according to an embodiment of this application. An embodiment of the data exchange management method provided in this application may include: 201. In response to the trigger command for data exchange, the master device generates address information for requesting data exchange based on the SPI protocol.
[0026] The address information carries the memory address management rules pre-agreed with the slave device.
[0027] The master device can be a microcontroller, microprocessor, field-programmable gate array (FPGA), complex programmable logic device (CPLD), dedicated SPI master control chip, or digital signal processor (DSP). It can actively control communication and generate clock signals.
[0028] Data exchange can refer to the master device transmitting data to the slave device and writing it to the slave device, or the master device reading data stored in the slave device (i.e., the slave device transmitting stored data to the master device).
[0029] A trigger command can refer to an instruction that triggers the writing of data from the master device to the slave device, or an instruction that triggers the master device to read data stored in the slave device.
[0030] The SPI protocol is a synchronous, full-duplex serial communication protocol that uses a master-slave architecture (master and slave devices). It typically consists of four signal lines, for example: Serial Clock (SCLK): Generated by the master device to synchronize the rhythm of data transmission.
[0031] Master Out Slave In (MOSI): The line through which data is sent from the master device to the slave device.
[0032] Master In Slave Out (MISO): The line through which data is sent from the slave device to the master device.
[0033] Slave Select / Chip Select (SS / CS): Typically controlled by the master device, active low. The master device can "select" a slave device for communication by pulling its CS pin low.
[0034] Address information can refer to information used to request data exchange from a slave device and to indicate the specific memory address targeted during the data exchange process.
[0035] Optionally, the trigger command for data exchange can be generated by the master device actively initiating an SPI transmission through hardware or software. This action can be generated by the master device according to program logic.
[0036] Optionally, the master device may generate address information for requesting data exchange based on the SPI protocol in the following ways: the master device obtains the memory address management rules agreed upon with the slave device in advance, thereby determining the following target information: the partitioning rules for memory addresses; if memory addresses are partitioned, the rules for selecting partitions among the partitions; the rules for allocating read and write permissions for each partition; the switching rules for data read and write partitions; after determining the above target information, the master device formulates the format of address information in the SPI protocol based on the determined target information, and generates address information for requesting data exchange based on the formulated format.
[0037] The master device can pre-agree on memory address management rules with the slave device in various ways. As an example, the slave device can be deployed with a Field-Programmable Gate Array (FPGA). The slave device can configure the SPI protocol in the FPGA and, based on the pre-determined memory address management rules, customize the configured SPI protocol in the FPGA to obtain a custom SPI protocol. The custom SPI protocol is then synchronously configured in the master device, thereby configuring the memory address management rules in the master device. Finally, the pre-determined memory address management rules are synchronously configured in the master and slave devices.
[0038] As another example, the address information format of the pre-configured SPI protocol can be customized based on the memory address management rules. The customized address information format of the SPI protocol can be configured synchronously in the master device. Then, when the master device sends address information, it can send it based on the address information format corresponding to the customized SPI protocol.
[0039] 202. The master device sends address information to the slave device.
[0040] The master device sends address information to the slave device, enabling data exchange based on this address information. This address information allows the slave device to exchange data with its memory under the guidance of memory address management rules, thereby facilitating data exchange with the master device.
[0041] In this context, the slave device can be a peripheral module or a sensor that passively responds to requests from the master device. Peripheral modules include memory, displays, data converters, real-time clocks, wireless modules, or other types of peripheral modules. Sensors include accelerometers, gyroscopes, thermometers, hygrometers, magnetometers, or other types of sensors.
[0042] Optionally, the master device may send address information to the slave device in the following ways: the master device may first pull down the CS pin of the slave device that needs to transmit data to it, thereby selecting the slave device for communication, and then the master device may send the address information to the slave device through the MOSI line between the master device and the slave device.
[0043] 203. Traverse each bit of the address information from the device to extract the definition information carried by each bit.
[0044] A bit, or bit-sized unit, is the smallest unit of measurement for information, representing data internally in a computer using either a 0 or a 1. As the foundation of computer storage and data processing, bits constitute the underlying logic of all digital information and are widely used in data storage, network transmission, and signal processing.
[0045] 204. The memory address management rules are parsed from the device based on the definition information carried by each bit.
[0046] Among them, memory address management rules can refer to the rules for partitioning memory addresses; if memory addresses are partitioned, the rules for selecting partitions among them; the rules for allocating read and write permissions for each partition; and the rules for switching between data read and write partitions.
[0047] Optionally, the method for parsing memory address management rules from address information from the device may include: traversing each bit of the received address information to extract the definition information carried by each bit, and parsing the memory address management rules based on the definition information carried by each bit.
[0048] 205. The device determines the data exchange method under the guidance of the memory address management rules.
[0049] The data exchange method can refer to the method corresponding to the memory address management rules, that is, whether data exchange is carried out in the memory after partitioning; if data exchange is carried out in the memory after partitioning, which partition is selected for data exchange; whether data is read in the partition with data read permission, or written in the partition with data write permission, or read and write data in the partition with both data read and data write permissions.
[0050] Optionally, the method by which the slave device determines the data exchange method under the instruction of the memory address management rules may include: the slave device determining whether to perform data exchange in the partitioned memory based on the definition information carried by each bit in the address information; if data exchange is performed in the partitioned memory, then the slave device specifically selects the target partition for data exchange according to the selection information included in the definition information; if the switching information included in the definition information is a data write instruction, and the read / write permission allocation information included in the definition information grants write permission to the selected target partition, then the data from the master device is written to the target partition; if the switching information included in the definition information is a data read instruction, and the read / write permission allocation information included in the definition information grants read permission to the selected target partition, then the data stored in the target partition is read and the read data is transferred to the master device; if the switching information included in the definition information includes both data write and data read instructions, and the read / write permission allocation information included in the definition information grants both read and write permissions to the selected target partition, then the data from the master device can be written to the target partition, or the data stored in the target partition can be read and the read data can be transferred to the master device.
[0051] 206. The device exchanges data with the memory based on the determined data exchange method.
[0052] The memory address management rules are defined by the definition information carried by several bits in the address information. The definition information includes: the partitioning information of the memory address, the selection information of the partition, the allocation of read and write permissions for the partition, and the switching information between data reading and writing.
[0053] In SPI communication, memory refers to the set of internal storage units of a slave device that can be read and written via the SPI interface. These storage units can be used to store configuration parameters, status information, sampled data, user data, or program code. The slave device's memory can be a dedicated internal resource for that slave device, typically existing in the form of registers, SRAM, EEPROM, Flash, or FIFO.
[0054] Optionally, the methods by which the slave device exchanges data with memory based on the determined data exchange method include: the slave device writing data from the master device to a selected target partition in the various partitions of the memory address, or the slave device reading data stored in the selected target partition in the various partitions of the memory address.
[0055] As an example, when a slave device writes data from a master device to a selected target partition within the partitions of the memory address set, the data exchange between the master and slave devices is completed (the master device writes data to the slave device). As another example, when a slave device reads data stored in a selected target partition within the partitions of the memory address set, it can transfer the read data to the master device, thus completing the data exchange between the master and slave devices (the master device reads data from the slave device).
[0056] Please participate Figure 3 , Figure 3 This is a schematic diagram of the memory address management rules of the SPI protocol according to an embodiment of this application. The following is in conjunction with... Figure 3 A specific memory address management rule from an embodiment of this application will be described by way of example: like Figure 3 As shown, under the SPI protocol, the data involved in a single transmission process between a master and slave device can include a 16-bit SPI protocol address (i.e., the address information mentioned above) and 32 bits of SPI protocol data (i.e., the target data mentioned above). In a complete transmission process, the master device can first send the 16-bit SPI protocol address to the slave device, and then exchange the 32-bit SPI protocol data based on the 16-bit SPI protocol address; that is, the address is transmitted first, followed by the data.
[0057] On the address bus decoded by SPI, such as Figure 3 As shown, the memory address management rules contained in the 16-bit address information can include: allocating 1 bit, such as bit 15, for selecting whether to create a memory address partition (i.e., the partitioning information for memory addresses mentioned above); allocating 1 bit, such as bit 14, for read / write switching after partitioning (i.e., the switching information for data reading and writing mentioned above); allocating 2 bits, such as bits [13:12], for the allocation of read / write permissions for the partitioned address (i.e., the allocation information for read / write permissions for the partition mentioned above), such as whether it is read / write permission or read-only permission; allocating 4 bits, such as bits [11:8], for address chip selection after partitioning (i.e., the partitioning information for memory addresses mentioned above); and allocating 8 bits, bits [7:0], for address usage after partitioning (i.e., the selection information for the partition mentioned above). It is understood that the specific implementation of the allocation method and allocation order of the definition information of each bit is not limited to this.
[0058] In this embodiment, the custom memory address management rules are implemented through a custom protocol embedded in the standard SPI protocol, without requiring additional overhead. Whether to create partitions for memory addresses can be dynamically switched on or off. For example, bit 15 serves as the switch (definition information for whether to create a partition). Configuring 1 enables the partition creation switch, activating the partitioned caching method for memory; configuring 0 disables the partition creation switch, and cache management is performed according to the standard SPI protocol (i.e., ...). Figure 3 The "unpartitioned memory" shown takes effect in real time and is dynamically processed. At the same time, the address permissions of each partition after partitioning can be configured. For example, bits [13:12] are used as address permission configuration, which can be configured as read-only permission or read-write permission. After partitioning, memory address management is more flexible and efficient.
[0059] In this embodiment, the address information sent by the master device to the slave device based on the SPI protocol carries a pre-agreed memory address management rule. This memory address management rule is defined by definition information carried by several bits in the address information. This definition information includes: partitioning information of the memory address, selection information of the partition, read and write permission allocation information of the partition, and data read and write switching information. Under the instruction of the memory address management rule, the slave device can flexibly exchange data with the memory. The pre-agreed memory address management rule enables flexible management of the slave device's memory, thereby improving the management flexibility of data exchange between the master device and the slave device.
[0060] The following describes another embodiment of a communication connection between a master device and a slave device based on the SPI protocol, in which the slave device exchanges data with the master device using different data exchange methods under different circumstances. For a detailed description of the execution process of this embodiment, please refer to [link to relevant documentation]. Figure 4 As shown, Figure 4 This is a flowchart illustrating a data exchange management method according to another embodiment of this application, where data from the master device needs to be written into the memory of the slave device. Another embodiment of the data exchange management method provided in this application may include: 401. Configure the SPI protocol in the FPGA from the device.
[0061] The device is equipped with a field-programmable gate array (FPGA).
[0062] FPGA is a programmable logic chip that allows users to "reconfigure" after its manufacture using hardware description languages (such as Verilog and VHDL) to achieve the required digital logic circuit functions. It is flexible and can be repeatedly erased, rewritten, and reconfigured, unlike application-specific integrated circuits (ASICs) whose functions are fixed after manufacturing. Furthermore, FPGA has hardware reconfigurability, meaning that its internal interconnects can be changed through programming, enabling the implementation of various circuits from simple logic gates to complex processors.
[0063] Optionally, the main device can also be deployed with an FPGA.
[0064] 402. Based on the device's memory address management rules, a custom SPI protocol is obtained by customizing the SPI protocol in the FPGA.
[0065] The memory address management rules are defined by the definition information carried by several bits in the address information. The definition information includes: the partitioning information of the memory address, the selection information of the partition, the allocation of read and write permissions for the partition, and the switching information between data reading and writing.
[0066] The selection information includes the selection information for the target partition, the read / write permission allocation information includes the information for granting write permissions to the target partition, and the switching information includes the instructions for writing data.
[0067] Among them, the custom SPI protocol can refer to an SPI protocol that customizes the standard format of address information relative to the standard SPI protocol, so as to form a custom format of address information.
[0068] Optionally, a custom SPI protocol can be obtained by customizing the pre-configured SPI protocol in the FPGA. This can be achieved by customizing the format of the address information of the pre-configured SPI protocol based on the partitioning information of memory addresses, the selection information of the partitions, the allocation information of read and write permissions of the partitions, and the switching information of data reading and writing.
[0069] 403. In response to the trigger command for data exchange, the master device generates address information for requesting data exchange based on a custom SPI protocol.
[0070] The address information carries the memory address management rules pre-agreed with the slave device.
[0071] 404. The master device sends address information to the slave device.
[0072] After the master device sends address information to the slave device, it can exchange data with the slave device based on the sent address information.
[0073] Address information is used to enable the slave device to exchange data with the slave device's memory under the guidance of memory address management rules.
[0074] 405. Traverse each bit of the address information from the device to extract the definition information carried by each bit.
[0075] 406. The memory address management rules are parsed from the device based on the definition information carried by each bit.
[0076] 407. Under the guidance of the memory address management rules, the slave device divides the memory address of the slave device into multiple partitions, and selects the target partition among the partitions.
[0077] In this context, a memory address refers to the number (usually in bytes) used in a computer system to uniquely identify and locate each storage unit in memory. This number forms a continuous linear or logical number space. The processor transmits this number through the address bus and, in combination with control signals, can perform data read and write operations on specific storage units.
[0078] A partition can refer to a series of non-overlapping, distinct ranges of memory address space divided according to function, access permissions, storage content, or management strategy. Each partition has a defined start address, end address (or defined length), and specific semantic attributes. The purpose of partitioning is to achieve effective organization, protection, and isolation of storage resources.
[0079] The target partition can refer to the partition selected for this data exchange among all partitions divided by memory address.
[0080] 408. Receive target data corresponding to the address information sent by the master device from the slave device.
[0081] The target data is the data that is expected to be written to the target partition.
[0082] The target data can refer to the data that the device is exchanging data with in the target partition of memory.
[0083] 409. Write the target data from the device to the target partition in memory.
[0084] The following describes another embodiment of a communication connection between a master device and a slave device based on the SPI protocol, in which the slave device exchanges data with the master device using different data exchange methods under different circumstances. For a detailed description of the execution process of this embodiment, please refer to [link to relevant documentation]. Figure 4 As shown, Figure 4This is a flowchart illustrating a data exchange management method according to another embodiment of this application, where the master device needs to read data stored in the memory of the slave device. Another embodiment of the data exchange management method provided in this application may include: 501. Configure the SPI protocol in the FPGA from the device.
[0085] The device is equipped with an FPGA.
[0086] 502. Based on the device's memory address management rules, a custom SPI protocol is obtained by customizing the SPI protocol in the FPGA.
[0087] The memory address management rules are defined by the definition information carried by several bits in the address information. The definition information includes: the partitioning information of the memory address, the selection information of the partition, the allocation of read and write permissions for the partition, and the switching information between data reading and writing.
[0088] The selection information includes the selection information for the target partition, the read / write permission allocation information includes the information for granting read permissions to the target partition, and the switching information includes the instructions for data reading.
[0089] 503. In response to the trigger command for data exchange, the master device generates address information for requesting data exchange based on a custom SPI protocol.
[0090] The address information carries the memory address management rules pre-agreed with the slave device.
[0091] 504. The master device sends address information to the slave device.
[0092] It exchanges data with slave devices based on address information.
[0093] Address information is used to enable the slave device to exchange data with the slave device's memory under the guidance of memory address management rules.
[0094] 505. Traverse each bit of the address information from the device to extract the definition information carried by each bit.
[0095] 506. The memory address management rules are parsed from the device based on the definition information carried by each bit.
[0096] 507. Under the guidance of the memory address management rules, the slave device divides the memory address of the slave device into multiple partitions, and selects the target partition among the partitions.
[0097] 508. Read the target data corresponding to the address information stored in the target partition in the memory from the device.
[0098] 509. The slave device sends the target data corresponding to the address information to the master device.
[0099] Corresponding to the above method embodiments, this application also provides a data exchange management system, such as... Figure 6 As shown, Figure 6 This is a schematic diagram of the structure of a data exchange management system according to an embodiment of the present application. The system includes: a master device 601 and a slave device 602 that is communicatively connected to the master device 601 based on the SPI protocol. The master device 601 is used to respond to the trigger command for data exchange, generate address information for requesting data exchange based on the SPI protocol, and the address information carries the memory address management rules pre-agreed with the slave device 602; and send the address information to the slave device 602 to exchange data with the slave device based on the address information. The slave device 602 is used to receive address information; traverse each bit of the address information to extract the definition information carried by each bit; parse the memory address management rules according to the definition information carried by each bit, and determine the data exchange method under the instruction of the memory address management rules; and exchange data with memory based on the determined data exchange method. The memory address management rules are defined by the definition information carried by several bits in the address information. The definition information includes: the partitioning information of the memory address, the selection information of the partition, the allocation of read and write permissions for the partition, and the switching information between data reading and writing.
[0100] Optionally, the selection information includes selection information for the target partition, the read / write permission allocation information includes information for granting write permissions to the target partition, and the switching information includes instructions for writing data; correspondingly, the slave device 602 is specifically used to select the target partition among the various partitions divided by the memory address and write the data from the master device to the target partition.
[0101] Optionally, the selection information includes selection information for the target partition, the read / write permission allocation information includes information granting read permissions to the target partition, and the switching information includes instructions for data reading; correspondingly, the slave device 602 is specifically used to select the target partition among the various partitions divided by the memory address and read the data stored in the target partition.
[0102] Optionally, the slave device 602 is deployed with an FPGA; correspondingly, the slave device 602 is also used to configure the SPI protocol in the FPGA; based on the memory address management rules, the SPI protocol configured in the FPGA is customized to obtain a custom SPI protocol; correspondingly, the slave device 602 is specifically used to receive the address information sent by the master device based on the custom SPI protocol.
[0103] Optionally, the selection information includes selection information for the target partition, the read / write permission allocation information includes information granting write permissions to the target partition, and the switching information includes instructions for writing data; correspondingly, the master device 601 is specifically used to send target data corresponding to the address information to the slave device; the target data is the data expected to be written to the target partition.
[0104] Optionally, the selection information includes selection information for the target partition, the read / write permission allocation information includes information granting read permissions to the target partition, and the switching information includes instructions for data reading; correspondingly, the master device 601 is specifically used to receive target data sent by the slave device corresponding to the address information; the target data is the data read by the slave device from the target partition.
[0105] like Figure 7 As shown, this application embodiment also provides an electronic device, including a processor 701, a memory 702, and a program or instructions stored in the memory 702 and executable on the processor 701. When the program or instructions are executed by the processor 701, they implement the various processes of the above-described data exchange management method embodiment and achieve the same technical effect. To avoid repetition, they will not be described again here.
[0106] This application also provides a readable storage medium storing a program or instructions. When the program or instructions are executed by a processor, they implement the various processes of the above-described data exchange management method embodiments and achieve the same technical effects. To avoid repetition, they will not be described again here.
[0107] The processor is the processor in the electronic device described in the above embodiments. The readable storage medium includes computer-readable storage media, such as computer read-only memory (ROM), random access memory (RAM), magnetic disk, or optical disk.
[0108] It should be noted that, in this document, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes that element. Furthermore, it should be noted that the scope of the methods and apparatuses in the embodiments of this application is not limited to performing functions in the order shown or discussed, but may also include performing functions substantially simultaneously or in the reverse order, depending on the functions involved. For example, the described methods may be performed in a different order than described, and various steps may be added, omitted, or combined. Additionally, features described with reference to certain examples may be combined in other examples.
[0109] Through the above description of the embodiments, those skilled in the art can clearly understand that the methods of the above embodiments can be implemented by means of software plus necessary general-purpose hardware platforms. Of course, they can also be implemented by hardware, but in many cases the former is a better implementation method. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, can be embodied in the form of a computer software product. This computer software product is stored in a storage medium (such as ROM / RAM, magnetic disk, optical disk) and includes several instructions to cause a terminal (which may be a mobile phone, computer, server, or network device, etc.) to execute the methods described in the various embodiments of this application.
[0110] The embodiments of this application have been described above with reference to the accompanying drawings. However, this application is not limited to the specific embodiments described above. The specific embodiments described above are merely illustrative and not restrictive. Those skilled in the art can make many other forms under the guidance of this application without departing from the spirit and scope of the claims, and all of these forms are within the protection scope of this application.
[0111] The above description is merely a preferred embodiment and the technical principles employed in this application. This application is not limited to the specific embodiments described herein, and various obvious changes, readjustments, and substitutions that can be made by those skilled in the art will not depart from the scope of protection of this application. Therefore, although this application has been described in detail through the above embodiments, this application is not limited to the above embodiments, and may include more other equivalent embodiments without departing from the concept of this application, the scope of which is determined by the scope of the claims.
Claims
1. A data exchange management method applied to a slave device, wherein the slave device and the master device are connected for communication based on the SPI protocol, characterized in that, The method includes: The system receives address information sent by the master device based on the SPI protocol. The address information is used to request data exchange and carries memory address management rules pre-agreed with the master device. Traverse each bit of the address information to extract the definition information carried by each bit; The memory address management rules are parsed based on the definition information carried by each bit, and the data exchange method is determined under the guidance of the memory address management rules. Data is exchanged with memory based on the determined data exchange method; The memory address management rules are defined by definition information carried by several bits in the address information; the definition information includes: partitioning information of memory addresses, selection information of the partitions, read and write permission allocation information of the partitions, and switching information between data reading and writing.
2. The method according to claim 1, characterized in that, The selection information includes selection information for the target partition, the read / write permission allocation information includes information for granting write permissions to the target partition, and the switching information includes instructions for writing data. Accordingly, the data exchange methods include: Select the target partition from the partitions defined by the memory address, and write the data from the master device into the target partition.
3. The method according to claim 1, characterized in that, The selection information includes selection information for the target partition, the read / write permission allocation information includes information for granting read permissions to the target partition, and the switching information includes instructions for data reading. Accordingly, the data exchange methods include: Select the target partition from the partitions defined by the memory address, and read the data stored in the target partition.
4. The method according to claim 1, characterized in that, The slave device is equipped with an FPGA; Accordingly, before receiving the address information sent by the master device based on the SPI protocol, the method further includes: Configure the SPI protocol in the FPGA; Based on the memory address management rules, a custom SPI protocol is obtained by customizing the pre-configured SPI protocol in the FPGA. Accordingly, receiving the address information sent by the master device based on the SPI protocol includes: Receive the address information sent by the master device based on the custom SPI protocol.
5. A data exchange management method, applied to a master device, wherein the master device and a slave device are connected for communication based on the SPI protocol, characterized in that, The method includes: In response to a trigger command for data exchange, address information for requesting data exchange is generated based on the SPI protocol. The address information carries memory address management rules pre-agreed with the slave device. The address information is sent to the slave device to exchange data with the slave device based on the address information; the address information is used to enable the slave device to exchange data with the slave device's memory under the instruction of the memory address management rules; The memory address management rules are defined by definition information carried by several bits in the address information; the definition information includes: partitioning information of memory addresses, selection information of the partitions, read and write permission allocation information of the partitions, and switching information between data reading and writing.
6. The method according to claim 5, characterized in that, The selection information includes selection information for the target partition, the read / write permission allocation information includes information for granting write permissions to the target partition, and the switching information includes instructions for writing data. Accordingly, the data exchange with the slave device based on the address information includes: Send target data corresponding to the address information to the slave device; The target data is the data that is expected to be written to the target partition.
7. The method according to claim 5, characterized in that, The selection information includes selection information for the target partition, the read / write permission allocation information includes information for granting read permissions to the target partition, and the switching information includes instructions for data reading. Accordingly, the data exchange with the slave device based on the address information includes: Receive the target data corresponding to the address information sent by the slave device; The target data is the data read by the slave device from the target partition.
8. A data exchange management system, characterized in that, The system includes a master device and a slave device that communicates with the master device based on the SPI protocol. The master device is configured to respond to a trigger command for data exchange, generate address information for requesting data exchange based on the SPI protocol, the address information carrying memory address management rules pre-agreed with the slave device, and send the address information to the slave device to exchange data with the slave device based on the address information; The slave device is configured to receive the address information; traverse each bit of the address information to extract the definition information carried by each bit; parse the memory address management rules according to the definition information carried by each bit, and determine the data exchange method under the instruction of the memory address management rules; and exchange data with memory based on the determined data exchange method. The memory address management rules are defined by definition information carried by several bits in the address information; the definition information includes: partitioning information of memory addresses, selection information of the partitions, read and write permission allocation information of the partitions, and switching information between data reading and writing.
9. An electronic device, characterized in that, It includes a processor, a memory, and a program or instructions stored in the memory and executable on the processor, wherein the program or instructions, when executed by the processor, implement a data exchange management method as described in any one of claims 1-7.
10. A readable storage medium, characterized in that, The readable storage medium stores a program or instructions that, when executed by a processor, implement the data exchange management method as described in any one of claims 1-7.