An integrated circuit board, a battery management system, and a battery pack

Abstract

The application relates to an integrated circuit board, a battery management system and a battery pack, wherein the integrated circuit board comprises: AFE chip sampling circuits comprising a plurality of AFE chips, each of the AFE chips being connected with a battery module; a master control circuit connected with each of the AFE chips, used for sequentially selecting and enabling one of the AFE chips to communicate through a polling mechanism, controlling the selected AFE chip to collect cell state data of the connected battery module, and receiving the cell state data reported by the selected AFE chip; a power loop control circuit with an input end connected with the master control circuit and an output end connected with the battery pack, used for receiving a control instruction sent by the master control circuit to control a charging and discharging process of the battery pack; and a direct current conversion circuit used for providing stable direct current voltage for each circuit on the circuit board, so that the integration of the circuit board is improved, and the hardware cost and communication delay are reduced.

Description

Technical Field

[0001] This application relates to the field of integrated circuit technology, and in particular to an integrated circuit board, a battery management system, and a battery pack. Background Technology

[0002] The battery management system circuit board is the physical carrier that realizes all the core functions of the battery management system (BMS), and is responsible for monitoring, managing and protecting the safe and efficient operation of the battery pack.

[0003] The mainstream communication architecture of battery management systems adopts a split daisy-chain architecture, which consists of a dozen or so battery cells welded and bundled together to form a battery module. Each battery module uses an AFE chip to collect voltage, current and temperature data, a BMS control board for product logic control, and a power module to supply power to the entire system. In addition, DC relays, precharge relays and fuses used to control the on and off of the power circuit are all placed on sheet metal brackets inside the device for fixing and wiring. This results in an excessive number and variety of circuit boards in the entire system, low integration, excessive product space occupation, and cumbersome installation steps, leading to low assembly efficiency. In addition, the communication method of the split daisy-chain architecture also has the problem of communication delay. Summary of the Invention

[0004] Therefore, it is necessary to provide an integrated circuit board, a battery management system, and a battery pack to address the aforementioned technical problems. This application can improve the integration of the battery management system circuit board and reduce hardware costs and communication latency.

[0005] In a first aspect, embodiments of this application provide an integrated circuit board applied to a battery management system, the battery management system being used to manage a battery pack, the battery pack including multiple battery modules, and the integrated circuit board comprising:

[0006] AFE chip sampling circuit includes multiple AFE chips, each of which is connected to a battery module.

[0007] The main control circuit is connected to each of the AFE chips and is used to sequentially select one of the AFE chips for communication through a polling mechanism, control the selected AFE chip to collect the cell status data of the connected battery module, and receive the cell status data reported by the selected AFE chip.

[0008] A power loop control circuit, whose input terminal is connected to the main control circuit and whose output terminal is connected to the battery pack, is used to receive control commands sent by the main control circuit to control the charging and discharging process of the battery pack.

[0009] A DC-DC converter circuit is connected to the AFE chip sampling circuit, the main control circuit, and the power loop control circuit, respectively, and is used to provide a stable DC voltage for the AFE chip sampling circuit, the main control circuit, and the power loop control circuit.

[0010] In one embodiment, the main control circuit communicates with each of the AFE chips via an SPI interface. The main control circuit includes a first SCK pin, a MOSI pin, a MISO pin, and multiple first CS pins. Each of the AFE chips includes a second SCK pin, an SDI pin, an SDO pin, and a second CS pin.

[0011] Each of the first CS pins of the main control circuit is connected to the second CS pin of one of the AFE chips, and is used to send chip select signals to each of the AFE chips to poll and select one of the AFE chips for communication.

[0012] The first SCK pin of the main control circuit is connected to the second SCK pin of each AFE chip, and is used to send clock signals to each AFE chip.

[0013] The MOSI pin of the main control circuit is connected to the SDI pin of each AFE chip, and is used to send control signals to each AFE chip.

[0014] The MISO pin of the main control circuit is connected to the SDO pin of each of the AFE chips, and is used to receive the cell status data reported by the selected AFE chips.

[0015] In one embodiment, the circuit board further includes an isolation circuit comprising a plurality of digital isolators, one end of each digital isolator being connected to one of the AFE chips and the other end being connected to the main control circuit.

[0016] In one embodiment, the main control circuit includes a main control chip circuit, a communication interface circuit and a storage chip circuit connected to the main control chip circuit. The communication interface circuit is used to provide a communication interface between the main control chip circuit and the host computer, and the storage chip circuit is used to store the received battery cell status data.

[0017] In one embodiment, the power circuit control circuit includes a main power relay, a precharge relay, a precharge resistor, and a fuse. The precharge relay and the precharge resistor are connected in series to form a precharge circuit, which is then connected in parallel with the main power relay. One end of the fuse is connected to the positive terminal of the battery pack, and the other end of the fuse is connected to the main power relay.

[0018] In one embodiment, the devices in the power loop control circuit are electrically connected by etching a layer of copper foil on a circuit board.

[0019] In one embodiment, the AFE chip includes a voltage sampling circuit, a current sampling circuit, a temperature sampling circuit, and a passive equalization circuit.

[0020] Secondly, embodiments of this application also provide a battery management system, including the integrated circuit board as described in the first aspect above.

[0021] Thirdly, embodiments of this application also provide a battery pack, including multiple cell modules and a battery management system as described in the second aspect above.

[0022] Fourthly, embodiments of this application also provide an electrical device, including a load and a battery pack as described in the third aspect above, the battery pack being used to supply power to the load.

[0023] The aforementioned integrated circuit board, battery management system, and battery pack, wherein the integrated circuit board includes: an AFE chip sampling circuit comprising multiple AFE chips, each AFE chip being connected to a battery module; a main control circuit connected to each AFE chip, used to sequentially select one AFE chip for communication via a polling mechanism, controlling the selected AFE chip to collect cell status data of the connected battery module, and receiving the cell status data reported by the selected AFE chip; a power loop control circuit, its input terminal connected to the main control circuit and its output terminal connected to the battery pack, used to receive control commands sent by the main control circuit to control the charging and discharging process of the battery pack; and a DC-DC conversion circuit connected to the AFE chip sampling circuit, the main control circuit, and the power loop control circuit respectively, used to provide a stable DC voltage for the AFE chip sampling circuit, the main control circuit, and the power loop control circuit, thereby improving the integration of the battery management system circuit board and reducing hardware costs and communication latency.

[0024] Details of one or more embodiments of this application are set forth in the following drawings and description to make other features, objects and advantages of this application more readily apparent. Attached Figure Description

[0025] The accompanying drawings, which are included to provide a further understanding of this application and form part of this application, illustrate exemplary embodiments and are used to explain this application, but do not constitute an undue limitation of this application. In the drawings:

[0026] Figure 1 This is a hardware structure block diagram of an integrated circuit board in one embodiment;

[0027] Figure 2 This is a schematic diagram of the communication between the main control circuit and each AFE chip in one embodiment;

[0028] Figure 3 This is a schematic diagram of the connection of the isolation circuit in one embodiment;

[0029] Figure 4 This is a circuit diagram of the power loop control circuit in one embodiment;

[0030] Figure 5 This is a hardware structure block diagram of the main control circuit in one embodiment.

[0031] Among them, 10 is the AFE chip sampling circuit; 20 is the main control circuit; 30 is the power loop control circuit; 40 is the DC-DC conversion circuit; and 50 is the isolation circuit. Detailed Implementation

[0032] To facilitate understanding of this application, a more complete description will be provided below with reference to the accompanying drawings, which illustrate embodiments of the present application. However, the present application can be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided so that the disclosure of this application will be thorough and complete.

[0033] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein in the specification of this application is for the purpose of describing particular embodiments only and is not intended to be limiting of this application.

[0034] It is understood that the terms "first," "second," etc., used herein may be used to describe various elements, but these elements are not limited by these terms. These terms are only used to distinguish one element from another. For example, without departing from the scope of this application, a first resistor may be referred to as a second resistor, and similarly, a second resistor may be referred to as a first resistor. Both the first resistor and the second resistor are resistors, but they are not the same resistor.

[0035] It is understood that the term "connection" in the following embodiments should be understood as "electrical connection," "communication connection," etc., if the connected circuits, modules, units, etc., have electrical signal or data transmission with each other.

[0036] It is understandable that "at least one" refers to one or more, and "multiple" refers to two or more. "At least a part of an element" refers to part or all of an element.

[0037] When used herein, the singular forms of “a,” “an,” and “the” may also include the plural forms unless the context clearly indicates otherwise. It should also be understood that the terms “comprising / including” or “having,” etc., specify the presence of the stated features, wholes, steps, operations, components, parts, or combinations thereof, but do not preclude the possibility of the presence or addition of one or more other features, wholes, steps, operations, components, parts, or combinations thereof. Meanwhile, the term “and / or” as used in this specification includes any and all combinations of the associated listed items.

[0038] A Battery Management System (BMS) uses a printed circuit board (PCB) as its core carrier, integrating all electronic components (MCU chips, AFE chips, power chips, etc.) and software algorithms to ultimately monitor, protect, and manage the battery pack. It is a complete system integrating hardware circuitry and embedded software. The battery pack consists of several battery modules, and each battery module is composed of several battery cells connected in series and parallel.

[0039] Currently, the mainstream communication architecture of battery management systems adopts a split daisy-chain architecture, which consists of a dozen or so battery cells welded and bundled together to form a battery module. Each battery module uses an AFE chip to collect voltage, current, and temperature data, a BMS control board for product logic control, and a power module to supply power to the entire system. In addition, DC relays, precharge relays, and fuses used to control the on / off of the power circuit are all placed on sheet metal brackets inside the device for fixing and wiring. This results in an excessive number and variety of circuit boards in the entire system, excessive product space occupied by the battery management system, and cumbersome product installation steps leading to low assembly efficiency. Furthermore, the split daisy-chain architecture also suffers from communication latency issues.

[0040] Based on this, embodiments of this application provide a highly integrated battery management system circuit board. The circuit board includes a substrate, on which an AFE chip sampling circuit 10, a main control circuit 20, a power loop control circuit 30, and a DC-DC conversion circuit 40 are integrated. Figure 1As shown, the AFE chip sampling circuit 10 includes multiple AFE chips, each of which is connected to each of the battery modules in a one-to-one correspondence. Each AFE chip is only responsible for sampling the voltage, current, temperature and other data of the individual cells of its respective battery module. The main control circuit 20 includes a main control chip connected to each of the AFE chips. The main control chip sequentially selects one AFE chip for communication through a polling mechanism, controls the selected AFE chip to collect cell status data of the connected battery module, and receives the cell status data reported by the selected AFE chip. The main control chip of the main control circuit 20 is also used to send control commands to the power loop control circuit 30. The input terminal of the power loop control circuit 30 is connected to the main control circuit 20, and its output terminal is connected to the battery pack. It is used to receive the control commands sent by the main control circuit 20 and control the charging and discharging process of the battery pack based on the control commands. The DC-DC conversion circuit 40 is connected to the AFE chip sampling circuit 10, the main control circuit 20, and the power loop control circuit 30, respectively, and is used to provide a stable DC voltage for each circuit on the circuit board.

[0041] The AFE chip, or analog front-end chip, is a high-precision, high-voltage, low-power application-specific integrated circuit. It is responsible for collecting analog signals (voltage, temperature, current) from the battery and converting them into digital signals. At the same time, it performs battery equalization control. In conjunction with the main control chip, it realizes the monitoring and protection of the battery pack.

[0042] Traditional battery management systems use a split daisy-chain architecture for communication. This architecture divides the BMS's functions into a main control board and multiple slave boards. The main control board houses the MCU, while the slave boards house the AFE chips. All the slave boards' AFE chips are connected end-to-end by a single cable to communicate with the main control board serially. Because the daisy-chain architecture uses serial communication, there is a communication delay issue.

[0043] This embodiment integrates an AFE chip on a circuit board. The AFE chip uses an SPI serial bus interface, supporting the parallel connection of multiple AFE chips on a single SPI bus. The main control chip controls the status and data polling, as well as the read / write of register parameters, of the AFE chip by switching the chip select control signals of the SPI interfaces of different AFE chips. The SPI interface communication rate of the AFE chip can reach 1Mbps, which is much faster than the serial data communication method of the daisy-chain architecture. This effectively saves the peripheral and GPIO pin resources of the main control chip while ensuring timely communication speed.

[0044] The power circuit control circuit 30 uses two DC relays to control the opening and closing of the battery positive circuit. The pre-charge relay limits the current of the power circuit before the high voltage is applied by connecting a high-power pre-charge resistor in series. In order to prevent the electrolytic capacitor at the battery port of the output side device from being in a near short-circuit state at the moment of power-on, a large current will be generated when the main power relay is closed, which will damage the relay contacts.

[0045] In battery management systems, the total voltage of the power battery pack can reach 400V or 800V. High-voltage battery packs cannot be used directly and require conversion to a stable 12V or 24V low-voltage power supply. The DC-DC converter circuit 40 in this application is a DC-DC power supply circuit. This DC-DC power supply circuit uses a flyback power supply topology to convert the high-voltage battery voltage into an isolated 12V low-voltage power supply, providing a stable and reliable power supply to various circuits on the circuit board, including the main control chip and its peripheral circuits, the relay coil main control circuit 20, and the communication interface chip circuit, ensuring the stable operation of the battery management system.

[0046] The battery management system power supply solution of this application uses a DC-DC power supply circuit integrated on the circuit board. Compared with the solution of using an external power module connected by a power cord and socket, it is simpler and saves space, avoids material waste and reduces installation steps. It can also avoid installation errors when workers assemble the equipment, and reduce the material cost of purchasing external power modules.

[0047] The battery management system circuit board provided in this application embodiment is used for data acquisition, equalization, control and safe operation of medium and high voltage battery packs. By integrating the core hardware of the entire battery management system, including the AFE chip sampling circuit 10, the main control circuit 20, the power loop control circuit 30 and the DC-DC conversion circuit 40, onto the same circuit board, the types of materials and the number of circuit boards are greatly reduced, the space utilization rate of the product is improved, the product integration is increased, the installation steps are reduced, the product cost is significantly reduced, and the product assembly efficiency is improved.

[0048] In one embodiment, the main control circuit 20 communicates with each of the AFE chips via an SPI interface. For example... Figure 2 As shown, the main control chip of the main control circuit 20 includes a first SCK pin, a MOSI pin, a MISO pin, and multiple first CS pins. Each AFE chip includes a second SCK pin, an SDI pin, an SDO pin, and a second CS pin.

[0049] The SCK pin provides the clock signal for the SPI bus, sent by the master to each slave device. The CSN pin provides the chip select signal for the SPI bus, sent by the master to each slave device. If a slave device's chip select signal is pulled low by the master, the master only communicates with that slave device. At any given time, only one slave device's chip select signal can be pulled low by the master on the same SPI bus; all slave devices' chip select signals are pulled high by the master. The MOSI pin is used by the master to send commands, configurations, and data to the slave devices, which receive these messages through the SDI pin. The MISO pin receives data sent to the master by the slave device selected by the chip select signal via the SDO pin.

[0050] In this embodiment, the circuit corresponding to the host is the main control circuit 20 on the BMS circuit board, that is, the main control chip acts as the host of the SPI bus, and the circuit corresponding to the slave is all the AFE chip circuits, that is, each AFE chip acts as a slave of the SPI bus.

[0051] Specifically, each of the first CS pins of the main control chip is connected to the second CS pin of one of the AFE chips, and is used to send chip select signals to each of the AFE chips to poll and select one of the AFE chips for communication; the first SCK pin of the main control chip is connected to the second SCK pin of each of the AFE chips, and is used to send clock signals to each of the AFE chips; the MOSI pin of the main control chip is connected to the SDI pin of each of the AFE chips, and is used to send control signals to each of the AFE chips; the MISO pin of the main control chip is connected to the SDO pin of each of the AFE chips, and is used to receive the cell status data reported by the selected AFE chip.

[0052] The main control chip controls the status and data polling of the AFE chips, as well as the reading and writing of register parameters, by switching the chip select control signals of the SPI interfaces of different AFE chips. The SPI interface communication rate of the AFE chip can reach 1Mbps, which is much faster than the serial data communication method of the daisy-chain architecture. It can effectively save peripheral and GPIO pin resources of the main control chip while ensuring timely communication speed.

[0053] In the battery management system circuit board, the main control circuit of the low-voltage system needs to be isolated from the high-voltage circuit. Since the main control circuit is a low-voltage circuit and the AFE chip sampling circuit belongs to the high-voltage circuit, a digital isolator chip is needed to isolate the main control circuit from the high-voltage circuit such as the AFE chip sampling circuit to ensure the product's safety requirements and normal system function.

[0054] In one embodiment, such as Figure 3As shown, the circuit board also includes an isolation circuit 50, which includes multiple digital isolators. One end of each digital isolator is connected to one of the AFE chips, and the other end is connected to the main control circuit 20. The SPI interface for communication between the main control chip and the AFE chip is isolated by the digital isolator chip.

[0055] In some embodiments, the AFE chip includes a voltage sampling circuit, a current sampling circuit, a temperature sampling circuit, and a passive balancing circuit. The voltage sampling circuit is used for sampling the voltage of the battery cells, the current sampling circuit for sampling the current of the battery cells, and the temperature sampling circuit for sampling the temperature of the battery cells. The passive balancing circuit addresses situations where, when a battery module contains multiple cells, voltage differences arise between cells within the same battery pack due to variations in manufacturing processes, the absence of cells with identical screening parameters, or inconsistent internal resistance during prolonged use. The passive balancing circuit of the AFE chip eliminates voltage / capacity differences between individual cells in the battery pack by consuming the energy of the high-voltage cells, thereby improving the overall usable capacity and safety of the battery pack.

[0056] In one embodiment, such as Figure 4 As shown, the power circuit control circuit 30 includes a main power relay, a precharge relay, a precharge resistor, and a fuse. The precharge relay and the precharge resistor are connected in series to form a precharge circuit, which is then connected in parallel with the main power relay. One end of the fuse is connected to the positive terminal of the battery pack, and the other end of the fuse is connected to the main power relay.

[0057] In the power loop control circuit 30, the components are electrically connected by etching a layer of copper foil on the circuit board. Copper cladding refers to etching a whole piece of copper foil on the PCB board, which has electrical connection characteristics, can conduct current normally, increases the current-carrying cross-section, reduces line resistance and voltage drop, and significantly improves the carrying capacity of high current paths. At the same time, it has efficient heat dissipation characteristics (utilizing the high thermal conductivity of copper), which quickly diffuses local heat to the entire board surface or conducts it through vias, reducing the temperature rise of components.

[0058] For DC relays with power circuit control, the traditional daisy-chain architecture places the fuse and relay on a sheet metal bracket inside the device, and then leads the power circuit to the terminal block via wiring. The relay coil control signal is externally connected through the power control cable on the low-voltage side, which is cumbersome and costly. This application places the fuse, main power DC relay, pre-charge relay, and pre-charge resistor all on the circuit board. The electrical connection between the power circuit components is achieved through copper plating on the circuit board. During product assembly, only four terminals on the input and output sides need to be connected. The fewer installation steps reduce the probability of workers assembling the actual product. At the same time, it eliminates the need for thick power cables and terminals in the power circuit, which can significantly reduce product costs and the types of materials.

[0059] In some embodiments, such as Figure 5 As shown, the main control circuit 20 includes a main control chip circuit, a communication interface circuit and a storage chip circuit connected to the main control chip circuit. The communication interface circuit is used to provide a communication interface between the main control chip circuit and the host computer, and the storage chip circuit is used to store the received battery cell status data.

[0060] In some embodiments, the master control circuit further includes an automatic address allocation circuit, which automatically allocates a unique address to each slave device through hardware circuitry.

[0061] In some embodiments, the AFE chip responsible for sampling the lowest-end battery pack in the AFE chip sampling circuit also needs to additionally sample the battery current of the entire power circuit.

[0062] This application also provides a battery management system, including the integrated circuit board as described in the above embodiments. The beneficial effects of the battery management system are the same as those of the circuit board, and will not be repeated here.

[0063] This application also provides a battery pack, including multiple cell modules and a battery management system as described in the above embodiments. The beneficial effects of the battery pack are the same as those of the circuit board, and will not be repeated here.

[0064] This application also provides an electrical device, including a load and a battery pack as described in the above embodiments, the battery pack being used to supply power to the load.

[0065] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0066] The embodiments described above are merely illustrative of several implementation methods of this application, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the invention patent. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this patent application should be determined by the appended claims.

Claims

1. An integrated circuit board applied to a battery management system, the battery management system being used to manage a battery pack, the battery pack comprising multiple battery modules, characterized in that, The integrated circuit board includes: AFE chip sampling circuit includes multiple AFE chips, each of which is connected to a battery module. The main control circuit is connected to each of the AFE chips and is used to sequentially select one of the AFE chips for communication through a polling mechanism, control the selected AFE chip to collect the cell status data of the connected battery module, and receive the cell status data reported by the selected AFE chip. A power loop control circuit, whose input terminal is connected to the main control circuit and whose output terminal is connected to the battery pack, is used to receive control commands sent by the main control circuit to control the charging and discharging process of the battery pack. A DC-DC converter circuit is connected to the AFE chip sampling circuit, the main control circuit, and the power loop control circuit, respectively, and is used to provide a stable DC voltage for the AFE chip sampling circuit, the main control circuit, and the power loop control circuit.

2. The integrated circuit board according to claim 1, characterized in that, The main control circuit communicates with each of the AFE chips via an SPI interface. The main control circuit includes a first SCK pin, a MOSI pin, a MISO pin, and multiple first CS pins. Each of the AFE chips includes a second SCK pin, an SDI pin, an SDO pin, and a second CS pin. Each of the first CS pins of the main control circuit is connected to the second CS pin of one of the AFE chips, and is used to send chip select signals to each of the AFE chips to poll and select one of the AFE chips for communication. The first SCK pin of the main control circuit is connected to the second SCK pin of each AFE chip, and is used to send clock signals to each AFE chip. The MOSI pin of the main control circuit is connected to the SDI pin of each AFE chip, and is used to send control signals to each AFE chip. The MISO pin of the main control circuit is connected to the SDO pin of each of the AFE chips, and is used to receive the cell status data reported by the selected AFE chips.

3. The integrated circuit board according to claim 1, characterized in that, The circuit board also includes an isolation circuit, which includes multiple digital isolators. One end of each digital isolator is connected to one of the AFE chips, and the other end is connected to the main control circuit.

4. The integrated circuit board according to claim 1, characterized in that, The main control circuit includes a main control chip circuit, a communication interface circuit and a storage chip circuit connected to the main control chip circuit. The communication interface circuit is used to provide a communication interface between the main control chip circuit and the host computer, and the storage chip circuit is used to store the received battery cell status data.

5. The integrated circuit board according to claim 1, characterized in that, The power circuit control circuit includes a main power relay, a precharge relay, a precharge resistor, and a fuse. The precharge relay and the precharge resistor are connected in series to form a precharge circuit, which is then connected in parallel with the main power relay. One end of the fuse is connected to the positive terminal of the battery pack, and the other end of the fuse is connected to the main power relay.

6. The integrated circuit board according to claim 5, characterized in that, The components in the power loop control circuit are electrically connected by etching a layer of copper foil on the circuit board.

7. The integrated circuit board according to claim 1, characterized in that, The AFE chip includes a voltage sampling circuit, a current sampling circuit, a temperature sampling circuit, and a passive equalization circuit.

8. A battery management system, characterized in that, Including the integrated circuit board as described in any one of claims 1 to 7.

9. A battery pack, characterized in that, It includes multiple cell modules and the battery management system as described in claim 8.

10. An electrical device, characterized in that, It includes a load and a battery pack as claimed in claim 9, the battery pack being used to power the load.

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