An isolated resonant battery equalization topology
By using an isolated resonant battery equalization topology, and utilizing an LC resonant network and a phase-shifting full-bridge structure, the problems of high switching losses and strong electromagnetic interference in aerospace batteries under high-voltage isolation conditions are solved. This achieves efficient energy transfer and simplified control, making it suitable for multi-stage high-voltage equalization applications in spacecraft.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- CHINA UNIV OF PETROLEUM (EAST CHINA)
- Filing Date
- 2026-01-27
- Publication Date
- 2026-06-05
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Figure CN122159433A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to battery management technology in spacecraft energy storage systems within the high-end equipment manufacturing industry, and particularly to an isolated resonant battery equalization topology for spacecraft applications. Background Technology
[0002] Currently, new energy technologies have become a key development direction for improving the performance of energy systems in the aerospace field. In various spacecraft, lithium-ion batteries, as the core unit for energy storage and power supply, are widely used in the power systems of satellites, space stations, deep space probes, and manned spacecraft. However, due to factors such as the discreteness of aerospace-grade battery manufacturing processes, the gradual changes in material properties in the space environment, uneven temperature field distribution inside and outside the cabin, and the complex and variable on-orbit operating conditions, inconsistencies in parameters such as voltage, capacity, and internal resistance inevitably exist between individual battery cells. This inconsistency leads to a decrease in energy utilization during on-orbit charging and discharging of the battery pack, with some batteries experiencing overcharging or over-discharging, accelerating the overall performance degradation of the battery pack, shortening its on-orbit service life, and in severe cases, potentially causing thermal runaway and affecting spacecraft safety.
[0003] To meet the demands of high-voltage buses, high-power payloads, and long-duration missions in spacecraft, aerospace energy storage systems typically employ a multi-level architecture of "unit-module-battery compartment." While this architecture enables high-voltage and high-capacity designs, it also presents more complex challenges in on-orbit equalization management. For example, in energy storage systems on large satellite platforms or space stations, there may be high voltage differences of tens to hundreds of volts between different battery compartments. To achieve rapid energy dispatch and equalization across modules and compartments, the equalization circuit must be able to operate stably and reliably under high voltage and high isolation conditions. Simultaneously, to meet the stringent requirements of spacecraft for high efficiency, high power density, and low heat loss in energy systems, it is essential to significantly reduce the high-frequency switching losses of power devices during the equalization process. This is a core requirement for improving the overall performance of aerospace equalization systems.
[0004] Currently, battery balancing solutions used in aerospace are mainly divided into two categories: passive balancing and active balancing. Passive balancing uses resistive dissipation, which, although used in some early satellite models, suffers from low energy efficiency and a heavy thermal management burden, making it unsuitable for large-capacity advanced aerospace energy storage scenarios with multiple modules connected in series and parallel. Active balancing technology achieves energy transfer through energy storage components such as inductors, capacitors, or transformers, offering advantages in efficiency. However, traditional aerospace active balancing topologies still generally suffer from problems such as high switching stress and strong electromagnetic interference. Especially under the conditions of high voltage differential and high isolation in aerospace applications, the losses and noise problems of traditional hard-switching topologies are even more prominent, restricting further improvements in system efficiency and power density.
[0005] Furthermore, existing active balancing circuits are mostly designed for single battery modules or battery packs, and mature and reliable engineering solutions are relatively limited for high-voltage, high-power balancing applications across modules and compartments. Current technologies still face many challenges in simultaneously meeting comprehensive performance indicators such as high-voltage isolation, high efficiency, high reliability, and ease of control. Particularly for the harsh aerospace environment, constructing a balancing topology with a relatively simplified control strategy and effective reduction of switching losses is one of the key requirements in engineering applications. Although soft-switching technology provides an effective way to reduce switching losses, existing topologies still require further research and exploration in adapting to multi-level high-voltage balancing architectures in aerospace and optimizing the balance between system complexity and reliability.
[0006] Therefore, there is an urgent need to propose a new battery balancing topology that can adapt to multi-level high-voltage architectures and has efficient electrical isolation and soft-switching characteristics. While achieving low switching losses, high balancing efficiency and high-voltage safety isolation, it simplifies control logic and improves system reliability, providing a new technical approach and solution for aerospace energy storage systems to cope with complex space environments and long-term on-orbit missions. Summary of the Invention
[0007] To address the problems existing in the prior art, this invention provides an isolated resonant battery equalization topology with N energy storage units. For the nth energy storage unit, it includes: four switching transistors S n1 S n2 S n3 S n4 Four parasitic junction capacitances C Sn1 C Sn2 C Sn3 C Sn4 Resonant inductor L rn Resonant capacitor C rn Single-phase transformer T n and current-limiting resistor R n .
[0008] Furthermore, energy storage components include, but are not limited to, individual battery cells, battery modules, and battery clusters, and N energy storage components can be connected in series.
[0009] Furthermore, the switching transistor S n1 Source and switch S n3 The drains are connected to form the lead bridge arm branch, and the switching transistor S n2 Source and switch S n4 The drains are connected to form a hysteresis bridge arm circuit, and the switching transistor S... n1 Drain, switching transistor S n2 Drain and energy storage element U inn The positive terminal is connected, and the switching transistor S n3 Source, switch Sn4 Source and energy storage element U inn Negative terminals connected; parasitic junction capacitance C Sn1 C Sn2 C Sn3 C Sn4 They are connected in parallel to the switching transistor S. n1 S n2 S n3 S n4 Two ends; resonant inductor L rn One end is connected to the switching transistor S n1 Source, switch S n3 The drain is connected to the other end, and the resonant capacitor C is connected to the other end. rn One end, resonant capacitor C rn The other end is connected to the same terminal of the primary winding of the transformer.
[0010] Furthermore, the number of turns on the primary side of each transformer is denoted by n1, and the number of turns on the secondary side is denoted by n2. Therefore, the turns ratio of the transformer is n1:n2. In this topology, the turns ratio of the transformer is 1:1. The secondary and primary sides have the same polarity. The same-name terminal of the primary side of the transformer is connected to one end of the resonant capacitor, and the opposite-name terminal of the primary side of the transformer is connected to the switching transistor S. n4 Drain and switching transistor S n2 The source terminal is connected to the current-limiting resistor at the same-name terminal of the transformer secondary side, and the opposite-name terminal of the transformer secondary side is grounded.
[0011] Furthermore, the control method for the switching transistors in the full-bridge unit, the switching transistor S... n1 With the switching transistor S n3 Alternating conduction, switching transistor S n3 Compared to the switching transistor S n1 There is a 180° lag in conduction, and a dead zone exists between the conduction of the two sets of switching transistors; switching transistor S n2 With the switching transistor S n4 Alternating conduction, switching transistor S n4 Compared to the switching transistor S n2 There is a 180° lag in conduction, and a dead zone exists between the conduction of the two sets of switching transistors; switching transistor S n4 Lag switch S n1 At a certain phase, the switching transistor S is turned on. n2 Lag switch S n3 They conduct in the same phase; the switching frequencies of the four sets of switching transistors are the same.
[0012] Compared with the prior art, the present invention has the following beneficial effects: Compared to traditional active balancing topologies, this invention introduces a phase-shifted full-bridge structure with a resonant network. Utilizing LC resonance, it creates a sinusoidal or quasi-sinusoidal current waveform, providing a natural zero-voltage condition for the primary-side switch during energy transfer. This transforms the hard-switching behavior of the switch into full-range soft-switching, effectively reducing voltage-current overlap losses during switching. This provides a crucial circuit foundation for achieving high-efficiency, high-power-density balancing. Energy circulates naturally and smoothly within the resonant cavity and transformer, significantly reducing switching and conduction losses, effectively achieving high-efficiency balancing at the system level.
[0013] The phase-shifted full-bridge structure uses alternately conducting switching transistors to control the energy storage element. U inn Voltage signal conversion amplitude is ± U inn The bipolar square wave is isolated to the secondary side by a transformer. In a multi-transformer structure, the secondary sides of the transformers can be connected in parallel to form a multi-source circuit. In equalization mode, there is no need for voltage monitoring and comparison; energy can autonomously transfer from the high-voltage side to the low-voltage side, achieving multi-path voltage equalization and simplifying control. Simultaneously, the multi-transformer structure provides reliable electrical isolation, meeting the equalization requirements under high frequency and high voltage conditions, and can be used for equalization between battery modules or clusters in large-scale energy storage. Attached Figure Description
[0014] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0015] Figure 1 This is a schematic diagram of an isolated resonant battery equalization topology provided in Embodiment 1 of this disclosure; Figure 2 This is a schematic diagram of the switch control signal for a phase-shifting full-bridge unit of an isolated resonant battery equalization topology provided in Embodiment 2 of this disclosure; Figure 3 This is a schematic diagram of key waveforms of an isolated resonant battery equalization topology operating in active equalization mode, as provided in Embodiment 3 of this disclosure. Figure 4 This is a schematic diagram of the main operating modes of an isolated resonant battery equalization topology provided in Embodiment 4 of this disclosure, operating in active equalization mode under one switching cycle. Figure 5 This is a schematic diagram illustrating the balancing effect of an isolated resonant battery balancing topology provided in Embodiment 5 of this disclosure. Detailed Implementation
[0016] Embodiments of the present invention will now be described in more detail with reference to the accompanying drawings. While some embodiments of the invention are shown in the drawings, it should be understood that the invention can be implemented in various forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided to provide a more thorough and complete understanding of the invention. It should be understood that the accompanying drawings and embodiments are for illustrative purposes only and are not intended to limit the scope of protection of the invention.
[0017] The technical solution of the present invention will be described in detail below with reference to specific embodiments. These specific embodiments can be combined with each other, and the same or similar concepts or processes may not be described again in some embodiments.
[0018] refer to Figure 1 The first embodiment of this disclosure provides a schematic diagram of the topology of an isolated resonant battery equalization topology, including: N energy storage units, and for the nth energy storage unit, including: an energy storage element. U inn Four switching transistors S n1 S n2 S n3 S n4 Four parasitic junction capacitances C Sn1 C Sn2 C Sn3 C Sn4 Resonant inductor L rn Resonant capacitor C rn Single-phase transformer T n and current-limiting resistor R n .
[0019] The energy storage components include, but are not limited to, individual battery cells, battery modules, and battery clusters. N energy storage components can be connected in series.
[0020] Furthermore, the switching transistor S n1 Source and switch S n3 The drains are connected to form the lead bridge arm branch, and the switching transistor S n2 Source and switch S n4 The drains are connected to form a hysteresis bridge arm circuit, and the switching transistor S... n1 Drain, switching transistor S n2 Drain and energy storage element U inn The positive terminal is connected, and the switching transistor S n3 Source, switch S n4 Source and energy storage element U inn Negative terminals connected; parasitic junction capacitance C Sn1 C Sn2 CSn3 C Sn4 They are connected in parallel to the switching transistor S. n1 S n2 S n3 S n4 Two ends; resonant inductor L rn One end is connected to the switching transistor S n1 Source, switch S n3 The drain is connected to the other end, and the resonant capacitor C is connected to the other end. rn One end, resonant capacitor C rn The other end is connected to the same terminal of the primary winding of the transformer.
[0021] Furthermore, the number of turns on the primary side of each transformer is denoted by n1, and the number of turns on the secondary side is denoted by n2. Therefore, the turns ratio of the transformer is n1:n2. In this topology, the turns ratio of the transformer is 1:1. The secondary and primary sides have the same polarity. The same-name terminal of the primary side of the transformer is connected to one end of the resonant capacitor, and the opposite-name terminal of the primary side of the transformer is connected to the switching transistor S. n4 Drain and switching transistor S n2 The source terminal is connected to the current-limiting resistor at the same-name terminal of the transformer secondary side, and the opposite-name terminal of the transformer secondary side is grounded.
[0022] Furthermore, the control method for the switching transistors in the full-bridge unit, the switching transistor S... n1 With the switching transistor S n3 Alternating conduction, switching transistor S n3 Compared to the switching transistor S n1 There is a 180° lag in conduction, and a dead zone exists between the conduction of the two sets of switching transistors; switching transistor S n2 With the switching transistor S n4 Alternating conduction, switching transistor S n4 Compared to the switching transistor S n2 There is a 180° lag in conduction, and a dead zone exists between the conduction of the two sets of switching transistors; switching transistor S n4 Lag switch S n1 At a certain phase, the switching transistor S is turned on. n2 Lag switch S n3 They conduct in the same phase; the switching frequencies of the four sets of switching transistors are the same.
[0023] refer to Figure 2 The second embodiment of this disclosure provides a schematic diagram of the switch drive control signal for a phase-shifted full-bridge unit of an isolated resonant battery equalization topology, including: switch S n1 The drive control signal PWM1 signal, the switching transistor S n2 The drive control signal PWM2 signal, the switching transistor S n3 The drive control signal PWM3 and the switching transistor S n4The drive control signal PWM4 is a four-group PWM drive control signal with the same frequency. The phase of the PWM3 signal lags behind the PWM1 signal by 180 degrees, and there is a dead zone between the two groups of signals. The phase of the PWM4 signal lags behind the PWM2 signal by 180 degrees, and there is a dead zone between the two groups of signals. The PWM1 signal is phase-shifted by δ angle to obtain the PWM4 signal, and the PWM3 signal is phase-shifted by δ angle to obtain the PWM2 signal. The phase-shift angle δ is adjustable.
[0024] During the balancing process, in order to ensure that the switching transistors in the lagging bridge arm can achieve soft switching, the dead time between the PWM4 signal and the PWM2 signal should be set to be equal to or less than the dead time between the PWM1 signal and the PWM3 signal.
[0025] refer to Figure 3 The key waveform diagram of an isolated resonant battery equalization topology operating in active equalization mode, provided in Embodiment 3 of this disclosure, includes a switching transistor S. n1 Voltage stress at both ends v S1 Waveform, switching transistor S n2 Voltage stress at both ends v S2 Waveform, switching transistor S n3 Voltage stress at both ends v S3 Waveform, switching transistor S n4 Voltage stress at both ends v S4 Waveform, switching transistor S n1 Current waveform in i S1 Switch S n2 Current waveform in i S2 Switch S n3 Current waveform in i S3 Switch S n4 Current waveform in i S4 Transformer primary current waveform i p Resonant capacitor C rn Voltage waveform at both ends v Cr Voltage waveform between the midpoint of the leading arm and the midpoint of the lagging arm v AB .
[0026] refer to Figure 4 The main operating modes of an isolated resonant battery equalization topology operating in active equalization mode for one switching cycle, as provided in Embodiment 4 of this disclosure; To achieve zero-voltage switching of the switching transistors, this topology, based on the LC series resonant structure, uses four sets of PWM signals with phase shift angles to control the switching transistors in the full-bridge structure. Depending on the switching state, the operating path and mode of the equalization circuit differ. The current in the transformer secondary circuit always flows from the high-voltage end to the low-voltage end. Assuming the first energy storage unit is the highest-voltage unit, the operating mode of the entire equalization topology is analyzed. The primary winding operating paths of the N energy storage units are identical, and the secondary current always flows from the highest-voltage first equalization unit to the remaining equalization units. The modal analysis process for one switching cycle is shown below, including: Mode 1[ t 0, t 1]: t At time 0, the switching transistor S n3 Turn off, switch S n2 The transformer is in the conducting state. Assume the primary current of the transformer is currently... i pn The direction is negative, and the primary current of the transformer is negative. i pn From the switching transistor S n3 The transfer to the parasitic junction capacitance C Sn1 and C Sn3 In the branch, the parasitic junction capacitance C is given. Sn3 Charging, while simultaneously supplying the parasitic junction capacitance C Sn1 Discharge, therefore t Switch S at time 0 n3 The voltage across the terminals will not rise suddenly, but will remain equal to the parasitic capacitance C. Sn3 The voltage across the two ends, t 0 to t The switching transistor S gradually increases from zero over a time period of 1 hour. n3 Zero-voltage shutdown.
[0027] Meanwhile, during this period, the switching transistor S n1 The voltage across the terminals is equal to the parasitic junction capacitance C. Sn1 Voltage across terminals, from + U inn The voltage gradually decreases until it reaches 0, at which point the voltage between points A and B equals the parasitic junction capacitance C. Sn1 The voltage across the terminals changes with the parasitic junction capacitance C. Sn1 Discharge, the voltage across its terminals ranges from - U inn The linear transformation becomes 0. t At time 1, the parasitic junction capacitance C Sn1 When the voltage across the two terminals drops to zero, the switching transistor S... n1 Once the conduction signal is received, switching mode 1 ends.
[0028] Mode 2[ t 1,t 2]: t At time 1, the parasitic junction capacitance C Sn1 When the voltage across the two terminals drops to zero, the switching transistor S... n1 A conduction signal is received. However, at this time, the switching transistor S... n1 No current flows through the resonant inductor L. rn To prevent a sudden change in the direction of the primary current, the switching transistor S... n1 The anti-parallel diode in the circuit conducts naturally. Switch S... n1 Open t At time 1, the parasitic junction capacitance C Sn1 The voltage across the two terminals has dropped to zero, meaning the switching transistor S... n1 Before switching on, the voltage across the two terminals is zero, thus realizing the switching of transistor S. n1 Zero-voltage turn-on. In this mode, the primary-side current is generated by the resonant inductor and flows sequentially through the switching transistor S. n1 The anti-parallel diode and the switching transistor S in the middle n2 The transformer primary winding and the resonant capacitor mean that the voltage between points A and B is always 0.
[0029] Mode 3[ t 2, t3]: t At time 2, the switching transistor S n2 Turn off, transformer primary current i pn From the switching transistor S n2 The transfer to the parasitic junction capacitance C Sn2 and parasitic junction capacitance C Sn4 In the branch, the parasitic junction capacitance C is given. Sn2 Charging, while simultaneously supplying the parasitic junction capacitance C Sn4 Discharge. Therefore t At time 2, the switching transistor S n2 The voltage across the terminals is equal to the parasitic junction capacitance C. Sn2 The voltage across the two ends, t 2 to t The number of cells increases linearly from zero within a 3-period time period. U inn Similarly to mode 1, the switching transistor S is implemented. n2 Zero voltage shutdown.
[0030] Within this mode, the voltages at points A and B are equal to the input voltage minus the parasitic junction capacitance C. Sn4 The voltage across the terminals slowly increases from 0 to + U inn Meanwhile, the primary winding of the transformer and the resonant capacitor C... rn Resonant inductor L rn Switch S n1 Anti-parallel diodes and energy storage components U innand parasitic junction capacitance C Sn4 A circuit is formed, feeding back the energy coupled from the secondary side of the transformer to the primary side to the energy storage element. t At time 3, the parasitic junction capacitance C Sn2 The voltage across the terminals rises to U inn Parasitic junction capacitance C Sn4 When the voltage across the terminals drops to 0, the switching transistor S... n4 Once the conduction signal is received, switching mode 3 ends.
[0031] Mode 4[ t 3, t 4]: t At time 3, the parasitic junction capacitance C Sn4 The voltage across the terminals drops to zero. At this time, the switching transistor S... n4 Although a conduction signal is obtained, no current flows through the resonant inductor L. rn To prevent a sudden change in the direction of the original variable current, the switching transistor S... n4 The anti-parallel diode in the transformer naturally conducts, and after the secondary side of the transformer is balanced, the energy coupled to the primary side is fed back to the energy storage component. U inn Similarly to mode 2, the switching transistor S... n4 Open t At time 3, the parasitic junction capacitance C Sn4 The voltage across the terminals has dropped to zero, and the switching transistor S... n4 The anti-parallel diode in the circuit conducts naturally, i.e., the switching transistor S... n4 Before switching on, the voltage across the two terminals is zero, thus realizing the switching of transistor S. n4 Zero-voltage turn-on. In this mode, the voltage between points A and B approximates the voltage of the energy storage element, with a magnitude of... U inn .
[0032] Mode 5[ t 4, t 5]: In t At time 4, the energy feedback from the primary side of the transformer to the energy storage element ends, and the primary side current... i pn The magnitude changes from negative to zero, and the direction of the primary current changes to positive. At this time, the switching transistor S... n1 and switching transistor S n4 Primary current i pn Provides a pathway to transmit the energy signal from the energy storage element to the transformer, and the transformer primary current i pn From the positive electrode of the energy storage element through the switching transistor S n1 Resonant inductor L rn Resonant capacitor C rnTransformer primary winding and switching transistor S n4 Finally, it returns to the negative electrode of the energy storage element.
[0033] Modal 6[ t 5, t 6]: t At time 5, the switching transistor S n1 Turn off, transformer primary current i pn From the switching transistor S n1 The transfer to the parasitic junction capacitance C Sn1 and parasitic junction capacitance C Sn3 In the branch, the parasitic junction capacitance C is given. Sn1 Charging, while simultaneously supplying the parasitic junction capacitance C Sn3 Discharge, similar to mode 1, switching transistor S n1 The voltage across the terminals rises slowly and linearly from 0 to + during this period. U inn To realize the switching transistor S n1 Zero-voltage turn-off. In this mode, the voltage between points A and B is the input voltage minus the parasitic junction capacitance C. Sn1 Voltage across the terminals, i.e., from + U inn It decreases linearly to 0. t At time 6, the parasitic junction capacitance C Sn1 The voltage across the terminals rises to + U inn Parasitic junction capacitance C Sn3 When the voltage across the terminals drops to 0, the switching transistor S... n3 Once the conduction signal is received, switching mode 6 ends.
[0034] Modal 7[ t 6, t 7]: t At time 6, the parasitic junction capacitance C Sn3 The voltage across the two terminals drops to zero, and simultaneously the switching transistor S... n3 A conduction signal is received. However, at this time, the switching transistor S... n3 No current flows through the resonant inductor L. rn To prevent sudden changes in current direction, the switching transistor S... n3 The anti-parallel diode in the circuit conducts naturally. Similarly, in mode 2, the switching transistor S... n3 Open t At time 6, i.e., the switching transistor S n3 Before switching on, the voltage across the two terminals is zero, thus realizing the switching of transistor S. n3 Zero-voltage turn-on. In this mode, since the resonant inductor is only responsible for freewheeling and the energy storage element is not in the circuit, the voltage between points A and B is always 0.
[0035] Modal 8[ t7, t 8]: t 7-time switching transistor S n4 Turn off, transformer primary current i pn From the switching transistor S n4 The transfer to the parasitic junction capacitance C Sn2 and parasitic junction capacitance C Sn4 In the branch, the parasitic junction capacitance C is given. Sn4 Charging, while simultaneously supplying the parasitic junction capacitance C Sn2 Discharge, similar to mode 1, realizes the switching of transistor S. n4 Zero-voltage turn-off. In this mode, the voltage between points A and B is the input voltage minus the parasitic junction capacitance C. Sn2 The voltage across the terminals increases linearly from 0 to - U inn .exist t At time 8, the parasitic junction capacitance C Sn4 The voltage across the terminals rises to + U inn Parasitic junction capacitance C Sn2 When the voltage across the terminals drops to 0, switching mode 8 ends.
[0036] Modal 9[ t 8, t 9]: t At time 8, the switching transistor S n2 Although a conduction signal is obtained, no current flows through the resonant inductor L. rn Under the action of the switching transistor S n2 The anti-parallel diodes in the circuit naturally conduct, feeding the transformer energy back to the energy storage element. U inn Similarly to mode 2, the switching transistor S... n2 Before switching on, the voltage across the two terminals is zero, thus realizing the switching of transistor S. n2 Zero-voltage turn-on. In this mode, the voltage between points A and B is opposite to the voltage of the energy storage element, and is - U inn .
[0037] Modal 10[ t 9, t 10 ]:exist t At time 9, the energy feedback from the primary side of the transformer to the energy storage element ends, and the primary side current... i pn When the current crosses zero from a positive value, the direction of the primary current changes to negative. At this time, the switching transistor S... n2 and switching transistor S n3 for i pn Provides a path for the transformer primary current. ipn From the positive electrode of the energy storage element through the switching transistor S n2 Transformer primary winding, resonant capacitor C rn Resonant inductor L rn and the switching transistor S n4 Finally, the energy returns to the negative terminal of the energy storage element, transferring the energy from the energy storage element to the primary side of the transformer. The primary side signal is then isolated to the secondary side of the transformer through the transformer. The multiple secondary sides of the transformer are equivalent to a multi-source equivalent circuit, achieving energy balancing.
[0038] refer to Figure 5 The present disclosure provides a schematic diagram of the balancing effect of an isolated resonant battery balancing topology operating in active balancing mode, according to Embodiment 5. In this example, an isolated resonant battery equalization topology uses a phase-shifted full-bridge structure to transmit the voltage signal of the energy storage element. U inn The conversion amplitude is ± U inn The bipolar square wave and LC resonant structure create a sinusoidal or quasi-sinusoidal current waveform, which creates a natural zero-voltage condition for the primary-side switch during the energy transfer process, transforming the hard switching behavior of the switch into a full-range soft switching, effectively reducing energy loss during the switching process. The square wave signal is isolated to the secondary side through a transformer. Based on the multi-transformer structure, the secondary voltage of the transformer can be equivalent to a multi-source circuit, and energy can be autonomously transferred from the high-voltage side to the low-voltage side to achieve energy balance through active charging and discharging. The balanced energy is then fed back to the energy storage element through the transformer to achieve voltage balance between individual energy storage elements or modules.
Claims
1. An isolated resonant battery equalization topology, having N energy storage units, wherein for the nth energy storage unit, the following is characterized: include: Energy storage components U inn Four switching transistors S n1 S n2 S n3 S n4 Four parasitic junction capacitances C Sn1 C Sn2 C Sn3 C Sn4 Resonant inductor L rn Resonant capacitor C rn Single-phase transformer T n and current-limiting resistor R n .
2. The isolated resonant battery equalization topology according to claim 1, characterized in that, The energy storage elements include, but are not limited to, individual battery cells, battery modules, and battery clusters, and N energy storage elements can be connected in series.
3. The isolated resonant battery equalization topology according to claim 1, characterized in that, In the transformer, the number of turns on the primary side is denoted by n1, and the number of turns on the secondary side is denoted by n2. Therefore, the turns ratio of the transformer is n1:n2. In this topology, the turns ratio of the transformer is 1:
1. The secondary and primary sides have the same polarity. The primary side terminals with the same polarity are connected to one end of a resonant capacitor, and the primary side terminals with different polarities are connected to the switching transistor S. n4 Drain and switching transistor S n2 The source terminal is connected to the current-limiting resistor at the same-name terminal of the transformer secondary side, and the opposite-name terminal of the transformer secondary side is grounded.
4. The isolated resonant battery equalization topology according to claim 1, characterized in that, Switch S n1 Source and switch S n3 The drains are connected to form the lead bridge arm branch, and the switching transistor S n2 Source and switch S n4 The drains are connected to form a hysteresis bridge arm circuit, and the switching transistor S... n1 Drain, switching transistor S n2 Drain and energy storage element U inn The positive terminal is connected, and the switching transistor S n3 Source, switch S n4 Source and energy storage element U inn Negative terminals connected; parasitic junction capacitance C Sn1 C Sn2 C Sn3 C Sn4 They are connected in parallel to the switching transistor S. n1 S n2 S n3 S n4 Two ends; resonant inductor L rn One end is connected to the switching transistor S n1 Source, switch S n3 The drain is connected to the other end, and the resonant capacitor C is connected to the other end. rn One end, resonant capacitor C rn The other end is connected to the same terminal of the primary winding of the transformer.
5. The isolated resonant battery equalization topology according to claim 1, characterized in that... The control method for the switching transistor in the full-bridge unit, the switching transistor S n1 With the switching transistor S n3 Alternating conduction, switching transistor S n3 Compared to the switching transistor S n1 There is a 180° hysteresis during conduction, and a dead zone exists between the conduction states of the switching transistors; Switch S n2 With the switching transistor S n4 Alternating conduction, switching transistor S n4 Compared to the switching transistor S n2 There is a 180° lag in conduction, and a dead zone exists between the conduction of the two sets of switching transistors; switching transistor S n4 Lag switch S n1 At a certain phase, the switching transistor S is turned on. n2 Lag switch S n3 They conduct in the same phase; the switching frequencies of the four sets of switching transistors are the same.