Power conversion system and method thereof

Abstract

The power conversion method includes detecting an output current signal of a power conversion circuit; generating a current adjustment signal according to the output current signal; generating a plurality of control signals according to the current adjustment signal; and outputting a burst signal group to a corresponding power circuit according to one of the control signals to control a plurality of power switches of the power circuit. The burst signal group includes a plurality of burst signals. Each of the burst signals includes a plurality of burst intervals, and has a burst interval between two adjacent burst intervals. The power circuit operates in an active mode in each of the burst intervals and operates in an inactive mode in each of the burst intervals.

Description

Technical Field

[0001] This disclosure relates to power application technology, and more particularly to a power conversion system and method thereof. Background Technology

[0002] Renewable energy systems are gaining popularity, converting renewable energy (such as solar or wind power) into AC power before connecting it to the mains electricity grid. These systems are typically used for high-power conversion, such as megawatt-level or higher. Therefore, they generally have multiple power units to achieve high-power conversion. However, due to the large number of power units and their continuous operation at high frequencies (such as the rated switching frequency), switching losses are easily incurred, reducing the conversion efficiency of the renewable energy system. Summary of the Invention

[0003] In view of the above, this disclosure provides a power conversion system and method thereof. The power conversion system includes a power conversion circuit, a current detection circuit, a current adjustment circuit, a control circuit, and multiple signal generation circuits. The power conversion circuit includes multiple power circuits connected in series. Each power circuit includes multiple power switches. The current detection circuit is coupled to the power conversion circuit and detects the output current signal of the power conversion circuit. The current adjustment circuit is coupled to the current detection circuit and generates a current adjustment signal based on the output current signal. The control circuit is coupled to the current adjustment circuit and generates multiple control signals based on the current adjustment signal. Each signal generation circuit is coupled between the control circuit and one of the power circuits to output a cluster signal group to the corresponding power circuit according to one of the control signals to control its power switches. The cluster signal group includes multiple cluster signals. Each cluster signal includes multiple cluster intervals, and there is a cluster interval between two adjacent cluster intervals. Each power circuit operates in an operating mode in each cluster interval and in a rest mode in each cluster interval.

[0004] The power conversion method includes detecting the output current signal of a power conversion circuit; generating a current adjustment signal based on the output current signal; generating multiple control signals based on the current adjustment signal; and outputting a cluster signal group to a corresponding power circuit based on one of the control signals to control its multiple power switches. The cluster signal group includes multiple cluster signals. Each cluster signal includes multiple cluster intervals, and there is a cluster interval between two adjacent cluster intervals. The power circuit operates in an operating mode in each cluster interval and in a rest mode in each cluster interval.

[0005] In summary, according to the embodiments of this disclosure, by having each power circuit operate in a working mode in each power cluster interval and in a rest mode in each power cluster interval (that is, each power circuit operates in a working mode and a rest mode alternately), the switching losses of each power switch in each power circuit can be reduced, thereby improving the overall conversion efficiency of the power conversion system. Attached Figure Description

[0006] Figure 1 A block diagram of a power conversion system according to an embodiment of the present disclosure is shown.

[0007] Figure 2 A detailed circuit diagram of a single power circuit according to an embodiment of the present disclosure is shown.

[0008] Figure 3 A flowchart of a power conversion method according to an embodiment of the present disclosure is shown.

[0009] Figure 4 A detailed schematic diagram of a signal generation circuit according to an embodiment of the present disclosure is shown.

[0010] Figure 5 A schematic diagram of a clustered signal according to an embodiment of the present disclosure is shown.

[0011] Figure 6 A schematic diagram of the first to fourth cluster signals, current adjustment signal, and first control signal of the first cluster signal group according to an embodiment of the present disclosure is shown.

[0012] Figure 7 A schematic diagram is shown of the fifth to eighth cluster signals, the current adjustment signal, and the second control signal of the second cluster signal group according to the first embodiment of the present disclosure.

[0013] Figure 8 A schematic diagram is shown of the ninth to twelfth cluster signals, the current adjustment signal, and the third control signal of the third cluster signal group according to the first embodiment of the present disclosure.

[0014] Figure 9 A schematic diagram of the thirteenth to sixteenth cluster signals, current adjustment signal, and fourth control signal of the fourth cluster signal group according to the first embodiment of the present disclosure is shown.

[0015] Figure 10 A schematic diagram is shown of a cluster signal in a first cluster signal group, a cluster signal in a second cluster signal group, a cluster signal in a third cluster signal group, a cluster signal in a fourth cluster signal group, and a current adjustment signal according to a second embodiment of the present disclosure.

[0016] Explanation of reference numerals in the attached figures:

[0017] 10. Power conversion system

[0018] 20. Power conversion circuit

[0019] 22A, First Power Circuit

[0020] 22B, Second Power Circuit

[0021] 22C, Third Power Circuit

[0022] 22D, Fourth Power Circuit

[0023] 3. Current detection circuit

[0024] 40. Current adjustment circuit

[0025] 50. Control circuit

[0026] 60A, First Signal Generation Circuit

[0027] 60B, Second Signal Generation Circuit

[0028] 60C, Third Signal Generation Circuit

[0029] 60D, Fourth Signal Generation Circuit

[0030] I o Output current signal

[0031] I a Current adjustment signal

[0032] I c1 First control signal

[0033] I c2 Second control signal

[0034] I c3 Third control signal

[0035] I c4 Fourth control signal

[0036] BSG1, First Cluster Signal Group

[0037] BS1, First Cluster Signal

[0038] BS2, Second Cluster Signal

[0039] BS3, Third Cluster Signal

[0040] BS4, Fourth Cluster Signal

[0041] BSG2, Second Cluster Signal Group

[0042] BS5, Fifth Cluster Signal

[0043] BS6, Sixth Cluster Signal

[0044] BS7, Seventh Cluster Signal

[0045] BS8, Eighth Cluster Signal

[0046] BSG3, Third Cluster Signal Group

[0047] BS9, Ninth Cluster Signal

[0048] BS 10 The tenth cluster of signals

[0049] BS 11 Eleventh cluster of signals

[0050] BS 12 The twelfth cluster of signals

[0051] BSG4, Fourth Cluster Signal Group

[0052] BS 13 The thirteenth cluster of signals

[0053] BS 14 The fourteenth cluster of signals

[0054] BS 15 The fifteenth cluster of signals

[0055] BS 16 The sixteenth cluster of signals

[0056] IP address, input source

[0057] OP, Output Source

[0058] C. Capacitor

[0059] Q1, First power switch

[0060] Q2, Second Power Switch

[0061] Q3, Third Power Switch

[0062] Q4, Fourth Power Switch

[0063] A. Node

[0064] B. Node

[0065] BSW1, First Cluster Interval

[0066] BSW2, Second Cluster Interval

[0067] BSI1, First Cluster Interval

[0068] P, pulse wave

[0069] WA, waveform

[0070] WB, waveform

[0071] BSW, clustering zone

[0072] BSI, cluster interval

[0073] ISW, Control Zone

[0074] ISI, Control Interval

[0075] S301~S307, Steps Detailed Implementation

[0076] Reference Figure 1 and Figure 2 . Figure 1 A block diagram of a power conversion system 10 according to an embodiment of the present disclosure is shown. Figure 2 A detailed circuit diagram of a single power circuit according to an embodiment of the present disclosure is shown. The power conversion system 10 includes a power conversion circuit 20, a current detection circuit 30, a current adjustment circuit 40, a control circuit 50, and multiple signal generation circuits. The current detection circuit 30 is coupled to the power conversion circuit 20. The current adjustment circuit 40 is coupled to the current detection circuit 30. The control circuit 50 is coupled to the current adjustment circuit 40. The current detection circuit 30 is, for example, a circuit for detecting current formed by passive components such as resistors, capacitors, and inductors and / or active components such as transistors. The current adjustment circuit 40 is, for example, an application-specific integrated circuit (ASIC). The control circuit 50 is, for example, a microprocessor. In some embodiments, the current adjustment circuit 40 and the control circuit 50 can be integrated into a single arithmetic circuit, such as a single-chip microcomputer or a field-programmable gate array (FPGA) device.

[0077] like Figure 1 As shown, the power conversion circuit 20 includes multiple power circuits connected in series to convert the input source IP (such as...) Figure 2 (As shown) is converted into an output source OP. The input source IP is, for example, a DC power supply, which can be obtained from renewable energy. The output source OP is, for example, an AC power supply. Figure 1This illustration depicts four signal generation circuits (e.g., first signal generation circuit 60A, second signal generation circuit 60B, third signal generation circuit 60C, and fourth signal generation circuit 60D) and four power circuits (e.g., first power circuit 22A, second power circuit 22B, third power circuit 22C, and fourth power circuit 22D), but this disclosure is not limited thereto. The number of signal generation circuits and power circuits can be adjusted and matched according to user needs. Each signal generation circuit is coupled between the control circuit 50 and one of these power circuits. For example, the first signal generation circuit 60A is coupled between the control circuit 50 and the first power circuit 22A, the second signal generation circuit 60B is coupled between the control circuit 50 and the second power circuit 22B, and so on.

[0078] like Figure 2 As shown, each power circuit includes multiple power switches and a capacitor C. In some embodiments, each power circuit is a bridge circuit. Figure 2 Four power switches (e.g., first power switch Q1, second power switch Q2, third power switch Q3, and fourth power switch Q4) are illustrated here, but this disclosure is not limited to this, and the number of power switches can be adjusted according to the user's needs. The following description uses four power switches as an example to illustrate a bridge circuit. The first power switch Q1 is connected in series with the second power switch Q2 to form a first serial circuit, and the third power switch Q3 is connected in series with the fourth power switch Q4 to form a second serial circuit. The first serial circuit, the second serial circuit, the capacitor C, and the input source IP are connected in parallel. Node A between the first power switch Q1 and the second power switch Q2, and node B between the third power switch Q3 and the fourth power switch Q4, form the output side of the power circuit. Thus, the power circuit forms a bridge circuit. Furthermore, the output sides of each power switch are connected in series to generate an output source OP (e.g., ...). Figure 1 (As shown). Specifically, node A between the first power switch Q1 and the second power switch Q2 is one output terminal of the power circuit, and node B between the third power switch Q3 and the fourth power switch Q4 is the other output terminal of the power circuit. One of the two output terminals of a power switch is coupled to one of the two output terminals of another power switch, thus forming a series connection on the output sides of each power circuit.

[0079] Reference Figure 1 and Figure 3 . Figure 3 A flowchart of a power conversion method according to an embodiment of the present disclosure is shown. The power conversion system 10 is adapted to perform the power conversion method of the present disclosure. First, the current detection circuit 30 detects the output current signal I of the power conversion circuit 20. o (Step S301). Output current signal I oThis is the current signal from the output source OP. Next, the current adjustment circuit 40 adjusts the current signal I according to the output current signal I. o Generate current adjustment signal I a (Step S303). Next, the control circuit 50 adjusts the current signal I according to the current adjustment signal. a Multiple control signals are generated (step S305). Figure 1 Four control signals are illustrated here (e.g., the first control signal I). c1 Second control signal I c2 Third control signal I c3 and the fourth control signal I c4 However, this disclosure is not limited thereto. The number of control signals can be adjusted according to user needs and corresponds to the number of signal generation circuits and power circuits. These control signals (I... c1 ~I c4 A one-to-one correspondence is provided to a signal generation circuit (60A~60D).

[0080] Next, each signal generation circuit outputs a cluster signal group (e.g., first cluster signal group BSG1, second cluster signal group BSG2, third cluster signal group BSG3, or fourth cluster signal group BSG4) to the corresponding power circuit according to one of these control signals (i.e., the acquired control signal) to control these power switches (step S307). For example, as Figure 1 As shown, the first signal generation circuit 60A generates signals according to the first control signal I. c1 The first cluster signal group BSG1 is output to the first power circuit 22A to control its power switches (such as...). Figure 2 The first power switches Q1 to the fourth power switches Q4 are shown; the second signal generation circuit 60B generates signals according to the second control signal I. c2 The second cluster signal group BSG2 is output to the second power circuit 22B to control these power switches (such as...). Figure 2 The first power switch Q1 to the fourth power switch Q4 are shown, and so on.

[0081] Reference Figure 4 A detailed schematic diagram of a signal generation circuit according to an embodiment of the present disclosure is shown. Each cluster signal group includes multiple cluster signals (e.g., first cluster signal BS1 to fourth cluster signal BS4, fifth cluster signal BS5 to eighth cluster signal BS8, ninth cluster signal BS9 to twelfth cluster signal BS8). 12 Or the thirteenth cluster of signals BS 13 Signal BS was issued at the sixteenth cluster. 16), to control these power switches in the corresponding power circuits respectively. For example, the first cluster signal group BSG1 includes the first cluster signal BS1 to the fourth cluster signal BS4, to control these power switches in the first power circuit 22A respectively (such as Figure 2 The first power switches Q1 to the fourth power switches Q4 are shown; the second cluster signal group BSG2 includes the fifth cluster signal BS5 to the eighth cluster signal BS8 to control these power switches in the second power circuit 22B respectively (e.g., the first power switch Q1 to the fourth power switch Q4). Figure 2 The first power switch Q1 to the fourth power switch Q4 are shown, and so on. Figure 4 This illustration shows that each cluster signal group includes four cluster signals, but this disclosure is not limited to this. The number of cluster signals included in each cluster signal group can be adjusted according to the user's needs and corresponds to the number of power switches in its corresponding power circuit.

[0082] Reference Figure 5 This diagram illustrates a cluster signal according to an embodiment of the present disclosure. Waveform WA represents one embodiment of the cluster signal, and waveform WB represents another embodiment. Each cluster signal includes multiple cluster intervals, and a cluster interval (e.g., a first cluster interval BSI1) exists between two adjacent cluster intervals (e.g., between a first cluster interval BSW1 and a second cluster interval BSW2). In some embodiments, each cluster interval includes multiple pulses P, and each cluster interval does not contain pulses P. That is, a cluster interval refers to the time period (also called a phase interval) in the cluster signal that contains pulses P (specifically, continuous pulses P), i.e., during the cluster interval, the cluster signal is a pulse width modulation signal; while a cluster interval refers to the time period (also called a phase interval) in the cluster signal that does not contain pulses P, i.e., during the cluster interval, the cluster signal is a level signal (e.g., as shown in the diagram). Figure 5 The waveform WA represents the low-level signal, or the waveform WB represents the high-level signal.

[0083] Each power circuit operates in a working mode during the swarm interval and in a rest mode during the swarm interval. Specifically, these power switches in each power circuit (such as...) Figure 2The first power switches (Q1 to Q4) shown are controlled by corresponding cluster signals and repeatedly switch between on and off states at a rated switching frequency within the cluster interval, thereby operating the power circuit in the operating mode. These power switches in each power circuit are controlled by corresponding cluster signals and remain in the on or off state within the cluster interval, thereby operating the power circuit in the rest mode. In other words, compared to the rest mode, the operating mode causes the power circuit to operate at a high frequency; compared to the operating mode, the rest mode causes the power circuit to operate at a low frequency. In some embodiments, the power switch controlled by the cluster signal is off when the cluster signal is at a low level and on when the cluster signal is at a high level; however, this disclosure is not limited to this, and the power switch controlled by the cluster signal may be on when the cluster signal is at a low level and off when the cluster signal is at a high level.

[0084] Thus, by alternating the operation of each power circuit in a working mode (high-frequency state) and a rest mode (low-frequency state), this disclosure avoids each power circuit being constantly in a high-frequency state, thereby reducing the switching losses of each power switch in each power circuit and improving the overall conversion efficiency of the power conversion system 10. Specifically, in the comparative example of the power conversion system using phase-shift modulation, the operation of the power switch is controlled by phase-shift modulation, in which case the power switch is constantly in a high-frequency state, that is, the power switch repeatedly switches between the on and off states at the rated switching frequency. Compared to the comparative example, since the power switch of this disclosure does not need to be constantly in a high-frequency state, the switching losses can be reduced by at least 33% compared to the comparative example, and the overall conversion efficiency of the power conversion system 10 can be improved. For example, at a switching frequency of 3.48 kHz, the switching losses and converter efficiency of the comparative example are 2500 watts and 98.94%, respectively, while the switching losses and converter efficiency of this disclosure are 825 watts and 99.22%, respectively.

[0085] In some embodiments, the duration of the burst interval (also known as the phase interval length) and the duration of the burst interval (also known as the phase interval length) of the burst signal are the same within a single cycle, so that each power circuit has consistent heat dissipation requirements in both the working mode and the rest mode, thereby facilitating subsequent applications by the user. However, this disclosure is not limited to this. In other embodiments, the duration of the burst interval and the duration of the burst interval of the burst signal are different within a single cycle.

[0086] In some embodiments, the current adjustment circuit 40 determines the output current signal I. o When the current boost condition is met, a current adjustment signal I containing current boost information is generated. aFor example, in the output current signal I o The output current is less than the default value, which means the output current signal I... o The current boost condition is met, and the current adjustment circuit 40 adjusts the output current signal I. o The difference between the current and the default output current generates a current boost message and is added to the current adjustment signal I. a The control circuit 50 increases the amplitude of these control signals based on the current boost message. Each signal generation circuit, based on the increased amplitude of the control signals, increases the pulse cycle of these pulses P in each generation interval, thereby increasing the output current signal I of the power conversion circuit 20. o The output current is set to its default value. This allows the output current signal I of the power conversion circuit 20 to be converted to its default value. o Maintaining it at a specific value, thereby stabilizing the output source OP of the power conversion system 10.

[0087] In some embodiments, the current adjustment circuit 40 determines the output current signal I. o When the current reduction condition is met, a current adjustment signal I containing the current reduction information is generated. a For example, in the output current signal I o The output current is greater than the default value, which means the output current signal I... o The current reduction condition is met, and the current adjustment circuit 40 adjusts the output current signal I. o The difference between the current and the default output current generates a current reduction message and is added to the current adjustment signal I. a The control circuit 50 reduces the amplitude of these control signals based on the current reduction message. Each signal generation circuit, based on the reduced amplitude control signals, reduces the pulse cycle of these pulses P in each generation interval, thereby reducing the output current signal I of the power conversion circuit 20. o The output current is set to its default value. This allows the output current signal I of the power conversion circuit 20 to be converted to its default value. o Maintaining it at a specific value, thereby stabilizing the output source OP of the power conversion system 10.

[0088] In some embodiments, each signal generation circuit triggers each burst interval of each burst signal in the corresponding burst signal group according to an operating transition angle, and triggers each burst interval of each burst signal in the corresponding burst signal group according to a rest transition angle. Both the operating transition angle and the rest transition angle are phase angles of a signal within a single cycle and are different from each other. This ensures that the power circuits operate alternately in operating and rest modes. In some embodiments, the operating transition angle and the rest transition angle are calculated and stored by the control circuit 50 for use by the signal generation circuits. In other embodiments, the operating transition angle and the rest transition angle are input by the user via an electronic device to the control circuit 50 and stored therefor use by the signal generation circuits.

[0089] In some embodiments, each cluster signal group corresponds to a different operating transition angle, and each cluster signal group corresponds to a different resting transition angle. Furthermore, each cluster signal in the same cluster signal group corresponds to the same operating transition angle, and each cluster signal in the same cluster signal group corresponds to the same resting transition angle. This avoids the problem of increased heat dissipation requirements in the power conversion system 10 due to a large number of power circuits operating simultaneously. Two embodiments are described below.

[0090] Reference Figures 6 to 9 . Figure 6 The first cluster signal BS1 to the fourth cluster signal BS4 of the first cluster signal group BSG1 according to the first embodiment of this disclosure, and the current adjustment signal I are shown. a and the first control signal I c1 A schematic diagram. Figure 7 The fifth cluster signal BS5 to the eighth cluster signal BS8 and the current adjustment signal I of the second cluster signal group BSG2 according to the first embodiment of this disclosure are shown. a and the second control signal I c2 A schematic diagram. Figure 8 The ninth cluster signal BS9 to the twelfth cluster signal BS of the third cluster signal group BSG3 according to the first embodiment of this disclosure are shown. 12 Current adjustment signal I a and the third control signal I c3 A schematic diagram. Figure 9 The thirteenth cluster signal BS of the fourth cluster signal group BSG4 according to the first embodiment of this disclosure is shown. 13 Signal BS was issued at the sixteenth cluster. 16 Current adjustment signal I a and the fourth control signal I c4 A schematic diagram. In Figures 6 to 9In a cluster signal, the time period containing a pulse P (also called the phase interval) is called the cluster interval BSW, and the time period without a pulse P (also called the phase interval) is called the cluster interval BSI. Figures 6 to 9 As can be seen from the first embodiment, the operating transition angles corresponding to the first cluster signal group BSG1 and its first cluster signals BS1 to the fourth cluster signals BS4 are 0° (360°) and the rest transition angle is 180°; the operating transition angles corresponding to the second cluster signal group BSG2 and its fifth cluster signals BS5 to the eighth cluster signals BS8 are 90° and the rest transition angle is 270°; the operating transition angles corresponding to the third cluster signal group BSG3 and its ninth cluster signals BS9 to the twelfth cluster signals BS4 are 90° and 180° respectively. 12 The corresponding operating transition angle is 180° and the resting transition angle is 0° (360°); the fourth cluster signal group BSG4 and its thirteenth cluster signal BS 13 Signal BS was issued at the sixteenth cluster. 16 The corresponding working angle is 270° and the resting angle is 90°.

[0091] Reference Figure 10 The diagram illustrates a cluster signal from a first cluster signal group BSG1, a cluster signal from a second cluster signal group BSG2, a cluster signal from a third cluster signal group BSG3, a cluster signal from a fourth cluster signal group BSG4, and a current adjustment signal I according to a second embodiment of the present disclosure. a A schematic diagram. In Figure 10 In this context, the time period (also called the phase interval) containing the pulse P in a cluster signal is called the cluster interval BSW, and the time period (also called the phase interval) without the pulse P in a cluster signal is called the cluster interval BSI. For simplicity, only one cluster signal is shown in each cluster signal group. Since each cluster signal in the same cluster signal group corresponds to the same operating state angle, and each cluster signal in the same cluster signal group corresponds to the same resting state angle, therefore... Figure 10 As can be seen from the second embodiment, the operating transition angle corresponding to the first cluster signal group BSG1 (and its first cluster signal BS1 to the fourth cluster signal BS4) is 0° (360°) and the rest transition angle is 180°; the operating transition angle corresponding to the second cluster signal group BSG2 (and its fifth cluster signal BS5 to the eighth cluster signal BS8) is 90° and the rest transition angle is 270°; the operating transition angle corresponding to the third cluster signal group BSG3 (and its ninth cluster signal BS9 to the twelfth cluster signal BS4) is 0° (360°) and the rest transition angle is 180°; 12 The corresponding working transition angle is 180° and the resting transition angle is 0° (360°); the fourth cluster signal group BSG4 (and its thirteenth cluster signal BS) 13 Signal BS was issued at the sixteenth cluster. 16The corresponding working transition angle is 270° and the resting transition angle is 90°.

[0092] In some embodiments, there is a linear relationship between the resting angle and the operating angle corresponding to the same cluster of signals. For example, the relationship between the resting angle and the operating angle can be represented by equation (1), where For the resting state angle, Let d be the working transition angle and d be the translation amount. In the first embodiment described above, the translation amount is 180°, which ensures that the duration of the burst interval (also called the phase interval length) of the burst signal within a single cycle is the same as the duration of the burst interval (also called the phase interval length). In the second embodiment described above, the translation amount is 90°, which ensures that the duration of the burst interval of the burst signal within a single cycle is different from the duration of the burst interval; for example, the duration of the burst interval of the burst signal within a single cycle is shorter than the duration of the burst interval. In other embodiments, the translation amount is 270°, which ensures that the duration of the burst interval of the burst signal within a single cycle is longer than the duration of the burst interval. n is the number of the burst signal group; for example, the first burst signal group BSG1 is numbered 1, the second burst signal group BSG2 is numbered 2, and so on. In this way, it can be ensured that there is a correlation between the time length of the bursting interval and the time length of the bursting interval. For example, the time length of the bursting interval and the time length of the bursting interval are complementary in a single cycle to meet the heat dissipation requirements of the power conversion system 10.

[0093] (1)

[0094] In some embodiments, the translation is a constant, as shown in equation (2), where d is the translation and ct is a constant. In other embodiments, the translation is a multiple of the state transition angle, as shown in equation (3), where d is the translation. The angle is used to distinguish the state transition, and m is a multiple of the value.

[0095] (2)

[0096] (3)

[0097] In some embodiments, the transition angle is the ratio between the total phase angle of the period and the number of these power circuits. As shown in equation (4), where Let ta be the phase angle, 360° be the total phase angle of the period, and PN be the number of these power circuits. For example, assuming there are four power circuits, the phase angle is 90°.

[0098] (4)

[0099] In some embodiments, the operating transition angle and the transition differentiation angle are proportional. For example, the operating transition angle and the transition differentiation angle are directly proportional. As shown in equation (5), where For the working state angle, The transition angle is denoted by n, which is the number of the cluster signal group.

[0100] (5)

[0101] like Figures 6 to 9 As shown, in some embodiments, each control signal includes multiple control intervals (ISWs), and there is a control interval (ISI) between two adjacent control intervals (ISWs). Each control interval (ISW) of a control signal corresponding to the same power circuit corresponds to each cluster interval (BSW) of each cluster signal in the cluster signal group, and each control interval (ISI) of a control signal corresponding to the same power circuit corresponds to each cluster interval (BSI) of each cluster signal in the cluster signal group. For example, the first control signal I... c1 Both the first cluster signal group BSG1 and the first power circuit 22A are corresponding to the first control signal I. c1 The phase interval of the control range ISW within a single cycle (i.e., the range between the phase start and phase end) is the same as the phase interval of the cluster transmission range BSW of the first cluster transmission signal group BSG1 to the fourth cluster transmission signal BS4 within a single cycle. The first control signal I c1 The phase interval of the control interval ISI within a single cycle is the same as the phase interval of the cluster interval BSI within a single cycle of the first cluster signal BS1 to the fourth cluster signal BS4 of the first cluster signal group BSG1; the second control signal I c2 Both the second cluster signal group BSG2 and the second control signal I correspond to the second power circuit 22B. c2 The phase interval of the control interval ISW within a single cycle is the same as the phase interval of the cluster interval BSW of the second cluster signal group BSG2, from the fifth cluster signal BS5 to the eighth cluster signal BS8, within a single cycle. The second control signal I... c2 The phase interval of the control interval ISI within a single cycle is the same as the phase interval of the cluster interval BSI of the fifth cluster signal BS5 to the eighth cluster signal BS8 of the second cluster signal group BSG2 within a single cycle, and so on.

[0102] like Figures 6 to 9 As shown, in some embodiments, the signal within each control interval ISW is adjusted by the control circuit 50 using the current adjustment signal I. a It is generated by level averaging the corresponding signal segment. Level averaging is, for example, applied to the current adjustment signal I. aThe corresponding signal segment is linearly transformed to standardize its range, and the standardized signal segment is used as the signal within the control interval (ISW) of the control signal. For example, ... Figure 6 As shown, the current adjustment signal I corresponding to the control range ISW a The signal segment ranges from 0 standard value (per unit, pu) to 1 standard value. The control circuit 50 performs a linear transformation on the signal segment as shown in equation (6) to standardize the range of the signal segment to -1 standard value to 1 standard value, and uses the standardized signal segment as the signal within the control interval ISW of the control signal. Figure 8 As shown, the current adjustment signal I corresponding to the control range ISW a The signal segment ranges from -1 standard value to 0 standard value. The control circuit 50 performs a linear transformation on the signal segment as shown in equation (7) to standardize the range of the signal segment to -1 standard value to 1 standard value, and uses the standardized signal segment as the signal within the control interval ISW of the control signal. Where y is the signal value of the control signal, and x is the current adjustment signal I. a The signal value. By standardizing the signal range, each signal generation circuit can conveniently use the control signal for subsequent processing.

[0103] (6)

[0104] (7)

[0105] like Figures 6 to 9 As shown, in some embodiments, the signal within each control interval ISI is a current adjustment signal I used by the control circuit 50. a The corresponding signal segment generates a level signal. For example, when the control circuit 50 determines the current adjustment signal I corresponding to the control interval ISI, it generates a level signal. a When the signal segment meets the low-level condition, a low-level signal is used as the signal within the control interval ISI as the control signal. The low-level condition is, for example, the current adjustment signal I corresponding to the control interval ISI. a The signal segment is in the negative half-cycle or less than the 0 standard value. For example... Figure 6 As shown, due to the current adjustment signal I corresponding to the control interval ISI a The signal segment is in the negative half-cycle and less than the 0 standard value. Therefore, the control circuit 50 uses the signal at the -1 standard value level as the signal within the control interval ISI. The control circuit 50 determines the current adjustment signal I corresponding to the control interval ISI. a When the signal segment meets the high-level condition, a high-level signal is used as the signal within the control interval ISI as the control signal. The high-level condition is, for example, the current adjustment signal I corresponding to the control interval ISI. aThe signal segment is in the positive half-cycle or greater than the 0 standard value. For example... Figure 8 As shown, due to the current adjustment signal I corresponding to the control interval ISI a The signal segment is in the positive half-cycle and is greater than the 0 standard value. Therefore, the control circuit 50 uses the signal at the 1 standard value level as the signal within the control interval ISI of the control signal.

[0106] In some embodiments, this disclosure applies to single-phase power systems. However, this disclosure is not limited thereto; in other embodiments, this disclosure applies to three-phase power systems. Specifically, the power conversion system 10 includes three single-phase power conversion systems for the R-phase, S-phase, and T-phase of the three-phase power system, respectively, and each single-phase power conversion system includes the aforementioned power conversion circuit 20, current detection circuit 30, current adjustment circuit 40, control circuit 50, and these signal generation circuits to achieve the aforementioned operation.

[0107] In summary, according to the embodiments of this disclosure, by having each power circuit operate in a working mode in each power cluster interval and in a rest mode in each power cluster interval (that is, each power circuit operates in a working mode and a rest mode alternately), the switching losses of each power switch in each power circuit can be reduced, thereby improving the overall conversion efficiency of the power conversion system.

Claims

1. A power conversion system, characterized in that, include: A power conversion circuit includes multiple power circuits connected in series, each power circuit including multiple power switches; A current detection circuit is coupled to the power conversion circuit to detect the output current signal of the power conversion circuit. A current adjustment circuit is coupled to the current detection circuit and generates a current adjustment signal based on the output current signal. A control circuit, coupled to the current adjustment circuit, generates multiple control signals based on the current adjustment signal. and Multiple signal generating circuits, each of which is coupled between the control circuit and one of the power circuits to output a cluster signal group to the corresponding power circuit according to one of the control signals to control its power switches. The cluster signal group includes multiple cluster signals, each cluster signal includes multiple cluster intervals, and there is a cluster interval between two adjacent cluster intervals. Each power circuit operates in an operating mode in each cluster interval and in a rest mode in each cluster interval.

2. The power conversion system according to claim 1, characterized in that, Each of the clustered signals includes multiple pulses in each of the clustered intervals. When the current adjustment circuit determines that the output current signal meets the current boosting condition, it generates a current adjustment signal with current boosting information. The control circuit increases the amplitude of the control signals according to the current boosting information, and each signal generation circuit increases the pulse operating period of the pulses in each of the clustered intervals according to the control signals with increased amplitude, so as to boost the output current signal of the power conversion circuit.

3. The power conversion system according to claim 1, characterized in that, Each of the clustered signal intervals includes multiple pulses. When the current adjustment circuit determines that the output current signal meets the current reduction condition, it generates a current adjustment signal with current reduction information. The control circuit reduces the amplitude of the control signals according to the current reduction information, and each signal generation circuit reduces the pulse duty cycle of the pulses in each clustered interval according to the reduced amplitude control signals, so as to reduce the output current signal of the power conversion circuit.

4. The power conversion system according to claim 1, characterized in that, Each signal generation circuit triggers the respective burst interval of each burst signal in the corresponding burst signal group according to the working transition angle, and triggers the respective burst interval of each burst signal in the corresponding burst signal group according to the rest transition angle.

5. The power conversion system according to claim 4, characterized in that, Each of the signal groups corresponds to a different working angle and a different resting angle.

6. The power conversion system according to claim 4, characterized in that, There is a linear relationship between the resting angle and the working angle.

7. The power conversion system according to claim 6, characterized in that, The translation of this linear relationship is a multiple of the transition angle.

8. The power conversion system according to claim 4, characterized in that, The working transition angle is proportional to the transition differentiation angle.

9. The power conversion system according to claim 7 or 8, characterized in that, The transition angle is the ratio between the total phase angle of the period and the number of power circuits.

10. The power conversion system according to claim 1, characterized in that, Each control signal includes multiple control intervals, and there is a control interval between two adjacent control intervals. Each control interval of the control signal corresponding to the same power circuit corresponds to each cluster interval of each cluster signal in the cluster signal group, and each control interval of the control signal corresponding to the same power circuit corresponds to each cluster interval of each cluster signal in the cluster signal group. Each control interval is generated by the control circuit after level averaging the corresponding signal segment of the current adjustment signal, and each control interval is a level signal generated by the control circuit using the corresponding signal segment of the current adjustment signal.

11. A power conversion method, characterized in that, include: Detect the output current signal of the power conversion circuit; A current adjustment signal is generated based on the output current signal; Multiple control signals are generated based on the current adjustment signal; and One of these control signals is used to output a group of signals to the corresponding power circuit to control its multiple power switches; The cluster signal group includes multiple cluster signals, each cluster signal includes multiple cluster intervals, and there is a cluster interval between two adjacent cluster intervals. The power circuit operates in a working mode in each cluster interval and in a rest mode in each cluster interval.

12. The power conversion method according to claim 11, characterized in that, Each of the clustered signals includes multiple pulses in each of the clustered intervals. When it is determined that the output current signal meets the current boosting condition, a current adjustment signal with current boosting information is generated. According to the current boosting information, the amplitude of the control signals is increased, and according to the control signals with increased amplitude, the pulse operating period of the pulses in each of the clustered intervals is increased, so as to boost the output current signal of the power conversion circuit.

13. The power conversion method according to claim 11, characterized in that, Each of the clustered signals includes multiple pulses in each of the clustered intervals. When it is determined that the output current signal meets the current reduction condition, a current adjustment signal with current reduction information is generated. According to the current reduction information, the amplitude of the control signals is reduced, and according to the reduced amplitude control signals, the pulse duty cycle of the pulses in each of the clustered intervals is reduced, so as to reduce the output current signal of the power conversion circuit.

14. The power conversion method according to claim 11, characterized in that, Based on the working transition angle, each cluster interval of each cluster signal in the cluster signal group is triggered, and based on the rest transition angle, each cluster interval of each cluster signal in the cluster signal group is triggered.

15. The power conversion method according to claim 14, characterized in that, Different signal groups correspond to different working angles and different resting angles.

16. The power conversion method according to claim 14, characterized in that, There is a linear relationship between the resting angle and the working angle.

17. The power conversion method according to claim 16, characterized in that, The translation of this linear relationship is a multiple of the transition angle.

18. The power conversion method according to claim 14, characterized in that, The working transition angle is proportional to the transition differentiation angle.

19. The power conversion method according to claim 17 or 18, characterized in that, The transition angle is the ratio between the total phase angle of the period and the number of power circuits.

20. The power conversion method according to claim 11, characterized in that, Each control signal includes multiple control intervals, and there is a control interval between two adjacent control intervals. Each control interval of the control signal corresponding to the same power circuit corresponds to each cluster interval of each cluster signal in the cluster signal group, and each control interval of the control signal corresponding to the same power circuit corresponds to each cluster interval of each cluster signal in the cluster signal group. Each control interval is generated by level averaging the corresponding signal segment of the current adjustment signal, and each control interval is a level signal generated using the corresponding signal segment of the current adjustment signal.

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