Clock tampering detector and method of detecting clock tampering events

Abstract

A clock tamper detector includes a clock terminal for receiving a system clock signal, a clock generator for generating a reference clock signal, an oscillator for generating an oscillation signal having a target frequency greater than a target frequency of the reference clock signal and a target frequency of the system clock signal, a control circuit for calibrating an operating frequency of the oscillation signal according to the reference clock signal in a calibration mode, a detection counter for counting a number of cycles of the oscillation signal experienced by the system clock signal per cycle in a detection mode, and a comparison logic circuit for issuing an alarm signal when a difference between the number of cycles of the oscillation signal and a predetermined number code is greater than a threshold value in the detection mode.

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