A pulse output method and device, electronic equipment and storage medium

Abstract

The application relates to the technical field of servo motors, and provides a pulse output method and device, electronic equipment and a storage medium. The method obtains an encoder position increment according to a preset sampling period, determines the pulse phase relationship corresponding to the quadrature two-phase pulses in each sampling period according to the positive and negative of the encoder position increment obtained in each sampling period, determines the pulse square wave level flip beat corresponding to the quadrature two-phase pulses in each sampling period according to the encoder position increment corresponding to each sampling period and a preset increment threshold, and outputs the quadrature two-phase pulses corresponding to each sampling period according to the pulse phase relationship and the pulse square wave level flip beat in each sampling period. According to the application, the rotation direction is determined according to the positive and negative of the encoder position increment, so that the phase relationship of the quadrature two-phase pulses is directly determined. Then, the position increment and the preset threshold are accumulated and compared to obtain the pulse square wave level flip beat, and the quadrature two-phase pulses are output according to the pulse square wave level flip beat.

Description

Technical Field

[0001] This application relates to the field of servo motor technology, and in particular to a pulse output method, device, electronic device, and storage medium. Background Technology

[0002] In high-precision AC servo control systems, high-resolution encoders are widely used to acquire the position and speed information of motor shafts. These encoders typically use serial communication (such as BiSS, EnDat, Tamagawa, and Hiperface) to transmit absolute position signals and usually do not directly provide a pulse interface that can be counted by host devices (such as PLCs and motion controllers). For host devices that only support A / B (and optional Z) pulse inputs, direct pulse counting and direction determination of the serial absolute position signal is impossible, limiting the system's versatility and compatibility. How to convert the encoder's output position information into pulses that can be reliably counted by the host device has become a pressing problem to be solved. Summary of the Invention

[0003] In view of this, embodiments of this application provide a pulse output method, apparatus, electronic device, and storage medium to solve the problem in the prior art that the position information output by the encoder cannot be converted into pulses that can be recognized by the host device.

[0004] A first aspect of this application provides a pulse output method, comprising: acquiring encoder position increments according to a preset sampling period, and determining the pulse phase relationship of orthogonal two-phase pulses in each sampling period based on the sign of the encoder position increments acquired in each sampling period; determining the pulse square wave level flipping beat of the orthogonal two-phase pulses in each sampling period based on the encoder position increments corresponding to each sampling period and a preset increment threshold; and outputting the orthogonal two-phase pulses corresponding to each sampling period based on the pulse phase relationship and the pulse square wave level flipping beat in each sampling period. A second aspect of this application provides a pulse output device, comprising: a phase module, configured to acquire encoder position increments according to a preset sampling period, and determine the pulse phase relationship corresponding to the quadrature two-phase pulses in each sampling period based on the sign of the encoder position increments acquired in each sampling period; a timing module, configured to determine the pulse square wave level flipping timing corresponding to the quadrature two-phase pulses in each sampling period based on the encoder position increments corresponding to each sampling period and a preset increment threshold; and an output module, configured to output the quadrature two-phase pulses corresponding to each sampling period based on the pulse phase relationship and the pulse square wave level flipping timing.

[0005] A third aspect of this application provides an electronic device, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the computer program to implement the steps of the above-described method.

[0006] A fourth aspect of this application provides a computer-readable storage medium storing a computer program that, when executed by a processor, implements the steps of the above-described method.

[0007] The beneficial effects of this application embodiment compared with the prior art are as follows: The method of this application embodiment obtains the encoder position increment according to a preset sampling period, and determines the pulse phase relationship corresponding to the quadrature two-phase pulses in each sampling period according to the positive and negative signs of the encoder position increment obtained in each sampling period; determines the pulse square wave level flipping beat corresponding to the quadrature two-phase pulses in each sampling period according to the encoder position increment corresponding to each sampling period and a preset increment threshold; and outputs the quadrature two-phase pulses corresponding to each sampling period according to the pulse phase relationship and the pulse square wave level flipping beat. This application obtains the encoder position increment within a preset sampling period and determines the rotation direction according to its positive and negative signs, thereby directly determining the phase relationship of the quadrature two-phase pulses; then, it accumulates and compares the position increment with the preset threshold to obtain the pulse square wave level flipping beat, and outputs the corresponding number of A / B pulse flips accordingly. Therefore, the encoder's continuous absolute position information is mapped cycle-by-cycle to a standard incremental pulse output. The phase difference between the A / B pulses ensures accurate direction determination, the correspondence between the number of pulses and the position increment ensures correct displacement counting, and threshold accumulation and rollback processing prevent missed pulses at low speeds and loss of orthogonality at high speeds. Based on this scheme, even if the host device only supports the A / B (and optional Z) pulse interface, it can still accurately determine the motor's position and direction by acquiring the output pulses from the encoder. This achieves seamless compatibility between the encoder and traditional pulse interfaces, significantly improving the system's versatility and reliability, and avoiding the problem in related technologies where the encoder's output position information cannot be converted into pulses recognizable by the host device. Attached Figure Description

[0008] To more clearly illustrate the technical solutions in the embodiments of this application, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0009] Figure 1 This is a schematic flowchart of a pulse output method provided in an embodiment of this application; Figure 2 This is a schematic flowchart of another pulse output method provided in an embodiment of this application; Figure 3 This is a schematic flowchart of another pulse output method provided in the embodiments of this application; Figure 4 This is a schematic flowchart of another pulse output method provided in an embodiment of this application; Figure 5 This is a schematic flowchart of another pulse output method provided in an embodiment of this application; Figure 6 This is a schematic diagram of a pulse output device provided in an embodiment of this application; Figure 7 This is a schematic diagram of the structure of an electronic device provided in an embodiment of this application. Detailed Implementation

[0010] In the following description, specific details such as particular system architectures and techniques are set forth for illustrative purposes and not for limitation, in order to provide a thorough understanding of the embodiments of this application. However, those skilled in the art will understand that this application can also be implemented in other embodiments without these specific details. In other instances, detailed descriptions of well-known systems, pulse output devices, circuits, and methods are omitted so as not to obscure the description of this application with unnecessary detail.

[0011] A pulse output method and pulse output device according to embodiments of this application will now be described in detail with reference to the accompanying drawings.

[0012] Figure 1 This application provides a pulse output method, such as... Figure 1 As shown, the method includes: S101. Obtain the encoder position increment according to the preset sampling period, and determine the pulse phase relationship of the orthogonal two-phase pulses in each sampling period according to the sign of the encoder position increment obtained in each sampling period. S102. Based on the encoder position increment corresponding to each sampling period and the preset increment threshold, determine the pulse square wave level flipping beat corresponding to the orthogonal two-phase pulse in each sampling period. S103. Based on the pulse phase relationship and pulse square wave level flipping rhythm within each sampling period, output the orthogonal two-phase pulse corresponding to each sampling period.

[0013] In step S101, the encoder position increment is obtained according to a preset sampling period, including: calculating the difference between the encoder position corresponding to the current sampling period and the encoder position corresponding to the previous sampling period to obtain the encoder position increment corresponding to the current sampling period. The preset sampling period is the period during which the system samples the encoder position at a preset fixed time interval, preferably the same as the PWM carrier period, or an integer multiple thereof. For example, the sampling period can be set to 100 μs / time or 62.5 μs / time.

[0014] At the end of each sampling period, the encoder absolute position is read once and subtracted from the encoder absolute position of the previous sampling period to obtain the encoder position increment Pls_Num for that sampling period. For example, if the absolute position at the end of the k-th sampling period is denoted as Pos[k], then the encoder position increment Pls_Num[k] for the k-th sampling period is equal to Pos[k]. Pos[k 1).

[0015] After determining the encoder position increment, this application determines the pulse phase relationship of the orthogonal two-phase pulses in each sampling period based on the sign of the encoder position increment obtained in each sampling period.

[0016] Specifically, when Pls_Num is greater than 0, it is determined that the motor is rotating in the forward direction within the sampling period, and the motor rotation direction flag Dir is recorded as 1. The phase relationship of the output orthogonal two-phase pulses is that the A-phase pulse leads the B-phase pulse by 90°.

[0017] When Pls_Num is less than 0, it is determined that the motor is rotating in the opposite direction within the sampling period. The motor rotation direction flag Dir is recorded as 0, and the phase relationship of the output orthogonal two-phase pulses is that phase B leads phase A by 90°.

[0018] When Pls_Num equals 0, it means that the absolute position fed back by the encoder in this sampling period is the same as that in the previous sampling period, that is, the motor has not rotated effectively. The Dir determined in the previous sampling period remains unchanged, and the pulse phase relationship corresponding to the quadrature two-phase pulses continues to use the previous result without generating any new phase switching.

[0019] In some examples, when the control system of the AC servo drive is powered on or reset, since Pos[k-1] is not yet available, Pls_Num can be treated as 0 and a default Dir can be set (e.g., A leads B), or the Dir can be determined after a non-zero Pls_Num is obtained for the first time.

[0020] In some examples, this application determines the pulse square wave level reversal clock of the orthogonal two-phase pulses within each sampling period based on the encoder position increment corresponding to each sampling period and a pre-set increment threshold. That is, each triggering of the pulse square wave level reversal clock causes a level reversal in the output orthogonal two-phase pulses. For example, the orthogonal two-phase pulses are divided into phase A and phase B. At a given initial moment, phases A and B are at a certain initial level (e.g., A is low and B is high; the specific initial level can be determined by the system's reset state upon power-up, without affecting the determination of the phase relationship). Without considering the phase relationship and triggering the pulse square wave level reversal clock, a level reversal is performed on phase A, causing A to change from low to high, and a level reversal is performed on phase B, causing B to change from high to low.

[0021] In some examples, this application will output orthogonal two-phase pulses corresponding to each sampling period based on the pulse phase relationship and pulse square wave level flipping rhythm within each sampling period, specifically including: (1) At the beginning of the current sampling period, the pulse phase relationship corresponding to the quadrature two-phase pulses is determined according to the sign of the encoder position increment obtained in step S101, and the initial level of a set of quadrature two-phase pulses is immediately output (the specific initial level is not limited, only the quadrature relationship needs to be satisfied). When Pls_Num is greater than 0, it is determined that the motor is rotating in the forward direction within the sampling period. The motor rotation direction flag Dir=1 is recorded, and the phase relationship of the output orthogonal two-phase pulses is that phase A leads phase B by 90°.

[0022] When Pls_Num is less than 0, it is determined that the motor is rotating in the opposite direction within the sampling period. The motor rotation direction flag Dir is recorded as 0, and the phase relationship of the output orthogonal two-phase pulses is that phase B leads phase A by 90°.

[0023] When Pls_Num equals 0, it means that the absolute position fed back by the encoder in this sampling period is the same as that in the previous sampling period, that is, the motor has not rotated effectively. The Dir determined in the previous sampling period remains unchanged, and the pulse phase relationship corresponding to the quadrature two-phase pulses continues to use the previous result without generating any new phase switching.

[0024] (2) During the current sampling period, whenever a pulse square wave level flipping beat is generated in step S102 (trigger time), the flipping is performed according to the phase relationship: if Dir = 1, the leading phase A is updated first (the level of phase A is inverted once), and then the lagging phase B is updated by a 90° electrical angle delay (phase B is inverted); if Dir = 0, the leading phase B is updated first, and then the lagging phase A is updated by a 90° electrical angle delay; if no flipping beat is generated in this period, (A,B) remains unchanged until the end of the period.

[0025] It is understood that the above-mentioned 90° electrical angle delay can be achieved in any of the following ways: (i) Four-state orthogonal state machine: Define four orthogonal states and advance them sequentially in the direction specified by Dir. Advance one state in each cycle, naturally ensuring a 90° phase difference and a duty cycle of nearly 50%; (ii) Phase delay counting: Start 90° delay counting after the leader phase flips. When the count reaches the preset value, flip the lagging phase.

[0026] (3) When the sampling period ends (carrier underflow interruption), the accumulator register used to determine the flipping clock is reset, and the above (1) to (2) process is re-executed in the next sampling period.

[0027] According to the scheme provided in the embodiments of this application, the encoder position increment is obtained according to a preset sampling period, and the pulse phase relationship of the orthogonal two-phase pulses in each sampling period is determined according to the sign of the encoder position increment obtained in each sampling period; the pulse square wave level flipping beat corresponding to the orthogonal two-phase pulses in each sampling period is determined according to the encoder position increment corresponding to each sampling period and a preset increment threshold; the orthogonal two-phase pulses corresponding to each sampling period are output according to the pulse phase relationship and the pulse square wave level flipping beat in each sampling period. This application obtains the encoder position increment in the preset sampling period and determines the rotation direction according to its sign, thereby directly determining the phase relationship of the orthogonal two-phase pulses; then, the position increment is accumulated and compared with the preset threshold to obtain the pulse square wave level flipping beat, and the corresponding number of A / B pulse flips are output accordingly. Therefore, the encoder's continuous absolute position information is mapped cycle-by-cycle to a standard incremental pulse output. The phase difference between the A / B pulses ensures accurate direction determination, the correspondence between the number of pulses and the position increment ensures correct displacement counting, and threshold accumulation and rollback processing prevent missed pulses at low speeds and loss of orthogonality at high speeds. Based on this scheme, even if the host device only supports the A / B (and optional Z) pulse interface, it can still accurately determine the motor's position and direction by acquiring the output pulses from the encoder. This achieves seamless compatibility between the encoder and traditional pulse interfaces, significantly improving the system's versatility and reliability, and avoiding the problem in related technologies where the encoder's output position information cannot be converted into pulses recognizable by the host device.

[0028] In some examples, such as Figure 2 As shown, based on the encoder position increment corresponding to each sampling period and a pre-set increment threshold, the pulse square wave level flipping cycle corresponding to the orthogonal two-phase pulses in each sampling period is determined, including: S201. In each sampling period, the encoder position increment corresponding to each sampling period is accumulated clockwise according to the system clock, and the accumulated result is compared with the increment threshold. S202. If the absolute value of the accumulated result is higher than the increment threshold, the pulse square wave level flipping beat is triggered. S203. After the trigger pulse square wave level flips, the accumulated result is subtracted from the increment threshold, and the encoder position increment corresponding to each sampling period is re-accumulated clockwise according to the system clock.

[0029] In some examples, since the system clock period is much smaller than the sampling period (for example, the system clock can be 100 MHz, while the carrier frequency corresponding to the sampling period is only 10 kHz), within one sampling period, the position increment will be split into multiple finer cumulative units and advanced step by step, so as to ensure that the output pulses are evenly distributed rather than concentrated at the end of the period. Therefore, this application accumulates the encoder position increment corresponding to this period clock by clock according to the system clock.

[0030] During the accumulation process, the accumulated result Sum is compared with a preset increment threshold Th in real time. This threshold can be selected as 2×Prd_Cnt (where Prd_Cnt is the carrier period count value, and its size depends on the carrier frequency), which is equivalent to stipulating that "a flip can occur when the displacement across a standard equivalent amount is reached".

[0031] When |Sum| < Th, it means that the accumulated displacement is not enough to generate a pulse and no flip is triggered; when |Sum| ≥ Th, it means that the accumulated displacement has crossed a complete pulse equivalent, and at this time, a pulse square wave level flip beat is triggered.

[0032] In other words, the role of the threshold comparison is to quantify the continuous displacement into discrete flip events: the threshold is not reached → the motor movement is not enough to output a pulse; the threshold is reached or exceeded → the motor movement is enough to output a pulse, and the corresponding output waveform flips once.

[0033] After the flip beat is triggered, a rollback process is performed on Sum: ; that is, the accumulated result is subtracted by an increment threshold and the remainder is retained, and then the accumulation continues clock by clock according to the system clock. This can ensure that: if Pls_Num is large within the same sampling period, Sum will exceed the increment threshold multiple times, and then trigger multiple pulse square wave level flip beats, corresponding to outputting multiple pulses; if Pls_Num is small, Sum may never reach the threshold, and then no pulse square wave level flip beat is triggered, and the orthogonal two-phase pulse output remains unchanged.

[0034] At the end of each sampling period (that is, when the carrier underflow interrupt occurs), Sum is cleared and a new encoder position increment is recalculated, and the accumulation and comparison process of the next sampling period is entered.

[0035] In some examples, the clock-by-clock accumulation process is based on the system clock. The purpose is to use the clock granularity higher than the sampling period to disperse the position increment on finer time slices to ensure the smoothness and uniformity of the output pulses.

[0036] It should be noted that this application does not limit the use of the system clock as the reference clock for clock-by-clock accumulation. In other embodiments, a high-speed clock, carrier counting clock, or even an externally provided independent reference clock that is not synchronized with the sampling period can be selected to complete the clock-by-clock accumulation, as long as the time resolution of the clock can be guaranteed to be less than the sampling period, thereby achieving fine-grained accumulation and comparison of position increments.

[0037] According to the scheme provided in this application embodiment, within each sampling period, the encoder position increment corresponding to each sampling period is accumulated clockwise according to the system clock, and the accumulated result is compared with the increment threshold. If the absolute value of the accumulated result is higher than the increment threshold, a pulse square wave level flipping beat is triggered. After triggering the pulse square wave level flipping beat, the accumulated result is subtracted from the increment threshold, and the encoder position increment corresponding to each sampling period is accumulated clockwise again according to the system clock. By accumulating the position increment clockwise with a high-resolution clock within each sampling period and comparing it with the increment threshold, a "threshold-crossing trigger, trigger-and-rewind" mechanism is achieved. This scheme accurately quantifies the continuous displacement into discrete A / B flip events: on the one hand, no flipping occurs when the accumulation does not reach the threshold, and flipping occurs when the threshold is exceeded, ensuring that "pulse count..." The displacement increments are one-to-one, and the direction is determined by the sign of the increment, making the direction determination clear. On the other hand, clock-by-clock progression ensures that the flipping moments are naturally distributed within the cycle as the motion progresses, avoiding concentrated "clustering" flipping at the end of the cycle. Combined with the margin retained during rewinding, this simultaneously avoids low-speed pulse leakage and high-speed phase disorder. As a result, even if the host device only supports A / B (optional Z) pulse interfaces, it can accurately count and determine direction, achieving seamless compatibility with absolute encoders and improving the system's versatility, real-time performance, and reliability.

[0038] In some examples, such as Figure 3 As shown, before accumulating the encoder position increment corresponding to each sampling period clockwise according to the system clock frequency, the method further includes: S301. Compare the absolute value of the encoder position increment in the current sampling period with the preset target increment value; S302. If the absolute value of the encoder position increment is less than the target increment value, the encoder position increment corresponding to the current sampling period is added to the encoder position increment corresponding to the previous N sampling periods, and the result is used as the encoder position increment corresponding to the current sampling period.

[0039] It is understandable that when the motor speed is low, Pls_Num may be 0 or |Pls_Num| may be very small for several consecutive sampling cycles. If the "clockwise accumulation → threshold comparison" process of steps S201 to S203 is directly adopted, it is easy to cause the A and B phases of the frequency division output to no longer be strictly orthogonal and to cause missed pulses. To this end, this application introduces a small-increment cross-cycle merging mechanism in low-speed scenarios and combines it with the constant-speed frequency division method to achieve stable orthogonal frequency division output in the full speed domain.

[0040] Specifically, the encoder position increment Pls_Num for the current sampling period is obtained, its absolute value is calculated, and compared with the preset target increment value Δ_tar (e.g., Δ_tar=2).

[0041] If |Pls_Num| ≥ Δ_tar in the current sampling period, Pls_Num is directly used as the effective encoder position increment for the current sampling period, and the clock-by-clock accumulation process of S201~S203 is entered.

[0042] If |Pls_Num| < Δ_tar in the current sampling period, then the Pls_Num of the current sampling period is added to the Pls_Num of the previous N sampling periods, and the result is used as the encoder position increment corresponding to the current sampling period.

[0043] In the process of accumulating Pls_Num of the current sampling period with Pls_Num of the previous N sampling periods, the cumulative value can be obtained by directly summing Pls_Num of the current sampling period with Pls_Num of the previous N sampling periods by sign.

[0044] Taking N=63 as an example, the current period plus the previous 63 periods, totaling 64 Pls_Num, are merged. The merged result is then used as the Pls_Num of the current sampling period, and the clock-by-clock accumulation process of S201 to S203 is executed.

[0045] In another example, when accumulating Pls_Num of the current sampling period with Pls_Num of the previous N sampling periods, bucketed accumulation can be used: ; like If the direction is positive, the equivalent increment is = N; if N P≥ If the direction is negative, the equivalent increment is N. P; otherwise, the direction remains unchanged, where, This is a direction determination threshold used to suppress direction jitter caused by low-speed, small-amplitude positive and negative cancellation. A typical value is 1 to 3 pulse equivalents (which can be calibrated according to resolution and noise level). The direction is not updated when the absolute value of the accumulated result does not reach this threshold.

[0046] According to the scheme provided in the embodiments of this application, the absolute value of the encoder position increment in the current sampling period is compared with a preset target increment value. If the absolute value of the encoder position increment is less than the target increment value, the encoder position increment corresponding to the current sampling period is added to the encoder position increment corresponding to the previous N sampling periods, and the result is used as the encoder position increment corresponding to the current sampling period. Adding the increment of the current sampling period to the increment of the previous N periods is equivalent to performing time-domain integration / energy aggregation on the displacement samples that are "sparse, small-amplitude, and easily submerged by noise" in low-speed / micro-motion scenarios. On the one hand, the cumulative amount increases linearly with the window N, while the synthesis amplitude of random zero-mean noise only increases by √N, thus improving the signal-to-noise ratio by about √N times, making it easier to cross the subsequent threshold Th and trigger "threshold crossing and flipping", effectively reducing low-speed missed pulses. On the other hand, constraining the sign consistency within the addition window and introducing the direction threshold T_dir can suppress the direction jitter caused by positive and negative cancellation. After accumulating to the target increment, clock-by-clock accumulation and 90° phase advancement are then implemented to ensure strict orthogonality between A and B and a one-to-one correspondence between pulse count and displacement. At normal / high speeds, since the single-cycle increment already exceeds the target increment, the link "straight-through" does not introduce additional delay, and real-time performance remains unaffected. In summary, this aggregation strategy improves trigger probability and direction determination stability at low speeds, while maintaining the original response at high speeds, thereby achieving stable, direction-determinable, and uninterrupted orthogonal pulse output across the entire speed domain, improving system versatility and reliability.

[0047] In some examples, such as Figure 4 As shown, after outputting the orthogonal two-phase pulses corresponding to each sampling period based on the pulse phase relationship and the pulse square wave level flipping rhythm within each sampling period, the method further includes: S401. Perform frequency multiplication counting on the output quadrature two-phase pulses to obtain the frequency multiplication counting result; S402. When the frequency multiplication counting result is equal to the preset number of single-cycle pulses, output the origin signal pulse.

[0048] Specifically, this application performs frequency multiplication counting on the output quadrature two-phase pulses. For example, it performs a 4x frequency multiplication count on the rising and falling edges of phases A and B, or a 2x frequency multiplication count on only the rising edge, to obtain the current frequency multiplication count result. The frequency multiplication method can be selected according to the system resolution requirements.

[0049] When the frequency multiplication count result equals the preset number of pulses per revolution, the motor is determined to have completed one revolution, and an origin signal pulse is output. This origin signal can be used as a reference synchronization signal for the host computer or controller to establish mechanical zero position or to achieve absolute position calibration.

[0050] While outputting the origin signal pulse, the value of the frequency multiplication count result is cleared to zero. The width of the high level of the origin signal pulse is twice the width of the high level of phases A and B of the frequency division output, and the phase is in phase with the leading signal of the quadrature frequency division output signal.

[0051] The frequency multiplication counting of the output quadrature two-phase pulses is performed to obtain the frequency multiplication counting result, including: determining the corresponding counting method according to the positive or negative sign of the encoder position increment in each sampling period; and performing frequency multiplication counting of the output quadrature two-phase pulses according to the counting method to obtain the frequency multiplication counting result. Specifically, the counting methods include increment counting and decrement counting. When Pls_Num is greater than 0, it is determined that the motor rotates in the forward direction within the sampling period, and the motor rotation direction flag Dir is recorded as 1, confirming that the counting method is increment counting. When Pls_Num is less than 0, it is determined that the motor rotates in the reverse direction within the sampling period, and the motor rotation direction flag Dir is recorded as 0, confirming that the counting method is decrement counting. Then, according to the determined counting method, the output quadrature two-phase pulses are multiplied and counted to obtain the multiplied counting result. When the value of the quadrature pulse quadrature count register is equal to the system-set number of pulses per revolution Pls_Set, the origin signal Z is output once, and the value of the quadrature pulse quadrature count register is cleared to zero. The width of the high level of the origin signal is twice the width of the high level of the A and B phases of the frequency division output, and the phase is in phase with the leading signal of the quadrature frequency division output signal.

[0052] According to the scheme provided in the embodiments of this application, the output quadrature two-phase pulses are frequency-multiplied and counted to obtain the frequency-multiplied count result; when the frequency-multiplied count result is equal to the preset number of pulses per revolution, the origin signal pulse is output. By multiplying and counting the output quadrature two-phase pulses (e.g., ×2 / ×4), the pulses are linearly subdivided without increasing the sensor and interface bandwidth, improving the position resolution, keeping the count value and mechanical displacement in a fixed ratio, and the direction is naturally determined by the phase sequence; when the cumulative frequency multiplication count reaches the preset number of pulses per revolution, the origin (Z) pulse is output, providing the host device with a zero-position reference once per revolution for periodic resynchronization and error reset, suppressing long-term drift and ensuring consistency across multiple revolutions. Thus, a high-resolution, directional position signal with a revolution reference can be obtained using standard A / B and Z interfaces, improving the system's versatility, positioning accuracy, and reliability.

[0053] Based on the same concept, this application also provides a pulse output system, such as Figure 5As shown, the pulse output system consists of a phase detection module, an adaptive quadrature pulse output module, and an origin signal output module. This pulse output system can perform some or all of the steps of the pulse output method in the above embodiments of this application, enabling the output of high-resolution encoder feedback position data as quadrature two-phase pulses and sending them to the host device regardless of whether the servo motor is operating at high or low speed (below 10 r / min).

[0054] Specifically, the phase detection module outputs a motor rotation direction flag, Dir, based on the sign of the encoder position increment Pls_Num, and updates it once per underflow interrupt in each carrier cycle. Dir represents the difference between the encoder position data from the previous sampling cycle (i.e., the system carrier cycle) and the next sampling cycle. The sign of Pls_Num indicates the forward or reverse rotation of the motor and also determines the phase relationship between the A and B phase pulses in the frequency division output. That is, when Pls_Num is positive, Dir is 1, the motor rotates forward, and the A phase of the frequency division output pulse leads B; when Pls_Num is negative, Dir is 0, the motor rotates in reverse, and the B phase of the frequency division output pulse leads A; when Pls_Num is 0, the Dir value remains the value obtained at the previous moment, and the phases of the A and B phase pulses in the frequency division output are determined by Dir at the previous sampling moment.

[0055] Adaptive Quadrature Pulse Output Module: With each incoming FPGA system clock (CLK), Pls_Num is incremented and registered. The incremented value is stored in the accumulator register Pls_Sum. This process continues until the value of Pls_Sum is greater than or equal to 2 * Prd_Cnt (the carrier cycle count, the value of which depends on the system carrier frequency). When the accumulator overflows, the square wave changes. Then, the value of Pls_Sum is subtracted from the value of 2 * Prd_Cnt, and the result is stored back in Pls_Sum. This cycle repeats, causing the square wave to change cyclically. During the underflow interrupt of each carrier cycle, the value of Pls_Sum is cleared to zero. Based on the changes in the square wave, orthogonal two-phase pulse waveforms are generated. Within each sampling period, the number of square wave changes is equal to the number of Pls_Num, which is also equal to the total number of two-phase output pulses.

[0056] When the motor speed is relatively low, several consecutive Pls_Num values ​​may be zero. In this case, using the frequency division output method described above will result in the A and B phases of the frequency division output pulses being non-orthogonal, and some pulses may be missed. To solve this problem, when the motor is at low speed, the value of Pls_Num is checked. When Pls_Num is less than 2, Pls_Num is accumulated over 64 carrier cycles, and then the orthogonal frequency division output pulses are generated using the method described in step 2. Combining these two cases constitutes a method for achieving orthogonal frequency division pulse output across the entire speed range of the motor.

[0057] The principle of the origin signal output module is as follows: It counts the quadrature pulses of phases A and B at four times the frequency. When Dir output by the phase detector module is 1, the module increments the count; when Dir is 0, the module decrements the count. This continues until the value of the quadrature pulse four-times frequency counter register equals the system-set number of pulses per cycle, Pls_Set. At this point, the origin signal Z is output once, and the value of the quadrature pulse four-times frequency counter register is cleared. The width of the high level of the origin signal is twice the width of the high level of phases A and B of the frequency division output, and its phase is in phase with the leading signal of the quadrature frequency division output signal.

[0058] This application is implemented using a hardware description language, forming a hardware circuit. Utilizing the programmability of an FPGA, it transmits absolute encoder position feedback data to a host device in pulse form and outputs an origin signal. This invention is applicable to AC servo drives with high-resolution absolute encoders, feeding back motor position data to a host device to form a closed-loop position control. Compared to other frequency division output methods, this invention offers better real-time performance, ensuring two-phase orthogonal pulse output even at high and low motor speeds, without pulse loss or non-orthogonal output pulses. Practical application results are excellent, meeting the needs of most applications.

[0059] All of the above-mentioned optional technical solutions can be combined in any way to form the optional embodiments of this application, and will not be described in detail here.

[0060] Based on the same concept, this application also provides a pulse output device, such as... Figure 6 As shown, the pulse output device includes: Phase module 601 is used to obtain encoder position increment according to a preset sampling period, and to determine the pulse phase relationship of the orthogonal two-phase pulses in each sampling period according to the sign of the encoder position increment obtained in each sampling period. The timing module 602 is used to determine the pulse square wave level flipping timing corresponding to the orthogonal two-phase pulses in each sampling period based on the encoder position increment corresponding to each sampling period and the preset increment threshold. The output module 603 is used to output the orthogonal two-phase pulse corresponding to each sampling period based on the pulse phase relationship and the pulse square wave level flipping beat within each sampling period.

[0061] In some examples, the clock module 602 is also used to accumulate the encoder position increment corresponding to each sampling period clockwise according to the system clock within each sampling period, and compare the accumulated result with the increment threshold; if the absolute value of the accumulated result is higher than the increment threshold, the clock is triggered to flip the pulse square wave level; after triggering the clock is flipped, the increment threshold is subtracted from the accumulated result, and the encoder position increment corresponding to each sampling period is re-accumulated clockwise according to the system clock.

[0062] In some examples, the cycle module 602 is also used to compare the absolute value of the encoder position increment of the current sampling period with a preset target increment value; if the absolute value of the encoder position increment is less than the target increment value, the encoder position increment corresponding to the current sampling period is added to the encoder position increment corresponding to the previous N sampling periods, and the result is used as the encoder position increment corresponding to the current sampling period.

[0063] In some examples, the output module 603 is also used to perform frequency multiplication counting on the output quadrature two-phase pulses to obtain the frequency multiplication counting result; when the frequency multiplication counting result is equal to the preset number of single-turn pulses, the origin signal pulse is output.

[0064] In some examples, the output module 603 is also used to determine the corresponding counting method based on the sign of the encoder position increment in each sampling period; and to perform frequency multiplication counting on the output quadrature two-phase pulses according to the counting method to obtain the frequency multiplication counting result.

[0065] In some examples, the phase module 601 is also used to calculate the difference between the encoder position corresponding to the current sampling period and the encoder position corresponding to the previous sampling period to obtain the encoder position increment corresponding to the current sampling period.

[0066] In some examples, the phase module 601 is also used to determine the pulse phase relationship between the two quadrature pulses as follows: when the encoder position increment is positive during the sampling period, the A phase pulse leads the B phase pulse by 90°; when the encoder position increment is negative during the sampling period, the B phase pulse leads the A phase pulse by 90°.

[0067] According to the scheme provided in the embodiments of this application, the encoder position increment is obtained according to a preset sampling period, and the pulse phase relationship of the orthogonal two-phase pulses in each sampling period is determined according to the sign of the encoder position increment obtained in each sampling period; the pulse square wave level flipping beat corresponding to the orthogonal two-phase pulses in each sampling period is determined according to the encoder position increment corresponding to each sampling period and a preset increment threshold; the orthogonal two-phase pulses corresponding to each sampling period are output according to the pulse phase relationship and the pulse square wave level flipping beat in each sampling period. This application obtains the encoder position increment in the preset sampling period and determines the rotation direction according to its sign, thereby directly determining the phase relationship of the orthogonal two-phase pulses; then, the position increment is accumulated and compared with the preset threshold to obtain the pulse square wave level flipping beat, and the corresponding number of A / B pulse flips are output accordingly. Therefore, the encoder's continuous absolute position information is mapped cycle-by-cycle to a standard incremental pulse output. The phase difference between the A / B pulses ensures accurate direction determination, the correspondence between the number of pulses and the position increment ensures correct displacement counting, and threshold accumulation and rollback processing prevent missed pulses at low speeds and loss of orthogonality at high speeds. Based on this scheme, even if the host device only supports the A / B (and optional Z) pulse interface, it can still accurately determine the motor's position and direction by acquiring the output pulses from the encoder. This achieves seamless compatibility between the encoder and traditional pulse interfaces, significantly improving the system's versatility and reliability, and avoiding the problem in related technologies where the encoder's output position information cannot be converted into pulses recognizable by the host device.

[0068] Figure 7 This is a schematic diagram of the electronic device 7 provided in an embodiment of this application. Figure 7 As shown, the electronic device 7 of this embodiment includes a processor 701, a memory 702, and a computer program 703 stored in the memory 702 and executable on the processor 701. When the processor 701 executes the computer program 703, it implements the steps in the various method embodiments described above. Alternatively, when the processor 701 executes the computer program 703, it implements the functions of each module / unit in the various pulse output device embodiments described above.

[0069] Electronic device 7 can be a desktop computer, laptop, handheld computer, cloud server, or other electronic device. Electronic device 7 may include, but is not limited to, processor 701 and memory 702. Those skilled in the art will understand that... Figure 7 This is merely an example of electronic device 7 and does not constitute a limitation on electronic device 7. It may include more or fewer components than shown, or different components.

[0070] The processor 701 can be a central processing unit (CPU), or other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc.

[0071] The memory 702 can be an internal storage unit of the electronic device 7, such as a hard disk or RAM of the electronic device 7. The memory 702 can also be an external storage device of the electronic device 7, such as a plug-in hard disk, Smart Media Card (SMC), Secure Digital (SD) card, Flash Card, etc., equipped on the electronic device 7. The memory 702 can also include both internal and external storage units of the electronic device 7. The memory 702 is used to store computer programs and other programs and data required by the electronic device.

[0072] Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the above-described division of functional units and modules is merely an example. In practical applications, the above functions can be assigned to different functional units and modules as needed, that is, the internal structure of the pulse output device can be divided into different functional units or modules to complete all or part of the functions described above. The functional units and modules in the embodiments can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit.

[0073] If an integrated module / unit is implemented as a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, all or part of the processes in the methods of the above embodiments can also be implemented by a computer program instructing related hardware. The computer program can be stored in a computer-readable storage medium, and when executed by a processor, it can implement the steps of the various method embodiments described above. The computer program may include computer program code, which can be in the form of source code, object code, executable files, or certain intermediate forms. The computer-readable medium may include: any entity or pulse output device capable of carrying computer program code, recording media, USB flash drives, portable hard drives, magnetic disks, optical disks, computer memory, read-only memory (ROM), random access memory (RAM), electrical carrier signals, telecommunication signals, and software distribution media, etc. It should be noted that the content included in the computer-readable medium can be appropriately added or removed according to regional requirements and patent practice requirements. For example, in some regions, according to regional requirements and patent practice, the computer-readable medium does not include electrical carrier signals and telecommunication signals.

[0074] The above embodiments are only used to illustrate the technical solutions of this application, and are not intended to limit them. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this application, and should all be included within the protection scope of this application.

Claims

1. A pulse output method, characterized in that, The method includes: The encoder position increment is obtained according to a preset sampling period, and the pulse phase relationship of the orthogonal two-phase pulses in each sampling period is determined according to the sign of the encoder position increment obtained in each sampling period. Based on the encoder position increment corresponding to each sampling period and the preset increment threshold, the pulse square wave level flipping beat corresponding to the orthogonal two-phase pulse in each sampling period is determined. Based on the pulse phase relationship and the pulse square wave level flipping rhythm within each sampling period, the quadrature two-phase pulse corresponding to each sampling period is output.

2. The method according to claim 1, characterized in that, Based on the encoder position increment corresponding to each sampling period and a preset increment threshold, the pulse square wave level flipping beat corresponding to the orthogonal two-phase pulses in each sampling period is determined, including: Within each sampling period, the encoder position increment corresponding to each sampling period is accumulated clockwise according to the system clock, and the accumulated result is compared with the increment threshold. If the absolute value of the accumulated result is higher than the incremental threshold, the pulse square wave level flipping beat is triggered; After triggering the pulse square wave level flipping beat, the accumulated result is subtracted from the incremental threshold, and the encoder position increment corresponding to each sampling period is re-accumulated clockwise according to the system clock.

3. The method according to claim 2, characterized in that, Before accumulating the encoder position increment corresponding to each sampling period clockwise according to the system clock frequency, the method further includes: The absolute value of the encoder position increment in the current sampling period is compared with a preset target increment value; If the absolute value of the encoder position increment is less than the target increment value, then the encoder position increment corresponding to the current sampling period is added to the encoder position increment corresponding to the previous N sampling periods, and the result is used as the encoder position increment corresponding to the current sampling period.

4. The method according to claim 1, characterized in that, Based on the pulse phase relationship and the pulse square wave level flipping rhythm within each sampling period, after outputting the quadrature two-phase pulse corresponding to each sampling period, the method further includes: The frequency multiplication count is performed on the output quadrature two-phase pulses to obtain the frequency multiplication count result; When the frequency multiplication count result is equal to the preset number of single-cycle pulses, the origin signal pulse is output.

5. The method according to claim 4, characterized in that, The frequency multiplication and counting of the output quadrature two-phase pulses are performed to obtain the frequency multiplication and counting results, including: The corresponding counting method is determined based on the sign of the encoder position increment within each sampling period; The frequency multiplication count is performed on the output quadrature two-phase pulses according to the counting method to obtain the frequency multiplication count result.

6. The method according to claim 1, characterized in that, The encoder position increment is obtained according to a preset sampling period, including: The difference between the encoder position corresponding to the current sampling period and the encoder position corresponding to the previous sampling period is calculated to obtain the encoder position increment corresponding to the current sampling period.

7. The method according to claim 1, characterized in that, The quadrature two-phase pulse includes an A-phase pulse and a B-phase pulse; the pulse phase relationship of the quadrature two-phase pulse in each sampling period is determined based on the sign of the encoder position increment acquired in each sampling period, including: When the encoder position increment is positive within the sampling period, the pulse phase relationship corresponding to the orthogonal two-phase pulses is determined to be that the A-phase pulse leads the B-phase pulse by 90°. When the encoder position increment is negative within the sampling period, the pulse phase relationship corresponding to the quadrature two-phase pulses is determined to be that the B-phase pulse leads the A-phase pulse by 90°.

8. A pulse output device, characterized in that, The device includes: The phase module is used to obtain the encoder position increment according to a preset sampling period, and to determine the pulse phase relationship of the orthogonal two-phase pulses in each sampling period according to the sign of the encoder position increment obtained in each sampling period. The timing module is used to determine the pulse square wave level flipping timing corresponding to the orthogonal two-phase pulses in each sampling period based on the encoder position increment corresponding to each sampling period and a preset increment threshold. The output module is used to output the orthogonal two-phase pulse corresponding to each sampling period based on the pulse phase relationship and the pulse square wave level flipping beat within each sampling period.

9. An electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that, When the processor executes the computer program, it implements the steps of the method as described in any one of claims 1 to 7.

10. A computer-readable storage medium storing a computer program, characterized in that, When the computer program is executed by a processor, it implements the steps of the method as described in any one of claims 1 to 7.

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