Printed circuit board
By stacking different insulating materials on the glass layer and forming side surface protrusions or steps to connect vias, the problems of printed circuit board warpage and low adhesion are solved, achieving higher adhesion and reliability.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- SAMSUNG ELECTRO MECHANICS CO LTD
- Filing Date
- 2025-06-18
- Publication Date
- 2026-06-05
AI Technical Summary
With the trend towards higher performance and smaller size of semiconductors, printed circuit boards are prone to warping and the glass layer has low adhesion to the insulating material, leading to voids or delamination problems.
A first insulating layer and a second insulating layer of different insulating materials are stacked on a glass layer, and a connecting via is formed that penetrates both. The side surface of the connecting via has protrusions or steps to improve adhesion.
It improves the adhesion between the glass layer and the insulating layer, reduces voids and delamination, and enhances the reliability and design flexibility of printed circuit boards.
Smart Images

Figure CN122161002A_ABST
Abstract
Description
[0001] This application claims the benefit of priority to Korean Patent Application No. 10-2024-0177248, filed on December 3, 2024, with the Korean Intellectual Property Office, the entire disclosure of which is incorporated herein by reference. Technical Field
[0002] This disclosure relates to a printed circuit board. Background Technology
[0003] To address the trends of increasing performance and miniaturization in semiconductors, the requirements for miniaturization and high density of printed circuit boards have become more stringent. For example, manufacturing high-end products such as server boards requires multi-layered and large substrates. However, with the increase in the number of wiring layers and the increase in substrate size, server boards may become prone to warping. To address this issue, the use of glass cores is being considered. However, because the surface of glass is smooth, its adhesion to insulating materials is low, which can lead to voids or delamination. Summary of the Invention
[0004] One aspect of this disclosure is to provide a printed circuit board that improves adhesion between the glass layer and the insulating layer, and reduces voids and delamination.
[0005] One of the various technical solutions disclosed herein involves stacking a first insulating layer and a second insulating layer comprising different insulating materials on a glass layer, and forming a connecting via that penetrates both the first and second insulating layers. In this case, the side surface of the connecting via may have a protrusion or a step portion inside the first and second insulating layers (e.g., near the boundary between the first and second insulating layers).
[0006] For example, a printed circuit board according to an example embodiment may include: a glass layer; a metal via penetrating at least a portion between an upper surface and a lower surface of the glass layer; a first insulating layer disposed on the upper surface of the glass layer; a second insulating layer disposed on the upper surface of the first insulating layer and comprising an insulating material different from the insulating material of the first insulating layer; a first wiring layer disposed on the upper surface of the second insulating layer; and a first connection via penetrating both the first and second insulating layers and connecting at least a portion of the first wiring layer to the upper surface of the metal via.
[0007] For example, a printed circuit board according to an example embodiment may include: a glass layer; a metal via penetrating at least a portion of the glass layer; an insulating layer disposed on the glass layer; a wiring layer disposed on the insulating layer; and a connection via penetrating the insulating layer and connecting at least a portion of the wiring layer to the metal via. The side surface of the connection via may have a protrusion or a stepped portion, and the protrusion or the stepped portion may be disposed inside the insulating layer.
[0008] One of the various effects of this disclosure is to provide a printed circuit board that improves adhesion between the glass layer and the insulating layer, and reduces voids and delamination. Attached Figure Description
[0009] The above and other aspects, features, and advantages of this disclosure will be more clearly understood through the following detailed embodiments, taken in conjunction with the accompanying drawings, in which: Figure 1 It is a block diagram that schematically illustrates an example of an electronic device system; Figure 2 This is a schematic cross-sectional view illustrating an example of a printed circuit board; Figure 3 It is a schematic representation of manufacturing. Figure 2 A process diagram of an enlarged section of a printed circuit board; Figure 4 This is a schematic cross-sectional view illustrating another example of a printed circuit board; and Figure 5 and Figure 6 These are cross-sectional views schematically illustrating another example of a printed circuit board. Detailed Implementation
[0010] The present disclosure will be described below with reference to the accompanying drawings. In the drawings, the shape and size of the elements may be enlarged or reduced for clarity.
[0011] Figure 1 This is a block diagram that schematically illustrates an example of an electronic device system.
[0012] Reference Figure 1 The electronic device 1000 houses a motherboard 1010. Chip-related components 1020, network-related components 1030, and other components 1040 are physically and / or electrically connected to the motherboard 1010. These components are also connected to other electronic components, which will be described below, via various signal lines 1090.
[0013] Chip-related components 1020 may include: memory chips, such as volatile memory (e.g., DRAM), non-volatile memory (e.g., ROM, flash memory), etc.; application processor chips, such as central processing units (e.g., CPUs), graphics processing units (e.g., GPUs), digital signal processors, cryptographic processors, microprocessors, microcontrollers, etc.; and logic chips, such as analog-to-digital converters (ADCs), application-specific integrated circuits (ASICs), etc. However, chip-related components 1020 are not limited to these and may also include other types of chip-related components. Furthermore, chip-related components 1020 can be combined with each other. Chip-related components 1020 may be in the form of a package including the aforementioned chips or electronic components.
[0014] Network-related components 1030 may include components compatible with or operating according to protocols such as: Wi-Fi (such as the IEEE 802.11 series), WiMAX (such as the IEEE 802.16 series), IEEE 802.20, LTE, Ev-DO, HSPA+, HSDPA+, HSUPA+, GSM+, EDGE+, GPS, GPRS, CDMA, TDMA, DECT, Bluetooth, LAN, 3G, 4G, and 5G protocols, as well as any other wireless or wired standards or protocols specified herein. However, network-related component 1030 is not limited to this, and may also include components that are compatible with or operate according to any of a plurality of other wireless standards or protocols and wired standards or protocols. Furthermore, network-related component 1030 may be combined with chip-related component 1020.
[0015] Other components 1040 may include high-frequency inductors, ferrite inductors, power inductors, ferrite beads, low-temperature co-fired ceramic (LTCC) components, electromagnetic interference (EMI) filters, multilayer ceramic capacitors (MLCCs), etc. However, other components 1040 are not limited to these and may also include passive components in the form of chip modules for various other purposes. Furthermore, other components 1040 may be combined with chip-related components 1020 and / or network-related components 1030.
[0016] Depending on the type of electronic device 1000, it may include other electronic components that are physically and / or electrically connected to the motherboard 1010 or not physically and / or electrically connected to the motherboard 1010. These other electronic components may include, for example, a camera 1050, an antenna 1060, a display 1070, and a battery 1080. However, these other electronic components are not limited to these and may also include audio codecs, video codecs, power amplifiers, compasses, accelerometers, gyroscopes, speakers, mass storage devices (e.g., hard disk drives), optical discs (CDs), digital versatile optical discs (DVDs), etc. In addition, depending on the type of electronic device 1000, it may also include other electronic components for various purposes.
[0017] Electronic device 1000 can be a smartphone, personal digital assistant, digital video camera, digital camera, network system, computer, monitor, tablet PC, laptop PC, netbook PC, television, video game console, smartwatch, automotive component, etc. However, electronic device 1000 is not limited to these and can be any other electronic device capable of processing data.
[0018] Figure 2 This is a schematic cross-sectional view of an example of a printed circuit board.
[0019] Reference Figure 2 According to an example embodiment, the printed circuit board 100A may include a glass layer 110, a metal via 130 penetrating at least a portion between the upper and lower surfaces of the glass layer 110, a first insulating layer 111 disposed on the upper surface of the glass layer 110, a second insulating layer 112 disposed on the upper surface of the first insulating layer 111 and including an insulating material different from the insulating material of the first insulating layer 111, a first wiring layer 121 disposed on the upper surface of the second insulating layer 112, and a first connection via 131 penetrating both the first insulating layer 111 and the second insulating layer 112 and connecting at least a portion of the first wiring layer 121 to the upper surface of the metal via 130. For example, the first insulating layer 111 may be an adhesive layer introduced to improve adhesion, and the second insulating layer 112 may be an insulating layer deposited to form the first wiring layer 121. Therefore, the first insulating layer 111 and the second insulating layer 112 may include different insulating materials and may have a clear boundary between them. In addition, the second insulating layer 112 may be thicker than the first insulating layer 111 located on the upper surface of the glass layer 110.
[0020] In this way, in the printed circuit board 100A according to the example embodiment, a first insulating layer 111, which has better adhesion to the glass layer 110 and is relatively thin, can first be formed on the glass layer 110, and then a second insulating layer 112 can be formed on the first insulating layer 111. For example, the first insulating layer 111 may include an insulating material with relatively excellent adhesion to the surface of the glass layer 110. For example, the first insulating layer 111 may include a primer and / or bonding sheet. Therefore, even when an insulating material with relatively low adhesion to the surface of the glass layer 110 (such as an Ajinomoto deposited film (ABF) comprising an epoxy-based thermosetting polymer resin) is used as the second insulating layer 112, adhesion can be sufficiently ensured, thus effectively solving problems such as voids or delamination.
[0021] Additionally, the printed circuit board 100A according to the example embodiment may further include a third insulating layer 113 disposed on the lower surface of the glass layer 110, a fourth insulating layer 114 disposed on the lower surface of the third insulating layer 113 and comprising an insulating material different from the insulating material of the third insulating layer 113, a second wiring layer 122 disposed on the lower surface of the fourth insulating layer 114, and a second connection via 132 that penetrates both the third insulating layer 113 and the fourth insulating layer 114 and connects at least a portion of the second wiring layer 122 to the lower surface of the metal via 130. For example, the third insulating layer 113 may be an adhesive layer introduced to improve adhesion, and the fourth insulating layer 114 may be an insulating layer deposited to form the second wiring layer 122. Therefore, the third insulating layer 113 and the fourth insulating layer 114 may comprise different insulating materials and may have a clear boundary between them. Furthermore, the fourth insulating layer 114 may be thicker than the third insulating layer 113 located on the lower surface of the glass layer 110.
[0022] In this way, the printed circuit board 100A according to the example embodiment may have a structure that ensures adhesion as described above on the upper and / or lower surfaces of the glass layer 110, as needed. Additionally, the first connection via 131 and the second connection via 132 may be directly connected to the metal via 130, respectively. For example, the first connection via 131 and the second connection via 132 may be directly connected to the metal via 130 without pads or lands, thereby reducing the overall thickness of the board and shortening the signal transmission path. Furthermore, the first wiring layer 121 and the second wiring layer 122 may be formed on the second insulating layer 112 and the fourth insulating layer 114, respectively, instead of on the glass layer 110, so that the reliability of the first wiring layer 121 and the second wiring layer 122 can be improved by enhancing adhesion, etc., and design versatility can be increased.
[0023] Additionally, the printed circuit board 100A according to the example embodiment may also include a frame 105 and a filler 115. The frame 105 has a through-portion H, in which at least a portion of the glass layer 110 is disposed. The filler 115 is disposed between the first insulating layer 111 and the third insulating layer 113 and fills at least a portion of the space between the frame 105 and the glass layer 110 within the through-portion H. The frame 105 may comprise a material with excellent rigidity. The frame 105 may be used as a fixture during the manufacturing process.
[0024] In this way, the printed circuit board 100A according to the example embodiment may further include a frame 105 if necessary, which can be advantageous for warp control. Additionally, the frame 105 can be used as a fixture as described above, allowing the process to be performed at the panel level via the frame 105. In this case, the frame 105 can be retained in the final unit after splitting, which can be advantageous for warp control as described above. Furthermore, the filler 115 may be formed separately from the first insulating layer 111 and the third insulating layer 113, and the boundaries between them may be distinguishable from each other, but this disclosure is not limited thereto. For example, if desired, the through-hole H may be filled to form the filler 115 while forming at least one of the first insulating layer 111 and the third insulating layer 113, in which case the filler 115 may be integrated with said at least one of the first insulating layer 111 and the third insulating layer 113 without boundaries.
[0025] Additionally, the printed circuit board 100A according to the example embodiment may further include a plurality of first stacked insulating layers 141 disposed on the upper surface of the second insulating layer 112, a plurality of first stacked wiring layers 142 disposed on or within the plurality of first stacked insulating layers 141, and / or a plurality of first stacked via layers 143 respectively disposed within the plurality of first stacked insulating layers 141 and respectively connected to at least one of the plurality of first stacked wiring layers 142. For example, if necessary, a stacked layer may be further formed on the upper side of the glass layer 110. For example, the printed circuit board 100A may have a stacked layer formed on at least one side of the glass layer 110, and the printed circuit board 100A may be used as a package substrate or an interposer substrate, etc.
[0026] Additionally, the printed circuit board 100A according to the example embodiment may further include a plurality of second stacked insulating layers 151 disposed on the lower surface of the fourth insulating layer 114, a plurality of second stacked wiring layers 152 disposed on or within the plurality of second stacked insulating layers 151, and / or a plurality of second stacked via layers 153 respectively disposed within the plurality of second stacked insulating layers 151 and respectively connected to at least one of the plurality of second stacked wiring layers 152. For example, if necessary, a stacked layer may be further formed on the lower side of the glass layer 110. For example, the printed circuit board 100A may have stacked layers formed on both sides of the glass layer 110, and the printed circuit board 100A may be used as a package substrate or an interposer substrate, etc.
[0027] Additionally, the printed circuit board 100A according to the example embodiment may further include a first passivation layer 161 and / or a second passivation layer 162. The first passivation layer 161 is disposed on the uppermost first stacked insulating layer 141 among a plurality of first stacked insulating layers 141, covering at least a portion of the uppermost first stacked wiring layer 142 among a plurality of first stacked wiring layers 142 and having a first opening that exposes at least another portion thereof. The second passivation layer 162 is disposed on the lowermost second stacked insulating layer 151 among a plurality of second stacked insulating layers 151, covering at least a portion of the lowermost second stacked wiring layer 152 among a plurality of second stacked wiring layers 152 and having a second opening that exposes at least another portion thereof. For example, if necessary, the passivation layers 161 and 162 may be further formed on the outermost side of the printed circuit board 100A. Therefore, the internal structure of the printed circuit board 100A can be more easily protected.
[0028] In the following description, the components of the printed circuit board 100A according to an exemplary embodiment will be described in more detail with reference to the accompanying drawings.
[0029] Frame 105 may include an insulating material. The insulating material may include thermosetting resins such as epoxy resins, thermoplastic resins such as polyimide, or materials comprising inorganic fillers, organic fillers, and / or glass fibers (such as glass fabrics, for example, glass cloth) and resins. For example, the insulating material may include copper-clad laminate (CCL) or bare CCL, but this disclosure is not limited thereto, and the insulating material may include other organic or inorganic materials with excellent rigidity. The through-hole H may penetrate the area between the upper and lower surfaces of frame 105. The through-hole H may continuously surround the side surface of glass layer 110.
[0030] Glass layer 110 may comprise glass (an amorphous solid). The glass may include, for example, pure silica (approximately 100% SiO2), soda-lime glass, borosilicate glass, aluminosilicate glass, etc. However, this disclosure is not limited thereto, and the glass may comprise alternative glass materials (e.g., fluorine glass, phosphate glass, chalcogenide glass, etc.). Furthermore, other additives may be included to form a glass with specific physical properties. These additives may include magnesium, calcium, manganese, aluminum, lead, boron, iron, chromium, potassium, sulfur, antimony, and carbonates (such as calcium carbonate (e.g., limestone) and sodium carbonate (e.g., soda ash)) and / or oxides of these elements and other elements. Additionally, glass layer 110 may be distinguished from organic insulating materials (e.g., copper-clad laminates (CCL), prepregs (PPG), etc.) comprising glass fibers (such as glass fabrics, for example, glass cloth). Glass layer 110 may be in the form of, for example, a glass plate. A through-hole V, wherein a metal via 130 is provided, penetrates the region between the upper and lower surfaces of glass layer 110. The glass layer 110 may have a generally rectangular shape in a plane, but this disclosure is not limited thereto. For example, the glass layer 110 may have a generally elliptical shape in a plane.
[0031] Compared to the second insulating layer 112 and the fourth insulating layer 114, each of the first insulating layer 111 and the third insulating layer 113 may include an insulating material with relatively superior adhesion to the glass layer 110. That is, the adhesion force of each of the first insulating layer 111 and the third insulating layer 113 to the glass layer 110 may be greater than the adhesion force of each of the second insulating layer 112 and the fourth insulating layer 114 to the glass layer 110. For example, each of the first insulating layer 111 and the third insulating layer 113 may include a primer and / or a bonding sheet. The primer may be an organosilane primer, an epoxy primer, a polyurethane primer, an acrylic primer, etc., but is not limited thereto. The bonding sheet may be an epoxy adhesive sheet, a polyimide adhesive sheet, a polyurethane adhesive sheet, an acrylic adhesive sheet, or a silicone adhesive sheet, but is not limited thereto. As described above, each of the first insulating layer 111 and the third insulating layer 113 may include an insulating material different from the insulating materials of the second insulating layer 112 and the fourth insulating layer 114.
[0032] The second insulating layer 112 and the fourth insulating layer 114 may comprise insulating materials, more specifically, organic insulating materials. Organic insulating materials may include thermosetting resins such as epoxy resins, thermoplastic resins such as polyimides, or materials comprising inorganic fillers, organic fillers, and / or glass fibers (such as glass fabrics, for example, glass cloth) and resins. For example, organic insulating materials may include prepreg (PPG) and Ajinomoto laminate (ABF), but this disclosure is not limited thereto. As described above, the second insulating layer 112 and the fourth insulating layer 114 may each comprise insulating materials different from the insulating materials of the first insulating layer 111 and the third insulating layer 113.
[0033] Each of the first wiring layer 121 and the second wiring layer 122 may include a metal. The metal may include copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), and / or alloys thereof. For example, each of the first wiring layer 121 and the second wiring layer 122 may include a chemically plated copper layer formed by electroless plating as a seed layer, and may include an electrolytically plated copper layer formed by electrolytic plating as a plating layer formed on the seed layer. The first wiring layer 121 and the second wiring layer 122 may each perform various functions according to the design. For example, each of the first wiring layer 121 and the second wiring layer 122 may include signal patterns, power patterns, and ground patterns. These patterns may each have various shapes, such as lines (e.g., traces), planes, pads, and connection pads.
[0034] The metal via 130 may include a metal. The metal may include copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), and / or alloys thereof. For example, the metal via 130 may include a titanium and copper layer formed by sputtering (i.e., sputtered titanium and sputtered copper layers) as a seed layer, and may include an electrolytically plated copper layer formed by electrolytic plating as a plating layer formed on the seed layer. If desired, the metal via 130 may also include a chemically plated copper layer formed by electroless plating on the titanium and copper layers formed by sputtering as seed layers. The metal via 130 may perform various functions depending on the design. For example, the metal via 130 may include a through-via for signal transmission, a through-via for power transmission, and a through-via for grounding. The metal via 130 may include a filled via in which at least a portion of the via V is filled with metal. The metal via 130 may have a cylindrical shape, but may also have an hourglass shape. Compared to the upper and lower surfaces of the glass layer 110, the upper and lower surfaces of the metal via 130 may be recessed inward. Therefore, the upper and lower surfaces of the metal via 130 may have a step difference relative to the upper and lower surfaces of the glass layer 110, but this disclosure is not limited thereto. Multiple metal vias 130 may be provided.
[0035] Each of the first connection via 131 and the second connection via 132 may include a metal. The metal may include copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), and / or alloys thereof. For example, each of the first connection via 131 and the second connection via 132 may include a chemically plated copper layer formed by electroless plating as a seed layer, and may include an electrolytically plated copper layer formed by electrolytic plating as a plating layer formed on the seed layer. Each of the first connection via 131 and the second connection via 132 may perform various functions according to the design. For example, each of the first connection via 131 and the second connection via 132 may include a connection via for signal transmission, a connection via for power transmission, and a connection via for grounding. The first connecting via 131 may include a filled via in which at least a portion of the passage hole v1 is filled with metal, but may also include a conformal via in which metal is disposed along the wall surface of the passage hole v1. The second connecting via 132 may include a filled via in which at least a portion of the passage hole v2 is filled with metal, but may also include a conformal via in which metal is disposed along the wall surface of the passage hole v2. The first connecting via 131 and the second connecting via 132 may have a tapering shape in opposite directions. The first connecting via 131 and the second connecting via 132 may be directly connected to the upper and lower surfaces of the metal via 130, respectively. For example, the first connecting via 131 and the second connecting via 132 may directly contact the upper and lower surfaces of the metal via 130, respectively. For example, the metal via 130 and the first connecting via 131 may contact each other on a plane coplanar with the upper surface of the glass layer 110, and / or the metal via 130 and the second connecting via 132 may contact each other on a plane coplanar with the lower surface of the glass layer 110. When there are multiple metal vias 130, there may also be multiple first connection vias 131 and second connection vias 132.
[0036] Each of the plurality of first stacked insulating layers 141 and the plurality of second stacked insulating layers 151 may include an organic insulating material. The organic insulating material may include thermosetting resins such as epoxy resins, thermoplastic resins such as polyimides, or materials comprising inorganic fillers, organic fillers, and / or glass fibers (such as glass fabrics, for example, glass cloth) and resins. For example, the organic insulating material may include prepreg (PPG), Ajinomoto laminate (ABF), and photosensitive dielectric (PID), but this disclosure is not limited thereto. Each of the plurality of first stacked insulating layers 141 and the plurality of second stacked insulating layers 151 may be formed using multiple layers. In this case, the multiple layers may be integral without boundaries, or the boundaries between the multiple layers may be identifiable. Additionally, each of the multiple layers may include substantially the same insulating material, or may include different insulating materials. The plurality of first stacked insulating layers 141 and the plurality of second stacked insulating layers 151 may have the same number of layers, but this disclosure is not limited thereto, and the plurality of first stacked insulating layers 141 may have a relatively large number of layers. The plurality of second stacked insulating layers 151 may be omitted if desired.
[0037] Each of the first stacked wiring layer 142 and the second stacked wiring layer 152 may include a metal. The metal may include copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), and / or alloys thereof. For example, each of the first stacked wiring layer 142 and the second stacked wiring layer 152 may include a chemically plated copper layer formed by electroless plating as a seed layer, and may include an electrolytically plated copper layer formed by electrolytic plating as a plating layer formed on the seed layer. Each of the first stacked wiring layer 142 and the second stacked wiring layer 152 may perform various functions according to the design. For example, each of the first stacked wiring layer 142 and the second stacked wiring layer 152 may include signal patterns, power patterns, and ground patterns. Each of the patterns may have various forms, such as lines (e.g., traces), planes, pads, and connection pads. Multiple first stacked wiring layers 142 and multiple second stacked wiring layers 152 may have the same number of layers, but multiple first stacked wiring layers 142 may also have a relatively larger number of layers. When multiple second stacked insulating layers 151 are omitted, multiple second stacked wiring layers 152 can also be omitted.
[0038] Each of the plurality of first stacked via layers 143 and the plurality of second stacked via layers 153 may include a metal. The metal may include copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), and / or alloys thereof. For example, each of the plurality of first stacked via layers 143 and the plurality of second stacked via layers 153 may include a chemically plated copper layer formed by electroless plating as a seed layer, and may include an electrolytically plated copper layer formed by electrolytic plating as a plating layer formed on the seed layer. Each of the plurality of first stacked via layers 143 and the plurality of second stacked via layers 153 may perform various functions according to design. For example, each of the plurality of first stacked via layers 143 and the plurality of second stacked via layers 153 may include a connection via for signal transmission, a connection via for power transmission, and a connection via for grounding. Each of the plurality of first stacked via layers 143 and the plurality of second stacked via layers 153 may include a filled via in which at least a portion of the via hole is filled with metal, but may also include a conformal via in which metal is disposed along the wall surface of the via hole. Each of the plurality of first stacked via layers 143 and the plurality of second stacked via layers 153 may include a plurality of connecting vias. The connecting vias included in each of the plurality of first stacked via layers 143 may have a shape that tapers in the opposite direction to the connecting vias included in each of the plurality of second stacked via layers 153. The plurality of first stacked via layers 143 and the plurality of second stacked via layers 153 may have the same number of layers, but the plurality of first stacked via layers 143 may also have a relatively larger number of layers. When the plurality of second stacked insulating layers 151 are omitted, the plurality of second stacked via layers 153 may also be omitted.
[0039] Each of the first passivation layer 161 and the second passivation layer 162 may include an organic insulating material. The organic insulating material may include thermosetting resins such as epoxy resins, thermoplastic resins such as polyimides, or materials comprising inorganic fillers, organic fillers, and / or glass fibers (such as glass fabrics, for example, glass cloth) and resins. For example, the organic insulating material may include Ajinomoto deposited film (ABF), photosensitive dielectric (PID), solder resist (SR), but this disclosure is not limited thereto. Each of the first passivation layer 161 and the second passivation layer 162 may be formed using multiple layers. Each of the first passivation layer 161 and the second passivation layer 162 may have multiple openings, and the pattern exposed through each opening may be a solder mask defined (SMD) type pattern and / or a non-solder mask defined (NSMD) type pattern, but this disclosure is not limited thereto.
[0040] Figure 3 It is a schematic representation of manufacturing. Figure 2 A process diagram of an enlarged section of a printed circuit board.
[0041] Reference Figure 3 First, a metal via 130 can be formed in the glass layer 110. For example, a via V penetrating the glass layer 110 can be formed using laser ablation, ultrasonic drilling, dry etching, wet etching, etc. Then, at least a portion of the via V can be filled with metal using a fill plating process such as sputtering, electroless plating, and / or electrolytic plating, thereby forming the metal via 130. Next, a first insulating layer 111 can be formed on the glass layer 110. For example, the first insulating layer 111 can be formed by coating or stacking a primer and / or bonding sheet material on the glass layer 110. The first insulating layer 111 can be a layer for enhancing adhesion, and therefore can be formed to be relatively thinner than the second insulating layer 112. Next, a second insulating layer 112 can be formed on the first insulating layer 111. For example, the second insulating layer 112 can be formed by stacking an insulating material (such as a deposited film) different from the insulating material of the first insulating layer 111 on the first insulating layer 111. The second insulating layer 112 can be a layer for stacking, and therefore can be formed to be relatively thicker than the first insulating layer 111. Next, a via v1 can be formed that penetrates both the first insulating layer 111 and the second insulating layer 112 and exposes at least a portion of the metal via 130. The via v1 can be formed by laser processing, such as CO2 laser processing or UV laser processing. Next, a first connection via 131 that fills at least a portion of the via v1 can be formed. In addition, a first wiring layer 121 can be formed on the second insulating layer 112. The first connection via 131 and the first wiring layer 121 can be formed by plating processes using electroless plating and / or electrolytic plating. Through a series of processes, the first insulating layer 111, the second insulating layer 112, the first connection via 131, and the first wiring layer 121 can be formed on the upper side of the glass layer 110. The same process as described above can be performed on the underside of the glass layer 110, thus forming the third insulating layer 113, the fourth insulating layer 114, the second connection via 132, and the second wiring layer 122 on the underside of the glass layer 110. The above description can be applied substantially equivalently to the printed circuit board 100A according to the above example embodiment.
[0042] Figure 4 This is a schematic cross-sectional view illustrating another example of a printed circuit board.
[0043] Reference Figure 4According to another example embodiment, the printed circuit board 100B can be constructed such that, compared to the printed circuit board 100A according to the example embodiment described above, the side surface of the first connecting via 131 may have a protrusion P1, in which case the protrusion P1 may be disposed adjacent to the boundary between the first insulating layer 111 and the second insulating layer 112. Furthermore, as the protrusion P1 extends further from the side surface of the first connecting via 131, the thickness of the protrusion P1 may become thinner. For example, in laser processing for forming the via hole v1, when heat from the light source accumulates at the boundary of the first insulating layer 111 and the second insulating layer 112, which comprise different materials, the heat may diffuse into the gap between the boundary surfaces. In this case, since heat accumulates centered on the boundary surface, the processability at the boundary surface can be much improved compared to other areas, resulting in the formation of a recessed space along the boundary surface. When metal is filled into this space, the protrusion P1 as described above can be formed. In this way, when the protrusion P1 is formed on the side surface of the first connection via 131, the adhesion between the first connection via 131 and the first insulating layer 111 and the first connection via 131 and the second insulating layer 112 can be improved, and the reliability can be further improved.
[0044] Alternatively, the second connecting via 132 may also have a protrusion P2 on its side surface. In this case, the protrusion P2 may be disposed adjacent to the boundary between the third insulating layer 113 and the fourth insulating layer 114. Furthermore, as the protrusion P2 extends further from the side surface of the third connecting via 133, its thickness may become thinner. For example, in laser processing for forming the via hole v2, heat accumulation and diffusion due to the light source may occur at the boundary surface of the third insulating layer 113 and the fourth insulating layer 114, which comprise different materials. As a result, a recessed space may be formed along the boundary surface between the third insulating layer 113 and the fourth insulating layer 114, and metal may fill this space, thus forming the aforementioned protrusion P2. When the protrusion P2 is formed on the side surface of the second connecting via 132, the adhesion between the second connecting via 132 and the third insulating layer 113, and between the second connecting via 132 and the fourth insulating layer 114, can be improved, and reliability can be further improved.
[0045] Other descriptions are substantially the same as those in the printed circuit board 100A according to the above example embodiment. Additionally, except for the via processing shape, the above manufacturing example embodiment can be applied in substantially the same manner to manufacture the printed circuit board 100B according to another example embodiment.
[0046] Figure 5 and Figure 6 These are cross-sectional views schematically illustrating another example of a printed circuit board.
[0047] Reference Figure 5 and Figure 6 According to another example embodiment, printed circuit boards 100C and 100D can be constructed such that, compared to printed circuit board 100A according to the above example embodiment, each side surface of the first connection via 131 can have a step portion T1 and T1', in which case the step portions T1 and T1' can be disposed adjacent to the boundary between the first insulating layer 111 and the second insulating layer 112, respectively. Additionally, each first connection via 131 can include a first region penetrating the first insulating layer 111 and a second region penetrating the second insulating layer 112, and the side surface of the first connection via 131 located in the first region and the side surface of the first connection via 131 located in the second region can be connected to each other via the step portions T1 and T1', respectively. For example, depending on the type or composition of the materials used in the first insulating layer 111 and the second insulating layer 112, which include different materials, there may be differences in absorptivity, transmittance, reflectivity, etc., for a laser light source; therefore, the amount or degree of heat generated within the first insulating layer 111 and the second insulating layer 112 may differ from each other. Furthermore, the laser absorptivity can vary depending on the laser wavelength or power, the degree of thermal diffusivity of the material, etc., and the thermal diffusivity of the material can be related to the thermal conductivity and heat capacity, which are material properties, as well as the density of the material. Therefore, even when using the same heat source, the size or expansion amount of the via formed in each of the first insulating layer 111 and the second insulating layer 112 may differ depending on the differences in the thermal properties of the material. As a result, the via may be formed discontinuously at the boundary between the first insulating layer 111 and the second insulating layer 112. For example, the outer wall of the via may have a stepped structure. For example, as in the printed circuit board 100C according to another example embodiment, when the expansion amount in the first insulating layer 111 due to processing heat is greater than the expansion amount in the second insulating layer 112 due to processing heat, the width of the first connecting via 131 at the uppermost side of the first region may be larger than the width of the first connecting via 131 at the lowermost side of the second region in the cross-section of the printed circuit board. Furthermore, in a printed circuit board 100D according to another example embodiment, when the expansion amount in the second insulating layer 112 due to processing heat is greater than the expansion amount in the first insulating layer 111 due to processing heat, the width of the first connecting via 131 at the uppermost side of the first region may be smaller than the width of the first connecting via 131 at the lowermost side of the second region in the cross-section of the printed circuit board.
[0048] Additionally, printed circuit boards 100C and 100D according to another example embodiment may be constructed such that, compared to printed circuit board 100A according to the example above, each side surface of the second connection via 132 may have steps T2 and T2', in which case the steps T2 and T2' may be disposed adjacent to the boundary between the third insulating layer 113 and the fourth insulating layer 114, respectively. Furthermore, each second connection via 132 may include a third region penetrating the third insulating layer 113 and a fourth region penetrating the fourth insulating layer 114, and the side surfaces of the second connection via 132 in the third region and the side surfaces of the second connection via 132 in the fourth region may be connected to each other via steps T2 and T2', respectively. For example, as described above, the size or expansion amount of the vias formed in each of the third insulating layer 113 and the fourth insulating layer 114, which comprise different materials, may differ, resulting in the vias potentially being discontinuously formed at the boundary between the third insulating layer 113 and the fourth insulating layer 114. For example, the outer wall of the via may have a stepped structure. For example, in a printed circuit board 100C according to another example embodiment, when the expansion amount in the third insulating layer 113 due to processing heat is greater than the expansion amount in the fourth insulating layer 114 due to processing heat, the width of the second connecting via 132 at the lowermost side of the third region in the cross-section of the printed circuit board may be greater than the width of the second connecting via 132 at the uppermost side of the fourth region. Conversely, in a printed circuit board 100D according to another example embodiment, when the expansion amount in the fourth insulating layer 114 due to processing heat is greater than the expansion amount in the third insulating layer 113 due to processing heat, the width of the second connecting via 132 at the lowermost side of the third region in the cross-section of the printed circuit board may be smaller than the width of the second connecting via 132 at the uppermost side of the fourth region.
[0049] Other descriptions are substantially the same as those in the printed circuit board 100A according to the above example embodiment. Additionally, apart from the via processing shape, the above manufacturing examples can be applied in substantially the same manner to manufacture printed circuit boards 100C and 100D according to other example embodiments.
[0050] In this disclosure, the term "cover" can include covering a portion or the entirety of a component, and can include not only direct coverage but also indirect coverage. Furthermore, the term "fill" can include not only complete filling but also partial filling and substantially filling. For example, this could include situations where holes or gaps exist. Additionally, the term "surround" can include not only complete surrounding but also partial and substantially surrounding. Furthermore, the term "expose" can include not only complete exposure but also partial exposure, and exposure can mean that a component is exposed from another component it is embedded in.
[0051] In this disclosure, "placed in a through portion, through hole, or through passage" can include not only the case where the object is completely placed in the through portion, through hole, or through passage, but also the case where the object protrudes upward or downward in the cross-section. For example, on a plane, when an object is placed in a through portion, through hole, or through passage, it can be defined in a broader sense that the object is placed in the through portion, through hole, or through passage.
[0052] In this disclosure, "basically" can be a concept that includes process errors, positional deviations, and measurement errors that may occur during the manufacturing process. For example, substantially the same direction can include not only completely identical directions but also substantially identical directions. Furthermore, substantially coplanar can include not only completely coplanar cases but also substantially coplanar cases. Furthermore, substantially having a particular shape can include not only completely having such a shape but also substantially having such a shape. Furthermore, substantially the same insulating material can mean not only completely identical insulating materials but also cases comprising the same type of insulating material. Therefore, the composition of the insulating materials can be substantially the same, but their specific composition ratios can be slightly different.
[0053] In this disclosure, the term "section" can refer to a section when an object is cut vertically, or a section when the object is viewed from a side view. Furthermore, the term "plane" can refer to a plane when an object is cut horizontally, or a plane when the object is viewed from a top or bottom view.
[0054] In this disclosure, for convenience, the word "lower" in "lower side," "lower part," and "lower surface" is used to indicate a downward direction relative to the cross-section of the figures, and the word "upper" in "upper side," "upper part," and "upper surface" is used to indicate the opposite direction. However, the above directions are defined for ease of explanation, and the scope of the claims is not specifically limited by the description of these directions, and the concepts of upper / lower can be changed at any time.
[0055] In this disclosure, the term "connection" is a concept that includes not only direct connections but also indirect connections via adhesive layers, etc. Additionally, the term "electrical connection" includes both physical and non-physical connections. Furthermore, expressions such as "first" and "second" are used to distinguish one component from another and do not limit the order and / or importance of the components. In some cases, without departing from the scope of the claims, a first component may be referred to as a second component, or similarly, a second component may be referred to as a first component.
[0056] In this disclosure, thickness, width, length, depth, linewidth, gap, pitch, spacing, surface roughness, etc., can be measured using scanning electron microscopy, optical microscopy, etc., based on a cross-section of a polished or cut printed circuit board. The cross-section can be a vertical or horizontal cross-section, and each value can be measured based on the desired cross-section. For example, the width of the upper and / or lower portion of a via can be measured on a cross-section that has been cut along the central axis of the via. In this case, when the value is not constant, it can be determined as the average of the values measured at any five points.
[0057] The term "example embodiment" as used in this disclosure does not imply the same embodiment, but is provided to illustrate different unique features. However, the example embodiments presented above do not preclude implementation through combinations of features with other example embodiments. For example, even if matters described in a particular example embodiment are not described in other example embodiments, they may be understood as descriptions relating to other example embodiments, unless there are descriptions that contradict or contradict matters in other example embodiments.
[0058] The terminology used in this disclosure is for describing exemplary embodiments only and is not intended to limit the disclosure. In this context, singular expressions include plural expressions unless they are explicitly distinguished in the context.
[0059] While exemplary embodiments have been shown and described above, it will be readily understood by those skilled in the art that modifications and variations may be made without departing from the scope of this disclosure as defined by the appended claims.
Claims
1. A printed circuit board, comprising: Glass layer; A metal via, penetrating at least a portion between the upper and lower surfaces of the glass layer; A first insulating layer is disposed on the upper surface of the glass layer; The second insulating layer is disposed on the upper surface of the first insulating layer and includes an insulating material different from the insulating material of the first insulating layer; The first wiring layer is disposed on the upper surface of the second insulating layer; as well as The first connection via penetrates both the first and second insulating layers and connects at least a portion of the first wiring layer to the upper surface of the metal via.
2. The printed circuit board according to claim 1, in, The second insulating layer is thicker than the first insulating layer.
3. The printed circuit board according to claim 1, in, The side surface of the first connecting via has a protrusion, and The protrusion is disposed adjacent to the boundary between the first insulating layer and the second insulating layer.
4. The printed circuit board according to claim 3, in, As the protrusion extends further from the side surface of the first connecting via, the thickness of the protrusion becomes thinner.
5. The printed circuit board according to claim 1, in, The side surface of the first connecting via has a stepped portion. The stepped portion is disposed adjacent to the boundary between the first insulating layer and the second insulating layer.
6. The printed circuit board according to claim 5, in, The first connection via includes a first region penetrating the first insulating layer and a second region penetrating the second insulating layer, and The side surface of the first connecting via located in the first region and the side surface of the first connecting via located in the second region are connected to each other by the stepped portion.
7. The printed circuit board according to claim 6, in, On the cross-section of the printed circuit board, the width of the first connecting via at the uppermost side of the first region is greater than the width of the first connecting via at the lowermost side of the second region.
8. The printed circuit board according to claim 6, in, On the cross-section of the printed circuit board, the width of the first connecting via at the uppermost side of the first region is smaller than the width of the first connecting via at the lowermost side of the second region.
9. The printed circuit board according to claim 1, further comprising: A third insulating layer is disposed on the lower surface of the glass layer; A fourth insulating layer is disposed on the lower surface of the third insulating layer and includes an insulating material different from the insulating material of the third insulating layer; The second wiring layer is disposed on the lower surface of the fourth insulating layer; as well as The second connection via passes through both the third and fourth insulating layers and connects at least a portion of the second wiring layer to the lower surface of the metal via.
10. The printed circuit board according to claim 9, in, Each of the first and second connection vias is directly connected to the metal via.
11. The printed circuit board according to claim 9, in, The fourth insulating layer is thicker than the third insulating layer.
12. The printed circuit board according to claim 9, in, The side surface of the second connecting via has a protrusion or a step, and The protrusion or the stepped portion is disposed adjacent to the boundary between the third insulating layer and the fourth insulating layer.
13. The printed circuit board according to claim 9, further comprising: A frame having a through portion, wherein at least a portion of the glass layer is disposed in the through portion; as well as The filler is disposed between the first insulating layer and the third insulating layer and in at least a portion of the through-hole between the frame and the glass layer.
14. The printed circuit board according to claim 13, further comprising: Multiple first stacked insulating layers are disposed on the upper surface of the second insulating layer; Multiple first stacked wiring layers are respectively disposed on or within the multiple first stacked insulating layers; A plurality of first stacked via layers are respectively disposed within the plurality of first stacked insulating layers and respectively connected to at least one of the plurality of first stacked wiring layers; Multiple second stacked insulating layers are respectively disposed on the lower surface of the fourth insulating layer; Multiple second stacked wiring layers are respectively disposed on or within the multiple second stacked insulating layers; as well as A plurality of second stacked via layers are respectively disposed within the plurality of second stacked insulating layers and respectively connected to at least one of the plurality of second stacked wiring layers.
15. The printed circuit board according to claim 1, in, The metal via and the first connecting via are in contact with each other on a plane coplanar with the upper surface of the glass layer.
16. The printed circuit board according to claim 1, in, The adhesion force of the first insulating layer to the glass layer is greater than that of the second insulating layer to the glass layer.
17. The printed circuit board according to claim 16, in, The first insulating layer includes a primer and / or a bonding sheet.
18. A printed circuit board, comprising: Glass layer; A metal via, penetrating at least a portion of the glass layer; An insulating layer is disposed on the glass layer; A wiring layer is disposed on the insulating layer; as well as A via is used to penetrate the insulating layer and connect at least a portion of the wiring layer to the metal via. The side surface of the connecting via has a protrusion or a step, and The protrusion or the stepped portion is disposed inside the insulating layer.
19. The printed circuit board according to claim 18, in, The insulating layer includes a first insulating layer and a second insulating layer, wherein the second insulating layer comprises an insulating material different from the insulating material of the first insulating layer. The protrusion or the stepped portion is disposed adjacent to the boundary between the first insulating layer and the second insulating layer.
20. The printed circuit board according to claim 18, in, The metal via and the connecting via are in contact with each other on a plane that is coplanar with the interface between the insulating layer and the glass layer.