Semiconductor device, semiconductor module, power conversion unit, and method for manufacturing semiconductor device

Abstract

A semiconductor device of the present application includes a semiconductor element, a plurality of connection portions each having conductivity, a sealing portion covering the semiconductor element and a portion of each of the plurality of connection portions, a plurality of signal terminals inserted into any of the plurality of connection portions, and a holding portion. The plurality of signal terminals protrude from the sealing portion to one side in a thickness direction of the sealing portion. The holding portion covers a portion of each of the plurality of signal terminals. As an example, the plurality of signal terminals are collectively held and inserted into the plurality of connection portions.

Description

Technical Field

[0001] This disclosure relates to a semiconductor device, a semiconductor module, a power conversion unit, and a method for manufacturing the semiconductor device. Background Technology

[0002] Various structures have been proposed for semiconductor devices incorporating semiconductor elements. Patent Document 1 discloses an example of a conventional semiconductor device. This device includes a semiconductor chip, a resin sealing portion, and multiple crimp terminals. The resin sealing portion covers the semiconductor chip. Multiple crimp terminals protrude from the upper surface of the resin sealing portion and extend upwards. The semiconductor device with the aforementioned multiple crimp terminals is used in combination with a circuit board. During the assembly of the semiconductor device and the circuit board, the multiple crimp terminals are pressed into through-holes formed in the circuit board and inserted through these through-holes. Here, high positioning accuracy is required for the crimp terminals and the through-holes in the circuit board. However, if multiple crimp terminals are provided, the positions of these crimp terminals are prone to deviation, potentially hindering the assembly of the semiconductor device and the circuit board.

[0003] Existing technical documents

[0004] Patent documents

[0005] Patent Document 1: Japanese Patent Application Publication No. 2020-17702 Summary of the Invention

[0006] One object of this disclosure is to provide a semiconductor device that is an improvement over the conventional one. In particular, in view of the above, one object of this disclosure is to provide a structure that facilitates assembly in which multiple terminals of the semiconductor device are inserted into through holes in a control substrate.

[0007] The semiconductor device provided by the first aspect of this disclosure includes: a semiconductor element; a plurality of connecting portions, each having conductivity; a sealing portion covering a portion of the semiconductor element and each of the plurality of connecting portions; a plurality of signal terminals inserted into any one of the plurality of connecting portions; and a holding portion. The plurality of signal terminals protrude from the sealing portion toward one side in the thickness direction of the sealing portion, and the holding portion covers a portion of each of the plurality of signal terminals.

[0008] The semiconductor module provided by the second aspect of this disclosure includes: a semiconductor device of the first aspect of this disclosure; and a control substrate disposed on one side of the thickness direction relative to the sealing portion. The control substrate has a plurality of through holes extending through the thickness direction, and the plurality of signal terminals are respectively inserted into any one of the plurality of through holes.

[0009] The power conversion unit provided by the third embodiment of this disclosure includes: a semiconductor module of the second embodiment of this disclosure; and a heat sink. Each of the plurality of semiconductor devices has a support substrate having a bottom surface facing the opposite side in the thickness direction. In each of the plurality of semiconductor devices, the bottom surface is exposed from the sealing portion, and the bottom surface of each of the plurality of semiconductor devices is in contact with the heat sink.

[0010] The semiconductor device manufacturing method provided by the fourth aspect of this disclosure is a method for manufacturing a semiconductor device having: a semiconductor element; a plurality of connecting portions, each of which is conductive; a sealing portion covering a portion of the semiconductor element and each of the plurality of connecting portions; and a plurality of signal terminals protruding from the sealing portion toward one side of the sealing portion, wherein the method includes a step of holding the plurality of signal terminals together and inserting them into the plurality of connecting portions.

[0011] Other features and advantages of this disclosure will become more apparent from the following detailed description with reference to the accompanying drawings. Attached Figure Description

[0012] Figure 1 This is a perspective view of the power conversion unit according to the first embodiment.

[0013] Figure 2 Is Figure 1 The wiring substrate is omitted from the 3D diagram.

[0014] Figure 3 This is a top view showing the power conversion unit of the first embodiment.

[0015] Figure 4 Is Figure 3 The wiring substrate is omitted in the top view.

[0016] Figure 5 This is a front view showing the power conversion unit of the first embodiment.

[0017] Figure 6 This is a bottom view showing the power conversion unit of the first embodiment.

[0018] Figure 7 This is a left-side view of the power conversion unit according to the first embodiment.

[0019] Figure 8 This is a right-side view of the power conversion unit according to the first embodiment.

[0020] Figure 9 It is along Figure 4 A cross-sectional view of the IX-IX line.

[0021] Figure 10 It is along Figure 4 A cross-sectional view along the XX line.

[0022] Figure 11 It is along Figure 4 A cross-sectional view along line XI-XI.

[0023] Figure 12 It is along Figure 4 A cross-sectional view along line XII-XII.

[0024] Figure 13 It is along Figure 4 A cross-sectional view of line XIII-XIII.

[0025] Figure 14 This is a partially enlarged cross-sectional view of the power conversion unit according to the first embodiment.

[0026] Figure 15 This is a perspective view of a semiconductor device representing the power conversion unit of the first embodiment.

[0027] Figure 16 This is a top view of the semiconductor device of the power conversion unit according to the first embodiment.

[0028] Figure 17 Is Figure 16 The top view omits the retaining part, and the sealing part is represented by an imaginary line.

[0029] Figure 18 Is Figure 17 The top view omits the diagram of the retaining part, the sealing part, and the second conductive part.

[0030] Figure 19 This is a front view of the semiconductor device of the power conversion unit according to the first embodiment.

[0031] Figure 20 This is a bottom view of the semiconductor device of the power conversion unit according to the first embodiment.

[0032] Figure 21 It is along Figure 17 A cross-sectional view of the XXI-XXI line.

[0033] Figure 22 yes Figure 21 A partially enlarged sectional view.

[0034] Figure 23 yes Figure 21 A partially enlarged sectional view.

[0035] Figure 24 It is along Figure 17 A cross-sectional view of the XXIV-XXIV line.

[0036] Figure 25 It is along Figure 17 A cross-sectional view of the XXV-XXV line.

[0037] Figure 26 It is along Figure 17 A sectional view of the XXVI-XXVI line.

[0038] Figure 27 It is along Figure 17 A sectional view of the XXVII-XXVII line.

[0039] Figure 28 yes Figure 9 A partially enlarged sectional view.

[0040] Figure 29 This is a cross-sectional view showing one step of an example of a method for manufacturing a semiconductor device according to the first embodiment.

[0041] Figure 30 It means Figure 29 A cross-sectional view of the subsequent processes.

[0042] Figure 31 It means Figure 30 A cross-sectional view of the subsequent processes.

[0043] Figure 32 This is a schematic diagram of a vehicle equipped with the power conversion unit of the first embodiment.

[0044] Figure 33 The power conversion unit, representing a first variation of the first embodiment, is a unit that is related to... Figure 11 A partially enlarged sectional view of the same cross section.

[0045] Figure 34 This is a cross-sectional view showing one step of the assembly process of the power conversion unit of the first embodiment of the first modification.

[0046] Figure 35 It means Figure 34 A cross-sectional view of the subsequent processes.

[0047] Figure 36 It means Figure 35 A cross-sectional view of the subsequent processes.

[0048] Figure 37 This is a top view showing the power conversion unit of the second embodiment.

[0049] Figure 38 This is a front view showing the power conversion unit of the second embodiment.

[0050] Figure 39 yes Figure 37 A magnified view of a portion of the image.

[0051] Figure 40 yes Figure 38 A magnified view of a portion of the image.

[0052] Figure 41 yes Figure 40 The diagram shows a partially enlarged cross-sectional view of the connecting wiring. Detailed Implementation

[0053] Hereinafter, preferred embodiments of the present disclosure will be described in detail with reference to the accompanying drawings.

[0054] Hereinafter, identical or similar constituent elements will be labeled with the same reference numerals, and repeated descriptions will be omitted. Terms such as "first," "second," and "third" in this disclosure are used as labels only and are not necessarily intended to impose an order on these objects.

[0055] In this disclosure, unless otherwise stated, "something A is formed on something B" and "something A is formed on something B (of)" include "something A is directly formed on something B" and "something A is formed on something B while another object is between something A and something B." Similarly, unless otherwise stated, "something A is disposed on something B" and "something A is disposed on something B (of)" include "something A is directly disposed on something B" and "another object is between something A and something B, and something A is disposed on something B." Likewise, unless otherwise stated, "something A is located on something B (of)" includes "something A is in contact with something B, and something A is located on something B (of)" and "another object is between something A and something B, and something A is located on something B (of)." Unless otherwise stated, "object A observed in a certain direction overlaps with a specific object B" includes "specific object A overlaps with all specific objects B" and "specific object A overlaps with a portion of specific object B". "A certain substance A (material) contains a certain material C" includes "the case where the material of a certain substance A (material) is composed of a certain material C" and "the case where the main component of the material of a certain substance A (material) is a certain material C". In this disclosure, "a certain surface A faces direction B (to one side or the other side)" is not limited to the case where the angle of surface A relative to direction B is 90°, but also includes the case where surface A is tilted relative to direction B.

[0056] First implementation method:

[0057] Figures 1 to 14 The first embodiment shows a power conversion unit A10. The power conversion unit A10 includes multiple semiconductor devices B1, a heat sink C1, a mounting component D1, and a wiring board E1. The power conversion unit A10 is, for example, used as an inverter to drive a three-phase AC motor.

[0058] In the following description, reference is made to the mutually orthogonal thickness direction z, the first direction x, and the second direction y. The thickness direction z corresponds to the thickness direction of the power conversion unit A10. "Top view" refers to the view taken from the thickness direction z. The first direction x is orthogonal to the thickness direction z. The second direction y is orthogonal to both the thickness direction z and the first direction x. The terms "upper," "lower," "above," "below," "upper surface," and "lower surface," etc., indicate the relative positional relationship of the components, etc., in the thickness direction z, and are not necessarily terms that specify the relationship with the direction of gravity.

[0059] like Figure 2 , Figure 4 , Figure 7 as well as Figure 8 As shown, multiple semiconductor devices B1 are arranged along the second direction y. Each of the multiple semiconductor devices B1 includes multiple semiconductor elements 21. As will be seen from the detailed structure described later, the multiple semiconductor elements 21 are, for example, switching elements such as MOSFETs (Metal-Oxide-Semiconductor Field-Effect Transistors) and IGBTs (Insulated Gate Bipolar Transistors), and the multiple semiconductor devices B1 respectively constitute, for example, a half-bridge type switching circuit. Figures 1 to 9 As shown, the plurality of semiconductor devices B1 each include a plurality of power terminals 13, a plurality of signal terminals 17, a holding portion 19, and a sealing portion 50. In each of the plurality of semiconductor devices B1, a plurality of semiconductor elements 21 are covered by the sealing portion 50. The plurality of power terminals 13 protrude from the side surface of the sealing portion 50 (the second side surface 532 described later) in a first direction x. The plurality of signal terminals 17 protrude from the upper surface of the sealing portion 50 (the top surface 51 described later) in the thickness direction z.

[0060] In the illustrated example, the power conversion unit A10 has three semiconductor devices B1, but it can also have a structure with two or more semiconductor devices B1. In the following description, when distinguishing the three semiconductor devices B1, they are referred to as the first device B11, the second device B12, and the third device B13. The first device B11 is located on the y1 side of the plurality of semiconductor devices B1 closest to the second direction y. The third device B13 is located on the y2 side of the plurality of semiconductor devices B1 closest to the second direction y. The second device B12 is located between the first device B11 and the third device B13 in the second direction y.

[0061] A heat sink C1 supports multiple semiconductor devices B1. Most of the heat sink C1 is located below (z2 side) the multiple semiconductor devices B1 in the thickness direction z. The heat sink C1 faces the lower surface (bottom surface 52, described later) of the sealing portion 50 of the multiple semiconductor devices B1. The material of the heat sink C1 includes, for example, aluminum. This material is not limited to aluminum; it can also be other metallic materials or resin materials (preferably materials with good thermal conductivity), etc. The heat sink C1 includes a main body 71, multiple base portions 72, and multiple positioning portions 73.

[0062] The main body 71 is a substrate. Multiple semiconductor devices B1 are mounted on the main body 71. Therefore, as... Figure 2 , Figure 4 , Figure 7 as well as Figure 8 As shown, a plurality of semiconductor devices B1 are arranged along the second direction y on the main body 71. The main body 71 faces the lower surface (bottom surface 52, described later) of each sealing portion 50 of the plurality of semiconductor devices B1. The main body 71 is in contact with each semiconductor device B1. The main body 71 is, for example, rectangular in plan view.

[0063] like Figure 2 , Figure 5 as well as Figures 7 to 13 As shown, multiple pedestal portions 72 protrude upwards in the thickness direction z from the main body portion 71. In the illustrated example, the multiple pedestal portions 72 are integrally formed with the main body portion 71, but they can also be installed separately from the main body portion 71.

[0064] like Figures 9 to 13 As shown, each of the plurality of pedestal portions 72 includes a first portion 721 and a second portion 722. The first portion 721 is located between the wiring substrate E1 and the main body portion 71 in the thickness direction z. The dimension of the first portion 721 in the thickness direction z is larger than the dimension of the sealing portion 50 of each semiconductor device B1 in the thickness direction z. The second portion 722 is disposed on the first portion 721. The wiring substrate E1 is held between the first portion 721 and the second portion 722. With this structure, the wiring substrate E1 is disposed at a constant interval relative to the upper surface of the main body portion 71.

[0065] In the illustrated example, the first portion 721 has a recess formed by internal threads, and the second portion 722 has a protrusion formed by external threads. The second portion 722 is secured to the first portion 721 by inserting the external threaded portion (protrusion) of the second portion 722 into the internal threaded portion (recess) of the first portion 721. Each base portion 72 can be a structure in which the first portion 721 and the second portion 722 fit together. For example, it could also be a structure in which the second portion 722 is pressed into the first portion 721. Alternatively, the first portion 721 could have a protrusion, and the second portion 722 could have a recess.

[0066] like Figure 2 and Figure 13 As shown, multiple positioning portions 73 protrude upwards in the thickness direction z from the main body portion 71. In the illustrated example (e.g.) Figure 13 In this example, multiple positioning parts 73 are separately mounted relative to the main body 71. Unlike this example, each positioning part 73 may also be integrally formed with the main body 71. Figure 13 In the example shown, each positioning part 73 is pressed into a through hole formed in the main body part 71. Each positioning part 73 is cylindrical, with a tapered front end on the z1 side of the thickness direction z. In the illustrated example, the diameter of each positioning part 73 in top view is smaller than the diameter of each pedestal part 72 in top view. Figure 3 and Figure 4 As shown, among the plurality of positioning parts 73, there is a positioning part disposed on the y1 side of the second direction y, which is closer to the first device B11, and a positioning part disposed on the y2 side of the second direction y, which is closer to the third device B13.

[0067] Mounting component D1 holds multiple semiconductor devices B1 against heat sink C1. Mounting component D1 is, for example, a leaf spring. The elastic force of mounting component D1 pushes the multiple semiconductor devices B1 against heat sink C1. The material of mounting component D1 is not limited; it can be, for example, copper, iron, titanium, or an alloy containing any of these (e.g., stainless steel). Figure 4 , Figures 7 to 13 As shown, the mounting component D1 includes multiple pressing parts 81 and multiple fixing parts 82.

[0068] Multiple pressing parts 81 are independently provided relative to multiple semiconductor devices B1. Each pressing part 81 contacts the sealing part 50 (top surface 51) of the corresponding semiconductor device B1. Each pressing part 81 pushes the contacting semiconductor device B1 toward the main body 71 of the heat sink C1.

[0069] Multiple fixing parts 82 are respectively fixed to the heat sink C1, and in this embodiment, to the main body 71. Each of the multiple fixing parts 82 is, for example, a flat plate parallel to the xy plane. A through hole is formed in each of the multiple fixing parts 82. A fastener 89 (a hexagonal bolt in the illustrated example) is inserted through this through hole. The fixing part 82 is fixed to the main body 71 by means of the fastener 89.

[0070] The plurality of fixed portions 82 include a plurality of end-positioned portions 821 and a plurality of intermediate-positioned portions 822. In the power conversion unit A10, the plurality of fixed portions 82 include a pair of end-positioned portions 821 and two intermediate-positioned portions 822. Figure 4 and Figure 10As shown, one of the pair of end-positioned portions 821 is located on the y1 side, which is closer to the second direction y than the first device B11, and the other of the pair of end-positioned portions 821 is located on the y2 side, which is closer to the second direction y than the third device B13. One of the two intermediate portions 822 is located between the first device B11 and the second device B12, and the other of the two intermediate portions 822 is located between the second device B12 and the third device B13.

[0071] exist Figure 4 In the example shown, the width (dimension in the first direction x) of each end-positioned portion 821 is smaller than the width (dimension in the first direction x) of each pressing portion 81 and the width (dimension in the first direction x) of each intermediate-positioned portion 822. This avoids interference between the mounting member D1 (each end-positioned portion 821) and each positioning portion 73. Unlike this example, the width of the pressing portion 81 and the width of each intermediate-positioned portion 822 can also be the same as the width of each end-positioned portion 821. In this case, the mounting member D1 can be formed into a rectangular shape (strip) when viewed from above. Alternatively, the width of each intermediate-positioned portion 822 can also be the same as the width of each end-positioned portion 821.

[0072] like Figure 1 , Figure 3 , Figure 7 as well as Figure 8 As shown, the wiring substrate E1 is disposed in a common configuration relative to multiple semiconductor devices B1. Unlike this configuration, the multiple wiring substrates E1 can also be disposed independently relative to each of the multiple semiconductor devices B1. For example, from... Figure 9 as well as Figure 11 As understood, signal terminals 17 of multiple semiconductor devices B1 are respectively inserted into the wiring substrate E1. The wiring substrate E1 is connected to each signal terminal 17. The wiring substrate E1 is, for example, a drive circuit that controls the driving of each semiconductor element 21 of the multiple semiconductor devices B1. In the example where each semiconductor element 21 is a MOSFET or an IGBT, the wiring substrate E1 is a gate driver. The wiring substrate E1 is disposed above (z1 side) in the thickness direction z relative to each sealing portion 50 of the multiple semiconductor devices B1. The wiring substrate E1 faces the upper surface (top surface 51) of each sealing portion 50 of the multiple semiconductor devices B1. The wiring substrate E1 is located on the side opposite to the main body 71 of the heat sink C1 relative to the multiple semiconductor devices B1. When viewed from above, the wiring substrate E1 overlaps with each sealing portion 50 of the multiple semiconductor devices B1. The wiring substrate E1 is held by multiple pedestal portions 72 at a constant distance in the thickness direction z from the upper surface (top surface 51) of each sealing portion 50 of the multiple semiconductor devices B1. Wiring board E1 is an example of the control board of this disclosure.

[0073] like Figure 14As shown, the wiring substrate E1 has a substrate 90, a first wiring 911, a second wiring 912, a third wiring 913 and a fourth wiring 914.

[0074] The substrate 90 has a first surface 901 and a second surface 902. The first surface 901 is located above (z1 side) in the thickness direction z of the substrate 90, facing the z1 side of the thickness direction z. The second surface 902 is located below (z2 side) in the thickness direction z of the substrate 90, facing the z2 side of the thickness direction z. A plurality of through holes 903 extending along the thickness direction z are provided in the substrate 90. In this embodiment, the substrate 90 has a first recess 904. The first recess 904 is recessed from the inner surface of the through holes 903 and the second surface 902, and is formed corresponding to each through hole 903. The first recess 904 includes a portion (first portion 9041) located radially inside the through hole 903 facing the z1 side of the thickness direction z. In this embodiment, the first recess 904 is formed as a cone shape that is inclined entirely or substantially entirely in a manner that is located radially inside the through hole 903 facing the z1 side of the thickness direction z. The method of forming the first recess 904 is not particularly limited. For example, the first recess 904 can be formed by cutting from the z2 side of the thickness direction z of the substrate 90 with a drill bit with a conical front end to form a shape concentric with the through hole 903.

[0075] A first wiring 911 is disposed on a first surface 901 of a substrate 90. A second wiring 912 is disposed on a second surface 902. A third wiring 913 is disposed on the inner surface of a through-hole 903 and is connected to the first wiring 911. A fourth wiring 914 is disposed in a first recess 904. The fourth wiring 914 is connected to both the second wiring 912 and the third wiring 913. The first wiring 911 forms a path for interconnecting the second wiring 912, the fourth wiring 914, and the third wiring 913 with a circuit disposed on a wiring substrate E1. The first wiring 911, the second wiring 912, the third wiring 913, and the fourth wiring 914 are, for example, formed by a metal plating layer on the surface of the substrate 90. The composition of this metal plating layer includes copper (Cu). In this embodiment, the case where the substrate 90 has a first recess 904 is described as an example, but the substrate 90 may also have a structure without a first recess 904. In this case, the second wiring 912 disposed on the second surface 902 is connected to the third wiring 913 disposed in the through-hole 903.

[0076] Each signal terminal 17 of the multiple semiconductor devices B1 is inserted into a corresponding one of the multiple through holes 903 on the wiring substrate E1. Figure 14 The diagram shows the state in which any one of the signal terminals 17 of the plurality of semiconductor devices B1 is inserted into the through-hole 903 of the substrate 90. For example... Figure 14As shown, all signal terminals 17 of the plurality of semiconductor devices B1 are inserted into the through holes 903 of the substrate 90. The semiconductor devices B1 and the wiring substrate E1 constitute the semiconductor module of this disclosure.

[0077] like Figure 14 As shown, each signal terminal 17 has a base 170A and a first bulge 170B. The z2 side of the base 170A in the thickness direction z is inserted into any one of the plurality of sleeves 64 (described later) of the plurality of semiconductor devices B1. The first bulge 170B is provided on the z1 side of the base 170A in the thickness direction z. The first bulge 170B bulges out from the base 170A in a direction orthogonal to the thickness direction z.

[0078] like Figure 14 As shown, each signal terminal 17 is pressed into any one of the plurality of through holes 903 in the wiring substrate E1. Thus, a third wiring 913 disposed in any one of the plurality of through holes 903 is pressed into the first protrusion 170B of the signal terminal 17 inserted into that through hole 903. Therefore, each signal terminal 17 is made conductive to the wiring substrate E1 by being pressed into the through hole 903 along the thickness direction z. Each signal terminal 17 is pressed into a corresponding one of the plurality of through holes 903, thereby supporting the wiring substrate E1 by each signal terminal 17. Unlike this structure, each signal terminal 17 may also not include the first protrusion 170B and may only consist of a base 170A. That is, each signal terminal 17 may also be a straight lead with no variation in thickness. In this case, after being inserted into the through hole 903, each signal terminal 17 is bonded to the wiring substrate E1 by solder.

[0079] like Figure 3 , Figure 9 as well as Figures 11 to 13 As shown, a plurality of mounting holes 921 and a plurality of positioning holes 922 are formed on the wiring substrate E1.

[0080] like Figure 3 , Figure 9 as well as Figures 11 to 13 As shown, multiple pedestal portions 72 (e.g., the second portion 722) are individually inserted into multiple mounting holes 921. Each mounting hole 921 is formed as a perfect circle when viewed from above. The diameter of each mounting hole 921 when viewed from above is smaller than the diameter of each pedestal portion 72 (particularly the first portion 721) when viewed from above. Therefore, the wiring substrate E1 is held above (on the z1 side) the thickness direction z of the first portion 721.

[0081] like Figure 3 and Figure 13As shown, multiple positioning parts 73 are individually inserted into multiple positioning holes 922. In the illustrated example, two positioning holes 922 are formed on the wiring substrate E1. One of the two positioning holes 922 (the positioning hole 922 disposed on the y1 side of the second direction y) is formed as a perfect circle, and the other of the two positioning holes 922 (the positioning hole 922 disposed on the y2 side of the second direction y) is formed as an elongated hole. As a result, positioning of the wiring substrate E1 relative to the heat sink C1 becomes easier. At this time, by making one of the two positioning holes 922 an elongated hole, the misalignment of the heat sink C1 and the wiring substrate E1 caused by manufacturing errors can be suppressed.

[0082] Next, refer to Figures 15 to 27 The structure of multiple semiconductor devices B1 is described. Figures 15 to 27 This is an enlarged view of any one of the plurality of semiconductor devices B1. All of the plurality of semiconductor devices B1 have the same construction. Unless otherwise specified, the semiconductor devices B1 described below are common to the first device B11, the second device B12, and the third device B13.

[0083] like Figures 15 to 27 As shown, each semiconductor device B1 (each of the first device B11, the second device B12, and the third device B13) includes, in addition to the aforementioned plurality of power terminals 13, plurality of signal terminals 17, holding portion 19, plurality of semiconductor elements 21, and sealing portion 50, a support substrate 11, a pair of thermistors 22, a conductive bonding layer 23, a first conductive member 31, a second conductive member 32, a plurality of wires, and a pair of control wiring 60. The plurality of power terminals 13 includes a first power terminal 14, two second power terminals 15, and two third power terminals 16. The plurality of signal terminals 17 includes a first signal terminal 171, a second signal terminal 172, a third signal terminal 173, a fourth signal terminal 174, a pair of fifth signal terminals 181, and a pair of sixth signal terminals 182. The plurality of wires includes a plurality of first wires 41, a plurality of second wires 42, a plurality of third wires 43, and a fourth wire 44.

[0084] Each semiconductor device B1 converts the DC power supply voltage applied to the first power terminal 14 and the two second power terminals 15 into AC power through multiple semiconductor elements 21. The converted AC power is then input to the power supply object such as a motor from the two third power terminals 16.

[0085] like Figure 18 and Figure 21 As shown, the support substrate 11 supports multiple semiconductor elements 21 in the thickness direction z. The support substrate 11 is made of, for example, a DBC (Direct Bonded Copper) substrate. Figures 21 to 27As shown, the support substrate 11 includes an insulating layer 111, a first wiring layer 112, and a second wiring layer 113. The support substrate 11 is covered by a sealing portion 50 except for a portion of the second wiring layer 113.

[0086] like Figures 21 to 27 As shown, the insulating layer 111 includes a portion in the thickness direction z between the first wiring layer 112 and the second wiring layer 113. The insulating layer 111 is made of a material with relatively high thermal conductivity. For example, the insulating layer 111 is made of ceramic containing aluminum nitride (AlN). In addition to ceramic, the insulating layer 111 can also be a structure made of insulating resin sheet.

[0087] like Figure 18 , Figures 21 to 27 As shown, the first wiring layer 112 is located above the insulating layer 111 (z1 side) in the thickness direction z. The first wiring layer 112 is composed of copper (Cu). Figure 18 As shown, the first wiring layer 112 is surrounded by the periphery of the insulating layer 111 when viewed from above. Figure 18 , Figures 21 to 27 As shown, the first wiring layer 112 includes a first mounting portion 1121 and a second mounting portion 1122. Both the first mounting portion 1121 and the second mounting portion 1122 are rectangular in top view. The first mounting portion 1121 and the second mounting portion 1122 are separated from each other in a first direction x. The first mounting portion 1121 is located on the x1 side of the first direction x relative to the second mounting portion 1122. A plurality of semiconductor elements 21 are respectively bonded to either the first mounting portion 1121 or the second mounting portion 1122.

[0088] like Figures 21 to 26 As shown, the second wiring layer 113 is located below the insulating layer 111 (on the z2 side) in the thickness direction z. Figure 20 As shown, the second wiring layer 113 is exposed from the sealing portion 50. The lower surface of the second wiring layer 113 (the surface facing the z2 side in the thickness direction z) corresponds to the bottom surface of the support substrate 11. The lower surface of the second wiring layer 113 (the bottom surface of the support substrate 11) is in contact with the upper surface of the main body portion 71 of the heat sink C1 (the surface facing the z1 side in the thickness direction z). The second wiring layer 113 is composed of copper. The second wiring layer 113 is rectangular in shape when viewed from above. The second wiring layer 113 is surrounded by the periphery of the insulating layer 111 when viewed from above.

[0089] like Figure 18 and Figure 21As shown, multiple semiconductor elements 21 are respectively mounted on either the first mounting portion 1121 or the second mounting portion 1122. Each semiconductor element 21 is, for example, a MOSFET. Alternatively, each semiconductor element 21 may be a switching element such as an IGBT or a diode. In the description of semiconductor device B1, the semiconductor element 21 is exemplified by an n-channel, vertically oriented MOSFET. The semiconductor element 21 includes a compound semiconductor substrate. The composition of this compound semiconductor substrate includes silicon carbide (SiC) or silicon (Si).

[0090] like Figure 18 and Figure 21 As shown, in each semiconductor device B1, the plurality of semiconductor elements 21 include a plurality of first elements 21A and a plurality of second elements 21B. The structure of each of the plurality of second elements 21B is the same as the structure of each of the plurality of first elements 21A. For example... Figure 18 , Figure 21 and Figure 22 As shown, a plurality of first elements 21A are mounted on the first mounting portion 1121. The plurality of first elements 21A are arranged along the second direction y. Figure 18 , Figure 21 as well as Figure 23 As shown, a plurality of second elements 21B are mounted on the second mounting portion 1122. The plurality of second elements 21B are arranged along the second direction y.

[0091] like Figure 18 , Figure 22 as well as Figure 23 As shown, the plurality of semiconductor elements 21 have a first electrode 211, a second electrode 212, a third electrode 213 and two fourth electrodes 214.

[0092] like Figure 22 and Figure 23 As shown, the first electrode 211 is opposite to either the first mounting portion 1121 or the second mounting portion 1122. A current corresponding to the electrical charge before conversion by the semiconductor element 21 flows through the first electrode 211. That is, the first electrode 211 corresponds to the drain electrode of the semiconductor element 21.

[0093] like Figure 22 and Figure 23 As shown, the second electrode 212 is located on the opposite side of the first electrode 211 in the thickness direction z. Current corresponding to the electrical charge converted by the semiconductor element 21 flows through the second electrode 212. That is, the second electrode 212 is equivalent to the source electrode of the semiconductor element 21.

[0094] like Figure 18As shown, the third electrode 213 is located on the same side as the second electrode 212 in the thickness direction z. A drive signal (gate voltage) for driving the semiconductor element 21 is input to the third electrode 213. That is, the third electrode 213 corresponds to the gate electrode of the semiconductor element 21. Figure 18 As shown, when viewed from above, the area of ​​the third electrode 213 is smaller than the area of ​​the second electrode 212.

[0095] like Figure 18 , Figure 22 as well as Figure 23 As shown, the two fourth electrodes 214 are located on the same side as the second electrode 212 in the thickness direction z, and are located next to the third electrode 213 in the first direction x. In the illustrated example, the two fourth electrodes 214 are disposed on both sides of the third electrode 213, separated by the third electrode 213 in the first direction x. The potential of each fourth electrode 214 is equal to the potential of the second electrode 212. Unlike the illustrated example, each semiconductor element 21 may contain only one of the two fourth electrodes 214, or it may not contain either of the two fourth electrodes 214.

[0096] like Figure 22 and Figure 23 As shown, a conductive bonding layer 23 is located between any one of the first mounting portion 1121 and the second mounting portion 1122 and the first electrode 211 of any one of the plurality of semiconductor elements 21. The conductive bonding layer 23 is, for example, solder. Alternatively, the conductive bonding layer 23 may also comprise a sintered body of metal particles. The first electrodes 211 of the plurality of first elements 21A are conductively bonded to the first mounting portion 1121 via the conductive bonding layer 23. Thus, each first electrode 211 of the plurality of first elements 21A is connected to the first mounting portion 1121. The first electrodes 211 of the plurality of second elements 21B are conductively bonded to the second mounting portion 1122 via the conductive bonding layer 23. Thus, each first electrode 211 of the plurality of second elements 21B is connected to the second mounting portion 1122.

[0097] Multiple power terminals 13 are respectively connected to multiple semiconductor elements 21. Current corresponding to either the electrical power before conversion by the multiple semiconductor elements 21 or the electrical power after conversion flows through the multiple power terminals 13. The multiple power terminals 13 include a first power terminal 14, two second power terminals 15, and two third power terminals 16.

[0098] like Figure 18 and Figure 24As shown, the first power terminal 14 is engaged with the first mounting portion 1121. This engagement is not limited and can be based on a conductive bonding material (e.g., solder) not shown, laser welding, or riveting. The first power terminal 14 is connected to the first electrodes 211 of a plurality of first elements 21A via the first mounting portion 1121. The first power terminal 14 is a P-terminal (positive terminal) to which a DC power supply voltage is applied for power conversion. Figure 18 As shown, the first power terminal 14 sandwiches the first mounting portion 1121 in the first direction x and is located on the side opposite to the second mounting portion 1122. The first power terminal 14 extends from the first mounting portion 1121 toward the first direction x (x1 side) and protrudes from the sealing portion 50 toward the first direction x (x1 side). Figure 17 as well as Figure 24 As shown, the first power terminal 14 includes a portion covered by the sealing portion 50 and a portion exposed from the sealing portion 50. In the first power terminal 14, the portion covered by the sealing portion 50 engages with the first mounting portion 1121. In the first power terminal 14, the portion exposed from the sealing portion 50 serves as the aforementioned P terminal of each semiconductor device B1.

[0099] Two second power terminals 15 are connected to second conductive members 32. The two second power terminals 15 are connected to the second electrodes 212 of a plurality of second elements 21B via the second conductive members 32. The two second power terminals 15 are N-terminals (negative terminals) to which a DC power supply voltage is applied for power conversion. The two second power terminals 15 are separated from each other in the second direction y. A first power terminal 14 is located between the two second power terminals 15. Figure 18 As shown, the two second power terminals 15 are located on the same side as the first power terminal 14 in the first direction x, relative to the first mounting portion 1121 and the second mounting portion 1122. The two second power terminals 15 are separated from the first mounting portion 1121 and the second mounting portion 1122, respectively. The two second power terminals 15 extend along the first direction x, protruding from the sealing portion 50 towards one side (x1 side) of the first direction x. Figure 17 as well as Figure 21 As shown, each of the two second power terminals 15 includes a portion covered by the sealing portion 50 and a portion exposed from the sealing portion 50. In each second power terminal 15, the portion covered by the sealing portion 50 engages with the second conductive member 32. In each second power terminal 15, the portion exposed from the sealing portion 50 serves as the aforementioned N terminal of each semiconductor device B1.

[0100] like Figure 18 and Figure 21As shown, the two third power terminals 16 are respectively engaged with the second mounting portion 1122. This engagement is not limited and can be based on a conductive bonding material (e.g., solder) not shown, laser welding, or riveting. The two third power terminals 16 are respectively connected to the first electrodes 211 of the plurality of second elements 21B via the second mounting portion 1122. The two third power terminals 16 are respectively connected to the second electrodes 212 of the plurality of first elements 21A via the second mounting portion 1122 and the first conductive member 31. Alternating current converted by the plurality of semiconductor elements 21 (the plurality of first elements 21A and the plurality of second elements 21B) is output from the two third power terminals 16. That is, the two third power terminals 16 are respectively the output terminals of this alternating current. The two third power terminals 16 are separated from each other in the second direction y. Figure 18 As shown, the two third power terminals 16 respectively sandwich the second mounting portion 1122 in the first direction x and are located on the opposite side to the first mounting portion 1121. The two third power terminals 16 extend from the second mounting portion 1122 towards the other side (x2 side) of the first direction x, and protrude from the sealing portion 50 towards the other side (x2 side) of the first direction x. Figure 17 as well as Figure 21 As shown, each of the two third power terminals 16 includes a portion covered by the sealing portion 50 and a portion exposed from the sealing portion 50. In each third power terminal 16, the portion covered by the sealing portion 50 engages with the second mounting portion 1122. In each third power terminal 16, the portion exposed from the sealing portion 50 serves as the aforementioned output terminal of each semiconductor device B1.

[0101] A pair of control wirings 60 forms part of the conductive path between multiple signal terminals 17 and multiple semiconductor elements 21. For example... Figure 17 , Figure 18 as well as Figure 24 As shown, a pair of control wirings 60 includes a first wiring 601 and a second wiring 602. The first wiring 601 is located in a first direction x between a plurality of first elements 21A and a first power terminal 14 and two second power terminals 15. Figure 18 and Figure 24 As shown, the first wiring 601 is engaged with the first mounting portion 1121. The second wiring 602 is located in the first direction x between the plurality of second elements 21B and the two third power terminals 16. Figure 18 and Figure 24As shown, the second wiring 602 is engaged with the second mounting portion 1122. A pair of control wirings 60 have an insulating layer 61, multiple wiring layers 62, a metal layer 63, and multiple sleeves 64. The pair of control wirings 60 are covered by a sealing portion 50, except for a portion of each of the multiple sleeves 64. Unless otherwise specified, the insulating layer 61, multiple wiring layers 62, metal layer 63, and multiple sleeves 64 described below are shared in the pair of control wirings 60 (first wiring 601 and second wiring 602).

[0102] like Figure 24 As shown, the insulating layer 61 includes a portion in the thickness direction z that lies between the plurality of wiring layers 62 and the metal layer 63. The insulating layer 61 is made of ceramic, for example. In addition to ceramic, the insulating layer 61 may also be a structure made of insulating resin sheet.

[0103] like Figure 24 As shown, multiple wiring layers 62 are located above (z1 side) the insulating layer 61 in the thickness direction z. The multiple wiring layers 62 are composed of copper. Figure 18 and Figure 27 As shown, the multiple routing layers 62 include a first routing layer 621, a second routing layer 622, a third routing layer 623, a fourth routing layer 624, and a fifth routing layer 625.

[0104] like Figure 24 As shown, metal layer 63 is located on the opposite side of the plurality of wiring layers 62 in the thickness direction z, separated by insulating layer 61. Metal layer 63 is composed of copper. The metal layer 63 of the first wiring 601 is bonded to the first mounting portion 1121 via an adhesive layer (not shown). The metal layer 63 of the second wiring 602 is bonded to the second mounting portion 1122 via an adhesive layer (not shown). These adhesive layers are made of a material that is either conductive or non-conductive. For example, these adhesive layers are solder.

[0105] like Figure 24 and Figure 27 As shown, multiple sleeves 64 are bonded to any one of multiple wiring layers 62 via a conductive bonding layer (e.g., solder) not shown. The multiple sleeves 64 are made of a conductive material such as metal. Each of the multiple sleeves 64 is cylindrical, extending along the thickness direction z. One end of each multiple sleeve 64 (the end edge on the z2 side of the thickness direction z) is conductively bonded to any one of the multiple wiring layers 62. Figure 24 As shown, the other ends (the z1 side of the thickness direction z) of the plurality of sleeves 64 protrude from the sealing portion 50. The sleeves 64 correspond to an example of the connecting portion of this disclosure.

[0106] like Figure 18 As shown, one of a pair of thermistors 22 crosses a pair of third wiring layers 623 of the first wiring 601 and is electrically connected to them. Figure 18As shown, the other of the pair of thermistors 22 is electrically connected to and spans a pair of third wiring layers 623 of the second wiring 602. The pair of thermistors 22 are, for example, NTC (Negative Temperature Coefficient) thermistors. NTC thermistors have the characteristic that their resistance decreases slowly with increasing temperature. The pair of thermistors 22 are used as temperature sensors for the semiconductor device B1.

[0107] like Figure 15 and Figure 24 As shown, multiple signal terminals 17 are each composed of metal leads extending along the thickness direction z. Multiple signal terminals 17 protrude from the top surface 51 of the sealing portion 50 (described later). Multiple signal terminals 17 are pressed into multiple sleeves 64 of a pair of control wiring 60. Thus, each of the multiple signal terminals 17 is supported by any one of the multiple sleeves 64 and is conductive to any one of the multiple wiring layers 62. The multiple signal terminals 17 include a first signal terminal 171, a second signal terminal 172, a third signal terminal 173, a fourth signal terminal 174, a pair of fifth signal terminals 181, a pair of sixth signal terminals 182, and a seventh signal terminal 183. These first signal terminals 171, second signal terminals 172, third signal terminals 173, fourth signal terminals 174, a pair of fifth signal terminals 181, a pair of sixth signal terminals 182, and seventh signal terminals 183 are inserted into the wiring substrate E1, inputting or outputting signals to the wiring substrate E1.

[0108] The first signal terminal 171 is pressed into one of the plurality of sleeves 64, which engages with the first wiring layer 621 of the first wiring 601. Thus, the first signal terminal 171 is supported by the sleeve 64 and is conductive to the first wiring layer 621 of the first wiring 601. Furthermore, the first signal terminal 171 is conductive to the third electrode 213 of the plurality of first elements 21A. A gate voltage for driving the plurality of first elements 21A is applied to the first signal terminal 171.

[0109] The second signal terminal 172 is pressed into one of the plurality of sleeves 64, which engages with the first wiring layer 621 of the second wiring 602. Thus, the second signal terminal 172 is supported by the sleeve 64 and is connected to the first wiring layer 621 of the second wiring 602. Furthermore, the second signal terminal 172 is connected to the third electrode 213 of the plurality of second elements 21B. A gate voltage for driving the plurality of second elements 21B is applied to the second signal terminal 172.

[0110] like Figure 18As shown, the third signal terminal 173 is located next to the first signal terminal 171 in the second direction y. The third signal terminal 173 is pressed into a sleeve 64 among a plurality of sleeves 64 that engages with the second wiring layer 622 of the first wiring 601. Thus, the third signal terminal 173 is supported by the sleeve 64 and is connected to the second wiring layer 622 of the first wiring 601. Furthermore, the third signal terminal 173 is connected to the fourth electrode 214 of the plurality of first elements 21A. A voltage corresponding to the largest current among the currents flowing through the respective fourth electrode 214 of the plurality of first elements 21A is applied to the third signal terminal 173.

[0111] like Figure 18 As shown, the fourth signal terminal 174 is located next to the second signal terminal 172 in the second direction y. The fourth signal terminal 174 is pressed into a sleeve 64 that engages with the second wiring layer 622 of the second wiring 602. Thus, the fourth signal terminal 174 is supported by the sleeve 64 and is connected to the second wiring layer 622 of the second wiring 602. Furthermore, the fourth signal terminal 174 is connected to the fourth electrode 214 of the plurality of second elements 21B. A voltage corresponding to the largest current among the currents flowing through the respective fourth electrode 214 of the plurality of second elements 21B is applied to the fourth signal terminal 174.

[0112] like Figure 18 As shown, a pair of fifth signal terminals 181 are located on the opposite side of the third signal terminal 173 in the second direction y, separated from the first signal terminal 171. The pair of fifth signal terminals 181 are adjacent to each other in the second direction y. The pair of fifth signal terminals 181 are pressed into a pair of sleeves 64 that are respectively engaged with a pair of third wiring layers 623 of the first wiring 601. Thus, the pair of fifth signal terminals 181 are supported by the pair of sleeves 64 and are respectively connected to the pair of third wiring layers 623 of the first wiring 601. Furthermore, the pair of fifth signal terminals 181 are connected to the thermistor 22 on the first wiring 601.

[0113] like Figure 18 As shown, a pair of sixth signal terminals 182 are located on the opposite side of the fourth signal terminal 174 in the second direction y, separated from the second signal terminal 172. The pair of sixth signal terminals 182 are adjacent to each other in the second direction y. The pair of sixth signal terminals 182 are respectively pressed into a pair of sleeves 64 that are respectively engaged with a pair of third wiring layers 623 of the second wiring 602. Thus, the pair of sixth signal terminals 182 are respectively supported by the pair of sleeves 64 and are respectively connected to the pair of third wiring layers 623 of the second wiring 602. Furthermore, the pair of sixth signal terminals 182 are connected to the thermistor 22 on the second wiring 602.

[0114] like Figure 18As shown, the seventh signal terminal 183 sandwiches the third signal terminal 173 in the second direction y and is located on the opposite side to the first signal terminal 171. The seventh signal terminal 183 is pressed into a sleeve 64 that engages with the fifth wiring layer 625 of the first wiring 601. Thus, the seventh signal terminal 183 is supported by the sleeve 64 and is conductive with the fifth wiring layer 625 of the first wiring 601. Moreover, the seventh signal terminal 183 is conductive with the first mounting portion 1121. A voltage equivalent to the DC power input to the first power terminal 14 is applied to the seventh signal terminal 183.

[0115] like Figure 15 , Figure 19 , Figure 24 , Figure 27 As shown, the holding portion 19 covers a portion of each of the plurality of signal terminals 17, holding the plurality of signal terminals 17. In this embodiment, the semiconductor device B1 includes two holding portions 19. One holding portion 19 covers a portion of each of the first signal terminal 171, the third signal terminal 173, a pair of fifth signal terminals 181, and the seventh signal terminal 183. The other holding portion 19 is located on the x2 side of the first direction x compared to the aforementioned holding portion 19, and covers a portion of each of the second signal terminal 172, the fourth signal terminal 174, and a pair of sixth signal terminals 182. In the illustrated example, each holding portion 19 is cuboid in shape and elongated in the second direction y. Each holding portion 19 covers the plurality of signal terminals 17 arranged along the second direction y. The holding portion 19 is electrically insulating, for example, containing epoxy resin. The holding portion 19 is formed, for example, by molding. The shape of the holding portion 19 is not limited to the cuboid shape illustrated, and various modifications are possible.

[0116] The retaining part 19 has a top surface 191 and a bottom surface 192. The top surface 191 is located on the z1 side in the thickness direction z and faces the z1 side in the thickness direction z. The bottom surface 192 is located on the z2 side in the thickness direction z and faces the z2 side in the thickness direction z.

[0117] like Figure 24 , Figure 27 as well as Figure 28 As shown, in this embodiment, each of the plurality of signal terminals 17 has a protrusion 170C. The protrusion 170C is provided at the middle portion of the base 170A in the thickness direction z. The protrusion 170C protrudes from the base 170A in a direction intersecting the thickness direction z. In the illustrated example, the protrusion 170C protrudes from the base 170A in a direction orthogonal to the thickness direction z. The retaining portion 19 covers a portion of the base 170A and the protrusion 170C of each of the plurality of signal terminals 17.

[0118] like Figures 7 to 11 as well as Figure 28As shown, the retaining portion 19 is located between the sealing portion 50 and the wiring substrate E1 in the thickness direction z. Figure 24 , Figure 27 as well as Figure 28 As shown, the retaining part 19 (bottom surface 192 of the retaining part) is in contact with the sealing part 50 (top surface 51 described later).

[0119] Multiple first wires 41, multiple second wires 42, multiple third wires 43, and a fourth wire 44 electrically connect the separated parts. The multiple first wires 41, multiple second wires 42, multiple third wires 43, and fourth wires 44 are bonding wires. Figure 17 as well as Figures 21 to 24 In the text, multiple first wires 41, multiple second wires 42, multiple third wires 43, and a fourth wire 44 are omitted.

[0120] like Figure 18 As shown, several of the plurality of first wires 41 are electrically connected to the third electrode 213 of the plurality of first elements 21A and the fourth wiring layer 624 of the first wiring 601. Figure 18 As shown, several of the plurality of third conductors 43 are electrically connected to the fourth wiring layer 624 and the first wiring layer 621 of the first wiring 601. Thus, the first signal terminal 171 is electrically connected to the third electrodes 213 of the plurality of first elements 21A. The plurality of first conductors 41 and the plurality of third conductors 43 are composed of gold (Au). Alternatively, the plurality of first conductors 41 and the plurality of third conductors 43 may also be composed of copper or aluminum.

[0121] And, as Figure 18 As shown, several of the plurality of first wires 41 are electrically bonded to the third electrode 213 of the plurality of second elements 21B and the fourth wiring layer 624 of the second wiring 602. Furthermore, as... Figure 18 As shown, several of the plurality of third conductors 43 are electrically bonded to the fourth wiring layer 624 of the second wiring 602 and the first wiring layer 621 of the second wiring 602. Thus, the second signal terminal 172 is connected to the third electrodes 213 of the plurality of second elements 21B.

[0122] like Figure 18 As shown, several of the plurality of second wires 42 are electrically connected to any one of the two fourth electrodes 214 of the plurality of first elements 21A and the second wiring layer 622 of the first wiring 601. Thus, the third signal terminal 173 is connected to any one of the two fourth electrodes 214 of the plurality of first elements 21A. Furthermore, as... Figure 18As shown, several of the plurality of second wires 42 are electrically bonded to any one of the two fourth electrodes 214 of the plurality of second elements 21B and the second wiring layer 622 of the second wiring 602. Thus, the fourth signal terminal 174 is connected to any one of the two fourth electrodes 214 of the plurality of second elements 21B. The plurality of second wires 42 are composed of gold. Alternatively, the plurality of second wires 42 may be composed of copper or aluminum. When each semiconductor element 21 (each of the plurality of first elements 21A and the plurality of second elements 21B) does not contain any of the two fourth electrodes 214, the plurality of second wires 42 are bonded to the second electrodes 212 of the plurality of semiconductor elements 21 one by one.

[0123] like Figure 18 As shown, the fourth conductor 44 is electrically bonded to the fifth wiring layer 625 and the first mounting portion 1121 of the first wiring 601. Thus, the seventh signal terminal 183 is connected to the first electrodes 211 of the plurality of first elements 21A via the first mounting portion 1121. The fourth conductor 44 is composed of gold. Alternatively, the fourth conductor 44 may also be composed of copper or aluminum.

[0124] like Figure 18 and Figure 21 As shown, the first conductive component 31 is electrically connected to the second electrodes 212 of the plurality of first elements 21A and the second mounting portion 1122. Thus, the second electrodes 212 of the plurality of first elements 21A are electrically connected to the second mounting portion 1122. The first conductive component 31 is composed of copper. The first conductive component 31 is a metal clip. Figure 18 and Figure 21 As shown, the first conductive component 31 has a main body 311, a plurality of first joints 312 and a plurality of second joints 313.

[0125] The main body 311 constitutes the main part of the first conductive component 31. For example... Figure 18 As shown, the main body 311 extends in the first direction x. Figure 18 and Figure 21 As shown, the main body 311 spans between the first mounting part 1121 and the second mounting part 1122. Figure 18 In the example shown, a plurality of through holes are formed in the main body portion 311. These through holes extend through the main body portion 311 in the thickness direction z. When viewed from above, the multiple through holes overlap between the first mounting portion 1121 and the second mounting portion 1122. Therefore, when the sealing portion 50 is formed, the flow of the sealing portion 50 into the lower part of the main body portion 311 in the thickness direction z (the z2 side of the thickness direction z) becomes better.

[0126] like Figure 18 , Figure 21 and Figure 22As shown, a plurality of first joints 312 are respectively joined to the second electrodes 212 of a plurality of first elements 21A. Each of the plurality of first joints 312 is opposite to any one of the second electrodes 212 of the plurality of first elements 21A. In top view, each first joint 312 extends from the main body 311 toward the x1 side of the first direction x. In the illustrated example, the plurality of first joints 312 are divided into two strands from the main body 311, but they may not be divided into two strands. The base end of each first joint 312 (the end on the side connected to the main body 311) bends downward in the thickness direction z (to the z2 side of the thickness direction z). Therefore, the front end of each first joint 312 (the end on the opposite side of the side connected to the main body 311) is located in the thickness direction z below the main body 311 (to the z2 side of the thickness direction z).

[0127] like Figure 18 and Figure 21 As shown, a plurality of second joints 313 engage with the second mounting portion 1122. Each of the plurality of second joints 313 is opposite to the second mounting portion 1122. In top view, each second joint 313 extends from the main body portion 311 toward the x2 side of the first direction x. The base end of each second joint 313 (the end on the side connected to the main body portion 311) bends downward in the thickness direction z (to the z2 side of the thickness direction z). Therefore, the front end of each second joint 313 (the end on the opposite side of the side connected to the main body portion 311) is located in the thickness direction z below the main body portion 311 (to the z2 side of the thickness direction z).

[0128] like Figure 22 As shown, the semiconductor device B1 further includes a first conductive bonding layer 33. The first conductive bonding layer 33 is situated between the second electrodes 212 of the plurality of first elements 21A and the plurality of first bonding portions 312. The first conductive bonding layer 33 electrically bonds the second electrodes 212 of the plurality of first elements 21A to the plurality of first bonding portions 312. The first conductive bonding layer 33 is, for example, solder. Alternatively, the first conductive bonding layer 33 may also comprise a sintered body of metal particles.

[0129] like Figure 21 As shown, the semiconductor device B1 further includes a second conductive bonding layer 34. The second conductive bonding layer 34 is located between the second mounting portion 1122 and the second bonding portion 313. The second conductive bonding layer 34 electrically bonds the second mounting portion 1122 and the second bonding portion 313. The second conductive bonding layer 34 is, for example, solder. Alternatively, the second conductive bonding layer 34 may also comprise a sintered body of metal particles.

[0130] like Figure 17As shown, the second conductive component 32 is electrically connected to the second electrodes 212 of the plurality of second elements 21B and the two second power terminals 15. Thus, the second electrodes 212 of the plurality of second elements 21B are connected to the two second power terminals 15. The second conductive component 32 is composed of copper. The second conductive component 32 is a metal clip. Figure 17 as well as Figures 21 to 26 As shown, the second conductive component 32 includes a main body 321, a plurality of third joints 322 and a pair of fourth joints 323.

[0131] The main body 321 constitutes the main part of the second conductive component 32. For example... Figure 21 and Figure 25 As shown, the main body 321 is arranged parallel to the upper surface of the first mounting portion 1121 and the upper surface of the second mounting portion 1122. The main body 321 is separated from the main body 311 of the first conductive member 31, and from the first mounting portion 1121 and the second mounting portion 1122.

[0132] like Figure 17 , Figure 21 and Figure 23 As shown, a plurality of third joints 322 are respectively joined to the second electrodes 212 of a plurality of second elements 21B. Each of the plurality of third joints 322 is opposite to any one of the second electrodes 212 of the plurality of second elements 21B. In top view, the plurality of third joints 322 extend from the main body 321 along the second direction y. The base end of each third joint 322 (the end on the side connected to the main body 321) bends downward in the thickness direction z (towards the z2 side of the thickness direction z). Therefore, the front end of each third joint 322 (the end on the opposite side of the side connected to the main body 321) is located downward in the thickness direction z (towards the z2 side of the thickness direction z) than the main body 321 in the thickness direction z.

[0133] like Figure 17 as well as Figure 21 As shown, a pair of fourth couplings 323 are respectively coupled to two second power terminals 15. The pair of fourth couplings 323 are respectively opposite to one of the two second power terminals 15.

[0134] like Figure 23 As shown, the semiconductor device B1 further includes a third conductive bonding layer 35. The third conductive bonding layer 35 is situated between the second electrodes 212 of the plurality of second elements 21B and the plurality of third bonding portions 322. The third conductive bonding layer 35 electrically bonds the second electrodes 212 of the plurality of second elements 21B to the plurality of third bonding portions 322. The third conductive bonding layer 35 is, for example, solder. Alternatively, the third conductive bonding layer 35 may also comprise a sintered body of metal particles.

[0135] like Figure 21As shown, the semiconductor device B1 also includes a fourth conductive bonding layer 36. The fourth conductive bonding layer 36 is located between the two second electrical terminals 15 and a pair of fourth bonding portions 323. The fourth conductive bonding layer 36 electrically bonds the two second electrical terminals 15 to the pair of fourth bonding portions 323. The fourth conductive bonding layer 36 is, for example, solder. Alternatively, the fourth conductive bonding layer 36 may also comprise a sintered body of metal particles.

[0136] like Figures 15 to 27 As shown, the sealing portion 50 covers a plurality of semiconductor elements 21, a first conductive member 31, a second conductive member 32, a plurality of first wires 41, a plurality of second wires 42, a plurality of third wires 43, and a fourth wire 44. Furthermore, the sealing portion 50 covers a portion of each of the supporting substrate 11, a plurality of power terminals 13, and a plurality of signal terminals 17. The sealing portion 50 is electrically insulating. The sealing portion 50 comprises, for example, black epoxy resin. The sealing portion 50 is formed, for example, by molding. Figures 15 to 17 as well as Figures 19 to 27 As shown, the sealing portion 50 has a top surface 51, a plurality of second recesses 511, a bottom surface 52, a plurality of resin side surfaces 53, and a pair of recesses 55.

[0137] like Figure 21 and Figures 24 to 27 As shown, the top surface 51 faces the same direction in the thickness direction z as the upper surface of the first mounting portion 1121 and the upper surface of the second mounting portion 1122 (the z1 side of the thickness direction z). The top surface 51 of each semiconductor device B1 is in contact with the mounting member D1.

[0138] Multiple second recesses 511 are recessed from the top surface 51 toward the z2 side in the thickness direction z, and are formed individually corresponding to each of the multiple sleeves 64. When viewed along the thickness direction z, the multiple second recesses 511 overlap with any one of the multiple sleeves 64. The second recess 511 includes a portion (second portion 5111) located radially inward toward the z1 side in the thickness direction z of the sleeve 64. In this embodiment, the second recess 511 is formed as a cone shape that is inclined entirely or substantially entirely toward the z1 side in the thickness direction z of the sleeve 64.

[0139] like Figure 19 , Figure 21 as well as Figures 24 to 27 As shown, the bottom surface 52 faces the side opposite to the top surface 51 in the thickness direction z (the z2 side of the thickness direction z). Figure 20 , Figure 21 as well as Figures 24 to 27 As shown, the second wiring layer 113 of the support substrate 11 is exposed from the bottom surface 52. The bottom surface 52 of each semiconductor device B1 is in contact with the main body 71 of the heat sink C1.

[0140] Multiple resin side surfaces 53 are connected to the top surface 51. The multiple resin side surfaces 53 include a pair of first side surfaces 531 and a pair of second side surfaces 532.

[0141] like Figure 16 , Figure 17 , Figures 19 to 21 as well as Figure 24 As shown, a pair of first side surfaces 531 are positioned separately in the first direction x. The pair of first side surfaces 531 face opposite sides in the first direction x and extend along the second direction y. The pair of first side surfaces 531 are connected to the top surface 51. A first power terminal 14 and two second power terminals 15 protrude from the first side surface 531 on the x1 side of the first direction x, respectively. Two third power terminals 16 protrude from the first side surface 531 on the x2 side of the first direction x, respectively.

[0142] like Figure 16 , Figure 17 , Figure 20 as well as Figures 25 to 27 As shown, a pair of second side surfaces 532 are positioned separately in the second direction y. The pair of second side surfaces 532 face opposite sides in the second direction y and extend along the first direction x. The pair of second side surfaces 532 are connected to the top surface 51 and the bottom surface 52.

[0143] like Figure 16 , Figure 17 as well as Figure 20 As shown, a pair of recesses 55 are recessed from the x1 side of one of the pair of first side surfaces 531 in the first direction x toward the first direction x. The pair of recesses 55 extend from the top surface 51 to the bottom surface 52 in the thickness direction z. The pair of recesses 55 are located on both sides of the first power terminal 14 in the second direction y.

[0144] The specific structure of the semiconductor device B1 described above is an example and is not limited to the example described above. For example, the number of multiple signal terminals 17, the signals input and output by each signal terminal 17, the number of multiple semiconductor elements 21, the structure of the first wiring 601 and the second wiring 602, etc., can be appropriately changed. The support substrate 11 may also have a conductive plate-shaped member bonded on the first wiring layer 112 (each of the first mounting portion 1121 and the second mounting portion 1122). In this case, multiple semiconductor elements 21 (each of the multiple first elements 21A and the multiple second elements 21B) and a pair of control wirings 60 are mounted on the conductive plate-shaped member.

[0145] Next, refer to the following Figures 29 to 31 An example of a method for manufacturing semiconductor device B1 will be described. Figures 29 to 31These are cross-sectional views representing one step in the manufacturing process of semiconductor device B1. Figures 29 to 31 Indicates and Figure 27 The sectional view shown is the same cross-section.

[0146] Figure 29 This indicates the state before the signal terminals 17 are pressed into the sleeve 64. As shown in the figure, multiple signal terminals 17 are held together by the holding part 19. Next, as... Figure 30 As shown, multiple signal terminals 17 are inserted into corresponding multiple sleeves 64. The process of inserting the multiple signal terminals 17 into the multiple sleeves 64 is performed while a portion of each of the multiple signal terminals 17 is covered and held by the holding portion 19. The multiple signal terminals 17 held by the holding portion 19 are pressed into the multiple sleeves 64. Here, the multiple signal terminals 17 can be pressed towards the z2 side of the thickness direction z, or the holding portion 19 can be pressed towards the z2 side of the thickness direction z.

[0147] When multiple signal terminals 17 are further inserted into multiple sleeves 64, such as Figure 31 As shown, the retaining part 19 (bottom surface 192 of the retaining part) abuts against the sealing part 50 (top surface 51). At this time, the ends of the plurality of signal terminals 17 on the z2 side of the thickness direction z are pressed into the sleeve 64 by a predetermined length.

[0148] Figure 32 This is a schematic diagram of vehicle F1 equipped with power conversion unit A10. Vehicle F1 is, for example, an electric vehicle (EV).

[0149] like Figure 32 As shown, vehicle F1 includes an on-board charger 93, a battery 94, and a drive system 95. Power is supplied to the on-board charger 93 wirelessly from an outdoor power supply facility (not shown). Alternatively, the power supply unit from the power supply facility to the on-board charger 93 can also be wired. The on-board charger 93 incorporates a boost-type DC-DC converter. The voltage of the power supplied to the on-board charger 93 is boosted by this converter before supplying power to the battery 94. The boosted voltage is, for example, 600V.

[0150] Drive system 95 drives vehicle F1. Drive system 95 includes inverter 951 and drive source 952. Power conversion unit A10 (semiconductor device B1) forms part of inverter 951. Power stored in battery 94 supplies power to inverter 951. The power supplied from battery 94 to inverter 951 is direct current (DC). Furthermore, it can also be connected to… Figure 32Unlike the power system shown, a boost-type DC-DC converter is also provided between the battery 94 and the inverter 951. The inverter 951 converts DC power into AC power. The inverter 951, including the power conversion unit A10 (semiconductor device B1), is connected to the drive source 952. The drive source 952 has an AC motor and a transmission. When the AC power converted by the inverter 951 is supplied to the drive source 952, the AC motor rotates, and this rotation is transmitted to the transmission. The transmission rotates the drive shaft of the vehicle F1 by appropriately reducing the speed transmitted from the AC motor. Thus, the vehicle F1 is driven. When the vehicle F1 is driven, the speed of the AC motor needs to be freely operated based on information such as the amount of change in the accelerator pedal. Therefore, the power conversion unit A10 (semiconductor device B1) in the inverter 951 needs to output AC power with an appropriately varied frequency to correspond to the required speed of the AC motor.

[0151] The function and effect of the power conversion unit A10 are as follows.

[0152] In the power conversion unit A10, the holding portion 19 covers a portion of each of the plurality of signal terminals 17 inserted into any one of the plurality of sleeves 64. Thus, the plurality of signal terminals 17 inserted into any one of the plurality of sleeves 64 are held together by the holding portion 19. With this structure, mutual positional misalignment of the plurality of signal terminals 17 held in the holding portion 19 can be suppressed, and these plurality of signal terminals 17 can be smoothly inserted into the plurality of through holes 903 of the wiring substrate E1. Therefore, the assembly of the power conversion unit A10 (semiconductor device B1 and wiring substrate E1) becomes easier.

[0153] In this embodiment, the retaining part 19 (bottom surface 192 of the retaining part) contacts the sealing part 50 (top surface 51). With this structure, when the plurality of signal terminals 17 are respectively inserted into the corresponding plurality of sleeves 64, the insertion length of the plurality of signal terminals 17 relative to the sleeves 64 can be made uniform.

[0154] Each of the multiple signal terminals 17 has a base 170A and a protrusion 170C extending in the thickness direction z. The protrusion 170C protrudes further than the base 170A in a direction intersecting the thickness direction z. With this structure, when the multiple signal terminals 17 are pressed into the sleeve 64, it is possible to prevent the multiple signal terminals 17 from shifting position (shifting position in the thickness direction z) from the holding portion 19 that holds the multiple signal terminals 17.

[0155] The sealing portion 50 has a plurality of second recesses 511 recessed from the top surface 51 toward the z2 side in the thickness direction z. When viewed along the thickness direction z, the plurality of second recesses 511 overlap with any one of the plurality of sleeves 64. The second recesses 511 include a second portion 5111 located radially inward of the sleeve 64 toward the z1 side in the thickness direction z. According to this structure, when the plurality of signal terminals 17 are pressed into the plurality of sleeves 64, they are properly guided by the second recesses 511. Therefore, the assembly of the semiconductor device B1 is facilitated.

[0156] In the power conversion unit A10, the substrate 90 of the wiring substrate E1 has a first recess 904. The first recess 904 is recessed from the inner surface of the through hole 903 and the second surface 902. The first recess 904 includes a first portion 9041 located radially inward of the through hole 903 toward the z1 side in the thickness direction z. According to this structure, when a plurality of signal terminals 17 are pressed into a plurality of through holes 903, even if the signal terminals 17 are slightly misaligned relative to the through holes 903, they can be properly guided by the first recess 904. This is preferred in that it facilitates the assembly of the power conversion unit A10 (semiconductor device B1 and wiring substrate E1).

[0157] Figures 33 to 41 Modifications and other embodiments of the power conversion unit of this disclosure are shown. In these figures, elements that are the same or similar to those in the above embodiments are labeled with the same reference numerals as those in the above embodiments, and repeated descriptions are omitted. The structures of the various modifications and components in each embodiment can be appropriately combined with each other without causing technical inconsistencies.

[0158] First variation:

[0159] Figure 33 This represents a first variation of the power conversion unit A10. Figure 33 This is a partially enlarged cross-sectional view showing the power conversion unit A11 of the first modified example, showing the relationship with... Figure 11 Same cross-section. Figures 34 to 36 This is a cross-sectional view showing an example of the assembly sequence of the power conversion unit A11.

[0160] The structure of the signal terminal 17 of the power conversion unit A11 in this modified example is different from that of the power conversion unit A10. The power conversion unit A11, unlike the power conversion unit A10 described above, does not have a base portion 72.

[0161] In this variation, such as Figure 33As shown, each of the multiple signal terminals 17 has a second bulge 170D. The second bulge 170D is disposed on the z2 side of the thickness direction z of the base 170A. The second bulge 170D protrudes from the base 170A in a direction orthogonal to the thickness direction z. The second bulge 170D of each of the multiple signal terminals 17 is pressed into a multiple sleeve 64. In the power conversion unit A11 of this modified example, the holding part 19 (the top surface 191 of the holding part) also contacts the wiring substrate E1.

[0162] Next, refer to the following Figures 34 to 36 An example of the assembly sequence of the power conversion unit A11 is explained. Figures 34 to 36 These are cross-sectional views representing one step in the assembly sequence of the power conversion unit A11. Figures 34 to 36 Indicates and Figure 33 The sectional view shown is the same cross-section.

[0163] In this variation, firstly, as Figure 34 As shown, multiple signal terminals 17 are respectively inserted into multiple through holes 903 of the wiring substrate E1. The first protrusion 170B of each of the multiple signal terminals 170 is pressed into the corresponding through hole 903. Here, the multiple signal terminals 17 can be directed toward the wiring substrate E1 side (in... Figure 34 The holding portion 19 can be pressed against the wiring substrate E1 by pressing it against the z1 side (the side with thickness z). By pressing each signal terminal 170 into the through hole 903, the holding portion 19 (the top surface 191 of the holding portion) abuts against the wiring substrate E1. Thus, the holding portion 19 and the plurality of signal terminals 17 are supported by the wiring substrate E1.

[0164] Next, as Figure 35 As shown, multiple signal terminals 17 are inserted into corresponding multiple sleeves 64. When inserting the multiple signal terminals 17 into the multiple sleeves 64, for example, the wiring substrate E11 is pressed towards the multiple sleeves 64 (the z2 side in the thickness direction z). Here, the second protrusions 170D of each of the multiple signal terminals 17 supported on the wiring substrate E1 are pressed into the multiple sleeves 64 respectively.

[0165] When multiple signal terminals 17 are further inserted into multiple sleeves 64, such as Figure 36 As shown, the retaining part 19 (bottom surface 192 of the retaining part) abuts against the sealing part 50 (top surface 51). At this time, the ends of the plurality of signal terminals 17 on the z2 side of the thickness direction z are pressed into the sleeve 64 by a predetermined length.

[0166] The function and effect of the power conversion unit A11 are as follows.

[0167] In the power conversion unit A11, the holding portion 19 covers a portion of each of the plurality of signal terminals 17 inserted into any one of the plurality of sleeves 64. Thus, the plurality of signal terminals 17 inserted into any one of the plurality of sleeves 64 are held together by the holding portion 19. With this structure, mutual positional misalignment of the plurality of signal terminals 17 held in the holding portion 19 can be suppressed, and these plurality of signal terminals 17 can be smoothly inserted into the plurality of through holes 903 of the wiring substrate E1. Therefore, the assembly of the power conversion unit A11 (semiconductor device B1 and wiring substrate E1) becomes easier.

[0168] The retaining part 19 (bottom surface 192 of the retaining part) contacts the sealing part 50 (top surface 51). With this structure, when the multiple signal terminals 17 are respectively inserted into the corresponding multiple sleeves 64, the insertion length of each of the multiple signal terminals 17 relative to the sleeve 64 can be made uniform.

[0169] The holding portion 19 (the top surface 191 of the holding portion) contacts the wiring substrate E1. With this structure, when multiple signal terminals 17 are inserted into corresponding through holes 903, the insertion length of each signal terminal 17 relative to the through hole 903 can be made uniform. Furthermore, the power conversion unit A11 performs the same function as the power conversion unit A10 in the above embodiment.

[0170] Second implementation method:

[0171] Figures 37 to 41 The power conversion unit of the second embodiment of this disclosure is shown. Compared with the power conversion unit A10 of the above embodiment, the power conversion unit A20 of this embodiment further includes a wiring board 96, a plurality of connecting wires 97, and a plurality of positioning pins 98.

[0172] like Figure 38 As shown, the wiring substrate 96 is connected to the wiring substrate E1 via multiple connecting wires 97. Figure 37 As shown, the wiring substrate 96 extends in the second direction y. Circuitry not located on the wiring substrate E1, such as a controller for controlling gate drivers, is provided on the wiring substrate 96. Furthermore, an overheat protection circuit connected to a pair of thermistors 22 of the multiple semiconductor devices B1 is provided on the wiring substrate 96. The wiring substrate 96 sandwiches the wiring substrate E11 in the thickness direction z and is located on the side opposite to the heat sink C1 (main body 71). Viewed in the thickness direction z, the wiring substrate 96 overlaps with the wiring substrate E1.

[0173] like Figure 38As shown, multiple connecting wires 97 connect the wiring substrate E1 and the wiring substrate 96. In the power conversion unit A20, the multiple connecting wires 97 have a first connecting portion 971 and a second connecting portion 972. Figure 39 As shown, the first connecting portion 971 is electrically connected to the wiring substrate E1. Figure 39 and Figure 40 As shown, the first connecting portion 971 includes a plurality of connecting pins 971A. The plurality of connecting pins 971A extend in the thickness direction z. Figure 40 As shown, the second connecting portion 972 is electrically connected to the wiring substrate 96 and is opposite to the first connecting portion 971. Figure 41 As shown, the second connecting portion 972 has a housing portion 972A and a plurality of connecting holes 972B. A plurality of connecting pins 971A are respectively inserted into the plurality of connecting holes 972B. Thus, the first connecting portion 971 and the second connecting portion 972 are electrically connected.

[0174] like Figure 41 As shown, the outer shell portion 972A of the second connecting portion 972 can be displaced relative to the plurality of connecting pins 971A in a direction orthogonal to the thickness direction z. Therefore, the second connecting portion 972 can be displaced relative to the first connecting portion 971 in a direction orthogonal to the thickness direction z. Thus, the plurality of connecting wires 97 become a structure capable of displacement in a direction orthogonal to the thickness direction z. This structure of the plurality of connecting wires 97 allows for the application of connector structures disclosed in Japanese Patent Application Publication Nos. 2018-113163, 2018-63886, and 2017-139101.

[0175] like Figure 38 As shown, a plurality of positioning pins 98 are located between wiring substrate E1 and wiring substrate 96 in the thickness direction z. The plurality of positioning pins 98 are separately arranged in the second direction y. The plurality of positioning pins 98 are respectively located between two adjacent semiconductor devices B1 in the second direction y. The plurality of positioning pins 98 are used to determine the position of wiring substrate 96 relative to wiring substrate E1 and to support wiring substrate 96.

[0176] The function and effect of the power conversion unit A20 are as follows.

[0177] In the power conversion unit A20, the holding portion 19 covers a portion of each of the plurality of signal terminals 17 inserted into any one of the plurality of sleeves 64. Thus, the plurality of signal terminals 17 inserted into any one of the plurality of sleeves 64 are held together by the holding portion 19. With this structure, the relative positional misalignment of the plurality of signal terminals 17 held in the holding portion 19 can be suppressed, and these plurality of signal terminals 17 can be smoothly inserted into the plurality of through holes 903 of the wiring substrate E1. Therefore, the assembly of the power conversion unit A20 (semiconductor device B1 and wiring substrate E1) becomes easier. Furthermore, the power conversion unit A20 performs the same function as the power conversion unit A10 of the above embodiment.

[0178] The power conversion unit and semiconductor device according to this disclosure are not limited to the embodiments described above. The specific structures of the various parts of the power conversion unit and semiconductor device involved in this disclosure can be freely modified in various ways.

[0179] This disclosure includes the embodiments described in the following notes.

[0180] Appendix 1. A semiconductor device comprising: a semiconductor element; a plurality of connecting portions, each having conductivity; a sealing portion covering a portion of the semiconductor element and each of the plurality of connecting portions; a plurality of signal terminals inserted into any one of the plurality of connecting portions; and a holding portion.

[0181] The plurality of signal terminals protrude from the sealing portion toward one side in the thickness direction of the sealing portion.

[0182] The retaining portion covers a portion of each of the plurality of signal terminals.

[0183] Note 2. The semiconductor device according to Note 1, wherein,

[0184] Each of the plurality of signal terminals has: a base extending along the thickness direction; and a protrusion protruding beyond the base in a direction intersecting the thickness direction.

[0185] The retaining portion covers a portion of the base of each of the plurality of signal terminals and the protrusion.

[0186] Appendix 3. A semiconductor module comprising:

[0187] The semiconductor device described in Appendix 1 or 2; and

[0188] A control substrate, which is disposed on one side of the thickness direction relative to the sealing portion.

[0189] The control substrate has a plurality of through holes extending through the thickness direction.

[0190] The plurality of signal terminals are respectively inserted into any one of the plurality of through holes.

[0191] Appendix 4. The semiconductor module according to Appendix 3, wherein,

[0192] The retaining portion is located between the sealing portion and the control substrate in the thickness direction.

[0193] Appendix 5. The semiconductor module according to Appendix 4, wherein,

[0194] The retaining part is in contact with the control substrate.

[0195] Note 6. The semiconductor module according to Note 4 or 5, wherein,

[0196] The retaining part is in contact with the sealing part.

[0197] Appendix 7. The semiconductor module according to any one of Appendices 3 to 6, wherein,

[0198] Each of the plurality of signal terminals has: a base extending along the thickness direction; and a first bulge protruding from the base in a direction intersecting the thickness direction.

[0199] The first bulge is pressed into the through hole.

[0200] Appendix 8. The semiconductor module according to any one of Appendices 3 to 7, wherein,

[0201] The control substrate has: a first surface facing one side of the thickness direction; a second surface facing the other side of the thickness direction; and a first recess recessed from the inner surface of the through hole and the second surface.

[0202] The first recess includes a first portion located radially inside the through hole as it faces one side toward the thickness direction.

[0203] Appendix 9. The semiconductor module according to any one of Appendices 3 to 8, wherein,

[0204] The sealing portion has: a top surface facing one side in the thickness direction; and a plurality of second recesses recessed from the top surface to the other side in the thickness direction.

[0205] Each of the plurality of second recesses overlaps with any one of the plurality of connecting portions when viewed along the thickness direction.

[0206] The plurality of second recesses each include a second portion located radially inside the connection portion as it faces the other side of the thickness direction.

[0207] Note 10. The semiconductor module according to any one of Notes 3 to 9, wherein,

[0208] Each of the plurality of signal terminals has: a base extending along the thickness direction; and a second bulge protruding from the base in a direction intersecting the thickness direction.

[0209] The second bulge is pressed into the connecting portion.

[0210] Note 11. The semiconductor module according to any one of Notes 3 to 10, wherein,

[0211] The semiconductor device also includes a support substrate on which the semiconductor element and the plurality of connecting portions are mounted.

[0212] Note 12. The semiconductor module according to Note 11, wherein,

[0213] The semiconductor device also includes power terminals protruding from the sealing portion in a first direction orthogonal to the thickness direction.

[0214] The semiconductor element includes a first element and a second element.

[0215] The power terminals include a first power terminal that is connected to the first element and a second power terminal that is connected to the second element.

[0216] Note 13. The semiconductor module according to Note 12, wherein,

[0217] The support substrate includes a first mounting portion for mounting the first element and a second mounting portion for mounting the second element.

[0218] The first mounting part is located on one side of the first mounting part relative to the second mounting part in the first direction.

[0219] The first power terminal and the second power terminal protrude from the sealing portion toward one side in the first direction.

[0220] Note 14. The semiconductor module according to Note 13, wherein,

[0221] The power supply terminal includes a third power terminal that is connected to both the first element and the second element.

[0222] The third power terminal protrudes from the sealing portion to the other side in the first direction.

[0223] Note 15. The semiconductor module according to Note 14, wherein,

[0224] The device comprises a plurality of semiconductor devices arranged in a second direction orthogonal to the thickness direction and the first direction.

[0225] Appendix 16. A power conversion unit comprising:

[0226] The semiconductor module described in Appendix 15; and

[0227] heat sink,

[0228] Each of the plurality of said semiconductor devices has a support substrate having a bottom surface facing the opposite side in the thickness direction.

[0229] In each of the plurality of said semiconductor devices, the bottom surface is exposed from the sealing portion.

[0230] The bottom surface of each of the plurality of semiconductor devices is in contact with the heat sink.

[0231] Appendix 17. A method for manufacturing a semiconductor device, the semiconductor device comprising: a semiconductor element; a plurality of connecting portions, each having conductivity; a sealing portion covering a portion of the semiconductor element and each of the plurality of connecting portions; and a plurality of signal terminals protruding from the sealing portion toward one side of the sealing portion, wherein,

[0232] It includes a process of holding the plurality of signal terminals together and inserting them into the plurality of connection portions.

[0233] Appendix 18. The method for manufacturing a semiconductor device according to Appendix 17, wherein,

[0234] The process of inserting into the plurality of connecting parts is performed while the retaining part covers and holds a portion of each of the plurality of signal terminals.

[0235] Appendix 19. A vehicle that possesses:

[0236] Driver source; and

[0237] The power conversion unit described in Appendix 16,

[0238] The plurality of semiconductor devices are connected to the driving source.

[0239] Symbol Explanation

[0240] A10, A11, A20—Power conversion unit; B1—Semiconductor device; B11—First device; B12—Second device; B13—Third device; C1—Heat sink; D1—Mounting component; E1—Wiring board (control board); F1—Vehicle; 11—Support board; 111—Insulating layer; 112—First wiring layer; 1121—First mounting part; 1122—Second mounting part; 113—Second wiring layer; 13—Power terminal; 14—First power terminal; 15—Second power terminal; 16—Third power terminal; 17—Signal terminal; 170A—Base; 170B—Bulging part; 170C—Protrusion; 170D—Second bulging part; 171—First signal terminal; 172—Second signal terminal Terminals; 173—Third signal terminal; 174—Fourth signal terminal; 181—Fifth signal terminal; 182—Sixth signal terminal; 183—Seventh signal terminal; 19—Holding portion; 191—Top surface of holding portion; 192—Bottom surface of holding portion; 21—Semiconductor element; 21A—First element; 21B—Second element; 211—First electrode; 212—Second electrode; 213—Third electrode; 214—Fourth electrode; 22—Thermistor; 23—Conductive bonding layer; 31—First conductive component; 311—Main body; 312—First bonding portion; 313—Second bonding portion; 32—Second conductive component; 321—Main body; 322—Third bonding portion; 323—Fourth bonding portion; 33—First conductive bonding layer Layer; 34—Second conductive bonding layer; 35—Third conductive bonding layer; 36—Fourth conductive bonding layer; 41—First conductor; 42—Second conductor; 43—Third conductor; 44—Fourth conductor; 50—Sealing part; 51—Top surface; 511—Second recess; 5111—Second part; 52—Bottom surface; 53—Resin side surface; 531—First side surface; 532—Second side surface; 55—Recess; 60—Control wiring; 601—First wiring; 602—Second wiring; 61—Insulating layer; 62—Wiring layer; 621—First wiring layer; 622—Second wiring layer; 623—Third wiring layer; 624—Fourth wiring layer; 625—Fifth wiring layer; 63—Metal layer; 64—Sleeve (connecting part); 71—Main body 72—Base section; 721—First section; 722—Second section; 73—Positioning section; 81—Pressing section; 82—Fixing section; 821—End-end configuration section; 822—Middle configuration section; 89—Fastener; 90—Base material; 901—First surface; 902—Second surface; 903—Through hole; 904—First recess; 9041—First section; 911—First wiring; 912—Second wiring; 913—Third wiring; 914—Fourth wiring; 921—Mounting hole; 922—Positioning hole; 93—On-board charger; 94—Battery; 95—Drive system; 951—Inverter; 952—Drive source; 96—Wiring board; 97—Connecting wiring; 971—First connecting section; 971A—Connecting pin;972—Second connecting part; 972A—Outer shell part; 972B—Connecting hole; 98—Positioning pin.

Claims

1. A semiconductor device, characterized in that, have: Semiconductor components; Multiple connecting parts, each of which is conductive; A sealing portion that covers a portion of the semiconductor element and each of the plurality of connecting portions; Multiple signal terminals, which are inserted into any one of the multiple connecting parts; as well as Maintenance Department The plurality of signal terminals protrude from the sealing portion toward one side in the thickness direction of the sealing portion. The retaining portion covers a portion of each of the plurality of signal terminals.

2. The semiconductor device according to claim 1, characterized in that, Each of the plurality of signal terminals has: a base extending along the thickness direction; and a protrusion protruding beyond the base in a direction intersecting the thickness direction. The retaining portion covers a portion of the base of each of the plurality of signal terminals and the protrusion.

3. A semiconductor module, characterized in that, have: The semiconductor device according to claim 1 or 2; and A control substrate, which is disposed on one side of the thickness direction relative to the sealing portion. The control substrate has a plurality of through holes extending through the thickness direction. The plurality of signal terminals are respectively inserted into any one of the plurality of through holes.

4. The semiconductor module according to claim 3, characterized in that, The retaining portion is located between the sealing portion and the control substrate in the thickness direction.

5. The semiconductor module according to claim 4, characterized in that, The retaining part is in contact with the control substrate.

6. The semiconductor module according to claim 4 or 5, characterized in that, The retaining part is in contact with the sealing part.

7. The semiconductor module according to any one of claims 3 to 6, characterized in that, Each of the plurality of signal terminals has: a base extending along the thickness direction; and a first bulge protruding from the base in a direction intersecting the thickness direction. The first bulge is pressed into the through hole.

8. The semiconductor module according to any one of claims 3 to 7, characterized in that, The control substrate has: a first surface facing one side of the thickness direction; a second surface facing the other side of the thickness direction; and a first recess recessed from the inner surface of the through hole and the second surface. The first recess includes a first portion located radially inside the through hole as it faces one side toward the thickness direction.

9. The semiconductor module according to any one of claims 3 to 8, characterized in that, The sealing portion has: a top surface facing one side in the thickness direction; and a plurality of second recesses recessed from the top surface to the other side in the thickness direction. Each of the plurality of second recesses overlaps with any one of the plurality of connecting portions when viewed along the thickness direction. The plurality of second recesses each include a second portion located radially inside the connection portion as it faces the other side of the thickness direction.

10. The semiconductor module according to any one of claims 3 to 9, characterized in that, Each of the plurality of signal terminals has: a base extending along the thickness direction; and a second bulge protruding from the base in a direction intersecting the thickness direction. The second bulge is pressed into the connecting portion.

11. The semiconductor module according to any one of claims 3 to 10, characterized in that... The semiconductor device also includes a support substrate on which the semiconductor element and the plurality of connecting portions are mounted.

12. The semiconductor module according to claim 11, characterized in that, The semiconductor device also includes power terminals protruding from the sealing portion in a first direction orthogonal to the thickness direction. The semiconductor element includes a first element and a second element. The power terminals include a first power terminal that is connected to the first element and a second power terminal that is connected to the second element.

13. The semiconductor module according to claim 12, characterized in that, The support substrate includes a first mounting portion for mounting the first element and a second mounting portion for mounting the second element. The first mounting part is located on one side of the first mounting part relative to the second mounting part in the first direction. The first power terminal and the second power terminal protrude from the sealing portion toward one side in the first direction.

14. The semiconductor module according to claim 13, characterized in that, The power supply terminal includes a third power terminal that is connected to both the first element and the second element. The third power terminal protrudes from the sealing portion to the other side in the first direction.

15. The semiconductor module according to claim 14, characterized in that, The device comprises a plurality of semiconductor devices arranged in a second direction orthogonal to the thickness direction and the first direction.

16. A power conversion unit, characterized in that, have: The semiconductor module of claim 15; and heat sink, Each of the plurality of said semiconductor devices has a support substrate having a bottom surface facing the opposite side in the thickness direction. In each of the plurality of said semiconductor devices, the bottom surface is exposed from the sealing portion. The bottom surface of each of the plurality of semiconductor devices is in contact with the heat sink.

17. A method of manufacturing a semiconductor device, the semiconductor device comprising: a semiconductor element; a plurality of connecting portions, each having conductivity; a sealing portion covering a portion of the semiconductor element and each of the plurality of connecting portions; and a plurality of signal terminals protruding from the sealing portion toward one side of the sealing portion. The manufacturing method of this semiconductor device is characterized by the following: It includes a process of holding the plurality of signal terminals together and inserting them into the plurality of connection portions.

18. The method for manufacturing a semiconductor device according to claim 17, characterized in that, The process of inserting into the plurality of connecting parts is performed while the retaining part covers and holds a portion of each of the plurality of signal terminals.

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