A synchronous calibration system, a master controller and a slave controller
By employing a master-slave distributed calibration system architecture and efficient data transmission technology, the problems of low efficiency and high cost in inertial measurement unit calibration systems have been solved, enabling efficient and low-cost mass production.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- GUANGZHOU ASENSING TECH CO LTD
- Filing Date
- 2026-03-13
- Publication Date
- 2026-06-09
AI Technical Summary
Existing inertial measurement unit calibration systems suffer from low calibration efficiency, excessive manual intervention, low equipment utilization, and poor scalability, making it difficult to meet the needs of mass production.
The system adopts a master-slave distributed calibration architecture, which connects multiple inertial measurement units through a master controller and multiple slave controllers. It utilizes a serial communication protocol and a direct memory access controller to achieve efficient data transmission and buffering, and employs a two-level multiplexer architecture to manage bus resources, enabling parallel calibration of multiple inertial measurement units.
It significantly improves calibration efficiency and equipment utilization, reduces costs, meets the needs of mass production, and enhances calibration accuracy and consistency.
Smart Images
Figure CN122170923A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of calibration technology, and in particular to a synchronous calibration system, a master controller, and a slave controller. Background Technology
[0002] In the field of Inertial Measurement Unit (IMU) calibration, existing technologies have significant shortcomings: traditional tooling only supports the simultaneous calibration of a small number of IMUs, has limited parallel processing capabilities, resulting in low overall calibration efficiency and difficulty in meeting the needs of mass production; simultaneously, the slow calibration speed often causes production line waiting time, and the utilization rate of expensive turntables and other key equipment is low; furthermore, existing systems require a lot of manual intervention, which not only increases labor costs but may also introduce human error, affecting product consistency; more importantly, the current system architecture has poor scalability, making it difficult to adapt to future capacity increases and product iteration needs. These technological limitations lead to long calibration cycles and high production costs, which to some extent restricts the large-scale production of IMU sensors. Summary of the Invention
[0003] In view of this, embodiments of this application provide a synchronous calibration system, a master controller, and a slave controller, which can effectively address the problems of excessively long calibration cycles and high costs associated with IMU calibration.
[0004] In a first aspect, embodiments of this application provide a synchronous calibration system, including: a host computer, a main controller, multiple slave controllers, multiple inertial measurement units, and a multiple two-level multiplexer architecture; Each of the slave controllers is used to connect to multiple of the two-level multiplexer architectures, and each of the two-level multiplexer architectures is used to connect to multiple of the inertial measurement units; The slave controller is used to acquire measurement data from each of the corresponding connected inertial measurement units and upload the measurement data to the main controller; The main controller is used to connect to each of the slave controllers respectively to obtain measurement data from all the inertial measurement units; The main controller is also used to connect to the host computer to integrate the measurement data and upload it to the host computer so that the host computer can calibrate all the inertial measurement units.
[0005] In a first possible embodiment of the first aspect, the master controller includes multiple first communication links, each of which is used to establish a communication connection with a corresponding slave controller; The main controller is configured to configure a first buffer for each of the first communication links, and the first buffer is used to cache the measurement data sent by the slave controller.
[0006] In a second possible embodiment of the first aspect, each of the slave controllers is further configured to send the measurement data to the first communication link via a first direct memory access controller; The main controller is further configured to store the measurement data of each of the first communication links into the first buffer area through the first direct memory access controller; The main controller is also used to determine, through an idle interrupt mechanism, whether each of the first communication links has fully received the measurement data.
[0007] In a third possible embodiment of the first aspect, each of the first communication links is used to transmit the measurement data via a serial communication protocol; The serial communication protocol is used to encapsulate the measurement data into a preset data frame for transmission.
[0008] In a fourth possible embodiment of the first aspect, the preset data frame includes a synchronization header, a function code, and a checksum; The synchronization header is used to identify the start position of the data frame, and the main controller is used to confirm the start position of the data frame based on the synchronization header; The function code is used to identify the control commands and status feedback commands between the master controller and the slave controller, and the master controller is used to confirm the control commands and status feedback between the master controller and the slave controller based on the function code; The check code is the result obtained by calculating the measurement data according to the check algorithm, and the main controller is used to detect whether there are errors during the transmission of the data frame based on the check code.
[0009] In a fifth possible embodiment of the first aspect, the preset data frame further includes a dynamic payload length indicator, a frame sequence number, and a system timestamp; The dynamic load length indicator is used to indicate the number of bytes of the measurement data in the current data frame; The frame sequence number is a unique sequence number that identifies the data frame, and the main controller is used to detect whether the data frame is missing based on the frame sequence number; The system timestamp is used to record the time when the data frame was generated.
[0010] In a sixth possible embodiment of the first aspect, each of the slave controllers includes multiple second communication links, each second communication link being used to connect the two-level multiplexer architecture; Each of the slave controllers is configured with a second buffer for each of the second communication links, the second buffer being used to cache the measurement data received by the slave controller from the inertial measurement unit; Each of the slave controllers is further configured to store the measurement data transmitted via each of the second communication links into the second buffer via a second direct memory access controller.
[0011] In a seventh possible embodiment of the first aspect, the data bit width of the second communication link, the transmission bit width of the second direct memory access controller, and the bit width of the second buffer are the same; The second buffer has a depth of four levels, and the data bit width of the second communication link, the transmission bit width of the second direct memory access controller, and the bit width of the second buffer are all 32 bits.
[0012] In an eighth possible embodiment of the first aspect, the second communication link is further configured to set the level state of the strobe pin to a first level state to select the inertial measurement unit when the measurement data transmission is initiated, and to set the level state of the strobe pin to a second level state after the measurement data transmission is completed; Each of the second communication links is also used to generate a trigger signal via a timer to initiate the measurement data transmission each time the trigger signal is generated.
[0013] In a ninth possible embodiment of the first aspect, the two-level multiplexer architecture includes a plurality of first-level multiplexers and a plurality of second-level multiplexers; Each of the second communication links is connected to the input terminals of multiple first-level multiplexers, and the output terminals of the first-level multiplexers are respectively connected to multiple second-level multiplexers and multiple inertial measurement units. The output terminal of each second-level multiplexer is connected to multiple inertial measurement units.
[0014] In a tenth possible embodiment of the first aspect, each of the slave controllers is further configured to connect the address selection pin and the enable pin of the first-level multiplexer and the second-level multiplexer, respectively, to selectively acquire measurement data from the plurality of the inertial measurement units.
[0015] In an eleventh possible embodiment of the first aspect, the first communication link is a universal asynchronous transceiver, and the second communication link is a serial peripheral interface.
[0016] Secondly, embodiments of this application provide a master controller, which is used to connect to each slave controller respectively to obtain measurement data of all inertial measurement units collected by each slave controller; The main controller is also used to connect to a host computer to integrate the measurement data and upload it to the host computer so that the host computer can calibrate all the inertial measurement units.
[0017] In a first possible embodiment of the second aspect, the master controller includes multiple first communication links, each of which is used to establish a communication connection with the corresponding slave controller; The main controller is configured to configure a first buffer for each of the first communication links, and the first buffer is used to cache the measurement data sent by the slave controller.
[0018] Thirdly, embodiments of this application provide a slave controller, which is used to connect to multiple inertial measurement units respectively through a two-level multiplexer architecture to obtain measurement data of each of the corresponding connected inertial measurement units and upload the measurement data to the main controller.
[0019] In a first possible embodiment of the third aspect, each of the slave controllers includes multiple second communication links, each second communication link being used to connect the two-level multiplexer architecture; Each of the slave controllers is configured with a second buffer for each of the second communication links, the second buffer being used to cache the measurement data received by the slave controller from the inertial measurement unit; Each of the slave controllers is further configured to store the measurement data transmitted via each of the second communication links into the second buffer via a second direct memory access controller.
[0020] The embodiments of this application have the following beneficial effects: This embodiment of a synchronous calibration system includes: a host computer, a master controller, multiple slave controllers, multiple inertial measurement units (IMUs), and multiple two-level multiplexer architectures. Each two-level multiplexer architecture connects to each slave controller and multiple IMUs respectively. The slave controllers acquire measurement data from their respective connected IMUs and upload the data to the master controller. The master controller connects to each slave controller to acquire measurement data from all IMUs. The master controller also connects to the host computer to integrate the measurement data and upload it to the host computer, enabling the host computer to calibrate all IMUs. Based on the above scheme, this application adopts a master-slave distributed calibration system architecture. The master controller connects to multiple slave controllers, and each slave controller can connect to multiple IMUs through a two-level multiplexer architecture, achieving parallel calibration of multiple IMUs. This significantly increases the single-cycle calibration capacity, greatly improves production efficiency, meets the needs of mass production, increases equipment utilization, reduces the hardware cost of IMU calibration, and can flexibly adapt to the calibration requirements of different IMU models. Attached Figure Description
[0021] To more clearly illustrate the technical solutions of the embodiments of this application, the accompanying drawings used in the embodiments will be briefly introduced below. It should be understood that the following drawings only show some embodiments of this application and should not be regarded as a limitation of the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.
[0022] Figure 1 This paper shows a schematic diagram of a first structural embodiment of the synchronous calibration system of this application; Figure 2 A second structural schematic diagram of the synchronous calibration system according to an embodiment of this application is shown; Figure 3 A schematic diagram of a third structure of the synchronous calibration system according to an embodiment of this application is shown; Figure 4 A schematic diagram of the main controller according to an embodiment of this application is shown; Figure 5 A schematic diagram of a controller according to an embodiment of this application is shown.
[0023] Explanation of key component symbols: 100 - Synchronous calibration system; 110 - Host computer; 120 - Main controller; 130 - Slave controller; 140 - Inertial measurement unit; 150 - Two-stage multiplexer architecture; 151 - First-stage multiplexer; 152 - Second-stage multiplexer. Detailed Implementation
[0024] The technical solutions in the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments.
[0025] The components of the embodiments of this application described and illustrated in the accompanying drawings can be arranged and designed in a variety of different configurations. Therefore, the following detailed description of the embodiments of this application provided in the drawings is not intended to limit the scope of the claimed application, but merely to illustrate selected embodiments of the application. All other embodiments obtained by those skilled in the art based on the embodiments of this application without inventive effort are within the scope of protection of this application.
[0026] In the following text, the terms "comprising," "having," and their cognates, which may be used in various embodiments of this application, are intended only to indicate a particular feature, number, step, operation, element, component, or combination thereof, and should not be construed as primarily excluding the presence of one or more other features, numbers, steps, operations, elements, components, or combinations thereof, or adding the possibility of one or more combinations thereof. Furthermore, the terms "first," "second," "third," etc., are used only for distinguishing descriptions and should not be construed as indicating or implying relative importance.
[0027] Unless otherwise specified, all terms used herein (including technical and scientific terms) shall have the same meaning as commonly understood by one of ordinary skill in the art to which the various embodiments of this application pertain. Terms (such as those defined in commonly used dictionaries) shall be interpreted as having the same meaning as in their contextual meaning in the relevant technical field and shall not be construed as having an idealized or overly formal meaning, unless clearly defined in the various embodiments of this application.
[0028] The following detailed description of some embodiments of this application is provided in conjunction with the accompanying drawings. Unless otherwise specified, the following embodiments and features can be combined with each other.
[0029] The synchronization calibration system will be described below with reference to some specific embodiments.
[0030] Figure 1 A schematic diagram of a synchronous calibration system 100 according to an embodiment of this application is shown. Exemplarily, the synchronous calibration system 100 includes: a host computer 110, a main controller 120, multiple slave controllers 130, multiple inertial measurement units 140, and multiple two-level multiplexer architectures 150.
[0031] In this embodiment, each slave controller 130 is used to connect to multiple two-level multiplexer architectures 150, and each two-level multiplexer architecture 150 is used to connect to multiple inertial measurement units 140, so as to transmit the measurement data collected by each inertial measurement unit 140 to the slave controller 130. The slave controller 130 is used to acquire the measurement data of each connected inertial measurement unit 140 and upload the measurement data to the master controller 120. The master controller 120 is used to connect to each slave controller 130 to acquire the measurement data of all inertial measurement units 140. The master controller 120 is also used to connect to the host computer 110 to integrate the measurement data and upload it to the host computer 110 so that the host computer 110 can calibrate all inertial measurement units 140.
[0032] Exemplarily, the inertial measurement unit 140 is a miniature sensor module used to sense the motion state of an object in three-dimensional space. Its core function is to measure the linear acceleration and angular velocity of the object in real time. The host computer 110 calibrates the inertial measurement unit 140 by acquiring the IMU's test data, using a preset calibration model (such as the six-position method, multi-position least squares, etc.), and combining precise time alignment and temperature compensation parameters to batch calculate the calibration coefficients such as zero bias, scale factor, and inter-axis orthogonality error for each IMU. It should be noted that the calibration of the inertial measurement unit 140 by the host computer 110 is a known technique in the art, and its structure and principle will not be elaborated upon here.
[0033] Exemplary, in this embodiment, the synchronization calibration system 100 adopts a master-slave distributed architecture. For example, in one implementation, such as Figure 2 As shown, a hierarchical processing system is constructed from a master controller 120 and six slave controllers 130. The master controller 120 serves as the central control unit, establishing a star topology connection with each slave controller 130 via a high-speed serial bus to form an efficient collaborative processing network. Each slave controller 130 independently manages multiple IMU sensor nodes, constructing a distributed data acquisition unit.
[0034] In one embodiment, the main controller 120 includes multiple first communication links, each first communication link being used to establish a communication connection with a corresponding slave controller 130. Exemplarily, the main controller 120 is configured with a first buffer for each first communication link, the first buffer being used to cache measurement data sent by the slave controller 130. In this embodiment, a buffer space, i.e., a first buffer, is configured for each first communication link. The first direct memory access controller (DMA1) automatically stores the buffer during cyclic access, significantly reducing the load on the main controller 120.
[0035] In one embodiment, the first communication link is a Universal Asynchronous Receiver / Transmitter (UART), and each slave controller 130 is further configured to send measurement data to the first communication link via a first direct memory access controller; the master controller 120 is further configured to store the measurement data of each first communication link into a first buffer via the first direct memory access controller; the master controller 120 is further configured to determine whether each first communication link has fully received the measurement data via an idle interrupt mechanism.
[0036] In this embodiment, the first communication link employs a master-slave UART and DMA architecture to achieve high-speed data interaction. For example, in one implementation, at the receiving end, the master controller 120 uses six independent UART interfaces (such as...) Figure 2The UART1, UART2, UART3, UART4, UART5, and UART6 shown in the diagram work in conjunction with a DMA channel and idle interrupt mechanism to achieve efficient data reception; at the transmitting end, each slave controller 130 (e.g., Figure 2 The controllers shown (controllers 1, 2, 3, 4, 5, and 6) use UART and DMA to send IMU measurement data in batches, significantly reducing bus load. Actual measurements show that this architecture can achieve stable transmission with a single-channel bandwidth of 12KB / s, and a total bandwidth of 72KB / s when all six channels are in parallel. It supports high sampling rates, ensures data acquisition accuracy, improves the accuracy and consistency of IMU calibration, and fully meets the real-time data acquisition requirements of multiple IMUs.
[0037] In one embodiment, each first communication link is used to transmit measurement data via a serial communication protocol; the serial communication protocol is used to encapsulate the measurement data into a preset data frame for transmission. In one embodiment, the preset data frame includes a synchronization header, a function code, and a checksum. Exemplarily, the synchronization header is used to identify the start position of the data frame, and the main controller 120 is used to confirm the start position of the data frame based on the synchronization header. The synchronization header can be a two-byte synchronization header of 0xAB and 0x54. The main controller 120 only starts data frame parsing after detecting consecutive 0xAB and 0x54 after a UART idle interrupt, ensuring frame synchronization reliability.
[0038] Function codes are used to identify control commands and status feedback commands between the master controller 120 and the slave controller 130. The master controller 120 uses these function codes to confirm the control commands and status feedback between itself and the slave controller 130. In this embodiment, predefined control function codes, including but not limited to calibration start-up, parameter distribution, and data sampling trigger control functions, can transform abstract operations into unambiguous binary instructions, avoiding erroneous execution caused by natural language or floating fields. Status feedback function codes, including but not limited to acquisition ready status, verification passed status, and abnormal alarm status, can force the slave controller 130 to actively report at critical nodes, enabling the master controller 120 to monitor the distributed execution progress and health status of multiple IMUs in real time. The master controller 120 can also send a control function code and wait for the corresponding status feedback function code to return. If no response is received within a timeout period, the code is resent. If the master controller 120 receives an unexpected status code, it immediately triggers fault location. This function code significantly improves operational stability and diagnosability.
[0039] The checksum is the result obtained by calculating the measurement data according to the checksum algorithm. The main controller 120 uses the checksum to detect whether there are errors during data frame transmission. For example, in one embodiment, the checksum can be a CRC (Cyclic Redundancy Check) algorithm calculated in real time and embedded at the end of each frame protocol by the slave controller 130. The main controller 120 recalculates the complete frame using the CRC algorithm. If the result is not equal to the CRC checksum at the end, it is determined that the frame has suffered electromagnetic interference or signal distortion during long-distance transmission, and it is immediately discarded and a retransmission mechanism is triggered. This checksum ensures that the data transmission cannot be tampered with, thus guaranteeing the reliability of data transmission.
[0040] In another embodiment, the preset data frame further includes a dynamic payload length indicator, a frame sequence number, and a system timestamp. Exemplarily, the dynamic payload length indicator is used to indicate the number of bytes of measurement data in the current data frame. In this embodiment, the dynamic payload length indicator is used to embed a 1-byte length field in the frame header, explicitly informing the receiving end of the effective payload bytes of this frame, thereby avoiding the resource waste and functional rigidity caused by fixed frame lengths.
[0041] The frame sequence number is a unique sequence number that identifies a data frame. The main controller 120 uses the frame sequence number to detect whether a data frame is missing. In this embodiment, a unique, incrementing sequence number is assigned to each frame. The main controller 120 verifies whether the current frame number is equal to the previous frame number plus one to avoid misjudgments due to sequence number overflow caused by long-term operation. The system timestamp is used to record the generation time of the data frame. Exemplarily, the generation time of each data frame is recorded to provide a high-precision, low-jitter global time coordinate for the entire system.
[0042] In this embodiment, an efficient serial communication protocol is provided to meet the synchronization calibration requirements of large-scale IMU arrays. This protocol uses a two-byte synchronization header to ensure frame synchronization reliability and includes a function code, dynamic load length indicator, check code, system timestamp, and frame sequence number to ensure data integrity and timing consistency. At the same time, it effectively detects packet loss in each slave controller 130, and realizes accurate synchronous acquisition and transmission of multi-channel IMU measurement data.
[0043] In one embodiment, each slave controller 130 includes multiple second communication links, each second communication link being used to connect to a two-stage multiplexer architecture 150. Each slave controller 130 is configured with a second buffer for each second communication link, the second buffer being used to cache measurement data received by the slave controller 130 from the inertial measurement unit 140; each slave controller 130 is also configured to store the measurement data transmitted by each second communication link to the second buffer via a second direct memory access controller (DMA2).
[0044] In this embodiment, the second communication link is a Serial Peripheral Interface (SPI), and the second buffer is a hardware FIFO (First In First Out). The slave controller 130 includes an independent SPI bus, a DMA controller, and a hardware FIFO. The SPI bus actively generates the core timing signals for SPI communication, which govern the start / stop, rate, and data transmission / reception rhythm of the communication. The IMU only responds passively. The IMU's measurement data is first converted into parallel data and stored in the hardware FIFO by the DMA controller. When the amount of data in the FIFO reaches the DMA trigger threshold (e.g., when it is full), the DMA automatically transmits the measurement data to the slave controller 130. The entire process is hardware-level response with extremely low latency.
[0045] The hardware FIFO is a buffer implemented by hardware circuitry, requiring no intervention from the controller 130. It offers high speed and low latency, and is used to temporarily store IMU measurement data, resolving the issues of rate mismatch and data transmission / reception asynchrony between SPI and DMA. For example, during high-speed SPI transmission, DMA may not be able to retrieve data in time, and the FIFO can temporarily store the data to prevent packet loss.
[0046] For example, in one implementation, each slave controller is connected via four independent SPI buses (e.g., Figure 2 The SPI1, SPI2, SPI3, and SPI4 shown connect to a two-stage multiplexer architecture 150. Each two-stage multiplexer architecture can connect 20 inertial measurement units 140, and this architecture can connect a total of 480 inertial measurement units 140 (e.g., ...). Figure 2 (IMU1~IMU480 shown).
[0047] In one embodiment, the data bit width of the second communication link, the transmission bit width of the second direct memory access controller, and the bit width of the second buffer are the same; the depth of the second buffer is four levels, and the data bit width of the second communication link, the transmission bit width of the second direct memory access controller, and the bit width of the second buffer are all thirty-two bits.
[0048] In this embodiment, both the SPI data width and the DMA transfer width are set to 32 bits, and a 4×32-bit hardware FIFO depth is configured, achieving optimal data transmission efficiency. Considering the characteristic of IMU transmitting 15 bytes (1 byte address + 14 bytes measurement data) per transmission, four 32-bit DMA transfers are used to complete the transfer of one IMU data packet, significantly improving data transmission efficiency compared to the traditional 8-bit transmission mode.
[0049] In another embodiment, each second communication link is further configured to set the level state of the strobe pin to a first level state to select the inertial measurement unit 140 when the measurement data transmission is initiated, and to set the level state of the strobe pin to a second level state after the measurement data transmission is completed; each second communication link is further configured to generate a trigger signal through a timer to initiate the measurement data transmission each time a trigger signal is generated.
[0050] In this embodiment, after the SPI master bus completes initialization and receives a trigger signal (such as a timer trigger signal), the hardware automatically pulls the IMU strobe pin (CS, Chip Select) low to start SPI communication. When SPI completes a preset amount of data transmission and reception, DMA transfer is completed, or a communication error occurs, the hardware automatically pulls the strobe pin high to disable IMU strobe, without requiring any commands from the controller 130. The precise timing signal generated by the hardware TIM timer of the controller 130 is used as the trigger signal for SPI master bus communication, replacing the traditional software-triggered SPI, thus achieving precise start and stop of SPI communication at specified time points and time intervals.
[0051] As an example, the communication architecture of the SPI bus and DMA controller, which can be used with hardware trigger signal automatic management and timer precise triggering, can keep the occupancy rate of the controller 130 below 50% while ensuring 1kHz sampling accuracy, completely eliminating the risk of packet loss caused by bus congestion.
[0052] In one embodiment, such as Figure 3 As shown, the two-stage multiplexer architecture 150 includes multiple primary multiplexers 151 and multiple secondary multiplexers 152. Exemplarily, each second communication link connects to the input of multiple primary multiplexers 151, and the outputs of the primary multiplexers 151 are connected to multiple secondary multiplexers 152 and multiple inertial measurement units 140, respectively. The output of each secondary multiplexer 152 is connected to multiple inertial measurement units 140.
[0053] In this embodiment, in an application scenario where a single slave controller 130 connects to multiple IMUs, the SPI bus, due to its shared chip select line (CS), clock line (SCK), master output slave input line (MOSI), and master input slave output line (MISO), can cause serious signal integrity problems such as reflection and crosstalk when there are many connected devices, leading to signal branching. This greatly threatens the stability and accuracy of data transmission. To resolve this problem, this application uses a two-stage multiplexer architecture 150 for management, dividing the SPI bus's chip select line, clock line, master output slave input line, and master input slave output line into four groups. The input terminal of the first-stage multiplexer 151 (e.g., Figure 3IN1 (as shown) is connected to the chip select line, clock line, master output / slave input line, and master input / slave output line of the SPI bus, respectively. The output of the first-level multiplexer 151 is connected to the second-level multiplexer 152 and multiple IMUs. The first-level multiplexer 151 also includes an enable signal line (such as...). Figure 3 EN0 (as shown) and strobe signal lines (such as...) Figure 3 As shown in A0, A1, A2), the corresponding input terminals of the secondary multiplexer 152 are selected by the enable signal and the select signal (e.g., ...). Figure 3 IN2 (as shown) and multiple IMUs (such as Figure 3 (IMU16~IMU19 shown). Each secondary multiplexer 152, based on the former, further connects multiple IMUs to its output (e.g., ...). Figure 3 As shown in IMU0~IMU15), it is also enabled by an enable signal (such as...). Figure 3 (EN01 and EN02 shown) and selection signals (such as...) Figure 3 The B0, B1, and B2 shown can be used to select a specific IMU to achieve time-division communication, avoid bus resource contention between devices, and effectively reduce signal interference.
[0054] In one embodiment, each slave controller 130 is also used to connect the address selection pin and the enable pin of the primary multiplexer 151 and the secondary multiplexer 152 respectively, so as to selectively acquire measurement data from multiple inertial measurement units 140.
[0055] In this embodiment, the controller 130 is connected to the address selection pin and enable pin of both the primary multiplexer 151 and the secondary multiplexer 152, so that the corresponding enable signal and selection signal are output to select the corresponding secondary multiplexer 152 and IMU, selectively acquiring measurement data from multiple inertial measurement units 140. For example... Figure 4 As shown, a two-level multiplexer architecture 150 is adopted, with each slave controller 130 independently controlling 80 IMUs to acquire measurement data from the 80 IMUs. This enables the main controller 120 to acquire measurement data from 480 IMUs and calibrate multiple IMUs in parallel.
[0056] Figure 4 A schematic diagram of a slave controller 130 according to an embodiment of this application is shown. Exemplarily, a master controller 120 is configured to connect to each slave controller 130 to acquire measurement data from all inertial measurement units 140 collected by each slave controller 130; the master controller 120 is also configured to connect to a host computer 110 to integrate the measurement data and upload it to the host computer 110, so that the host computer 110 can calibrate all inertial measurement units 140.
[0057] In one embodiment, the main controller 120 includes multiple first communication links, each first communication link being used to establish a communication connection with a corresponding slave controller 130; the main controller 120 is used to configure a first buffer for each first communication link, the first buffer being used to buffer measurement data sent by the slave controller 130.
[0058] It is understood that the main controller 120 in this embodiment corresponds to the above embodiment, and the options in the above embodiment are also applicable to this embodiment, so they will not be described again here.
[0059] Figure 5 A schematic diagram of a slave controller 130 according to an embodiment of this application is shown. Exemplarily, the slave controller 130 is used to connect to multiple inertial measurement units 140 via a two-stage multiplexer architecture 150 to acquire measurement data from each connected inertial measurement unit 140 and upload the measurement data to the master controller 120.
[0060] In one embodiment, each slave controller 130 includes multiple second communication links, each second communication link being used to connect to a two-level multiplexer architecture 150; each slave controller 130 is configured with a second buffer for each second communication link, the second buffer being used to cache measurement data received by the slave controller 130 from the inertial measurement unit 140; each slave controller 130 is also configured to store the measurement data transmitted by each second communication link to the second buffer via a second direct memory access controller.
[0061] It is understood that the slave controller 130 in this embodiment corresponds to the above embodiment, and the options in the above embodiment are also applicable to this embodiment, so they will not be described again here.
[0062] In the several embodiments provided in this application, it should be understood that the disclosed apparatus and methods can also be implemented in other ways. The apparatus embodiments described above are merely illustrative. For example, the flowcharts and block diagrams in the accompanying drawings show the architecture, functionality, and operation of possible implementations of apparatus, methods, and computer program products according to various embodiments of this application. In this regard, each block in a flowchart or block diagram may represent a module, segment, or portion of code, which contains one or more executable instructions for implementing a specified logical function. It should also be noted that, as an alternative implementation, the functions marked in the blocks may occur in a different order than those marked in the drawings. For example, two consecutive blocks may actually be executed substantially in parallel, and they may sometimes be executed in reverse order, depending on the functions involved. It should also be noted that each block in the block diagram and / or flowchart, and combinations of blocks in the block diagram and / or flowchart, can be implemented using a dedicated hardware-based system that performs the specified function or action, or using a combination of dedicated hardware and computer instructions.
[0063] In addition, the functional modules or units in the various embodiments of this application can be integrated together to form an independent part, or each module can exist independently, or two or more modules can be integrated to form an independent part.
[0064] If the aforementioned functions are implemented as software functional modules and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, or a part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a smartphone, personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of this application.
[0065] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any changes or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application.
Claims
1. A synchronous calibration system, characterized in that, include: The architecture consists of a host computer, a main controller, multiple slave controllers, multiple inertial measurement units, and multiple two-level multiplexers. Each of the slave controllers is used to connect to multiple of the two-level multiplexer architectures, and each of the two-level multiplexer architectures is used to connect to multiple of the inertial measurement units; The slave controller is used to acquire measurement data from each of the corresponding connected inertial measurement units and upload the measurement data to the main controller; The main controller is used to connect to each of the slave controllers respectively to obtain measurement data from all the inertial measurement units; The main controller is also used to connect to the host computer to integrate the measurement data and upload it to the host computer so that the host computer can calibrate all the inertial measurement units.
2. The synchronous calibration system according to claim 1, characterized in that, The main controller includes multiple first communication links, each of which is used to establish a communication connection with the corresponding slave controller. The main controller is configured to configure a first buffer for each of the first communication links, and the first buffer is used to cache the measurement data sent by the slave controller.
3. The synchronous calibration system according to claim 2, characterized in that, Each of the slave controllers is further configured to send the measurement data to the first communication link via a first direct memory access controller; The main controller is further configured to store the measurement data of each of the first communication links into the first buffer area via the first direct memory access controller; The main controller is also used to determine, through an idle interrupt mechanism, whether each of the first communication links has fully received the measurement data.
4. The synchronous calibration system according to claim 2, characterized in that, Each of the first communication links is used to transmit the measurement data via a serial communication protocol; The serial communication protocol is used to encapsulate the measurement data into a preset data frame for transmission.
5. The synchronous calibration system according to claim 4, characterized in that, The preset data frame includes a synchronization header, a function code, and a checksum. The synchronization header is used to identify the start position of the data frame, and the main controller is used to confirm the start position of the data frame based on the synchronization header; The function code is used to identify the control commands and status feedback commands between the master controller and the slave controller, and the master controller is used to confirm the control commands and status feedback between the master controller and the slave controller based on the function code; The check code is the result obtained by calculating the measurement data according to the check algorithm, and the main controller is used to detect whether there are errors during the transmission of the data frame based on the check code.
6. The synchronous calibration system according to claim 5, characterized in that, The preset data frame also includes a dynamic load length indicator, a frame sequence number, and a system timestamp; The dynamic load length indicator is used to indicate the number of bytes of the measurement data in the current data frame; The frame sequence number is a unique sequence number that identifies the data frame, and the main controller is used to detect whether the data frame is missing based on the frame sequence number; The system timestamp is used to record the time when the data frame was generated.
7. The synchronous calibration system according to claim 2, characterized in that, Each of the slave controllers includes multiple second communication links, each second communication link being used to connect the two-level multiplexer architecture; Each of the slave controllers is configured with a second buffer for each of the second communication links, the second buffer being used to cache the measurement data received by the slave controller from the inertial measurement unit; Each of the slave controllers is further configured to store the measurement data transmitted via each of the second communication links into the second buffer via a second direct memory access controller.
8. The synchronous calibration system according to claim 7, characterized in that, The data bit width of the second communication link, the transmission bit width of the second direct memory access controller, and the bit width of the second buffer are the same; The second buffer has a depth of four levels, and the data bit width of the second communication link, the transmission bit width of the second direct memory access controller, and the bit width of the second buffer are all 32 bits.
9. The synchronous calibration system according to claim 7, characterized in that, Each of the second communication links is also used to set the level state of the strobe pin to a first level state to select the inertial measurement unit when the measurement data transmission is initiated, and to set the level state of the strobe pin to a second level state after the measurement data transmission is completed; Each of the second communication links is also used to generate a trigger signal via a timer to initiate the measurement data transmission each time the trigger signal is generated.
10. The synchronous calibration system according to claim 7, characterized in that, The two-level multiplexer architecture includes multiple first-level multiplexers and multiple second-level multiplexers; Each of the second communication links is connected to the input terminals of multiple first-level multiplexers, and the output terminals of the first-level multiplexers are respectively connected to multiple second-level multiplexers and multiple inertial measurement units. The output terminal of each second-level multiplexer is connected to multiple inertial measurement units.
11. The synchronous calibration system according to claim 10, characterized in that, Each of the slave controllers is also configured to connect the address selection pin and the enable pin of the primary multiplexer and the secondary multiplexer respectively, in order to selectively acquire measurement data from multiple inertial measurement units.
12. The synchronous calibration system according to claim 7, characterized in that, The first communication link is a universal asynchronous transceiver, and the second communication link is a serial peripheral interface.
13. A main controller, characterized in that, The main controller is used to connect to each slave controller to obtain measurement data from all inertial measurement units collected by each slave controller; The main controller is also used to connect to a host computer to integrate the measurement data and upload it to the host computer so that the host computer can calibrate all the inertial measurement units.
14. The main controller according to claim 13, characterized in that, The main controller includes multiple first communication links, each of which is used to establish a communication connection with the corresponding slave controller. The main controller is configured to configure a first buffer for each of the first communication links, and the first buffer is used to cache the measurement data sent by the slave controller.
15. A controller, characterized in that, The slave controller is used to connect to multiple inertial measurement units through a two-level multiplexer architecture to obtain measurement data from each of the connected inertial measurement units and upload the measurement data to the master controller.
16. The slave controller according to claim 15, characterized in that, Each of the slave controllers includes multiple second communication links, each second communication link being used to connect the two-level multiplexer architecture; Each of the slave controllers is configured with a second buffer for each of the second communication links, the second buffer being used to cache the measurement data received by the slave controller from the inertial measurement unit; Each of the slave controllers is further configured to store the measurement data transmitted via each of the second communication links into the second buffer via a second direct memory access controller.