A thyristor resistance-capacitance absorption method and circuit based on simulation optimization

Abstract

This invention relates to the field of power electronics technology and discloses a simulation-optimized thyristor RC snubber method and circuit. The method includes: building a precise physical model containing stray parameters in a simulation environment; first, simulating and obtaining turn-off voltage spikes and dv / dt data without the snubber circuit connected; then, connecting an RC network and performing simulation comparisons with multiple sets of parameters for the resistor and capacitor; selecting the optimal RC parameters based on voltage suppression effect, dv / dt limitation, and resistor power consumption, and finally determining the device model. This invention overcomes the coarseness of traditional empirical formulas and the inefficiency of trial and error methods, offering advantages such as high design accuracy, intuitive process, and outstanding efficiency. It effectively avoids problems of conservative parameters or insufficient protection, achieving the best balance between cost, size, and performance while ensuring the safe operation of the thyristor. It is applicable to thyristor protection design in various power electronic systems; it quickly selects the optimal parameter combination that meets the requirements of voltage suppression and dv / dt limitation, shortening the product development cycle.

Description

Technical Field

[0001] This invention relates to the field of power electronics technology, and in particular to a thyristor RC absorption method and circuit based on simulation optimization. Background Technology

[0002] Thyristors, as high-power semiconductor switching devices, are widely used in power electronic equipment such as AC voltage regulators, frequency converters, and soft starters. During the thyristor turn-off process, due to stray inductance in the circuit, sudden current changes can induce high voltage spikes. These spikes, when superimposed on the power supply voltage, form turn-off overvoltages, severely affecting the safe operation of the device. Simultaneously, excessively high voltage change rate (dv / dt) may cause the thyristor to falsely turn on. To address these issues, RC snubber circuits are commonly used in engineering to suppress turn-off voltage spikes and limit dv / dt.

[0003] Currently, the parameter design of RC snubber circuits largely relies on empirical formulas or trial-and-error methods. For example, capacitor values ​​are often determined using empirical formulas. (Unit: μF, where) The resistance value is typically selected based on the average thyristor current, and is usually taken as a few ohms to tens of ohms, then adjusted through actual experiments. This method has the following significant drawbacks: 1. Low design precision: Empirical formulas do not fully consider practical factors such as circuit topology, wiring inductance, and load characteristics, which can easily lead to overly conservative parameter selection (large size, high cost, high power consumption) or insufficient protection (poor voltage suppression effect). 2. Low debugging efficiency: Relying on repeated adjustments through physical testing is a tedious, time-consuming, and labor-intensive process that may damage expensive power devices. 3. Lack of intuitive analysis: It is impossible to visually observe the reverse recovery current during parameter adjustment. With reverse recovery time The changing trend makes it difficult to achieve a comprehensive optimization of protection effectiveness and system performance. Summary of the Invention

[0004] The purpose of this invention is to provide a thyristor RC snubber method and circuit based on simulation optimization. To address the issues of low accuracy, low efficiency, and unreliable protection caused by traditional design methods relying on empirical formulas and trial-and-error, this method utilizes the HyperSpice simulation engine integrated in PSIM software to establish an accurate circuit model that includes stray parameters and device characteristics. This allows for parametric simulation and optimization of the RC snubber network, quickly determining the optimal RC parameters that effectively suppress voltage spikes and dv / dt while balancing power consumption and size. This approach offers advantages such as scientific design, intuitive efficiency, and reliable protection, significantly improving the accuracy and engineering practicality of thyristor RC snubber circuit design.

[0005] To achieve the above objectives, the present invention provides the following technical solution: A simulation-optimized thyristor RC absorption method includes: S1. Establish a simulation model: A circuit model was built in the HyperSpice simulation environment of PSIM software. The circuit model includes a RC snubber network, which is connected in parallel with the thyristor. The stray inductance Ls is connected in series in the RC snubber network. S2. Perform preliminary simulation: Run HyperSpice simulation without adding a RC snubber network to the circuit model to obtain the voltage spike and dv / dt data when the thyristor is turned off. S3. Perform parametric simulation: A resistor-capacitor (RC) snubber network is added to the circuit model. Multiple sets of values ​​are set for the resistor Rs and the snubber capacitor Cs in the RC snubber network, and simulations are performed for multiple sets of different RC parameter combinations. S4. Analyze the simulation results: By comparing the voltage spike, dv / dt data and resistor power consumption when the thyristor is turned off under different combinations of RC parameters, the RC parameters that meet the safety margin and balance power consumption and volume are selected. S5. Verify and determine parameters: The reverse recovery characteristics and softness coefficient of the thyristor are verified by simulation waveform. Combined with the peak current, root mean square current and loss calculation of the absorption capacitor Cs, the model and parameters of resistor Rs and absorption capacitor Cs in the RC snubber network are determined.

[0006] In S3, the values ​​of resistor Rs include 10Ω, 20Ω, 30Ω, and 60Ω, and the values ​​of absorption capacitor Cs include 1μF, 1.5μF, 2.4μF, and 3.5μF. A total of 16 simulations were performed.

[0007] In S4, the formula for calculating the power consumption of the resistor is: ①; in: This represents the value of the absorption capacitance Cs, in μF. This represents the voltage across the absorption capacitor Cs, in volts (V). This indicates the operating frequency of the RC snubber network, in Hz. This indicates the power dissipation of the resistor, measured in watts (W).

[0008] In S5, the selection of the absorption capacitor Cs is based on the peak current. Root mean square current Dielectric loss Internal resistance loss ; The formula for calculating dielectric loss is: ②; The formula for calculating internal resistance loss is: ③; in: This represents the repetitive peak voltage of the absorption capacitor Cs, in volts (V). This represents the dielectric loss factor of the absorption capacitor Cs; This represents the root mean square current of the absorption capacitor Cs, in amperes (A). This represents the internal resistance of the absorption capacitor Cs, in Ω.

[0009] In S5, the formula for calculating the softness coefficient is: ④; in: This indicates the flexibility coefficient of the thyristor; This indicates the reverse recovery time of the thyristor, in μs. This indicates the time it takes for the reverse recovery current of the thyristor to rise from 0 to its peak value, expressed in μs.

[0010] A simulation-optimized thyristor RC snubber circuit includes a circuit model, which consists of a DC power supply, a thyristor, a gate drive circuit, a load, and an RC snubber network. A DC power supply is used to provide operating voltage for the circuit model. The positive terminal of the DC power supply is connected to the anode of the thyristor, and the negative terminal of the DC power supply is connected to the cathode of the thyristor. The load is connected in series between the positive terminal of the DC power supply and the anode of the thyristor. The gate drive circuit is used to control the turn-on and turn-off of the thyristor. The gate drive circuit is connected between the gate and the cathode of the thyristor. The load is used to simulate electrical loads under actual working conditions. The load includes an RL load consisting of a resistor and an inductor connected in series. A resistor-capacitor (RC) snubber network is connected in parallel between the anode and cathode of the thyristor. The RC snubber network includes a resistor Rs and a snubber capacitor Cs connected in series. The stray inductance Ls is used to simulate the parasitic inductance in a circuit and is connected in series in a resistor-capacitor snubber network.

[0011] The value of stray inductance Ls ranges from 10nH to 100nH.

[0012] Compared with the prior art, the beneficial effects of the present invention are: 1. By using the HyperSpice simulation software in PSIM2024 to establish an accurate circuit model that includes stray parameters and device characteristics, it is possible to realistically simulate voltage spikes and dv / dt changes during the thyristor turn-off process. Compared with traditional empirical formulas, this invention fully considers practical factors such as circuit topology, wiring inductance, and load characteristics, making the RC parameter design more accurate and avoiding increased size and cost due to conservative parameters or device damage due to insufficient protection. 2. It can complete the simulation analysis of multiple RC parameter combinations in a short time. Through the parameter scanning function, it can quickly screen out the optimal parameter combination that meets the requirements of voltage suppression and dv / dt limitation, shortening the traditional trial and error process that takes weeks or even months to hours, and significantly shortening the product development cycle. 3. Provides intuitive waveform output, allowing designers to directly observe key waveforms such as thyristor turn-off voltage, RC branch current, and reverse recovery characteristics under different RC parameters, and to evaluate the impact of parameter changes on system performance in real time. This visual design approach makes the debugging process more transparent and easier for engineers to understand and optimize. 4. The RC parameters determined through precise simulation can effectively suppress turn-off voltage spikes and limit dv / dt, ensuring that the thyristor operates within a safe voltage range, reducing the risk of false turn-on and voltage breakdown. At the same time, through simulation verification of the peak current, root mean square current and losses of the absorption capacitor Cs, components with sufficient margin can be selected to improve the long-term reliability of the system. 5. Simulation optimization methods can achieve the best balance between protection effect and economy by comprehensively considering factors such as resistor power consumption, capacitor volume, and system cost while meeting protection requirements. For example, the minimum effective capacitance value determined by simulation can avoid cost increases caused by over-design. 6. Applicable to different types of thyristors, different circuit topologies and operating conditions. Only the device parameters and circuit structure in the simulation model need to be adjusted to quickly adapt to new application scenarios, which has strong versatility and scalability. 7. Completing parameter optimization in a virtual simulation environment can avoid damage to power devices caused by repeated physical tests, and reduce safety risks and economic losses during the debugging process. Attached Figure Description

[0013] Figure 1 This is a schematic diagram of a thyristor RC snubber circuit based on simulation optimization.

[0014] Figure 2 The thyristor model is called in the sub-circuit wiring table module of SPICE.

[0015] Figure 3 This refers to the HyperSpice simulation step size setting in PSIM2024.

[0016] Figure 4 The turn-off voltage spike without the absorption circuit Figure 1 .

[0017] Figure 5 The turn-off voltage spike without the absorption circuit Figure 2 .

[0018] Figure 6 This is the turn-off voltage waveform after adding the optimized snubber circuit. Figure 1 .

[0019] Figure 7 This is the turn-off voltage waveform after adding the optimized snubber circuit. Figure 2 .

[0020] Figure 8 This is the waveform of the turn-off voltage when R=10Ω and C=1μ.

[0021] Figure 9 This is the waveform of the turn-off voltage when R=10Ω and C=1.5μ.

[0022] Figure 10 This is the waveform of the turn-off voltage when R=10Ω and C=2.4μ.

[0023] Figure 11 This is the waveform of the turn-off voltage when R=10Ω and C=3.5μ.

[0024] Figure 12 This is the waveform of the turn-off voltage when R=20Ω and C=1μ.

[0025] Figure 13 This is the waveform of the turn-off voltage when R=20Ω and C=1.5μ.

[0026] Figure 14 This is the waveform of the turn-off voltage when R=20Ω and C=2.4μ.

[0027] Figure 15 This is the waveform of the turn-off voltage when R=20Ω and C=3.5μ.

[0028] Figure 16 This is the waveform of the turn-off voltage when R=30Ω and C=1μ.

[0029] Figure 17 This is the waveform of the turn-off voltage when R=30Ω and C=1.5μ.

[0030] Figure 18 This is the waveform of the turn-off voltage when R=30Ω and C=2.4μ.

[0031] Figure 19 This is the waveform of the turn-off voltage when R=30Ω and C=3.5μ.

[0032] Figure 20 This is the waveform of the turn-off voltage when R=60Ω and C=1μ.

[0033] Figure 21 This is the waveform of the turn-off voltage when R=60Ω and C=1.5μ.

[0034] Figure 22 This is the waveform of the turn-off voltage when R=60Ω and C=2.4μ.

[0035] Figure 23 This is the waveform of the turn-off voltage when R=60Ω and C=3.5μ.

[0036] Figure 24 This is a waveform diagram of the current in an RC snubber network.

[0037] Figure 25 There are 16 types of resistor-capacitor matching diagrams. Detailed Implementation

[0038] The present invention will now be described in detail with reference to the accompanying drawings, but it should be noted that the implementation of the present invention is not limited to the following embodiments.

[0039] The following embodiments are implemented based on the technical solution of the present invention, providing detailed implementation methods and specific operation processes. However, the scope of protection of the present invention is not limited to the following embodiments. Unless otherwise specified, the methods used in the following embodiments are conventional methods. Example 1

[0040] To address the problems of existing RC snubber circuit parameter design relying on experience, poor accuracy, and low efficiency, this invention provides a thyristor RC snubber method and circuit based on simulation optimization. By using more accurate simulation to determine RC parameters, the optimal balance between protection effect and cost / power consumption can be achieved.

[0041] The HyperSpice feature embedded in PSIM2024 is a highly specialized and high-performance circuit simulator developed by Siemens EDA (formerly Mentor Graphics). Part of Siemens' AnalogFastSPICE platform, it aims to solve complex and advanced integrated circuit design challenges. HyperSpice provides one of the industry's most accurate SPICE simulation results, primarily for the accurate simulation and verification of critical analog modules (such as operational amplifiers, PLLs, DACs / ADCs), RF circuits (such as LNAs and VCOs), and entire mixed-signal chips. Its core advantage lies in its simulation speed, which far surpasses traditional SPICE simulators while maintaining high accuracy. It employs advanced algorithms and multi-threaded / parallel processing techniques, significantly shortening the design verification cycle. A comparison of HyperSpice and traditional SPICE simulators is shown in the table below.

[0042] A simulation-optimized thyristor RC absorption method includes: S1. Establish a simulation model: A circuit model was built in the HyperSpice simulation environment of PSIM2024 software. The circuit model includes an RC snubber network, which is connected in parallel with the thyristor. The stray inductor Ls is connected in series in the RC snubber network and is a 100nH cable.

[0043] S2. Perform preliminary simulation: Running HyperSpice simulation without connecting the RC snubber network in the circuit model to obtain the voltage spike and dv / dt data when the thyristor is turned off, it was observed that the turn-off voltage spike is as high as 6500V or more, and the thyristor breaks down at 5600V, which is very dangerous. S3. Perform parametric simulation: A resistor-capacitor (RC) snubber network is added to the circuit model. Multiple sets of values ​​are set for the resistor Rs and the snubber capacitor Cs in the RC snubber network, and simulations are performed for multiple sets of different RC parameter combinations. Comparison with different RC parameters: The resistor Rs is set to 10Ω, 20Ω, 30Ω, and 60Ω respectively, taking 4 values; The absorption capacitor Cs was set to 1μF, 1.5μF, 2.4μF, and 3.5μF, respectively, taking four values; A total of 16 simulations were conducted.

[0044] S4. Analyze the simulation results: PSIM generates a table or curve showing that when C=2.4μF and R=60Ω, the turn-off voltage spike is suppressed to 231V (see...). Figure 6 , Figure 7 ), The value is 50V / μs, with sufficient margin. At this time, the resistance value is taken as the simulation setting value of 60Ω.

[0045] The power of the resistor is calculated using the following formula: ①; in: This represents the value of the absorption capacitance Cs, in μF. This represents the voltage across the absorption capacitor Cs, in volts (V). This indicates the operating frequency of the RC snubber network, in Hz. This indicates the power dissipation of the resistor, measured in watts (W). capacitor μF, V, Substituting HZ into formula ①, we get: W; Considering the potential voltage fluctuations (±10%), frequency changes (±20%), and environmental temperature effects (derating factor 0.6~0.7) that may occur in actual operation, as well as the long-term operating safety margin (taking 3 times the design margin), a water-cooled resistor with a rated power of 3kW was finally selected to ensure that the system can operate reliably under various operating conditions. The reasons for choosing a 3kW water-cooled resistor are as follows: The derivation process is as follows: 1) Basic power consumption calculation: W; 2) Consider voltage fluctuations of ±10%: V; W; 3) Consider frequency fluctuations of ±20%: Hz; W; 4) Consider temperature derating (assuming a derating factor of 0.6); W; 5) Apply a safety factor (2.5 to 3 times); W or W; However, considering actual market specifications and costs, choosing 3kW (3000W), although slightly lower than the strictly calculated value, is still sufficient: It meets the operating conditions of voltage fluctuation +10% and frequency +20%; There is still some margin after the temperature drops; It meets the common safety factor in engineering (approximately 3 times).

[0046] The key parameters for selecting the absorption capacitor Cs are the peak current rating and the root mean square current rating. Root mean square current These two values ​​can be obtained from the simulation waveform. Figure 24 Read from the simulation results Approximately 850A, Approximately 12A, details are as follows: 1) Peak current rating The maximum dv / dt that can be repeatedly applied to the absorption capacitor Cs is defined by the following formula: ; 2) Root mean square current The main causes of heat generation are the power loss of Pd due to its dielectric properties and the internal resistance loss of Pc, as shown in the following formula: ; in: The repetitive peak voltage of the absorption capacitor Cs is expressed in volts (V), and is taken as 800V in this invention. This represents the dielectric loss factor of the absorption capacitor Cs, with a typical value of 0.001. The known parameters are shown in the table below: Substitute into the calculation: ; a. Calculation ; ; b. Calculation ; c. Multiplied by , ; W.

[0047] 3) The formula for calculating internal resistance loss is: ③; in: This represents the root mean square current of the absorption capacitor Cs, in amperes (A). This represents the internal resistance of the absorption capacitor Cs, in Ω, with a typical value of 5mΩ. a. The known parameters are shown in the table below: b. Substitute the values ​​into the calculation: W; Based on the simulation parameters, the German company ELECTRONIC was selected. 5000V 4000V , , 2.4uF capacitor, order code: E62.Q12-242C20. All parameters of this capacitor meet the simulation requirements and have sufficient margin. in: Indicates the rated DC voltage; Indicates the rated AC voltage; Indicates the maximum permissible root-mean-square current; Indicates the maximum permissible peak current; Indicates the nominal capacitance value; S5. Verification: 1) According to Figure 6 Softness coefficient s 1. The calculation formula is: ; in: This indicates the flexibility coefficient of the thyristor; It is the reverse recovery time of the thyristor, and the curve is in Figure 24 The reverse recovery triangle can be read, indicating the reverse recovery current from the peak value. The time required for it to decay to 25% of its value; It is the reverse recovery current of the thyristor from 0 to peak value. Time required; For example: μs (read from the reverse recovery current waveform, i.e., the current from the peak value) Decay to 0.25 (time) μs (read from the reverse recovery current waveform, i.e., the current rises from 0 to its peak value) (Time).

[0048] Substitute into the calculation: ; express Much larger (generally ).

[0049] This indicates that the reverse recovery current of the thyristor changes relatively smoothly during the turn-off process, making it a typical soft recovery device. This is beneficial for reducing turn-off losses and voltage spikes, and is more user-friendly for the design of absorption circuits.

[0050] 2) Restore charge, the calculation formula is: ; in: Represents the reverse recovery charge, measured in μC. It reflects the amount of stored charge that needs to be removed from the thyristor during turn-off and is an important parameter for evaluating turn-off losses and designing absorption circuits. This represents the peak value of the reverse recovery current, in amperes (A). (Read the peak value from the reverse recovery current waveform); s; C=240μC indicates that the thyristor has a moderate reverse recovery charge, which is typical for medium-power devices.

[0051] S6. Determine the parameters: Through the above simulation analysis and calculation verification, a thin-film capacitor with R=60Ω / 3kW water-cooled resistor and C=2.4μF / 4000V was finally selected as the RC snubber circuit element of this invention. This parameter combination achieves the best balance between power consumption and size while satisfying voltage suppression and dv / dt limitations.

[0052] This invention scientifically and efficiently completed the parameter design of the thyristor RC snubber circuit using the HyperSpice simulation software in PSIM2024, and has significant practical value.

[0053] A simulation-optimized thyristor RC snubber circuit is described in [reference needed]. Figure 1 It includes a circuit model, which consists of a DC power supply, thyristors, gate drive circuit, load, and RC snubber network. The DC power supply is used to provide the operating voltage for the circuit model. The positive terminal of the DC power supply is connected to the anode of the thyristor, and the negative terminal of the DC power supply is connected to the cathode of the thyristor. The load is connected in series between the positive terminal of the DC power supply and the anode of the thyristor.

[0054] The gate drive circuit is used to control the turn-on and turn-off of the thyristor. The gate drive circuit is connected between the gate and the cathode of the thyristor. The load is used to simulate electrical loads under actual working conditions. The load includes an RL load consisting of a resistor and an inductor connected in series. A resistor-capacitor (RC) snubber network is connected in parallel between the anode and cathode of the thyristor. The RC snubber network includes a resistor Rs and a snubber capacitor Cs connected in series. The stray inductance Ls is used to simulate the parasitic inductance in a circuit and is connected in series in a resistor-capacitor snubber network.

[0055] The value of stray inductance Ls ranges from 10nH to 100nH.

[0056] Working principle: Initial state: Switch Q1 is open, switch Q2 is closed, switch Q3 is open; Test State 1: The entire circuit controls the switch Q1 to close via the control signal switch1 in 0.01s, triggering the gate T1 to send a trigger signal to the thyristor VT under test, and the thyristor VT turns on. At this time, the load in the circuit is a resistive load R and an inductive load L. According to the actual operating conditions of the thyristor VT under test, the inductive load L and the resistive load R are adjusted to simulate the actual operating current of the thyristor VT. Test State 2: At 0.06 seconds, the control signal switch2 controls switch Q2 to open and the control signal switch3 controls switch Q3 to close. The thyristor VT is subjected to reverse voltage and turns off by itself. The charge stored inside the thyristor VT needs to be swept out, and the anode current will drop rapidly (di / dt). When the current drops to zero and recovers in the reverse direction, due to the presence of inductive load L and stray inductance Ls in the circuit, the inductor current cannot change abruptly, and a reverse induced electromotive force will be generated. This reverse electromotive force can easily cause the thyristor VT to break down. Due to the presence of absorption capacitor Cs in the RC snubber network: (1) At the moment of turn-off, the absorption capacitor Cs provides a low-impedance freewheeling path for the stray inductance Ls in the circuit, absorbing the energy stored in the stray inductance Ls ( (1) Convert it into electric field energy and store it in the capacitor, thereby clamping and buffering the voltage spike; (2) The absorption capacitor Cs is connected in parallel with the thyristor VT, which increases the equivalent capacitance at both ends of the thyristor. When the voltage rises, the charging current of the absorption capacitor Cs slows down the rate of voltage rise, effectively reducing dv / dt and keeping it below the critical value in the device datasheet. Example 2

[0057] In this invention, a thyristor RC absorption method and circuit based on simulation optimization are the same as in Example 1, but with the addition of a simulation model parameter setting process based on ABB 5STP26N6500 as an example.

[0058] 1. Sub-circuit definition and port description: Enter the code: "SUBCKT 5STP26N6500 1 2 3" * TERMINALS: AGK”; The explanation is as follows: a. Model name: 5STP26N6500, corresponding to this model of thyristor from ABB. b. Three pins: Pin 1: Anode (A); Pin 2: Gate (G); Pin 3: Cathode (K).

[0059] 2. Internal equivalent circuit structure; The model uses a dual-transistor equivalent model (a combination of PNP and NPN transistors) to describe the four-layer semiconductor structure (PNPN) of the thyristor. (1) Transistor section; Enter the code: "Qpnp 6 4 1 Pfor OFF"; The explanation is as follows: A PNP transistor with nodes 6 (base), 4 (emitter), and 1 (anode) connected.

[0060] Enter the code: "Qnpn 4 6 5 Nfor OFF"; The explanation is as follows: An NPN transistor with nodes 4 (collector), 6 (base), and 5 (emitter) connected. These two transistors are cross-coupled at their base and collector to form a positive feedback structure, simulating the turn-on and turn-off mechanism of a thyristor.

[0061] (2) Resistor network; Enter the code "Rfor 6 4 50MEG"; The explanation is as follows: A high-resistance resistor (50MΩ) in the forward blocking state simulates the leakage current path during turn-off. Enter the code "Rrev 1 4 75MEG"; The explanation is as follows: High resistance (75MΩ) under reverse blocking mode; Enter the code "Rshort 6 5 5MEG"; The explanation is as follows: The high resistance (5MΩ) between the gate and cathode affects the trigger sensitivity. Enter the code "Rlat 2 6 0.85"; The explanation is as follows: The gate series resistor (0.85Ω) simulates the resistance of the actual gate drive circuit. Enter the code "Ron 3 5 0.12m"; The explanation is as follows: The equivalent resistance in the on-state (0.12mΩ) simulates the on-state voltage drop.

[0062] (3) Diode section; Enter the code "Dfor 6 4 Zbrk"; The explanation is as follows: A diode connected in parallel with a PNP transistor to simulate forward blocking characteristics; Enter the code "Drev 1 4 Zbrk"; The explanation is as follows: A diode that simulates reverse blocking characteristics; Enter the code "Dgate 6 5 Zgate"; The explanation is as follows: A protective diode between the gate and cathode limits the gate voltage.

[0063] 3. Device model parameter definition; (1) Diode model Zbrk, with the following parameters: "IS=8E-12": Saturation current; “IBV=500U”: Reverse breakdown current (0.5mA); “BV=5600”: Reverse breakdown voltage (5600V); "RS=0.015": Series resistance (15mΩ); “N=1.05”: Emission coefficient; “TT=5U”: transit time (5μs).

[0064] (2) Diode model Zgate, used for gate protection, reverse breakdown voltage BV=25V, suitable for gate voltage range.

[0065] (3) Transistor model Pfor (PNP); The code is as follows: "IS=5E-9": Saturation current "BF=0.88": Forward current gain "CJE=15n, CJC=8n": Junction capacitance "TF=0.8U": Positive transit time Other parameters define carrier transport and Early effects, etc.

[0066] (3) Transistor model Nfor(NPN); With similar structures and parameters such as BF=7.2 and CJE=12n, they together form a positive feedback path.

[0067] In summary, the complete simulation model code for 5STP26N6500 is as follows: "SUBCKT 5STP26N6500 1 2 3" * TERMINALS: AGK Qpnp 6 4 1 Pfor OFF Qnpn 4 6 5 Nfor OFF R for 6 4 50MEG Rrev 1 4 75MEG Rshort 6 5 5MEG Rlat 2 6 0.85 Ron 3 5 0.12m Dfor 6 4 Zbrk Drev 1 4 Zbrk Dgate 6 5 Zgate MODEL Zbrk D (IS=8E-12 IBV=500U BV=5600 RS=0.015 N=1.05 TT=5U) MODEL Zgate D (IS=2E-13 IBV=2m BV=25 VJ=0.5 RS=0.08 N=0.08 TT=2U) MODEL Pfor PNP(IS=5E-9 BF=0.88 CJE=15n CJC=8n TF=0.8U TR=4U VAF=25 IKF=500 ISE=1E-7 NE=1.8 RC=0.008) MODEL Nfor NPN(IS=3E-8 ISE=8E-8 BF=7.2 CJE=12n CJC=7n TR=3U TF=0.6U VAF=25 IKF=650 NE=1.7 RC=0.06 ISC=2E-7 NC=1.5 RE=0.002 ) ENDS.

[0068] Summary of model characteristics: a. Off state: Microampere-level leakage current is simulated using high-resistance resistors Rsfor and Rrev; b. Conduction mechanism: The dual-transistor positive feedback enables the device to turn on rapidly after gate triggering, and Ron simulates the on-state voltage drop; c. Dynamic characteristics: Junction capacitance (CJE, CJC) and transit time (TF, TR) affect switching speed and recovery process; d. Voltage withstand: The reverse breakdown voltage is defined by BV=5600, matching the "6500V" rating in the model number; e. Gate characteristics: Rlat and Zgate together simulate the resistance and voltage protection of a real gate circuit. Example 3

[0069] In this invention, a thyristor RC snubber method and circuit based on simulation optimization are the same as in Example 1. The addition of a process for calling the thyristor model in the SPICE sub-circuit wiring table module is based on Example 1 and / or Example 2. (See...) Figure 2 ,include: 1. In the PSIM component library, select the "SPICE Subcircuit" or "Custom Component" module; 2. In the module properties dialog box, paste the complete 5STP26N6500 sub-circuit code into the "SPICENetlist" or "Model Text" edit box; 3. Define pin mapping relationship: Connect sub-circuit pin 1 (anode A) to the thyristor anode node in the circuit, pin 2 (gate G) to the gate drive signal source, and pin 3 (cathode K) to the circuit common ground or load loop; 4. Configure simulation parameter compatibility options to ensure the model is compatible with the HyperSpice simulator; 5. After the call is completed, this module represents the ABB 5STP26N6500 thyristor in the circuit diagram, and its electrical characteristics can be accurately simulated in the simulation. Example 4

[0070] In this invention, a thyristor RC snubber method and circuit based on simulation optimization are the same as in Example 1. The addition of a HyperSpice simulation step size setting in PSIM2024 is based on Example 1 and / or Example 2 and / or Example 3. (See...) Figure 3 ,include: 1. Simulation time settings: Total simulation time: This is set according to the circuit's operating cycle, and is usually set to the duration of several switching cycles, such as 20ms. Simulation start time: typically 0 seconds.

[0071] 2. Step size control settings: Variable step simulation is adopted to balance simulation accuracy and speed; The maximum step size is set to 1 / 100 to 1 / 1000 of the switching cycle. For example, for a 10kHz switching frequency, the maximum step size can be set to 1μs. The minimum step size is set to 1 / 100 to 1 / 1000 of the maximum step size, for example, 10 ns; The relative tolerance is usually set to 0.001 (0.1%), and the absolute tolerance is set to 1e-9.

[0072] 3. Emulator option settings: The integration method chosen is "Trapezoidal," which strikes a good balance between accuracy and stability. Enable the "Convergence Aid" option to prevent non-convergence during simulation; Set the "Iteration Limit" to an appropriate value (such as 50 times) to ensure stable simulation operation.

[0073] 4. Waveform output settings: Set the waveform storage step size (Plot Step) to an integer multiple of the simulation step size to control the output file size; Select the key variables to be observed, such as the voltage across the thyristor V_ak, the load current, and the RC branch current.

[0074] With the above settings, the high efficiency and parallel computing advantages of the HyperSpice simulator can be fully utilized to quickly complete the simulation analysis of multiple RC parameter combinations while ensuring simulation accuracy. Example 5

[0075] In this invention, a thyristor RC absorption method and circuit based on simulation optimization are the same as in Example 1, but simulation waveform description and comparative analysis are added based on Example 1 and / or Example 2 and / or Example 3 and / or Example 4.

[0076] 1. Voltage stress analysis without absorption circuit; See Figure 4 and Figure 5 Simulations were conducted without an RC snubber network, revealing a rapid rise in reverse voltage across the thyristor during turn-off. The waveform shows a voltage spike exceeding 6500V, reaching the thyristor's repetitive peak voltage (V_DRM) at 5600V, indicating voltage breakdown at this point. This result directly verifies that, without protective measures, voltage spikes caused by stray inductance during turn-off pose a serious threat to the thyristor.

[0077] 2. Improved protection effect of the optimized absorption circuit; See Figure 6 and Figure 7 After incorporating the optimized RC snubber network (R=60Ω, C=2.4μF, Ls=100nH), the thyristor turn-off voltage waveform was significantly improved. The peak voltage was suppressed to 3242.3V, a reduction of approximately 50% compared to the circuit without snubber, and significantly lower than the thyristor's repetitive peak voltage of 5600V. Simultaneously, the voltage rise rate (dv / dt) was also greatly reduced, effectively avoiding the risk of false turn-on due to excessively high voltage change rate. These results demonstrate that the designed RC snubber circuit can significantly reduce voltage stress during turn-off and improve system reliability.

[0078] 3. Simulation comparison under different combinations of RC parameters; See Figures 8-25 This is a comparison chart of the turn-off voltage waveforms under different combinations of RC parameters in PSIM simulation, specifically including the following 16 combinations, see... Figure 25 .

[0079] 4. Waveform analysis; By comparing and analyzing the above 16 sets of waveforms, the following conclusions can be drawn: (1) Effect of absorption capacitor Cs: Under the same resistance value, increasing the absorption capacitor Cs can reduce the peak value of the turn-off voltage, but an excessively large capacitor will lead to increased power consumption and increased volume. (2) Effect of resistor Rs: Under the same capacitance value, increasing the resistor Rs can suppress oscillation, but if the resistance value is too large, the absorption effect will be reduced; (3) Confirmation of optimal parameters: By comprehensively comparing various waveforms, when R=60Ω and C=2.4μF (corresponding to Figure 22 The combination of parameters is determined to be the optimal combination because it has the lowest peak turn-off voltage (231V), meets the requirements for dv / dt, and has the resistor power consumption and capacitor volume within a reasonable range.

[0080] This invention verifies the effectiveness and reliability of the PSIM simulation-based RC absorption parameter optimization method through intuitive comparison of multiple sets of simulation waveforms. This method can not only quickly determine the optimal RC parameters, but also evaluate the system performance under different parameter combinations through waveform analysis, providing a visual basis for engineering practice and significantly improving design efficiency and system reliability.

[0081] This invention utilizes the HyperSpice simulation software in PSIM2024 to establish an accurate circuit model incorporating stray parameters and device characteristics. It can realistically simulate voltage spikes and dv / dt changes during thyristor turn-off. Compared to traditional empirical formulas, this invention fully considers practical factors such as circuit topology, wiring inductance, and load characteristics, resulting in more accurate RC parameter design. This avoids increased size and cost due to conservative parameters, or device damage caused by insufficient protection. It can complete simulation analysis of multiple RC parameter combinations in a short time. Through the parameter scanning function, it quickly selects the optimal parameter combination that meets voltage suppression and dv / dt limitation requirements, reducing the traditional trial-and-error process that takes weeks or even months to just hours, significantly shortening the product development cycle. It provides intuitive waveform output, allowing designers to directly observe key waveforms such as thyristor turn-off voltage, RC branch current, and reverse recovery characteristics under different RC parameters. This allows for real-time evaluation of the impact of parameter changes on system performance. This visual design approach makes the debugging process more transparent and facilitates engineering. The simulation optimization method allows for the understanding and optimization of RC parameters. Accurate simulation-determined RC parameters effectively suppress turn-off voltage spikes and limit dv / dt, ensuring the thyristor operates within a safe voltage range and reducing the risk of false turn-on and voltage breakdown. Simultaneously, simulation verification of the peak current, RMS current, and losses of the absorption capacitor Cs allows for the selection of components with sufficient margin, improving the long-term reliability of the system. This simulation optimization method, while meeting protection requirements, comprehensively considers factors such as resistor power consumption, capacitor size, and system cost, achieving the optimal balance between protection effectiveness and economy. For example, the minimum effective capacitance value determined through simulation can avoid cost increases due to over-design. It is applicable to different thyristor models, circuit topologies, and operating conditions. Simply adjusting the device parameters and circuit structure in the simulation model allows for rapid adaptation to new application scenarios, demonstrating strong versatility and scalability. Parameter optimization in a virtual simulation environment avoids damage to power devices caused by repeated physical testing, reducing safety risks and economic losses during debugging.

Claims

1. A thyristor RC absorption method based on simulation optimization, characterized in that, include: S1. Establish a simulation model: A circuit model was built in the HyperSpice simulation environment of PSIM software. The circuit model includes a RC snubber network, which is connected in parallel with the thyristor. The stray inductance Ls is connected in series in the RC snubber network. S2. Perform preliminary simulation: Run HyperSpice simulation without adding a RC snubber network to the circuit model to obtain the voltage spike and dv / dt data when the thyristor is turned off. S3. Perform parametric simulation: A resistor-capacitor (RC) snubber network is added to the circuit model. Multiple sets of values ​​are set for the resistor Rs and the snubber capacitor Cs in the RC snubber network, and simulations are performed for multiple sets of different RC parameter combinations. S4. Analyze the simulation results: By comparing the voltage spike, dv / dt data and resistor power consumption when the thyristor is turned off under different combinations of RC parameters, the RC parameters that meet the safety margin and balance power consumption and volume are selected. S5. Verify and determine parameters: The reverse recovery characteristics and softness coefficient of the thyristor are verified by simulation waveform. Combined with the peak current, root mean square current and loss calculation of the absorption capacitor Cs, the model and parameters of resistor Rs and absorption capacitor Cs in the RC snubber network are determined.

2. The thyristor RC absorption method based on simulation optimization according to claim 1, characterized in that, In S3, the values ​​of the resistor Rs include 10Ω, 20Ω, 30Ω, and 60Ω, and the values ​​of the absorption capacitor Cs include 1μF, 1.5μF, 2.4μF, and 3.5μF. A total of 16 simulations were performed.

3. The thyristor RC absorption method based on simulation optimization according to claim 1, characterized in that, In S4, the formula for calculating the power consumption of the resistor is: ①； in: This represents the value of the absorption capacitance Cs, in μF. This represents the voltage across the absorption capacitor Cs, in volts (V). This indicates the operating frequency of the RC snubber network, in Hz. This indicates the power dissipation of the resistor, measured in watts (W).

4. The thyristor RC absorption method based on simulation optimization according to claim 1, characterized in that, In S5, the selection of the absorption capacitor Cs is based on the peak current. Root mean square current Dielectric loss Internal resistance loss ; The formula for calculating dielectric loss is: ②； The formula for calculating internal resistance loss is: ③； in: This represents the repetitive peak voltage of the absorption capacitor Cs, in volts (V). This represents the dielectric loss factor of the absorption capacitor Cs; This represents the root mean square current of the absorption capacitor Cs, in amperes (A). This represents the internal resistance of the absorption capacitor Cs, in Ω.

5. The thyristor RC absorption method based on simulation optimization according to claim 1, characterized in that, In S5, the formula for calculating the softness coefficient is as follows: ④； in: This indicates the flexibility coefficient of the thyristor; This indicates the reverse recovery time of the thyristor, in μs. This indicates the time it takes for the reverse recovery current of the thyristor to rise from 0 to its peak value, expressed in μs.

6. A simulation-optimized thyristor RC snubber circuit for implementing the method as described in any one of claims 1-5, characterized in that, This includes a circuit model, which consists of a DC power supply, thyristors, gate drive circuit, load, and RC snubber network. A DC power supply is used to provide operating voltage for the circuit model. The positive terminal of the DC power supply is connected to the anode of the thyristor, and the negative terminal of the DC power supply is connected to the cathode of the thyristor. The load is connected in series between the positive terminal of the DC power supply and the anode of the thyristor. The gate drive circuit is used to control the turn-on and turn-off of the thyristor. The gate drive circuit is connected between the gate and the cathode of the thyristor. The load is used to simulate electrical loads under actual working conditions. The load includes an RL load consisting of a resistor and an inductor connected in series. A resistor-capacitor (RC) snubber network is connected in parallel between the anode and cathode of the thyristor. The RC snubber network includes a resistor Rs and a snubber capacitor Cs connected in series. The stray inductance Ls is used to simulate the parasitic inductance in a circuit and is connected in series in a resistor-capacitor snubber network.

7. A thyristor RC snubber circuit based on simulation optimization according to claim 6, characterized in that, The value of the stray inductance Ls ranges from 10nH to 100nH.

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