Photosensitive pixel circuit, image sensor, camera module and electronic device

Abstract

The application discloses a photosensitive pixel circuit, an image sensor, a camera module and electronic equipment, and belongs to the technical field of camera equipment. The photosensitive pixel circuit comprises a signal output module, a delay control module, a counting module and an event trigger logic module. The signal output module is used for generating a pulse wave signal based on a light signal received by a pixel, and outputting a first pulse square wave signal based on the pulse wave signal. The delay control module is used for receiving the first pulse square wave signal, and adjusting a time interval of the pulse wave signal output by the signal output module according to the first pulse square wave signal. The counting module is used for receiving the first pulse square wave signal, obtaining a second pulse square wave signal according to the first pulse square wave signal, counting photons according to the second pulse square wave signal, and outputting a counting value to the event trigger logic module. The event trigger logic module is used for outputting a first event trigger signal or a second event trigger signal according to the counting value, the first event trigger signal being used for representing a brightness change direction of a pixel from bright to dark, and the second event trigger signal being used for representing a brightness change direction of a pixel from dark to bright.

Description

Technical Field

[0001] This application belongs to the field of camera equipment technology, specifically relating to a photosensitive pixel circuit, an image sensor, a camera module, and an electronic device. Background Technology

[0002] Dynamic Vision Sensor (DVS), sometimes called Event Camera or Silicon Retina, is a relatively new type of camera that differs significantly from traditional cameras in its data transmission format. It transmits data asynchronously, based on events. There are two main types of event cameras: DVS and DAVIS (Dynamic and Active Pixel Vision Sensor). DVS is a standard event camera, while DAVIS can transmit grayscale images simultaneously with events.

[0003] Currently, traditional DVS chips, which use PPD as the photosensitive element, have a delay in sensing dynamic objects that require high speed and high precision, such as hand shape recognition input, resulting in a large recognition error. Summary of the Invention

[0004] The purpose of this application is to provide a photosensitive pixel circuit, image sensor, camera module, and electronic device that can improve photon counting accuracy by adjusting the output time interval of the pulse wave signal, avoiding the inability to accurately identify high-speed moving objects due to the large output frequency of the photon pulse affecting counting accuracy. By counting photons in the second pulse square wave signal, the polarity of pixel brightness change can be identified based on the photon count value. Furthermore, by outputting an event trigger signal representing the polarity of brightness change based on the count value, the signal processing module can be assisted in determining the motion trajectory of the subject being photographed, thereby improving the sensing accuracy of high-speed moving objects.

[0005] In a first aspect, embodiments of this application provide a photosensitive pixel circuit, including: a signal output module, a delay control module, a counting module, and an event triggering logic module;

[0006] The signal output module is used to generate a pulse wave signal based on the light signal received by a pixel, and output a first pulse square wave signal based on the pulse wave signal.

[0007] The delay control module is used to receive the first pulse square wave signal and adjust the time interval for the signal output module to output the pulse wave signal according to the first pulse square wave signal.

[0008] The counting module is used to receive the first pulse square wave signal, obtain the second pulse square wave signal based on the first pulse square wave signal, perform photon counting based on the second pulse square wave signal, and output the count value to the event triggering logic module.

[0009] The event triggering logic module is used to output a first event triggering signal or a second event triggering signal according to the count value. The first event triggering signal is used to indicate the brightness change direction of a pixel from bright to dark, and the second event triggering signal is used to indicate the brightness change direction of a pixel from dark to bright.

[0010] In this embodiment, by adjusting the output time interval of the pulse wave signal, the photon counting accuracy can be improved, avoiding the inability to accurately identify high-speed moving objects due to the large output frequency of the photon pulse affecting the counting accuracy. By counting photons in the second pulse square wave signal, the polarity of pixel brightness change can be identified based on the photon count value. By outputting an event trigger signal that represents the polarity of brightness change based on the count value, the signal processing module can be assisted in determining the motion trajectory of the subject being photographed, thereby improving the sensing accuracy of high-speed moving objects.

[0011] In some embodiments of this application, the counting module is configured to increment the count value by 1 when the time difference between the (j+1)th square wave interval and the jth square wave interval in the second pulse square wave signal is less than or equal to a first time threshold; or, decrement the count value by 1 when the time difference between the (j+1)th square wave interval and the jth square wave interval in the second pulse square wave signal is greater than or equal to a second time threshold; wherein the first time threshold is less than the second time threshold;

[0012] The event triggering logic module is used to output the first event triggering signal when the count value during the incrementing count is greater than or equal to a first value; or to output the second event triggering signal when the count value during the decrementing count is less than or equal to a second value.

[0013] In this embodiment, by performing incremental or decremental counting based on the second pulse square wave signal, it is possible not only to identify changes in pixel brightness, but also to identify the polarity direction of the pixel brightness changes.

[0014] In some embodiments of this application, the signal output module includes: a photosensitive element, a switching element, and a first inverter;

[0015] The first electrode of the photosensitive element is electrically connected to the first voltage terminal, the second electrode of the photosensitive element is electrically connected to the first terminal of the switching element, and the second terminal of the switching element is connected to the input terminal of the first inverter; the output terminal of the first inverter is connected to the signal input terminals of the delay control module and the counting module respectively; the output terminal of the delay control module is connected to the control terminal of the switching element and the input terminal of the delay control module.

[0016] The photosensitive element is used to output the pulse wave signal based on the optical signal;

[0017] The first inverter is used to receive the pulse wave signal and output the first pulse square wave signal according to the pulse wave signal;

[0018] The delay control module is used to output the (i+1)th signal based on the i-th signal and the first pulse square wave signal. The i-th signal is the output signal of the delay control module at time t, and the (i+1)th signal is the output signal of the delay control module at time t+1, where i is a positive integer.

[0019] The switching element is used to adjust the time interval of the pulse wave signal output by the signal output module according to the (i+1)th signal.

[0020] In this embodiment, by changing the output time interval of the pulse wave signal, the output pulse frequency of the SPAD can be changed, thereby indirectly adjusting the sensitivity of the SPAD.

[0021] In some embodiments of this application, the switching element includes a switching transistor;

[0022] The control electrode of the switching transistor is connected to the output terminal of the delay control module, the first electrode of the switching transistor is connected to the second electrode of the photosensitive element, and the second electrode of the switching transistor is electrically connected to the second voltage terminal.

[0023] In some embodiments of this application, the signal output module further includes a reset transistor;

[0024] The control terminal of the reset transistor is electrically connected to the third voltage terminal, the first terminal of the reset transistor is electrically connected to the second voltage terminal, and the second terminal of the reset transistor is electrically connected to the second terminal of the switching transistor.

[0025] In some embodiments of this application, the delay control module includes: a NOR gate, a secondary gating unit, and a second inverter connected in series;

[0026] The second input terminal of the NOR gate is electrically connected to the output terminal of the second inverter; the output terminal of the NOR gate is electrically connected to the first-level control terminal of the secondary gate control unit, and the second-level control terminal of the secondary gate control unit is electrically connected to the third voltage terminal; the output terminal of the secondary gate control unit is electrically connected to the input terminal of the second inverter; the output terminal of the second inverter is electrically connected to the control terminal of the switching element.

[0027] The NOR gate is used to receive the first pulse square wave signal and the i-th signal output by the second inverter, and output a first enable control signal or a second enable control signal according to the first pulse square wave signal and the i-th signal.

[0028] The secondary gating unit is used to, under the control of the first enable control signal and the output voltage of the third voltage terminal, open the path from the second voltage terminal to the first voltage terminal and input a third enable control signal to the second inverter; or, the secondary gating unit is used to, under the control of the second enable control signal and the output voltage of the third voltage terminal, close the path from the second voltage terminal to the first voltage terminal and input a fourth enable control signal to the second inverter.

[0029] The second inverter is used to receive the third enable control signal and output the fifth enable control signal; or to receive the fourth enable control signal and output the sixth enable control signal.

[0030] The switching element is configured to, under the control of the fifth enable control signal, open the connection path between the photosensitive element and the first inverter; or, under the control of the sixth enable control signal, disconnect the connection path between the photosensitive element and the first inverter.

[0031] In some embodiments of this application, the secondary gating unit includes: a first transistor, a second transistor, a third transistor, and a fourth transistor;

[0032] Wherein, the first terminal of the first transistor is electrically connected to the second voltage terminal, the second terminal of the first transistor is electrically connected to the first terminal of the third transistor, and the control terminal of the first transistor is electrically connected to the third voltage terminal.

[0033] The second terminal of the third transistor is electrically connected to the first terminal of the fourth transistor, and the control terminal of the third transistor is electrically connected to the output terminal of the NOR gate.

[0034] The second terminal of the fourth transistor is electrically connected to the first terminal of the second transistor, and the control terminal of the fourth transistor is electrically connected to the output terminal of the NOR gate.

[0035] The second terminal of the second transistor is electrically connected to the first voltage terminal, and the control terminal of the second transistor is electrically connected to the third voltage terminal;

[0036] The input terminal of the second inverter is electrically connected to the second terminal of the third transistor and the first terminal of the fourth transistor.

[0037] In this embodiment, the NOR gate outputs a corresponding enable control signal to the secondary gate control unit based on the state (1 or 0) of the i-th signal and the first pulse square wave signal, serving as the primary gate control signal. Simultaneously, the switching transistor in the secondary gate control unit is controlled by an adjustable bias voltage, serving as the secondary gate control signal. By adjusting the bias voltage, the time difference between the input and output signals of this NOR gate can be adjusted. After a fixed delay via the second inverter, the generated i+1-th signal is used to control the switching element, thereby controlling the output interval of the pulse wave signal.

[0038] In some embodiments of this application, the counting module includes: a third inverter, a clock module, an AND gate, and a value register module;

[0039] The third inverter is used to receive the first pulse square wave signal and output the second pulse square wave signal to the AND gate;

[0040] The clock module is used to output a clock signal to the AND gate;

[0041] The AND gate is used to generate a sampling signal based on the second pulse square wave signal and the clock signal, and output the sampling signal to the value register module;

[0042] The numerical register module is used to generate the count value based on the sampled signal and output the count value to the event triggering logic module.

[0043] In this embodiment, an AND gate is used to perform an AND operation on the second pulse square wave and the clock signal. A high-level sampling signal is only output when both the second pulse square wave and the clock signal are at a high level. In this way, the counting operation of the numerical register module is strictly synchronized with the system clock.

[0044] In some embodiments of this application, the numerical register module includes N cascaded flip-flops;

[0045] Wherein, the output terminal of the i-th flip-flop is electrically connected to the clock signal input terminal of the (i+1)-th flip-flop, i=1,2,…,N-1; the clock signal input terminal of the first flip-flop is connected to the output terminal of the AND gate;

[0046] The signal input terminals of the N flip-flops are electrically connected to the fourth voltage terminal;

[0047] The outputs of the N flip-flops are electrically connected to the inputs of the event triggering logic module.

[0048] Secondly, embodiments of this application provide an image sensor, including the photosensitive pixel circuit described in the first aspect.

[0049] In this embodiment, when photographing a moving object, multiple photosensitive elements in the photosensitive pixel circuit array will sequentially sense the object in the time domain. By identifying the polarity of the brightness change of each pixel and outputting an event trigger signal, the motion trajectory of the object can be determined based on the event trigger signal corresponding to each pixel, thereby improving the accuracy of the recognition of the motion direction of the moving object and improving the photographing effect of the moving object.

[0050] Thirdly, this application also provides a camera module, which includes an image sensor as described in the second aspect.

[0051] In this embodiment, when the camera module captures a moving object, multiple photosensitive elements in the photosensitive pixel circuit array of the image sensor will sequentially sense the object in the time domain. By identifying the polarity of the brightness change of each pixel and outputting an event trigger signal, the motion trajectory of the object can be determined based on the event trigger signal corresponding to each pixel, thereby improving the accuracy of the recognition of the motion direction of the moving object and improving the photography effect of the moving object.

[0052] Fourthly, embodiments of this application provide an electronic device, including a signal processing module and the camera module described in the third aspect;

[0053] The signal processing module is used to receive multiple event trigger signals output by the image sensor, and determine the motion trajectory of the subject based on the multiple event trigger signals.

[0054] In this embodiment, when a camera module in an electronic device is used to photograph a moving object, multiple photosensitive elements in the photosensitive pixel circuit array of the image sensor will sequentially sense the object in the time domain. By identifying the polarity of the brightness change of each pixel and outputting an event trigger signal, the motion trajectory of the object can be determined based on the event trigger signal corresponding to each pixel, thereby improving the accuracy of the recognition of the motion direction of the moving object and improving the photographing effect of the moving object.

[0055] In the above scheme, the photosensitive pixel circuit includes a signal output module, a delay adjustment module, a counting module, and an event triggering logic module. The signal output module generates a pulse wave signal based on the light signal and outputs a first pulse square wave signal based on the pulse wave signal. The delay adjustment module receives the first pulse square wave signal and adjusts the time interval of the pulse wave signal output by the signal output module according to the first pulse square wave signal. The counting module receives the first pulse square wave signal, obtains a second pulse square wave signal based on the first pulse square wave signal, counts photons based on the second pulse square wave signal, and outputs the count value to the event triggering logic module. The event triggering logic module outputs a first event trigger signal or a second event trigger signal based on the count value. The first event trigger signal indicates the direction of brightness change of the pixel from bright to dark, and the second event trigger signal indicates the direction of brightness change of the pixel from dark to bright. Thus, by adjusting the output time interval of the pulse wave signal, the photon counting accuracy can be improved, avoiding the inability to accurately identify high-speed dynamic objects due to the large output frequency of the photon pulse affecting the counting accuracy. By counting photons in the second pulse square wave signal, the polarity of pixel brightness change can be identified based on the photon count value. An event trigger signal that represents the polarity of brightness change can be output based on the count value to assist the signal processing module in judging the motion trajectory of the subject and improve the sensing accuracy of high-speed dynamic objects. Attached Figure Description

[0056] Figure 1 A schematic diagram illustrating the photosensitive pixel circuitry of some embodiments of the application;

[0057] Figure 2 A schematic diagram illustrating a high-speed CMOS circuit according to some embodiments of this application;

[0058] Figure 3 This application illustrates some embodiments. Figure 2 A schematic diagram of the logic symbol for the circuit shown.

[0059] Figure 4 A cross-sectional schematic diagram showing some embodiments of a camera module according to this application;

[0060] Figure 5 A schematic diagram illustrating the structure of an electronic device according to some embodiments of this application.

[0061] Explanation of reference numerals in the attached figures:

[0062] 1-Signal output module; 11-Photosensitive element; 12-Switching element; 13-First inverter; 2-Delay control module; 21-NOR gate; 22-Second-level gate control unit; 23-Second inverter; 3-Counting module; 31-Third inverter; 32-Clock module; 33-AND gate; 34-Value register module; 4-Event triggering logic module; 41-Protective cover; 42-Lens assembly; 43-Voice coil motor; 44-Base; 45-Infrared filter; 46-Image sensor. Detailed Implementation

[0063] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0064] The terms "first," "second," etc., used in the specification and claims of this application are used to distinguish similar objects and not to describe a specific order or sequence. It should be understood that such use of data can be interchanged where appropriate so that embodiments of this application can be implemented in orders other than those illustrated or described herein. Furthermore, in the specification and claims, "and / or" indicates at least one of the connected objects, and the character " / " generally indicates that the preceding and following objects are in an "or" relationship.

[0065] The control method provided in this application will be described in detail below with reference to the accompanying drawings, through specific embodiments and application scenarios.

[0066] Please refer to Figure 1 This invention provides a photosensitive pixel circuit, comprising:

[0067] Signal output module 1 is used to generate a pulse wave signal based on the light signal received by a pixel, and output a first pulse square wave signal based on the pulse wave signal;

[0068] The delay control module 2 is used to receive the first pulse square wave signal and adjust the time interval of the pulse wave signal output by the signal output module 1 according to the first pulse square wave signal.

[0069] The counting module 3 is used to receive the first pulse square wave signal, obtain the second pulse square wave signal based on the first pulse square wave signal, perform photon counting based on the second pulse square wave signal, and output the counting value to the event triggering logic module 4.

[0070] Event triggering logic module 4 is used to output a first event triggering signal or a second event triggering signal according to the count value. The first event triggering signal is used to indicate the brightness change direction of a pixel from bright to dark, and the second event triggering signal is used to indicate the brightness change direction of a pixel from dark to bright.

[0071] The first pulse square wave signal is an inverted square wave signal obtained by amplifying and shaping the pulse wave signal. The second pulse square wave signal is the inverse of the first pulse square wave signal, meaning that the waveforms of the second pulse square wave signal and the first pulse square wave signal are mirror images of each other relative to the time axis, such as when the time axis is at zero level. Therefore, the second pulse square wave signal is the shaped signal corresponding to the pulse wave signal, and the waveform and phase of the second pulse square wave signal are consistent with the pulse wave signal.

[0072] In the above embodiments, by adjusting the output time interval of the pulse wave signal, the photon counting accuracy can be improved, avoiding the inability to accurately identify high-speed moving objects due to the large output frequency of the photon pulse affecting the counting accuracy. By counting photons in the second pulse square wave signal, the polarity of pixel brightness change can be identified based on the photon count value. By outputting an event trigger signal that represents the polarity of brightness change based on the count value, the signal processing module can be assisted in determining the motion trajectory of the subject being photographed, thereby improving the sensing accuracy of high-speed moving objects.

[0073] In some embodiments of this application, the counting module 3 is configured to increment the count value by 1 when the time difference between the (j+1)th square wave interval and the jth square wave interval in the second pulse square wave signal is less than or equal to a first time threshold; or, decrement the count value by 1 when the time difference between the (j+1)th square wave interval and the jth square wave interval in the second pulse square wave signal is greater than or equal to a second time threshold; wherein the first time threshold is less than the second time threshold.

[0074] Event triggering logic module 4 is used to output a first event trigger signal when the count value during the incrementing count is greater than or equal to a first value; or to output a second event trigger signal when the count value during the decrementing count is less than or equal to a second value.

[0075] For example, if the time difference between two pulse square waves is less than or equal to 10 ns, it means that the number of photons received by a pixel per unit time is greater than the first threshold. The more photons received, the higher the pixel brightness. Therefore, counting module 3 performs an incrementing count operation, adding 1 to the count value. For example, if the time difference between two pulse square waves is greater than or equal to 15 ns, it means that the number of photons received by a pixel per unit time is less than the second threshold. The fewer photons received, the lower the pixel brightness. Therefore, counting module 3 performs a decrementing count operation, reducing the decrementing count value by 1. Here, 10 ns and 15 ns are merely examples and are not considered limitations.

[0076] For example, the event triggering logic module 4 monitors the incrementing and decrementing count values ​​output by the counting module 3 in real time. When the counting module 3 starts counting from "0" and increments by "1" each time until the count value reaches "30", the event triggering logic module 4 outputs "+3V" as the first event trigger signal, representing an increase in pixel brightness, i.e., the direction of brightness change from bright to dark for a pixel. When the counting module 3 starts counting from "60" and decrements by "1" each time until the count value reaches "30", the event triggering logic module 4 outputs "-3V" as the second event trigger signal, representing a decrease in pixel brightness, i.e., the direction of brightness change from dark to bright for a pixel. Here, "30", "+3V", and "-3V" are merely examples and are not intended to be limiting.

[0077] It should be noted that whether the first event trigger signal or the second event trigger signal is output, it represents a change in the brightness of a pixel, meaning that the pixel has captured a moving object. Furthermore, by combining the polarity of the pixel's brightness change, the direction of the object's movement can be determined. For example, if a pixel changes from bright to dark, it indicates that the object is moving away from the photosensitive element; if a pixel changes from dark to bright, it indicates that the object is moving closer to the photosensitive element.

[0078] In this embodiment, by performing incremental or decremental counting based on the second pulse square wave signal, it is possible not only to identify changes in pixel brightness, but also to identify the polarity direction of the pixel brightness changes.

[0079] In some embodiments of this application, the signal output module 1 includes: a photosensitive element 11, a switching element 12, and a first inverter 13;

[0080] The first electrode of the photosensitive element 11 is electrically connected to the first voltage terminal VSS, and the second electrode of the photosensitive element 11 is electrically connected to the first terminal of the switching element 12. The second terminal of the switching element 12 is connected to the input terminal of the first inverter 13. The output terminal of the first inverter 13 is connected to the signal input terminals of the delay control module 2 and the counting module 3, respectively. The output terminal of the delay control module 2 is connected to the control terminal of the switching element 12 and the input terminal of the delay control module 2.

[0081] Among them, the photosensitive element 11 is used to generate and output a pulse wave signal based on the optical signal;

[0082] The first inverter 13 is used to receive the pulse wave signal and output the first pulse square wave signal according to the pulse wave signal;

[0083] The delay control module 2 is used to output the (i+1)th signal based on the i-th signal and the first pulse square wave signal. The i-th signal is the output signal of the delay control module 2 at time t, and the (i+1)th signal is the output signal of the delay control module 2 at time t+1, where i is a positive integer.

[0084] The switching element 12 is used to control the on / off state according to the (i+1)th signal to adjust the time interval of the pulse wave signal output by the signal output module 1.

[0085] like Figure 1 In this design, the photosensitive element 11 is a single-photon avalanche diode (SPAD). Compared to a PPD, a SPAD has extremely high sensitivity. During the exposure stage, each photon that strikes the SPAD will generate a corresponding electrical signal. That is, when the SPAD detects a single photon, it will produce an avalanche effect, thereby outputting an electrical signal pulse.

[0086] See Figure 1 The pulse wave signal generated by the SPAD is shaped into a first pulse square wave signal by the first inverter 13 and the NOT gate amplifier. The delay control module 2 is used to control the working time of the SPAD by using the output signal, thereby adjusting the time interval of the output pulse wave signal of the SPAD. By changing the output time interval of the pulse wave signal, the output pulse frequency of the SPAD can be changed, thereby indirectly adjusting the sensitivity of the SPAD. Among them, the i-th signal output by the delay control module 2 at time t is used as a feedback signal, and the feedback signal and the first pulse square wave signal are input to the delay control module 2; the delay control module 2 outputs the i+1-th signal at time t+1 according to the i-th signal and the first pulse square wave signal; the i-th signal and the i+1-th signal are used to control the on and off of the switching element 12 at different times.

[0087] In some embodiments of this application, the switching element 12 includes a switching transistor TG; the control electrode of the switching transistor TG is connected to the output terminal of the delay control module 2, the first electrode of the switching transistor TG is connected to the second electrode of the photosensitive element 11, and the second electrode of the switching transistor TG is electrically connected to the second voltage terminal VDD1.

[0088] For example, when the (i+1)th signal is a high-level signal, the switching transistor TG is turned on, and the photosensitive element 11 outputs a pulse wave signal; when the (i+1)th signal is a low-level signal, the switching transistor TG is turned off, and the photosensitive element 11 stops outputting the pulse wave signal.

[0089] In some embodiments of this application, the signal output module 1 further includes a reset transistor RST;

[0090] The control terminal of the reset transistor RST is electrically connected to the third voltage terminal V_RST, the first terminal of the reset transistor RST is electrically connected to the second voltage terminal VDD1, and the second terminal of the reset transistor RST is electrically connected to the second terminal of the switching transistor TG.

[0091] In practice, during the SPAD-based DVS pixel reset stage, the V_RST signal controls the reset transistor RST to close, resetting and clearing the SPAD device. When entering the exposure stage, the V_RST signal controls the reset transistor RST to open. The SPAD device generates pulse waves under photon irradiation.

[0092] In some embodiments of this application, the delay control module 2 includes: a NOR gate 21, a secondary gating unit 22, and a second inverter connected in series;

[0093] The second input terminal of NOR gate 21 is electrically connected to the output terminal of the second inverter 23; the output terminal of NOR gate 21 is electrically connected to the first-level control terminal of the secondary gate control unit 22, and the second-level control terminal of the secondary gate control unit 22 is electrically connected to the third voltage terminal VD; the output terminal of the secondary gate control unit 22 is electrically connected to the input terminal of the second inverter 23; and the output terminal of the second inverter 23 is electrically connected to the control terminal of the switching element 12.

[0094] The NOR gate 21 is used to receive the first pulse square wave signal and the i-th signal output by the second inverter 23, and output the first enable control signal or the second enable control signal according to the first pulse square wave signal and the i-th signal.

[0095] The secondary gate unit 22 is used to, under the control of the first enable control signal and the output voltage of the third voltage terminal VD, open the path from the second voltage terminal VDD1 to the first voltage terminal VSS and input a third enable control signal to the second inverter 23; or, the secondary gate unit 22 is used to, under the control of the second enable control signal and the output voltage of the third voltage terminal VD, close the path from the second voltage terminal VDD1 to the first voltage terminal VSS and input a fourth enable control signal to the second inverter 23.

[0096] The second inverter 23 is used to receive the third enable control signal and output the fifth enable control signal; or to receive the fourth enable control signal and output the sixth enable control signal.

[0097] The switching element 12 is used to turn on the connection path between the photosensitive element 11 and the first inverter 13 under the control of the fifth enable control signal; or, under the control of the sixth enable control signal, to disconnect the connection path between the photosensitive element 11 and the first inverter 13.

[0098] In practice, in the initial stage, the i-th signal is a low-level signal and the first pulse square wave signal is a high-level signal.

[0099] The delay control module 2 consists of three levels of gate circuits connected in series. The three levels of gate control circuits and the switching element 12 are connected in series. The signal output by the delay control module 2 is used to control the switching element 12 to open and close. Among them, the NOT gate, NOR gate and the second-level gate control unit 22 in the delay control module 2 play the role of regulating voltage information.

[0100] NOR gate 21 outputs a corresponding enable control signal ("0" or "1") to secondary gate unit 22 as a primary gate signal based on the state of the i-th signal ("1" or "0") and the first pulse square wave signal (i.e., "1" or "0"). Simultaneously, the voltage value of the third voltage terminal VD serves as the secondary gate signal for secondary gate unit 22. By adjusting the output voltage value of the third voltage terminal VD, the time difference between the input and output signals of NOT gate 21 can be adjusted. After a fixed delay by the second inverter 23, the generated i+1-th signal is used to control the switching element 12 of SPAD to control the output interval of the pulse wave signal.

[0101] In digital circuits, the Boolean expression for an OR gate is Y=(A + B)', and its logic symbol and truth table are shown in Table 1 below.

[0102] Table 1

[0103] The truth table in Table 1 above is used to represent the output value of Y when the values ​​of A and B are 0, 1, 1, and 1 respectively.

[0104] It should be noted that the power supply voltage V of the high-speed CMOS circuit DD Typically +5V, with Vss grounded, usually 0V; a high level is considered logic "1", and the voltage range is: V DD 65%~VDD (or V DD -1.5V~V DD A low level is considered logic "0" and must not exceed V. DD 35% or 0–1.5V. +1.5V to +3.5V should be considered an indeterminate level. Indeterminate levels should be avoided in hardware design. For example... Figure 2 In the circuit, when input terminal A is high, the P-type transistor is cut off and the N-type transistor is turned on, and the output terminal C's level is consistent with Vss, resulting in a low output level. When input terminal A is low, the P-type transistor is turned on and the N-type transistor is cut off, and the output terminal C's level is consistent with Vss, resulting in a low output level. DD If consistent, output a high level. For example... Figure 3 What is shown is Figure 2 The logic symbol of the circuit shown.

[0105] In some embodiments of this application, the secondary gate unit 22 includes: a first transistor MD1, a second transistor MD2, a third transistor MD3, and a fourth transistor MD4;

[0106] Among them, the first terminal of the first transistor MD1 is electrically connected to the second voltage terminal VDD1, the second terminal of the first transistor MD1 is electrically connected to the first terminal of the third transistor MD3, and the control terminal of the first transistor MD1 is electrically connected to the third voltage terminal VD.

[0107] The second terminal of the third transistor MD3 is electrically connected to the first terminal of the fourth transistor MD4, and the control terminal of the third transistor MD3 is electrically connected to the output terminal of the NOR gate 21.

[0108] The second terminal of the fourth transistor MD4 is electrically connected to the first terminal of the second transistor MD2, and the control terminal of the fourth transistor MD4 is electrically connected to the output terminal of the NOR gate 21.

[0109] The second terminal of the second transistor MD2 is electrically connected to the first voltage terminal VSS, and the control terminal of the second transistor MD2 is electrically connected to the third voltage terminal VD.

[0110] The input terminal of the second inverter 23 is electrically connected to the second terminal of the third transistor MD3 and the first terminal of the fourth transistor MD4.

[0111] In this embodiment, the NOR gate 21 outputs a corresponding enable control signal to the secondary gate unit 22 as a primary gate signal based on the state (1 or 0) of the i-th signal and the first pulse square wave signal. Simultaneously, the switching transistors MD1 and MD2 in the secondary gate unit 22 are controlled by adjustable bias voltages VD1 and VD2, serving as secondary gate signals. By adjusting the bias voltages, the time difference between the input and output signals of this NOR gate 21 can be adjusted. After a fixed delay by the second inverter 23, the generated i+1-th signal is used to control the switching element 12 of the SPAD to control the output interval of the pulse wave signal.

[0112] In some embodiments of this application, the counting module 3 includes: a third inverter 31, a clock module 32, an AND gate 33, and a value register module 34;

[0113] The third inverter 31 is used to receive the first pulse square wave signal and output the second pulse square wave signal to the AND gate 33;

[0114] Clock module 32 is used to output clock signal CP to AND gate 33;

[0115] AND gate 33 is used to generate a sampling signal based on the second pulse square wave signal and the clock signal CP, and output the sampling signal to the value register module 34;

[0116] The numerical register module 34 is used to generate the count value based on the sampled signal and output the count value to the event triggering logic module 4.

[0117] In this embodiment, an AND operation is performed on the second pulse square wave and the clock signal using AND gate 33. A high-level sampling signal is only output when both the second pulse square wave and the clock signal CP are simultaneously high. This ensures that the counting operation of the numerical register module 34 is strictly synchronized with the system clock. The numerical register module 34 can obtain the time difference between the (j+1)th square wave interval and the jth square wave interval based on the sampling signal, and increment or decrement the count based on the time difference. In some embodiments of this application, the numerical register module 34 includes N cascaded flip-flops.

[0118] Among them, the output terminal Dn of the nth flip-flop is electrically connected to the clock signal input terminal of the (n+1)th flip-flop, n=1,2,…,N-1; the clock signal input terminal of the 1st flip-flop is connected to the output terminal of AND gate 33;

[0119] The signal input terminal K of N flip-flops is electrically connected to the fourth voltage terminal VDD2;

[0120] The output terminals Dn of N flip-flops are electrically connected to the input terminals of event-triggered logic module 4.

[0121] like Figure 1In the diagram, N flip-flops are cascaded. The output of flip-flop_n is connected to the clock input port C of flip-flop_(n+1). All flip-flops 1 to N share a common reset signal CR. D1 is the data output port of flip-flop_1, and DN is the data output port of flip-flop_N. The flip-flops are cascaded and shifted through a clock signal.

[0122] This application also provides an image sensor, including the photosensitive pixel circuit described above.

[0123] In some embodiments of this application, the image sensor includes multiple photosensitive pixel circuits, and the multiple photosensitive pixel circuits are arranged in an array.

[0124] Among them, the pixel array on the image sensor can determine the direction of movement of a moving object in the time domain with a sensitivity at the photon count level, thus enabling the ability to capture high-precision dynamic object information in real time.

[0125] In this embodiment, when photographing a moving object, multiple photosensitive elements in the photosensitive pixel circuit array will sequentially sense the object in the time domain. By identifying the polarity of the brightness change of each pixel and outputting an event trigger signal, the motion trajectory of the object can be determined based on the event trigger signal corresponding to each pixel, thereby improving the accuracy of the recognition of the motion direction of the moving object and improving the photographing effect of the moving object.

[0126] This application also provides a camera module, which includes the image sensor described above.

[0127] like Figure 4 The image shows a device including a camera module. The camera module includes a protective cover 41, a lens assembly 42, a voice coil motor 43, a base 44, an infrared filter 45, and an image sensor 46.

[0128] The lens assembly 42 is used for light focusing and is fixed by a voice coil motor 43. The upper and lower ends of the voice coil motor 43 are connected to the springs on the base 44. During focusing, the voice coil motor 43 generates an electromagnetic force by being energized. This force is ultimately balanced with the elastic force of the springs. The position of the voice coil motor 43 can be controlled by the amount of energization.

[0129] like Figure 4 In the image sensor 46, the light rays s from the scene converge into the camera module and are projected onto the infrared filter 45. The function of the infrared filter 45 is to filter out unnecessary light rays s projected onto the image sensor 46, preventing the image sensor 46 from producing false colors / ripples, thereby improving its effective resolution and color reproduction. The light rays s after passing through the infrared filter 45 can then be sensed by the image sensor 45.

[0130] This application also provides an electronic device, including a signal processing module and a camera module as described above; the signal processing module is used to receive multiple event trigger signals output by an image sensor, and determine the motion trajectory of the object being photographed based on the multiple event trigger signals.

[0131] See Figure 5 The electronic device includes a camera module 51 and a signal processing module 52. The camera module includes an image sensor 510. The image sensor 510 senses objects in the time domain based on multiple photosensitive elements in the photosensitive pixel circuit array, and sends an event trigger signal to the output signal processing module by identifying the polarity of the brightness change of each pixel. The signal processing module 52 can determine the motion trajectory of the object based on the event trigger signal corresponding to each pixel, thereby improving the recognition accuracy of the motion direction of the moving object and improving the photo effect of the moving object.

[0132] In this embodiment, the signal processing module can analyze the polarity of brightness changes on different pixels and the temporal and spatial order of brightness changes through multiple event trigger signals, thereby accurately determining the direction of motion of the object.

[0133] For example, in a scene depicting a moving soccer ball, as the ball moves from left to right, it is first detected by the pixels on the left side of the image sensor, which then output a sequence of event trigger signals. This is followed by the pixels in the middle and then the right side, which also output their own sequence of event trigger signals. Simultaneously, the area the ball leaves also outputs a sequence of event trigger signals. By continuously recording a series of event trigger signals and analyzing their temporal order, the direction of the soccer ball's movement can be inferred. This allows for the capture of subtle changes in the object's motion, enabling more accurate determination of the direction of movement, even at high speeds. Furthermore, a clearer image can be reconstructed based on the trajectory of the captured object.

[0134] It should be noted that, in this document, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes that element. Furthermore, it should be noted that the scope of the methods and apparatuses in the embodiments of this application is not limited to performing functions in the order shown or discussed, but may also include performing functions substantially simultaneously or in the reverse order, depending on the functions involved. For example, the described methods may be performed in a different order than described, and various steps may be added, omitted, or combined. Additionally, features described with reference to certain examples may be combined in other examples.

[0135] The embodiments of this application have been described above with reference to the accompanying drawings. However, this application is not limited to the specific embodiments described above. The specific embodiments described above are merely illustrative and not restrictive. Those skilled in the art can make many other forms under the guidance of this application without departing from the spirit and scope of the claims, and all of these forms are within the protection scope of this application.

Claims

1. A photosensitive pixel circuit, characterized in that, include: The signal output module is used to generate a pulse wave signal based on the light signal received by a pixel, and to output a first pulse square wave signal based on the pulse wave signal. The delay control module is used to receive the first pulse square wave signal and adjust the time interval for the signal output module to output the pulse wave signal according to the first pulse square wave signal. The counting module is used to receive the first pulse square wave signal, obtain the second pulse square wave signal based on the first pulse square wave signal, perform photon counting based on the second pulse square wave signal, and output the count value to the event triggering logic module. The event triggering logic module is used to output a first event triggering signal or a second event triggering signal according to the count value; The first event trigger signal is used to indicate the direction of brightness change of a pixel from bright to dark, and the second event trigger signal is used to indicate the direction of brightness change of a pixel from dark to bright.

2. The photosensitive pixel circuit according to claim 1, characterized in that, The counting module is configured to increment the count value by 1 when the time difference between the (j+1)th square wave interval and the jth square wave interval in the second pulse square wave signal is less than or equal to a first time threshold; or decrement the count value by 1 when the time difference between the (j+1)th square wave interval and the jth square wave interval in the second pulse square wave signal is greater than or equal to a second time threshold; wherein the first time threshold is less than the second time threshold. The event triggering logic module is used to output the first event triggering signal when the count value during the incrementing count is greater than or equal to a first value; or to output the second event triggering signal when the count value during the decrementing count is less than or equal to a second value.

3. The photosensitive pixel circuit according to claim 1, characterized in that, The signal output module includes: a photosensitive element, a switching element, and a first inverter; The first electrode of the photosensitive element is electrically connected to the first voltage terminal, the second electrode of the photosensitive element is electrically connected to the first terminal of the switching element, and the second terminal of the switching element is connected to the input terminal of the first inverter; the output terminal of the first inverter is connected to the signal input terminals of the delay control module and the counting module respectively; the output terminal of the delay control module is connected to the control terminal of the switching element and the input terminal of the delay control module. The photosensitive element is used to output the pulse wave signal based on the optical signal; The first inverter is used to receive the pulse wave signal and output the first pulse square wave signal according to the pulse wave signal; The delay control module is used to output the (i+1)th signal based on the i-th signal and the first pulse square wave signal. The i-th signal is the output signal of the delay control module at time t, and the (i+1)th signal is the output signal of the delay control module at time t+1, where i is a positive integer. The switching element is used to adjust the time interval of the pulse wave signal output by the signal output module according to the (i+1)th signal.

4. The photosensitive pixel circuit according to claim 3, characterized in that, The switching element includes a switching transistor; The control electrode of the switching transistor is connected to the output terminal of the delay control module, the first electrode of the switching transistor is connected to the second electrode of the photosensitive element, and the second electrode of the switching transistor is electrically connected to the second voltage terminal.

5. The photosensitive pixel circuit according to claim 4, characterized in that, The signal output module further includes: a reset transistor; The control terminal of the reset transistor is electrically connected to the third voltage terminal, the first terminal of the reset transistor is electrically connected to the second voltage terminal, and the second terminal of the reset transistor is electrically connected to the second terminal of the switching transistor.

6. The photosensitive pixel circuit according to claim 3, characterized in that, The delay control module includes: a NOR gate, a two-stage gate control unit, and a second inverter connected in series; The second input terminal of the NOR gate is electrically connected to the output terminal of the second inverter; the output terminal of the NOR gate is electrically connected to the first-level control terminal of the secondary gate control unit, and the second-level control terminal of the secondary gate control unit is electrically connected to the third voltage terminal; the output terminal of the secondary gate control unit is electrically connected to the input terminal of the second inverter; the output terminal of the second inverter is electrically connected to the control terminal of the switching element. The NOR gate is used to receive the first pulse square wave signal and the i-th signal output by the second inverter, and output a first enable control signal or a second enable control signal according to the first pulse square wave signal and the i-th signal. The secondary gating unit is used to, under the control of the first enable control signal and the output voltage of the third voltage terminal, open the path from the second voltage terminal to the first voltage terminal and input a third enable control signal to the second inverter; or, the secondary gating unit is used to, under the control of the second enable control signal and the output voltage of the third voltage terminal, close the path from the second voltage terminal to the first voltage terminal and input a fourth enable control signal to the second inverter. The second inverter is used to receive the third enable control signal and output the fifth enable control signal; or to receive the fourth enable control signal and output the sixth enable control signal. The switching element is configured to, under the control of the fifth enable control signal, open the connection path between the photosensitive element and the first inverter; or, under the control of the sixth enable control signal, disconnect the connection path between the photosensitive element and the first inverter.

7. The photosensitive pixel circuit according to claim 6, characterized in that, The secondary gate unit includes: a first transistor, a second transistor, a third transistor, and a fourth transistor; Wherein, the first terminal of the first transistor is electrically connected to the second voltage terminal, the second terminal of the first transistor is electrically connected to the first terminal of the third transistor, and the control terminal of the first transistor is electrically connected to the third voltage terminal. The second terminal of the third transistor is electrically connected to the first terminal of the fourth transistor, and the control terminal of the third transistor is electrically connected to the output terminal of the NOR gate. The second terminal of the fourth transistor is electrically connected to the first terminal of the second transistor, and the control terminal of the fourth transistor is electrically connected to the output terminal of the NOR gate. The second terminal of the second transistor is electrically connected to the first voltage terminal, and the control terminal of the second transistor is electrically connected to the third voltage terminal; The input terminal of the second inverter is electrically connected to the second terminal of the third transistor and the first terminal of the fourth transistor.

8. The photosensitive pixel circuit according to claim 1, characterized in that, The counting module includes: a third inverter, a clock module, an AND gate, and a value register module; The third inverter is used to receive the first pulse square wave signal and output the second pulse square wave signal to the AND gate; The clock module is used to output a clock signal to the AND gate; The AND gate is used to generate a sampling signal based on the second pulse square wave signal and the clock signal, and output the sampling signal to the value register module; The numerical register module is used to generate the count value based on the sampled signal and output the count value to the event triggering logic module.

9. The photosensitive pixel circuit according to claim 8, characterized in that, The numerical register module includes N cascaded triggers; Wherein, the output of the nth flip-flop is electrically connected to the clock signal input of the (n+1)th flip-flop, n=1,2,…,N-1; the clock signal input of the 1st flip-flop is connected to the output of the AND gate; The signal input terminals of the N flip-flops are electrically connected to the fourth voltage terminal; The outputs of the N flip-flops are electrically connected to the inputs of the event triggering logic module.

10. An image sensor, characterized in that, Includes the photosensitive pixel circuit as described in any one of claims 1 to 9.

11. The image sensor according to claim 10, characterized in that, The image sensor includes multiple photosensitive pixel circuits, and the multiple photosensitive pixel circuits are arranged in an array.

12. A camera module, characterized in that, Including the image sensor as described in claim 10 or 11.

13. An electronic device, characterized in that, Includes a signal processing module and the camera module as described in claim 12; The signal processing module is used to receive multiple event trigger signals output by the image sensor, and determine the motion trajectory of the subject based on the multiple event trigger signals.

Images